coda-bit.c 63 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240
  1. /*
  2. * Coda multi-standard codec IP - BIT processor functions
  3. *
  4. * Copyright (C) 2012 Vista Silicon S.L.
  5. * Javier Martin, <javier.martin@vista-silicon.com>
  6. * Xavier Duret
  7. * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/irqreturn.h>
  16. #include <linux/kernel.h>
  17. #include <linux/log2.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/reset.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-common.h>
  23. #include <media/v4l2-ctrls.h>
  24. #include <media/v4l2-fh.h>
  25. #include <media/v4l2-mem2mem.h>
  26. #include <media/videobuf2-v4l2.h>
  27. #include <media/videobuf2-dma-contig.h>
  28. #include <media/videobuf2-vmalloc.h>
  29. #include "coda.h"
  30. #include "imx-vdoa.h"
  31. #define CREATE_TRACE_POINTS
  32. #include "trace.h"
  33. #define CODA_PARA_BUF_SIZE (10 * 1024)
  34. #define CODA7_PS_BUF_SIZE 0x28000
  35. #define CODA9_PS_SAVE_SIZE (512 * 1024)
  36. #define CODA_DEFAULT_GAMMA 4096
  37. #define CODA9_DEFAULT_GAMMA 24576 /* 0.75 * 32768 */
  38. static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
  39. static inline int coda_is_initialized(struct coda_dev *dev)
  40. {
  41. return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
  42. }
  43. static inline unsigned long coda_isbusy(struct coda_dev *dev)
  44. {
  45. return coda_read(dev, CODA_REG_BIT_BUSY);
  46. }
  47. static int coda_wait_timeout(struct coda_dev *dev)
  48. {
  49. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  50. while (coda_isbusy(dev)) {
  51. if (time_after(jiffies, timeout))
  52. return -ETIMEDOUT;
  53. }
  54. return 0;
  55. }
  56. static void coda_command_async(struct coda_ctx *ctx, int cmd)
  57. {
  58. struct coda_dev *dev = ctx->dev;
  59. if (dev->devtype->product == CODA_960 ||
  60. dev->devtype->product == CODA_7541) {
  61. /* Restore context related registers to CODA */
  62. coda_write(dev, ctx->bit_stream_param,
  63. CODA_REG_BIT_BIT_STREAM_PARAM);
  64. coda_write(dev, ctx->frm_dis_flg,
  65. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  66. coda_write(dev, ctx->frame_mem_ctrl,
  67. CODA_REG_BIT_FRAME_MEM_CTRL);
  68. coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  69. }
  70. if (dev->devtype->product == CODA_960) {
  71. coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
  72. coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  73. }
  74. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  75. coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  76. coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  77. coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  78. trace_coda_bit_run(ctx, cmd);
  79. coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  80. }
  81. static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  82. {
  83. struct coda_dev *dev = ctx->dev;
  84. int ret;
  85. coda_command_async(ctx, cmd);
  86. ret = coda_wait_timeout(dev);
  87. trace_coda_bit_done(ctx);
  88. return ret;
  89. }
  90. int coda_hw_reset(struct coda_ctx *ctx)
  91. {
  92. struct coda_dev *dev = ctx->dev;
  93. unsigned long timeout;
  94. unsigned int idx;
  95. int ret;
  96. if (!dev->rstc)
  97. return -ENOENT;
  98. idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
  99. if (dev->devtype->product == CODA_960) {
  100. timeout = jiffies + msecs_to_jiffies(100);
  101. coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
  102. while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
  103. if (time_after(jiffies, timeout))
  104. return -ETIME;
  105. cpu_relax();
  106. }
  107. }
  108. ret = reset_control_reset(dev->rstc);
  109. if (ret < 0)
  110. return ret;
  111. if (dev->devtype->product == CODA_960)
  112. coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
  113. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  114. coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
  115. ret = coda_wait_timeout(dev);
  116. coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
  117. return ret;
  118. }
  119. static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
  120. {
  121. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  122. struct coda_dev *dev = ctx->dev;
  123. u32 rd_ptr;
  124. rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  125. kfifo->out = (kfifo->in & ~kfifo->mask) |
  126. (rd_ptr - ctx->bitstream.paddr);
  127. if (kfifo->out > kfifo->in)
  128. kfifo->out -= kfifo->mask + 1;
  129. }
  130. static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
  131. {
  132. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  133. struct coda_dev *dev = ctx->dev;
  134. u32 rd_ptr, wr_ptr;
  135. rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
  136. coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  137. wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
  138. coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  139. }
  140. static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
  141. {
  142. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  143. struct coda_dev *dev = ctx->dev;
  144. u32 wr_ptr;
  145. wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
  146. coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  147. }
  148. static int coda_bitstream_pad(struct coda_ctx *ctx, u32 size)
  149. {
  150. unsigned char *buf;
  151. u32 n;
  152. if (size < 6)
  153. size = 6;
  154. buf = kmalloc(size, GFP_KERNEL);
  155. if (!buf)
  156. return -ENOMEM;
  157. coda_h264_filler_nal(size, buf);
  158. n = kfifo_in(&ctx->bitstream_fifo, buf, size);
  159. kfree(buf);
  160. return (n < size) ? -ENOSPC : 0;
  161. }
  162. static int coda_bitstream_queue(struct coda_ctx *ctx,
  163. struct vb2_v4l2_buffer *src_buf)
  164. {
  165. u32 src_size = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
  166. u32 n;
  167. n = kfifo_in(&ctx->bitstream_fifo,
  168. vb2_plane_vaddr(&src_buf->vb2_buf, 0), src_size);
  169. if (n < src_size)
  170. return -ENOSPC;
  171. src_buf->sequence = ctx->qsequence++;
  172. return 0;
  173. }
  174. static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
  175. struct vb2_v4l2_buffer *src_buf)
  176. {
  177. unsigned long payload = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
  178. int ret;
  179. if (coda_get_bitstream_payload(ctx) + payload + 512 >=
  180. ctx->bitstream.size)
  181. return false;
  182. if (vb2_plane_vaddr(&src_buf->vb2_buf, 0) == NULL) {
  183. v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
  184. return true;
  185. }
  186. /* Add zero padding before the first H.264 buffer, if it is too small */
  187. if (ctx->qsequence == 0 && payload < 512 &&
  188. ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
  189. coda_bitstream_pad(ctx, 512 - payload);
  190. ret = coda_bitstream_queue(ctx, src_buf);
  191. if (ret < 0) {
  192. v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
  193. return false;
  194. }
  195. /* Sync read pointer to device */
  196. if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
  197. coda_kfifo_sync_to_device_write(ctx);
  198. ctx->hold = false;
  199. return true;
  200. }
  201. void coda_fill_bitstream(struct coda_ctx *ctx, struct list_head *buffer_list)
  202. {
  203. struct vb2_v4l2_buffer *src_buf;
  204. struct coda_buffer_meta *meta;
  205. unsigned long flags;
  206. u32 start;
  207. if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG)
  208. return;
  209. while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
  210. /*
  211. * Only queue a single JPEG into the bitstream buffer, except
  212. * to increase payload over 512 bytes or if in hold state.
  213. */
  214. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
  215. (coda_get_bitstream_payload(ctx) >= 512) && !ctx->hold)
  216. break;
  217. src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
  218. /* Drop frames that do not start/end with a SOI/EOI markers */
  219. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
  220. !coda_jpeg_check_buffer(ctx, &src_buf->vb2_buf)) {
  221. v4l2_err(&ctx->dev->v4l2_dev,
  222. "dropping invalid JPEG frame %d\n",
  223. ctx->qsequence);
  224. src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  225. if (buffer_list) {
  226. struct v4l2_m2m_buffer *m2m_buf;
  227. m2m_buf = container_of(src_buf,
  228. struct v4l2_m2m_buffer,
  229. vb);
  230. list_add_tail(&m2m_buf->list, buffer_list);
  231. } else {
  232. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR);
  233. }
  234. continue;
  235. }
  236. /* Dump empty buffers */
  237. if (!vb2_get_plane_payload(&src_buf->vb2_buf, 0)) {
  238. src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  239. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  240. continue;
  241. }
  242. /* Buffer start position */
  243. start = ctx->bitstream_fifo.kfifo.in &
  244. ctx->bitstream_fifo.kfifo.mask;
  245. if (coda_bitstream_try_queue(ctx, src_buf)) {
  246. /*
  247. * Source buffer is queued in the bitstream ringbuffer;
  248. * queue the timestamp and mark source buffer as done
  249. */
  250. src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  251. meta = kmalloc(sizeof(*meta), GFP_KERNEL);
  252. if (meta) {
  253. meta->sequence = src_buf->sequence;
  254. meta->timecode = src_buf->timecode;
  255. meta->timestamp = src_buf->vb2_buf.timestamp;
  256. meta->start = start;
  257. meta->end = ctx->bitstream_fifo.kfifo.in &
  258. ctx->bitstream_fifo.kfifo.mask;
  259. spin_lock_irqsave(&ctx->buffer_meta_lock,
  260. flags);
  261. list_add_tail(&meta->list,
  262. &ctx->buffer_meta_list);
  263. ctx->num_metas++;
  264. spin_unlock_irqrestore(&ctx->buffer_meta_lock,
  265. flags);
  266. trace_coda_bit_queue(ctx, src_buf, meta);
  267. }
  268. if (buffer_list) {
  269. struct v4l2_m2m_buffer *m2m_buf;
  270. m2m_buf = container_of(src_buf,
  271. struct v4l2_m2m_buffer,
  272. vb);
  273. list_add_tail(&m2m_buf->list, buffer_list);
  274. } else {
  275. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  276. }
  277. } else {
  278. break;
  279. }
  280. }
  281. }
  282. void coda_bit_stream_end_flag(struct coda_ctx *ctx)
  283. {
  284. struct coda_dev *dev = ctx->dev;
  285. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  286. /* If this context is currently running, update the hardware flag */
  287. if ((dev->devtype->product == CODA_960) &&
  288. coda_isbusy(dev) &&
  289. (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
  290. coda_write(dev, ctx->bit_stream_param,
  291. CODA_REG_BIT_BIT_STREAM_PARAM);
  292. }
  293. }
  294. static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
  295. {
  296. struct coda_dev *dev = ctx->dev;
  297. u32 *p = ctx->parabuf.vaddr;
  298. if (dev->devtype->product == CODA_DX6)
  299. p[index] = value;
  300. else
  301. p[index ^ 1] = value;
  302. }
  303. static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
  304. struct coda_aux_buf *buf, size_t size,
  305. const char *name)
  306. {
  307. return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
  308. }
  309. static void coda_free_framebuffers(struct coda_ctx *ctx)
  310. {
  311. int i;
  312. for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
  313. coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
  314. }
  315. static int coda_alloc_framebuffers(struct coda_ctx *ctx,
  316. struct coda_q_data *q_data, u32 fourcc)
  317. {
  318. struct coda_dev *dev = ctx->dev;
  319. int width, height;
  320. int ysize;
  321. int ret;
  322. int i;
  323. if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
  324. ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
  325. width = round_up(q_data->width, 16);
  326. height = round_up(q_data->height, 16);
  327. } else {
  328. width = round_up(q_data->width, 8);
  329. height = q_data->height;
  330. }
  331. ysize = width * height;
  332. /* Allocate frame buffers */
  333. for (i = 0; i < ctx->num_internal_frames; i++) {
  334. size_t size;
  335. char *name;
  336. if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
  337. size = round_up(ysize, 4096) + ysize / 2;
  338. else
  339. size = ysize + ysize / 2;
  340. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
  341. dev->devtype->product != CODA_DX6)
  342. size += ysize / 4;
  343. name = kasprintf(GFP_KERNEL, "fb%d", i);
  344. ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
  345. size, name);
  346. kfree(name);
  347. if (ret < 0) {
  348. coda_free_framebuffers(ctx);
  349. return ret;
  350. }
  351. }
  352. /* Register frame buffers in the parameter buffer */
  353. for (i = 0; i < ctx->num_internal_frames; i++) {
  354. u32 y, cb, cr;
  355. /* Start addresses of Y, Cb, Cr planes */
  356. y = ctx->internal_frames[i].paddr;
  357. cb = y + ysize;
  358. cr = y + ysize + ysize/4;
  359. if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP) {
  360. cb = round_up(cb, 4096);
  361. cr = 0;
  362. /* Packed 20-bit MSB of base addresses */
  363. /* YYYYYCCC, CCyyyyyc, cccc.... */
  364. y = (y & 0xfffff000) | cb >> 20;
  365. cb = (cb & 0x000ff000) << 12;
  366. }
  367. coda_parabuf_write(ctx, i * 3 + 0, y);
  368. coda_parabuf_write(ctx, i * 3 + 1, cb);
  369. coda_parabuf_write(ctx, i * 3 + 2, cr);
  370. /* mvcol buffer for h.264 */
  371. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
  372. dev->devtype->product != CODA_DX6)
  373. coda_parabuf_write(ctx, 96 + i,
  374. ctx->internal_frames[i].paddr +
  375. ysize + ysize/4 + ysize/4);
  376. }
  377. /* mvcol buffer for mpeg4 */
  378. if ((dev->devtype->product != CODA_DX6) &&
  379. (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
  380. coda_parabuf_write(ctx, 97, ctx->internal_frames[0].paddr +
  381. ysize + ysize/4 + ysize/4);
  382. return 0;
  383. }
  384. static void coda_free_context_buffers(struct coda_ctx *ctx)
  385. {
  386. struct coda_dev *dev = ctx->dev;
  387. coda_free_aux_buf(dev, &ctx->slicebuf);
  388. coda_free_aux_buf(dev, &ctx->psbuf);
  389. if (dev->devtype->product != CODA_DX6)
  390. coda_free_aux_buf(dev, &ctx->workbuf);
  391. coda_free_aux_buf(dev, &ctx->parabuf);
  392. }
  393. static int coda_alloc_context_buffers(struct coda_ctx *ctx,
  394. struct coda_q_data *q_data)
  395. {
  396. struct coda_dev *dev = ctx->dev;
  397. size_t size;
  398. int ret;
  399. if (!ctx->parabuf.vaddr) {
  400. ret = coda_alloc_context_buf(ctx, &ctx->parabuf,
  401. CODA_PARA_BUF_SIZE, "parabuf");
  402. if (ret < 0)
  403. return ret;
  404. }
  405. if (dev->devtype->product == CODA_DX6)
  406. return 0;
  407. if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
  408. /* worst case slice size */
  409. size = (DIV_ROUND_UP(q_data->width, 16) *
  410. DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
  411. ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
  412. "slicebuf");
  413. if (ret < 0)
  414. goto err;
  415. }
  416. if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
  417. ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
  418. CODA7_PS_BUF_SIZE, "psbuf");
  419. if (ret < 0)
  420. goto err;
  421. }
  422. if (!ctx->workbuf.vaddr) {
  423. size = dev->devtype->workbuf_size;
  424. if (dev->devtype->product == CODA_960 &&
  425. q_data->fourcc == V4L2_PIX_FMT_H264)
  426. size += CODA9_PS_SAVE_SIZE;
  427. ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
  428. "workbuf");
  429. if (ret < 0)
  430. goto err;
  431. }
  432. return 0;
  433. err:
  434. coda_free_context_buffers(ctx);
  435. return ret;
  436. }
  437. static int coda_encode_header(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf,
  438. int header_code, u8 *header, int *size)
  439. {
  440. struct vb2_buffer *vb = &buf->vb2_buf;
  441. struct coda_dev *dev = ctx->dev;
  442. size_t bufsize;
  443. int ret;
  444. int i;
  445. if (dev->devtype->product == CODA_960)
  446. memset(vb2_plane_vaddr(vb, 0), 0, 64);
  447. coda_write(dev, vb2_dma_contig_plane_dma_addr(vb, 0),
  448. CODA_CMD_ENC_HEADER_BB_START);
  449. bufsize = vb2_plane_size(vb, 0);
  450. if (dev->devtype->product == CODA_960)
  451. bufsize /= 1024;
  452. coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
  453. coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
  454. ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
  455. if (ret < 0) {
  456. v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  457. return ret;
  458. }
  459. if (dev->devtype->product == CODA_960) {
  460. for (i = 63; i > 0; i--)
  461. if (((char *)vb2_plane_vaddr(vb, 0))[i] != 0)
  462. break;
  463. *size = i + 1;
  464. } else {
  465. *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
  466. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  467. }
  468. memcpy(header, vb2_plane_vaddr(vb, 0), *size);
  469. return 0;
  470. }
  471. static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
  472. {
  473. phys_addr_t ret;
  474. size = round_up(size, 1024);
  475. if (size > iram->remaining)
  476. return 0;
  477. iram->remaining -= size;
  478. ret = iram->next_paddr;
  479. iram->next_paddr += size;
  480. return ret;
  481. }
  482. static void coda_setup_iram(struct coda_ctx *ctx)
  483. {
  484. struct coda_iram_info *iram_info = &ctx->iram_info;
  485. struct coda_dev *dev = ctx->dev;
  486. int w64, w128;
  487. int mb_width;
  488. int dbk_bits;
  489. int bit_bits;
  490. int ip_bits;
  491. memset(iram_info, 0, sizeof(*iram_info));
  492. iram_info->next_paddr = dev->iram.paddr;
  493. iram_info->remaining = dev->iram.size;
  494. if (!dev->iram.vaddr)
  495. return;
  496. switch (dev->devtype->product) {
  497. case CODA_7541:
  498. dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
  499. bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
  500. ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
  501. break;
  502. case CODA_960:
  503. dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
  504. bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
  505. ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
  506. break;
  507. default: /* CODA_DX6 */
  508. return;
  509. }
  510. if (ctx->inst_type == CODA_INST_ENCODER) {
  511. struct coda_q_data *q_data_src;
  512. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  513. mb_width = DIV_ROUND_UP(q_data_src->width, 16);
  514. w128 = mb_width * 128;
  515. w64 = mb_width * 64;
  516. /* Prioritize in case IRAM is too small for everything */
  517. if (dev->devtype->product == CODA_7541) {
  518. iram_info->search_ram_size = round_up(mb_width * 16 *
  519. 36 + 2048, 1024);
  520. iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
  521. iram_info->search_ram_size);
  522. if (!iram_info->search_ram_paddr) {
  523. pr_err("IRAM is smaller than the search ram size\n");
  524. goto out;
  525. }
  526. iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
  527. CODA7_USE_ME_ENABLE;
  528. }
  529. /* Only H.264BP and H.263P3 are considered */
  530. iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
  531. iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
  532. if (!iram_info->buf_dbk_c_use)
  533. goto out;
  534. iram_info->axi_sram_use |= dbk_bits;
  535. iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
  536. if (!iram_info->buf_bit_use)
  537. goto out;
  538. iram_info->axi_sram_use |= bit_bits;
  539. iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
  540. if (!iram_info->buf_ip_ac_dc_use)
  541. goto out;
  542. iram_info->axi_sram_use |= ip_bits;
  543. /* OVL and BTP disabled for encoder */
  544. } else if (ctx->inst_type == CODA_INST_DECODER) {
  545. struct coda_q_data *q_data_dst;
  546. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  547. mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
  548. w128 = mb_width * 128;
  549. iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
  550. iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
  551. if (!iram_info->buf_dbk_c_use)
  552. goto out;
  553. iram_info->axi_sram_use |= dbk_bits;
  554. iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
  555. if (!iram_info->buf_bit_use)
  556. goto out;
  557. iram_info->axi_sram_use |= bit_bits;
  558. iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
  559. if (!iram_info->buf_ip_ac_dc_use)
  560. goto out;
  561. iram_info->axi_sram_use |= ip_bits;
  562. /* OVL and BTP unused as there is no VC1 support yet */
  563. }
  564. out:
  565. if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
  566. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  567. "IRAM smaller than needed\n");
  568. if (dev->devtype->product == CODA_7541) {
  569. /* TODO - Enabling these causes picture errors on CODA7541 */
  570. if (ctx->inst_type == CODA_INST_DECODER) {
  571. /* fw 1.4.50 */
  572. iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
  573. CODA7_USE_IP_ENABLE);
  574. } else {
  575. /* fw 13.4.29 */
  576. iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
  577. CODA7_USE_HOST_DBK_ENABLE |
  578. CODA7_USE_IP_ENABLE |
  579. CODA7_USE_DBK_ENABLE);
  580. }
  581. }
  582. }
  583. static u32 coda_supported_firmwares[] = {
  584. CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
  585. CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
  586. CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
  587. };
  588. static bool coda_firmware_supported(u32 vernum)
  589. {
  590. int i;
  591. for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
  592. if (vernum == coda_supported_firmwares[i])
  593. return true;
  594. return false;
  595. }
  596. int coda_check_firmware(struct coda_dev *dev)
  597. {
  598. u16 product, major, minor, release;
  599. u32 data;
  600. int ret;
  601. ret = clk_prepare_enable(dev->clk_per);
  602. if (ret)
  603. goto err_clk_per;
  604. ret = clk_prepare_enable(dev->clk_ahb);
  605. if (ret)
  606. goto err_clk_ahb;
  607. coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
  608. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  609. coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
  610. coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
  611. coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
  612. if (coda_wait_timeout(dev)) {
  613. v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
  614. ret = -EIO;
  615. goto err_run_cmd;
  616. }
  617. if (dev->devtype->product == CODA_960) {
  618. data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
  619. v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
  620. data);
  621. }
  622. /* Check we are compatible with the loaded firmware */
  623. data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
  624. product = CODA_FIRMWARE_PRODUCT(data);
  625. major = CODA_FIRMWARE_MAJOR(data);
  626. minor = CODA_FIRMWARE_MINOR(data);
  627. release = CODA_FIRMWARE_RELEASE(data);
  628. clk_disable_unprepare(dev->clk_per);
  629. clk_disable_unprepare(dev->clk_ahb);
  630. if (product != dev->devtype->product) {
  631. v4l2_err(&dev->v4l2_dev,
  632. "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
  633. coda_product_name(dev->devtype->product),
  634. coda_product_name(product), major, minor, release);
  635. return -EINVAL;
  636. }
  637. v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
  638. coda_product_name(product));
  639. if (coda_firmware_supported(data)) {
  640. v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
  641. major, minor, release);
  642. } else {
  643. v4l2_warn(&dev->v4l2_dev,
  644. "Unsupported firmware version: %u.%u.%u\n",
  645. major, minor, release);
  646. }
  647. return 0;
  648. err_run_cmd:
  649. clk_disable_unprepare(dev->clk_ahb);
  650. err_clk_ahb:
  651. clk_disable_unprepare(dev->clk_per);
  652. err_clk_per:
  653. return ret;
  654. }
  655. static void coda9_set_frame_cache(struct coda_ctx *ctx, u32 fourcc)
  656. {
  657. u32 cache_size, cache_config;
  658. if (ctx->tiled_map_type == GDI_LINEAR_FRAME_MAP) {
  659. /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
  660. cache_size = 0x20262024;
  661. cache_config = 2 << CODA9_CACHE_PAGEMERGE_OFFSET;
  662. } else {
  663. /* Luma 0x2 page, 4x4 cache, chroma 0x2 page, 4x3 cache size */
  664. cache_size = 0x02440243;
  665. cache_config = 1 << CODA9_CACHE_PAGEMERGE_OFFSET;
  666. }
  667. coda_write(ctx->dev, cache_size, CODA9_CMD_SET_FRAME_CACHE_SIZE);
  668. if (fourcc == V4L2_PIX_FMT_NV12 || fourcc == V4L2_PIX_FMT_YUYV) {
  669. cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
  670. 16 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
  671. 0 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
  672. } else {
  673. cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
  674. 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
  675. 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
  676. }
  677. coda_write(ctx->dev, cache_config, CODA9_CMD_SET_FRAME_CACHE_CONFIG);
  678. }
  679. /*
  680. * Encoder context operations
  681. */
  682. static int coda_encoder_reqbufs(struct coda_ctx *ctx,
  683. struct v4l2_requestbuffers *rb)
  684. {
  685. struct coda_q_data *q_data_src;
  686. int ret;
  687. if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
  688. return 0;
  689. if (rb->count) {
  690. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  691. ret = coda_alloc_context_buffers(ctx, q_data_src);
  692. if (ret < 0)
  693. return ret;
  694. } else {
  695. coda_free_context_buffers(ctx);
  696. }
  697. return 0;
  698. }
  699. static int coda_start_encoding(struct coda_ctx *ctx)
  700. {
  701. struct coda_dev *dev = ctx->dev;
  702. struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
  703. struct coda_q_data *q_data_src, *q_data_dst;
  704. u32 bitstream_buf, bitstream_size;
  705. struct vb2_v4l2_buffer *buf;
  706. int gamma, ret, value;
  707. u32 dst_fourcc;
  708. int num_fb;
  709. u32 stride;
  710. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  711. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  712. dst_fourcc = q_data_dst->fourcc;
  713. buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  714. bitstream_buf = vb2_dma_contig_plane_dma_addr(&buf->vb2_buf, 0);
  715. bitstream_size = q_data_dst->sizeimage;
  716. if (!coda_is_initialized(dev)) {
  717. v4l2_err(v4l2_dev, "coda is not initialized.\n");
  718. return -EFAULT;
  719. }
  720. if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
  721. if (!ctx->params.jpeg_qmat_tab[0])
  722. ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
  723. if (!ctx->params.jpeg_qmat_tab[1])
  724. ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
  725. coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
  726. }
  727. mutex_lock(&dev->coda_mutex);
  728. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  729. coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  730. coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  731. switch (dev->devtype->product) {
  732. case CODA_DX6:
  733. coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
  734. CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  735. break;
  736. case CODA_960:
  737. coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  738. /* fallthrough */
  739. case CODA_7541:
  740. coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
  741. CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  742. break;
  743. }
  744. ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
  745. CODA9_FRAME_TILED2LINEAR);
  746. if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
  747. ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
  748. if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
  749. ctx->frame_mem_ctrl |= (0x3 << 9) | CODA9_FRAME_TILED2LINEAR;
  750. coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
  751. if (dev->devtype->product == CODA_DX6) {
  752. /* Configure the coda */
  753. coda_write(dev, dev->iram.paddr,
  754. CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
  755. }
  756. /* Could set rotation here if needed */
  757. value = 0;
  758. switch (dev->devtype->product) {
  759. case CODA_DX6:
  760. value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
  761. << CODADX6_PICWIDTH_OFFSET;
  762. value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
  763. << CODA_PICHEIGHT_OFFSET;
  764. break;
  765. case CODA_7541:
  766. if (dst_fourcc == V4L2_PIX_FMT_H264) {
  767. value = (round_up(q_data_src->width, 16) &
  768. CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
  769. value |= (round_up(q_data_src->height, 16) &
  770. CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  771. break;
  772. }
  773. /* fallthrough */
  774. case CODA_960:
  775. value = (q_data_src->width & CODA7_PICWIDTH_MASK)
  776. << CODA7_PICWIDTH_OFFSET;
  777. value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
  778. << CODA_PICHEIGHT_OFFSET;
  779. }
  780. coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
  781. if (dst_fourcc == V4L2_PIX_FMT_JPEG)
  782. ctx->params.framerate = 0;
  783. coda_write(dev, ctx->params.framerate,
  784. CODA_CMD_ENC_SEQ_SRC_F_RATE);
  785. ctx->params.codec_mode = ctx->codec->mode;
  786. switch (dst_fourcc) {
  787. case V4L2_PIX_FMT_MPEG4:
  788. if (dev->devtype->product == CODA_960)
  789. coda_write(dev, CODA9_STD_MPEG4,
  790. CODA_CMD_ENC_SEQ_COD_STD);
  791. else
  792. coda_write(dev, CODA_STD_MPEG4,
  793. CODA_CMD_ENC_SEQ_COD_STD);
  794. coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
  795. break;
  796. case V4L2_PIX_FMT_H264:
  797. if (dev->devtype->product == CODA_960)
  798. coda_write(dev, CODA9_STD_H264,
  799. CODA_CMD_ENC_SEQ_COD_STD);
  800. else
  801. coda_write(dev, CODA_STD_H264,
  802. CODA_CMD_ENC_SEQ_COD_STD);
  803. if (ctx->params.h264_deblk_enabled) {
  804. value = ((ctx->params.h264_deblk_alpha &
  805. CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
  806. CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
  807. ((ctx->params.h264_deblk_beta &
  808. CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
  809. CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
  810. } else {
  811. value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
  812. }
  813. coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
  814. break;
  815. case V4L2_PIX_FMT_JPEG:
  816. coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
  817. coda_write(dev, ctx->params.jpeg_restart_interval,
  818. CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
  819. coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
  820. coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
  821. coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
  822. coda_jpeg_write_tables(ctx);
  823. break;
  824. default:
  825. v4l2_err(v4l2_dev,
  826. "dst format (0x%08x) invalid.\n", dst_fourcc);
  827. ret = -EINVAL;
  828. goto out;
  829. }
  830. /*
  831. * slice mode and GOP size registers are used for thumb size/offset
  832. * in JPEG mode
  833. */
  834. if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
  835. switch (ctx->params.slice_mode) {
  836. case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
  837. value = 0;
  838. break;
  839. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
  840. value = (ctx->params.slice_max_mb &
  841. CODA_SLICING_SIZE_MASK)
  842. << CODA_SLICING_SIZE_OFFSET;
  843. value |= (1 & CODA_SLICING_UNIT_MASK)
  844. << CODA_SLICING_UNIT_OFFSET;
  845. value |= 1 & CODA_SLICING_MODE_MASK;
  846. break;
  847. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
  848. value = (ctx->params.slice_max_bits &
  849. CODA_SLICING_SIZE_MASK)
  850. << CODA_SLICING_SIZE_OFFSET;
  851. value |= (0 & CODA_SLICING_UNIT_MASK)
  852. << CODA_SLICING_UNIT_OFFSET;
  853. value |= 1 & CODA_SLICING_MODE_MASK;
  854. break;
  855. }
  856. coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
  857. value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
  858. coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
  859. }
  860. if (ctx->params.bitrate) {
  861. /* Rate control enabled */
  862. value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
  863. << CODA_RATECONTROL_BITRATE_OFFSET;
  864. value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
  865. value |= (ctx->params.vbv_delay &
  866. CODA_RATECONTROL_INITIALDELAY_MASK)
  867. << CODA_RATECONTROL_INITIALDELAY_OFFSET;
  868. if (dev->devtype->product == CODA_960)
  869. value |= BIT(31); /* disable autoskip */
  870. } else {
  871. value = 0;
  872. }
  873. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
  874. coda_write(dev, ctx->params.vbv_size, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
  875. coda_write(dev, ctx->params.intra_refresh,
  876. CODA_CMD_ENC_SEQ_INTRA_REFRESH);
  877. coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
  878. coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
  879. value = 0;
  880. if (dev->devtype->product == CODA_960)
  881. gamma = CODA9_DEFAULT_GAMMA;
  882. else
  883. gamma = CODA_DEFAULT_GAMMA;
  884. if (gamma > 0) {
  885. coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
  886. CODA_CMD_ENC_SEQ_RC_GAMMA);
  887. }
  888. if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
  889. coda_write(dev,
  890. ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
  891. ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
  892. CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
  893. }
  894. if (dev->devtype->product == CODA_960) {
  895. if (ctx->params.h264_max_qp)
  896. value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
  897. if (CODA_DEFAULT_GAMMA > 0)
  898. value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
  899. } else {
  900. if (CODA_DEFAULT_GAMMA > 0) {
  901. if (dev->devtype->product == CODA_DX6)
  902. value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
  903. else
  904. value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
  905. }
  906. if (ctx->params.h264_min_qp)
  907. value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
  908. if (ctx->params.h264_max_qp)
  909. value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
  910. }
  911. coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
  912. coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
  913. coda_setup_iram(ctx);
  914. if (dst_fourcc == V4L2_PIX_FMT_H264) {
  915. switch (dev->devtype->product) {
  916. case CODA_DX6:
  917. value = FMO_SLICE_SAVE_BUF_SIZE << 7;
  918. coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
  919. break;
  920. case CODA_7541:
  921. coda_write(dev, ctx->iram_info.search_ram_paddr,
  922. CODA7_CMD_ENC_SEQ_SEARCH_BASE);
  923. coda_write(dev, ctx->iram_info.search_ram_size,
  924. CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
  925. break;
  926. case CODA_960:
  927. coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
  928. coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
  929. }
  930. }
  931. ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
  932. if (ret < 0) {
  933. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  934. goto out;
  935. }
  936. if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
  937. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
  938. ret = -EFAULT;
  939. goto out;
  940. }
  941. ctx->initialized = 1;
  942. if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
  943. if (dev->devtype->product == CODA_960)
  944. ctx->num_internal_frames = 4;
  945. else
  946. ctx->num_internal_frames = 2;
  947. ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
  948. if (ret < 0) {
  949. v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
  950. goto out;
  951. }
  952. num_fb = 2;
  953. stride = q_data_src->bytesperline;
  954. } else {
  955. ctx->num_internal_frames = 0;
  956. num_fb = 0;
  957. stride = 0;
  958. }
  959. coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
  960. coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
  961. if (dev->devtype->product == CODA_7541) {
  962. coda_write(dev, q_data_src->bytesperline,
  963. CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
  964. }
  965. if (dev->devtype->product != CODA_DX6) {
  966. coda_write(dev, ctx->iram_info.buf_bit_use,
  967. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  968. coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
  969. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  970. coda_write(dev, ctx->iram_info.buf_dbk_y_use,
  971. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  972. coda_write(dev, ctx->iram_info.buf_dbk_c_use,
  973. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  974. coda_write(dev, ctx->iram_info.buf_ovl_use,
  975. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  976. if (dev->devtype->product == CODA_960) {
  977. coda_write(dev, ctx->iram_info.buf_btp_use,
  978. CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
  979. coda9_set_frame_cache(ctx, q_data_src->fourcc);
  980. /* FIXME */
  981. coda_write(dev, ctx->internal_frames[2].paddr,
  982. CODA9_CMD_SET_FRAME_SUBSAMP_A);
  983. coda_write(dev, ctx->internal_frames[3].paddr,
  984. CODA9_CMD_SET_FRAME_SUBSAMP_B);
  985. }
  986. }
  987. ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
  988. if (ret < 0) {
  989. v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  990. goto out;
  991. }
  992. /* Save stream headers */
  993. buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  994. switch (dst_fourcc) {
  995. case V4L2_PIX_FMT_H264:
  996. /*
  997. * Get SPS in the first frame and copy it to an
  998. * intermediate buffer.
  999. */
  1000. ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
  1001. &ctx->vpu_header[0][0],
  1002. &ctx->vpu_header_size[0]);
  1003. if (ret < 0)
  1004. goto out;
  1005. /*
  1006. * Get PPS in the first frame and copy it to an
  1007. * intermediate buffer.
  1008. */
  1009. ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
  1010. &ctx->vpu_header[1][0],
  1011. &ctx->vpu_header_size[1]);
  1012. if (ret < 0)
  1013. goto out;
  1014. /*
  1015. * Length of H.264 headers is variable and thus it might not be
  1016. * aligned for the coda to append the encoded frame. In that is
  1017. * the case a filler NAL must be added to header 2.
  1018. */
  1019. ctx->vpu_header_size[2] = coda_h264_padding(
  1020. (ctx->vpu_header_size[0] +
  1021. ctx->vpu_header_size[1]),
  1022. ctx->vpu_header[2]);
  1023. break;
  1024. case V4L2_PIX_FMT_MPEG4:
  1025. /*
  1026. * Get VOS in the first frame and copy it to an
  1027. * intermediate buffer
  1028. */
  1029. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
  1030. &ctx->vpu_header[0][0],
  1031. &ctx->vpu_header_size[0]);
  1032. if (ret < 0)
  1033. goto out;
  1034. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
  1035. &ctx->vpu_header[1][0],
  1036. &ctx->vpu_header_size[1]);
  1037. if (ret < 0)
  1038. goto out;
  1039. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
  1040. &ctx->vpu_header[2][0],
  1041. &ctx->vpu_header_size[2]);
  1042. if (ret < 0)
  1043. goto out;
  1044. break;
  1045. default:
  1046. /* No more formats need to save headers at the moment */
  1047. break;
  1048. }
  1049. out:
  1050. mutex_unlock(&dev->coda_mutex);
  1051. return ret;
  1052. }
  1053. static int coda_prepare_encode(struct coda_ctx *ctx)
  1054. {
  1055. struct coda_q_data *q_data_src, *q_data_dst;
  1056. struct vb2_v4l2_buffer *src_buf, *dst_buf;
  1057. struct coda_dev *dev = ctx->dev;
  1058. int force_ipicture;
  1059. int quant_param = 0;
  1060. u32 pic_stream_buffer_addr, pic_stream_buffer_size;
  1061. u32 rot_mode = 0;
  1062. u32 dst_fourcc;
  1063. u32 reg;
  1064. src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
  1065. dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  1066. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1067. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1068. dst_fourcc = q_data_dst->fourcc;
  1069. src_buf->sequence = ctx->osequence;
  1070. dst_buf->sequence = ctx->osequence;
  1071. ctx->osequence++;
  1072. /*
  1073. * Workaround coda firmware BUG that only marks the first
  1074. * frame as IDR. This is a problem for some decoders that can't
  1075. * recover when a frame is lost.
  1076. */
  1077. if (src_buf->sequence % ctx->params.gop_size) {
  1078. src_buf->flags |= V4L2_BUF_FLAG_PFRAME;
  1079. src_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  1080. } else {
  1081. src_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
  1082. src_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
  1083. }
  1084. if (dev->devtype->product == CODA_960)
  1085. coda_set_gdi_regs(ctx);
  1086. /*
  1087. * Copy headers at the beginning of the first frame for H.264 only.
  1088. * In MPEG4 they are already copied by the coda.
  1089. */
  1090. if (src_buf->sequence == 0) {
  1091. pic_stream_buffer_addr =
  1092. vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0) +
  1093. ctx->vpu_header_size[0] +
  1094. ctx->vpu_header_size[1] +
  1095. ctx->vpu_header_size[2];
  1096. pic_stream_buffer_size = q_data_dst->sizeimage -
  1097. ctx->vpu_header_size[0] -
  1098. ctx->vpu_header_size[1] -
  1099. ctx->vpu_header_size[2];
  1100. memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0),
  1101. &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
  1102. memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
  1103. + ctx->vpu_header_size[0], &ctx->vpu_header[1][0],
  1104. ctx->vpu_header_size[1]);
  1105. memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
  1106. + ctx->vpu_header_size[0] + ctx->vpu_header_size[1],
  1107. &ctx->vpu_header[2][0], ctx->vpu_header_size[2]);
  1108. } else {
  1109. pic_stream_buffer_addr =
  1110. vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
  1111. pic_stream_buffer_size = q_data_dst->sizeimage;
  1112. }
  1113. if (src_buf->flags & V4L2_BUF_FLAG_KEYFRAME) {
  1114. force_ipicture = 1;
  1115. switch (dst_fourcc) {
  1116. case V4L2_PIX_FMT_H264:
  1117. quant_param = ctx->params.h264_intra_qp;
  1118. break;
  1119. case V4L2_PIX_FMT_MPEG4:
  1120. quant_param = ctx->params.mpeg4_intra_qp;
  1121. break;
  1122. case V4L2_PIX_FMT_JPEG:
  1123. quant_param = 30;
  1124. break;
  1125. default:
  1126. v4l2_warn(&ctx->dev->v4l2_dev,
  1127. "cannot set intra qp, fmt not supported\n");
  1128. break;
  1129. }
  1130. } else {
  1131. force_ipicture = 0;
  1132. switch (dst_fourcc) {
  1133. case V4L2_PIX_FMT_H264:
  1134. quant_param = ctx->params.h264_inter_qp;
  1135. break;
  1136. case V4L2_PIX_FMT_MPEG4:
  1137. quant_param = ctx->params.mpeg4_inter_qp;
  1138. break;
  1139. default:
  1140. v4l2_warn(&ctx->dev->v4l2_dev,
  1141. "cannot set inter qp, fmt not supported\n");
  1142. break;
  1143. }
  1144. }
  1145. /* submit */
  1146. if (ctx->params.rot_mode)
  1147. rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
  1148. coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
  1149. coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
  1150. if (dev->devtype->product == CODA_960) {
  1151. coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
  1152. coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
  1153. coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
  1154. reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
  1155. } else {
  1156. reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
  1157. }
  1158. coda_write_base(ctx, q_data_src, src_buf, reg);
  1159. coda_write(dev, force_ipicture << 1 & 0x2,
  1160. CODA_CMD_ENC_PIC_OPTION);
  1161. coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
  1162. coda_write(dev, pic_stream_buffer_size / 1024,
  1163. CODA_CMD_ENC_PIC_BB_SIZE);
  1164. if (!ctx->streamon_out) {
  1165. /* After streamoff on the output side, set stream end flag */
  1166. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  1167. coda_write(dev, ctx->bit_stream_param,
  1168. CODA_REG_BIT_BIT_STREAM_PARAM);
  1169. }
  1170. if (dev->devtype->product != CODA_DX6)
  1171. coda_write(dev, ctx->iram_info.axi_sram_use,
  1172. CODA7_REG_BIT_AXI_SRAM_USE);
  1173. trace_coda_enc_pic_run(ctx, src_buf);
  1174. coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
  1175. return 0;
  1176. }
  1177. static void coda_finish_encode(struct coda_ctx *ctx)
  1178. {
  1179. struct vb2_v4l2_buffer *src_buf, *dst_buf;
  1180. struct coda_dev *dev = ctx->dev;
  1181. u32 wr_ptr, start_ptr;
  1182. src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  1183. dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  1184. trace_coda_enc_pic_done(ctx, dst_buf);
  1185. /* Get results from the coda */
  1186. start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
  1187. wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  1188. /* Calculate bytesused field */
  1189. if (dst_buf->sequence == 0) {
  1190. vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr +
  1191. ctx->vpu_header_size[0] +
  1192. ctx->vpu_header_size[1] +
  1193. ctx->vpu_header_size[2]);
  1194. } else {
  1195. vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr);
  1196. }
  1197. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
  1198. wr_ptr - start_ptr);
  1199. coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
  1200. coda_read(dev, CODA_RET_ENC_PIC_FLAG);
  1201. if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
  1202. dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
  1203. dst_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
  1204. } else {
  1205. dst_buf->flags |= V4L2_BUF_FLAG_PFRAME;
  1206. dst_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  1207. }
  1208. dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp;
  1209. dst_buf->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  1210. dst_buf->flags |=
  1211. src_buf->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  1212. dst_buf->timecode = src_buf->timecode;
  1213. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  1214. dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
  1215. coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
  1216. ctx->gopcounter--;
  1217. if (ctx->gopcounter < 0)
  1218. ctx->gopcounter = ctx->params.gop_size - 1;
  1219. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1220. "job finished: encoding frame (%d) (%s)\n",
  1221. dst_buf->sequence,
  1222. (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
  1223. "KEYFRAME" : "PFRAME");
  1224. }
  1225. static void coda_seq_end_work(struct work_struct *work)
  1226. {
  1227. struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
  1228. struct coda_dev *dev = ctx->dev;
  1229. mutex_lock(&ctx->buffer_mutex);
  1230. mutex_lock(&dev->coda_mutex);
  1231. if (ctx->initialized == 0)
  1232. goto out;
  1233. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1234. "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
  1235. __func__);
  1236. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  1237. v4l2_err(&dev->v4l2_dev,
  1238. "CODA_COMMAND_SEQ_END failed\n");
  1239. }
  1240. /*
  1241. * FIXME: Sometimes h.264 encoding fails with 8-byte sequences missing
  1242. * from the output stream after the h.264 decoder has run. Resetting the
  1243. * hardware after the decoder has finished seems to help.
  1244. */
  1245. if (dev->devtype->product == CODA_960)
  1246. coda_hw_reset(ctx);
  1247. kfifo_init(&ctx->bitstream_fifo,
  1248. ctx->bitstream.vaddr, ctx->bitstream.size);
  1249. coda_free_framebuffers(ctx);
  1250. ctx->initialized = 0;
  1251. out:
  1252. mutex_unlock(&dev->coda_mutex);
  1253. mutex_unlock(&ctx->buffer_mutex);
  1254. }
  1255. static void coda_bit_release(struct coda_ctx *ctx)
  1256. {
  1257. mutex_lock(&ctx->buffer_mutex);
  1258. coda_free_framebuffers(ctx);
  1259. coda_free_context_buffers(ctx);
  1260. coda_free_bitstream_buffer(ctx);
  1261. mutex_unlock(&ctx->buffer_mutex);
  1262. }
  1263. const struct coda_context_ops coda_bit_encode_ops = {
  1264. .queue_init = coda_encoder_queue_init,
  1265. .reqbufs = coda_encoder_reqbufs,
  1266. .start_streaming = coda_start_encoding,
  1267. .prepare_run = coda_prepare_encode,
  1268. .finish_run = coda_finish_encode,
  1269. .seq_end_work = coda_seq_end_work,
  1270. .release = coda_bit_release,
  1271. };
  1272. /*
  1273. * Decoder context operations
  1274. */
  1275. static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
  1276. struct coda_q_data *q_data)
  1277. {
  1278. if (ctx->bitstream.vaddr)
  1279. return 0;
  1280. ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
  1281. ctx->bitstream.vaddr = dma_alloc_wc(&ctx->dev->plat_dev->dev,
  1282. ctx->bitstream.size,
  1283. &ctx->bitstream.paddr, GFP_KERNEL);
  1284. if (!ctx->bitstream.vaddr) {
  1285. v4l2_err(&ctx->dev->v4l2_dev,
  1286. "failed to allocate bitstream ringbuffer");
  1287. return -ENOMEM;
  1288. }
  1289. kfifo_init(&ctx->bitstream_fifo,
  1290. ctx->bitstream.vaddr, ctx->bitstream.size);
  1291. return 0;
  1292. }
  1293. static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
  1294. {
  1295. if (ctx->bitstream.vaddr == NULL)
  1296. return;
  1297. dma_free_wc(&ctx->dev->plat_dev->dev, ctx->bitstream.size,
  1298. ctx->bitstream.vaddr, ctx->bitstream.paddr);
  1299. ctx->bitstream.vaddr = NULL;
  1300. kfifo_init(&ctx->bitstream_fifo, NULL, 0);
  1301. }
  1302. static int coda_decoder_reqbufs(struct coda_ctx *ctx,
  1303. struct v4l2_requestbuffers *rb)
  1304. {
  1305. struct coda_q_data *q_data_src;
  1306. int ret;
  1307. if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
  1308. return 0;
  1309. if (rb->count) {
  1310. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1311. ret = coda_alloc_context_buffers(ctx, q_data_src);
  1312. if (ret < 0)
  1313. return ret;
  1314. ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
  1315. if (ret < 0) {
  1316. coda_free_context_buffers(ctx);
  1317. return ret;
  1318. }
  1319. } else {
  1320. coda_free_bitstream_buffer(ctx);
  1321. coda_free_context_buffers(ctx);
  1322. }
  1323. return 0;
  1324. }
  1325. static bool coda_reorder_enable(struct coda_ctx *ctx)
  1326. {
  1327. const char * const *profile_names;
  1328. const char * const *level_names;
  1329. struct coda_dev *dev = ctx->dev;
  1330. int profile, level;
  1331. if (dev->devtype->product != CODA_7541 &&
  1332. dev->devtype->product != CODA_960)
  1333. return false;
  1334. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
  1335. return false;
  1336. if (ctx->codec->src_fourcc != V4L2_PIX_FMT_H264)
  1337. return true;
  1338. profile = coda_h264_profile(ctx->params.h264_profile_idc);
  1339. if (profile < 0) {
  1340. v4l2_warn(&dev->v4l2_dev, "Invalid H264 Profile: %d\n",
  1341. ctx->params.h264_profile_idc);
  1342. return false;
  1343. }
  1344. level = coda_h264_level(ctx->params.h264_level_idc);
  1345. if (level < 0) {
  1346. v4l2_warn(&dev->v4l2_dev, "Invalid H264 Level: %d\n",
  1347. ctx->params.h264_level_idc);
  1348. return false;
  1349. }
  1350. profile_names = v4l2_ctrl_get_menu(V4L2_CID_MPEG_VIDEO_H264_PROFILE);
  1351. level_names = v4l2_ctrl_get_menu(V4L2_CID_MPEG_VIDEO_H264_LEVEL);
  1352. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "H264 Profile/Level: %s L%s\n",
  1353. profile_names[profile], level_names[level]);
  1354. /* Baseline profile does not support reordering */
  1355. return profile > V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE;
  1356. }
  1357. static int __coda_start_decoding(struct coda_ctx *ctx)
  1358. {
  1359. struct coda_q_data *q_data_src, *q_data_dst;
  1360. u32 bitstream_buf, bitstream_size;
  1361. struct coda_dev *dev = ctx->dev;
  1362. int width, height;
  1363. u32 src_fourcc, dst_fourcc;
  1364. u32 val;
  1365. int ret;
  1366. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1367. "Video Data Order Adapter: %s\n",
  1368. ctx->use_vdoa ? "Enabled" : "Disabled");
  1369. /* Start decoding */
  1370. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1371. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1372. bitstream_buf = ctx->bitstream.paddr;
  1373. bitstream_size = ctx->bitstream.size;
  1374. src_fourcc = q_data_src->fourcc;
  1375. dst_fourcc = q_data_dst->fourcc;
  1376. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  1377. /* Update coda bitstream read and write pointers from kfifo */
  1378. coda_kfifo_sync_to_device_full(ctx);
  1379. ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
  1380. CODA9_FRAME_TILED2LINEAR);
  1381. if (dst_fourcc == V4L2_PIX_FMT_NV12 || dst_fourcc == V4L2_PIX_FMT_YUYV)
  1382. ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
  1383. if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
  1384. ctx->frame_mem_ctrl |= (0x3 << 9) |
  1385. ((ctx->use_vdoa) ? 0 : CODA9_FRAME_TILED2LINEAR);
  1386. coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
  1387. ctx->display_idx = -1;
  1388. ctx->frm_dis_flg = 0;
  1389. coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  1390. coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
  1391. CODA_REG_BIT_BIT_STREAM_PARAM);
  1392. coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
  1393. coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
  1394. val = 0;
  1395. if (coda_reorder_enable(ctx))
  1396. val |= CODA_REORDER_ENABLE;
  1397. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
  1398. val |= CODA_NO_INT_ENABLE;
  1399. coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
  1400. ctx->params.codec_mode = ctx->codec->mode;
  1401. if (dev->devtype->product == CODA_960 &&
  1402. src_fourcc == V4L2_PIX_FMT_MPEG4)
  1403. ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
  1404. else
  1405. ctx->params.codec_mode_aux = 0;
  1406. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1407. if (dev->devtype->product == CODA_7541) {
  1408. coda_write(dev, ctx->psbuf.paddr,
  1409. CODA_CMD_DEC_SEQ_PS_BB_START);
  1410. coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
  1411. CODA_CMD_DEC_SEQ_PS_BB_SIZE);
  1412. }
  1413. if (dev->devtype->product == CODA_960) {
  1414. coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
  1415. coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
  1416. }
  1417. }
  1418. if (dev->devtype->product != CODA_960)
  1419. coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
  1420. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
  1421. v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  1422. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  1423. return -ETIMEDOUT;
  1424. }
  1425. ctx->initialized = 1;
  1426. /* Update kfifo out pointer from coda bitstream read pointer */
  1427. coda_kfifo_sync_from_device(ctx);
  1428. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  1429. if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
  1430. v4l2_err(&dev->v4l2_dev,
  1431. "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
  1432. coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
  1433. return -EAGAIN;
  1434. }
  1435. val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
  1436. if (dev->devtype->product == CODA_DX6) {
  1437. width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
  1438. height = val & CODADX6_PICHEIGHT_MASK;
  1439. } else {
  1440. width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
  1441. height = val & CODA7_PICHEIGHT_MASK;
  1442. }
  1443. if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
  1444. v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
  1445. width, height, q_data_dst->bytesperline,
  1446. q_data_dst->height);
  1447. return -EINVAL;
  1448. }
  1449. width = round_up(width, 16);
  1450. height = round_up(height, 16);
  1451. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
  1452. __func__, ctx->idx, width, height);
  1453. ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
  1454. /*
  1455. * If the VDOA is used, the decoder needs one additional frame,
  1456. * because the frames are freed when the next frame is decoded.
  1457. * Otherwise there are visible errors in the decoded frames (green
  1458. * regions in displayed frames) and a broken order of frames (earlier
  1459. * frames are sporadically displayed after later frames).
  1460. */
  1461. if (ctx->use_vdoa)
  1462. ctx->num_internal_frames += 1;
  1463. if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
  1464. v4l2_err(&dev->v4l2_dev,
  1465. "not enough framebuffers to decode (%d < %d)\n",
  1466. CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
  1467. return -EINVAL;
  1468. }
  1469. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1470. u32 left_right;
  1471. u32 top_bottom;
  1472. left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
  1473. top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
  1474. q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
  1475. q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
  1476. q_data_dst->rect.width = width - q_data_dst->rect.left -
  1477. (left_right & 0x3ff);
  1478. q_data_dst->rect.height = height - q_data_dst->rect.top -
  1479. (top_bottom & 0x3ff);
  1480. }
  1481. ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
  1482. if (ret < 0) {
  1483. v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
  1484. return ret;
  1485. }
  1486. /* Tell the decoder how many frame buffers we allocated. */
  1487. coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
  1488. coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
  1489. if (dev->devtype->product != CODA_DX6) {
  1490. /* Set secondary AXI IRAM */
  1491. coda_setup_iram(ctx);
  1492. coda_write(dev, ctx->iram_info.buf_bit_use,
  1493. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  1494. coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
  1495. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  1496. coda_write(dev, ctx->iram_info.buf_dbk_y_use,
  1497. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  1498. coda_write(dev, ctx->iram_info.buf_dbk_c_use,
  1499. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  1500. coda_write(dev, ctx->iram_info.buf_ovl_use,
  1501. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  1502. if (dev->devtype->product == CODA_960) {
  1503. coda_write(dev, ctx->iram_info.buf_btp_use,
  1504. CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
  1505. coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
  1506. coda9_set_frame_cache(ctx, dst_fourcc);
  1507. }
  1508. }
  1509. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1510. coda_write(dev, ctx->slicebuf.paddr,
  1511. CODA_CMD_SET_FRAME_SLICE_BB_START);
  1512. coda_write(dev, ctx->slicebuf.size / 1024,
  1513. CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
  1514. }
  1515. if (dev->devtype->product == CODA_7541) {
  1516. int max_mb_x = 1920 / 16;
  1517. int max_mb_y = 1088 / 16;
  1518. int max_mb_num = max_mb_x * max_mb_y;
  1519. coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
  1520. CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
  1521. } else if (dev->devtype->product == CODA_960) {
  1522. int max_mb_x = 1920 / 16;
  1523. int max_mb_y = 1088 / 16;
  1524. int max_mb_num = max_mb_x * max_mb_y;
  1525. coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
  1526. CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
  1527. }
  1528. if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
  1529. v4l2_err(&ctx->dev->v4l2_dev,
  1530. "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  1531. return -ETIMEDOUT;
  1532. }
  1533. return 0;
  1534. }
  1535. static int coda_start_decoding(struct coda_ctx *ctx)
  1536. {
  1537. struct coda_dev *dev = ctx->dev;
  1538. int ret;
  1539. mutex_lock(&dev->coda_mutex);
  1540. ret = __coda_start_decoding(ctx);
  1541. mutex_unlock(&dev->coda_mutex);
  1542. return ret;
  1543. }
  1544. static int coda_prepare_decode(struct coda_ctx *ctx)
  1545. {
  1546. struct vb2_v4l2_buffer *dst_buf;
  1547. struct coda_dev *dev = ctx->dev;
  1548. struct coda_q_data *q_data_dst;
  1549. struct coda_buffer_meta *meta;
  1550. unsigned long flags;
  1551. u32 rot_mode = 0;
  1552. u32 reg_addr, reg_stride;
  1553. dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  1554. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1555. /* Try to copy source buffer contents into the bitstream ringbuffer */
  1556. mutex_lock(&ctx->bitstream_mutex);
  1557. coda_fill_bitstream(ctx, NULL);
  1558. mutex_unlock(&ctx->bitstream_mutex);
  1559. if (coda_get_bitstream_payload(ctx) < 512 &&
  1560. (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
  1561. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1562. "bitstream payload: %d, skipping\n",
  1563. coda_get_bitstream_payload(ctx));
  1564. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
  1565. return -EAGAIN;
  1566. }
  1567. /* Run coda_start_decoding (again) if not yet initialized */
  1568. if (!ctx->initialized) {
  1569. int ret = __coda_start_decoding(ctx);
  1570. if (ret < 0) {
  1571. v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
  1572. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
  1573. return -EAGAIN;
  1574. } else {
  1575. ctx->initialized = 1;
  1576. }
  1577. }
  1578. if (dev->devtype->product == CODA_960)
  1579. coda_set_gdi_regs(ctx);
  1580. if (ctx->use_vdoa &&
  1581. ctx->display_idx >= 0 &&
  1582. ctx->display_idx < ctx->num_internal_frames) {
  1583. vdoa_device_run(ctx->vdoa,
  1584. vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0),
  1585. ctx->internal_frames[ctx->display_idx].paddr);
  1586. } else {
  1587. if (dev->devtype->product == CODA_960) {
  1588. /*
  1589. * The CODA960 seems to have an internal list of
  1590. * buffers with 64 entries that includes the
  1591. * registered frame buffers as well as the rotator
  1592. * buffer output.
  1593. *
  1594. * ROT_INDEX needs to be < 0x40, but >
  1595. * ctx->num_internal_frames.
  1596. */
  1597. coda_write(dev,
  1598. CODA_MAX_FRAMEBUFFERS + dst_buf->vb2_buf.index,
  1599. CODA9_CMD_DEC_PIC_ROT_INDEX);
  1600. reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
  1601. reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
  1602. } else {
  1603. reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
  1604. reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
  1605. }
  1606. coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
  1607. coda_write(dev, q_data_dst->bytesperline, reg_stride);
  1608. rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
  1609. }
  1610. coda_write(dev, rot_mode, CODA_CMD_DEC_PIC_ROT_MODE);
  1611. switch (dev->devtype->product) {
  1612. case CODA_DX6:
  1613. /* TBD */
  1614. case CODA_7541:
  1615. coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
  1616. break;
  1617. case CODA_960:
  1618. /* 'hardcode to use interrupt disable mode'? */
  1619. coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
  1620. break;
  1621. }
  1622. coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
  1623. coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
  1624. coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
  1625. if (dev->devtype->product != CODA_DX6)
  1626. coda_write(dev, ctx->iram_info.axi_sram_use,
  1627. CODA7_REG_BIT_AXI_SRAM_USE);
  1628. spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
  1629. meta = list_first_entry_or_null(&ctx->buffer_meta_list,
  1630. struct coda_buffer_meta, list);
  1631. if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
  1632. /* If this is the last buffer in the bitstream, add padding */
  1633. if (meta->end == (ctx->bitstream_fifo.kfifo.in &
  1634. ctx->bitstream_fifo.kfifo.mask)) {
  1635. static unsigned char buf[512];
  1636. unsigned int pad;
  1637. /* Pad to multiple of 256 and then add 256 more */
  1638. pad = ((0 - meta->end) & 0xff) + 256;
  1639. memset(buf, 0xff, sizeof(buf));
  1640. kfifo_in(&ctx->bitstream_fifo, buf, pad);
  1641. }
  1642. }
  1643. spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
  1644. coda_kfifo_sync_to_device_full(ctx);
  1645. /* Clear decode success flag */
  1646. coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
  1647. trace_coda_dec_pic_run(ctx, meta);
  1648. coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
  1649. return 0;
  1650. }
  1651. static void coda_finish_decode(struct coda_ctx *ctx)
  1652. {
  1653. struct coda_dev *dev = ctx->dev;
  1654. struct coda_q_data *q_data_src;
  1655. struct coda_q_data *q_data_dst;
  1656. struct vb2_v4l2_buffer *dst_buf;
  1657. struct coda_buffer_meta *meta;
  1658. unsigned long payload;
  1659. unsigned long flags;
  1660. int width, height;
  1661. int decoded_idx;
  1662. int display_idx;
  1663. u32 src_fourcc;
  1664. int success;
  1665. u32 err_mb;
  1666. int err_vdoa = 0;
  1667. u32 val;
  1668. /* Update kfifo out pointer from coda bitstream read pointer */
  1669. coda_kfifo_sync_from_device(ctx);
  1670. /*
  1671. * in stream-end mode, the read pointer can overshoot the write pointer
  1672. * by up to 512 bytes
  1673. */
  1674. if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
  1675. if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
  1676. kfifo_init(&ctx->bitstream_fifo,
  1677. ctx->bitstream.vaddr, ctx->bitstream.size);
  1678. }
  1679. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1680. src_fourcc = q_data_src->fourcc;
  1681. val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
  1682. if (val != 1)
  1683. pr_err("DEC_PIC_SUCCESS = %d\n", val);
  1684. success = val & 0x1;
  1685. if (!success)
  1686. v4l2_err(&dev->v4l2_dev, "decode failed\n");
  1687. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1688. if (val & (1 << 3))
  1689. v4l2_err(&dev->v4l2_dev,
  1690. "insufficient PS buffer space (%d bytes)\n",
  1691. ctx->psbuf.size);
  1692. if (val & (1 << 2))
  1693. v4l2_err(&dev->v4l2_dev,
  1694. "insufficient slice buffer space (%d bytes)\n",
  1695. ctx->slicebuf.size);
  1696. }
  1697. val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
  1698. width = (val >> 16) & 0xffff;
  1699. height = val & 0xffff;
  1700. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1701. /* frame crop information */
  1702. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1703. u32 left_right;
  1704. u32 top_bottom;
  1705. left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
  1706. top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
  1707. if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
  1708. /* Keep current crop information */
  1709. } else {
  1710. struct v4l2_rect *rect = &q_data_dst->rect;
  1711. rect->left = left_right >> 16 & 0xffff;
  1712. rect->top = top_bottom >> 16 & 0xffff;
  1713. rect->width = width - rect->left -
  1714. (left_right & 0xffff);
  1715. rect->height = height - rect->top -
  1716. (top_bottom & 0xffff);
  1717. }
  1718. } else {
  1719. /* no cropping */
  1720. }
  1721. err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
  1722. if (err_mb > 0)
  1723. v4l2_err(&dev->v4l2_dev,
  1724. "errors in %d macroblocks\n", err_mb);
  1725. if (dev->devtype->product == CODA_7541) {
  1726. val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
  1727. if (val == 0) {
  1728. /* not enough bitstream data */
  1729. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1730. "prescan failed: %d\n", val);
  1731. ctx->hold = true;
  1732. return;
  1733. }
  1734. }
  1735. /* Wait until the VDOA finished writing the previous display frame */
  1736. if (ctx->use_vdoa &&
  1737. ctx->display_idx >= 0 &&
  1738. ctx->display_idx < ctx->num_internal_frames) {
  1739. err_vdoa = vdoa_wait_for_completion(ctx->vdoa);
  1740. }
  1741. ctx->frm_dis_flg = coda_read(dev,
  1742. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  1743. /* The previous display frame was copied out and can be overwritten */
  1744. if (ctx->display_idx >= 0 &&
  1745. ctx->display_idx < ctx->num_internal_frames) {
  1746. ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
  1747. coda_write(dev, ctx->frm_dis_flg,
  1748. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  1749. }
  1750. /*
  1751. * The index of the last decoded frame, not necessarily in
  1752. * display order, and the index of the next display frame.
  1753. * The latter could have been decoded in a previous run.
  1754. */
  1755. decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
  1756. display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
  1757. if (decoded_idx == -1) {
  1758. /* no frame was decoded, but we might have a display frame */
  1759. if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
  1760. ctx->sequence_offset++;
  1761. else if (ctx->display_idx < 0)
  1762. ctx->hold = true;
  1763. } else if (decoded_idx == -2) {
  1764. /* no frame was decoded, we still return remaining buffers */
  1765. } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
  1766. v4l2_err(&dev->v4l2_dev,
  1767. "decoded frame index out of range: %d\n", decoded_idx);
  1768. } else {
  1769. val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
  1770. val -= ctx->sequence_offset;
  1771. spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
  1772. if (!list_empty(&ctx->buffer_meta_list)) {
  1773. meta = list_first_entry(&ctx->buffer_meta_list,
  1774. struct coda_buffer_meta, list);
  1775. list_del(&meta->list);
  1776. ctx->num_metas--;
  1777. spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
  1778. /*
  1779. * Clamp counters to 16 bits for comparison, as the HW
  1780. * counter rolls over at this point for h.264. This
  1781. * may be different for other formats, but using 16 bits
  1782. * should be enough to detect most errors and saves us
  1783. * from doing different things based on the format.
  1784. */
  1785. if ((val & 0xffff) != (meta->sequence & 0xffff)) {
  1786. v4l2_err(&dev->v4l2_dev,
  1787. "sequence number mismatch (%d(%d) != %d)\n",
  1788. val, ctx->sequence_offset,
  1789. meta->sequence);
  1790. }
  1791. ctx->frame_metas[decoded_idx] = *meta;
  1792. kfree(meta);
  1793. } else {
  1794. spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
  1795. v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
  1796. memset(&ctx->frame_metas[decoded_idx], 0,
  1797. sizeof(struct coda_buffer_meta));
  1798. ctx->frame_metas[decoded_idx].sequence = val;
  1799. ctx->sequence_offset++;
  1800. }
  1801. trace_coda_dec_pic_done(ctx, &ctx->frame_metas[decoded_idx]);
  1802. val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
  1803. if (val == 0)
  1804. ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
  1805. else if (val == 1)
  1806. ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
  1807. else
  1808. ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
  1809. ctx->frame_errors[decoded_idx] = err_mb;
  1810. }
  1811. if (display_idx == -1) {
  1812. /*
  1813. * no more frames to be decoded, but there could still
  1814. * be rotator output to dequeue
  1815. */
  1816. ctx->hold = true;
  1817. } else if (display_idx == -3) {
  1818. /* possibly prescan failure */
  1819. } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
  1820. v4l2_err(&dev->v4l2_dev,
  1821. "presentation frame index out of range: %d\n",
  1822. display_idx);
  1823. }
  1824. /* If a frame was copied out, return it */
  1825. if (ctx->display_idx >= 0 &&
  1826. ctx->display_idx < ctx->num_internal_frames) {
  1827. dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
  1828. dst_buf->sequence = ctx->osequence++;
  1829. dst_buf->flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
  1830. V4L2_BUF_FLAG_PFRAME |
  1831. V4L2_BUF_FLAG_BFRAME);
  1832. dst_buf->flags |= ctx->frame_types[ctx->display_idx];
  1833. meta = &ctx->frame_metas[ctx->display_idx];
  1834. dst_buf->timecode = meta->timecode;
  1835. dst_buf->vb2_buf.timestamp = meta->timestamp;
  1836. trace_coda_dec_rot_done(ctx, dst_buf, meta);
  1837. switch (q_data_dst->fourcc) {
  1838. case V4L2_PIX_FMT_YUYV:
  1839. payload = width * height * 2;
  1840. break;
  1841. case V4L2_PIX_FMT_YUV420:
  1842. case V4L2_PIX_FMT_YVU420:
  1843. case V4L2_PIX_FMT_NV12:
  1844. default:
  1845. payload = width * height * 3 / 2;
  1846. break;
  1847. case V4L2_PIX_FMT_YUV422P:
  1848. payload = width * height * 2;
  1849. break;
  1850. }
  1851. vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload);
  1852. if (ctx->frame_errors[ctx->display_idx] || err_vdoa)
  1853. coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
  1854. else
  1855. coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
  1856. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1857. "job finished: decoding frame (%d) (%s)\n",
  1858. dst_buf->sequence,
  1859. (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
  1860. "KEYFRAME" : "PFRAME");
  1861. } else {
  1862. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1863. "job finished: no frame decoded\n");
  1864. }
  1865. /* The rotator will copy the current display frame next time */
  1866. ctx->display_idx = display_idx;
  1867. }
  1868. const struct coda_context_ops coda_bit_decode_ops = {
  1869. .queue_init = coda_decoder_queue_init,
  1870. .reqbufs = coda_decoder_reqbufs,
  1871. .start_streaming = coda_start_decoding,
  1872. .prepare_run = coda_prepare_decode,
  1873. .finish_run = coda_finish_decode,
  1874. .seq_end_work = coda_seq_end_work,
  1875. .release = coda_bit_release,
  1876. };
  1877. irqreturn_t coda_irq_handler(int irq, void *data)
  1878. {
  1879. struct coda_dev *dev = data;
  1880. struct coda_ctx *ctx;
  1881. /* read status register to attend the IRQ */
  1882. coda_read(dev, CODA_REG_BIT_INT_STATUS);
  1883. coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
  1884. CODA_REG_BIT_INT_CLEAR);
  1885. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  1886. if (ctx == NULL) {
  1887. v4l2_err(&dev->v4l2_dev,
  1888. "Instance released before the end of transaction\n");
  1889. mutex_unlock(&dev->coda_mutex);
  1890. return IRQ_HANDLED;
  1891. }
  1892. trace_coda_bit_done(ctx);
  1893. if (ctx->aborting) {
  1894. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1895. "task has been aborted\n");
  1896. }
  1897. if (coda_isbusy(ctx->dev)) {
  1898. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1899. "coda is still busy!!!!\n");
  1900. return IRQ_NONE;
  1901. }
  1902. complete(&ctx->completion);
  1903. return IRQ_HANDLED;
  1904. }