atmel-isi.c 34 KB

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  1. /*
  2. * Copyright (c) 2011 Atmel Corporation
  3. * Josh Wu, <josh.wu@atmel.com>
  4. *
  5. * Based on previous work by Lars Haring, <lars.haring@atmel.com>
  6. * and Sedji Gaouaou
  7. * Based on the bttv driver for Bt848 with respective copyright holders
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/completion.h>
  15. #include <linux/delay.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/slab.h>
  24. #include <linux/of.h>
  25. #include <linux/videodev2.h>
  26. #include <media/v4l2-ctrls.h>
  27. #include <media/v4l2-device.h>
  28. #include <media/v4l2-dev.h>
  29. #include <media/v4l2-ioctl.h>
  30. #include <media/v4l2-event.h>
  31. #include <media/v4l2-of.h>
  32. #include <media/videobuf2-dma-contig.h>
  33. #include <media/v4l2-image-sizes.h>
  34. #include "atmel-isi.h"
  35. #define MAX_SUPPORT_WIDTH 2048
  36. #define MAX_SUPPORT_HEIGHT 2048
  37. #define MIN_FRAME_RATE 15
  38. #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE)
  39. /* Frame buffer descriptor */
  40. struct fbd {
  41. /* Physical address of the frame buffer */
  42. u32 fb_address;
  43. /* DMA Control Register(only in HISI2) */
  44. u32 dma_ctrl;
  45. /* Physical address of the next fbd */
  46. u32 next_fbd_address;
  47. };
  48. static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl)
  49. {
  50. fb_desc->dma_ctrl = ctrl;
  51. }
  52. struct isi_dma_desc {
  53. struct list_head list;
  54. struct fbd *p_fbd;
  55. dma_addr_t fbd_phys;
  56. };
  57. /* Frame buffer data */
  58. struct frame_buffer {
  59. struct vb2_v4l2_buffer vb;
  60. struct isi_dma_desc *p_dma_desc;
  61. struct list_head list;
  62. };
  63. struct isi_graph_entity {
  64. struct device_node *node;
  65. struct v4l2_async_subdev asd;
  66. struct v4l2_subdev *subdev;
  67. };
  68. /*
  69. * struct isi_format - ISI media bus format information
  70. * @fourcc: Fourcc code for this format
  71. * @mbus_code: V4L2 media bus format code.
  72. * @bpp: Bytes per pixel (when stored in memory)
  73. * @swap: Byte swap configuration value
  74. * @support: Indicates format supported by subdev
  75. * @skip: Skip duplicate format supported by subdev
  76. */
  77. struct isi_format {
  78. u32 fourcc;
  79. u32 mbus_code;
  80. u8 bpp;
  81. u32 swap;
  82. };
  83. struct atmel_isi {
  84. /* Protects the access of variables shared with the ISR */
  85. spinlock_t irqlock;
  86. struct device *dev;
  87. void __iomem *regs;
  88. int sequence;
  89. /* Allocate descriptors for dma buffer use */
  90. struct fbd *p_fb_descriptors;
  91. dma_addr_t fb_descriptors_phys;
  92. struct list_head dma_desc_head;
  93. struct isi_dma_desc dma_desc[VIDEO_MAX_FRAME];
  94. bool enable_preview_path;
  95. struct completion complete;
  96. /* ISI peripherial clock */
  97. struct clk *pclk;
  98. unsigned int irq;
  99. struct isi_platform_data pdata;
  100. u16 width_flags; /* max 12 bits */
  101. struct list_head video_buffer_list;
  102. struct frame_buffer *active;
  103. struct v4l2_device v4l2_dev;
  104. struct video_device *vdev;
  105. struct v4l2_async_notifier notifier;
  106. struct isi_graph_entity entity;
  107. struct v4l2_format fmt;
  108. const struct isi_format **user_formats;
  109. unsigned int num_user_formats;
  110. const struct isi_format *current_fmt;
  111. struct mutex lock;
  112. struct vb2_queue queue;
  113. };
  114. #define notifier_to_isi(n) container_of(n, struct atmel_isi, notifier)
  115. static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val)
  116. {
  117. writel(val, isi->regs + reg);
  118. }
  119. static u32 isi_readl(struct atmel_isi *isi, u32 reg)
  120. {
  121. return readl(isi->regs + reg);
  122. }
  123. static void configure_geometry(struct atmel_isi *isi)
  124. {
  125. u32 cfg2, psize;
  126. u32 fourcc = isi->current_fmt->fourcc;
  127. isi->enable_preview_path = fourcc == V4L2_PIX_FMT_RGB565 ||
  128. fourcc == V4L2_PIX_FMT_RGB32;
  129. /* According to sensor's output format to set cfg2 */
  130. cfg2 = isi->current_fmt->swap;
  131. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  132. /* Set width */
  133. cfg2 |= ((isi->fmt.fmt.pix.width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) &
  134. ISI_CFG2_IM_HSIZE_MASK;
  135. /* Set height */
  136. cfg2 |= ((isi->fmt.fmt.pix.height - 1) << ISI_CFG2_IM_VSIZE_OFFSET)
  137. & ISI_CFG2_IM_VSIZE_MASK;
  138. isi_writel(isi, ISI_CFG2, cfg2);
  139. /* No down sampling, preview size equal to sensor output size */
  140. psize = ((isi->fmt.fmt.pix.width - 1) << ISI_PSIZE_PREV_HSIZE_OFFSET) &
  141. ISI_PSIZE_PREV_HSIZE_MASK;
  142. psize |= ((isi->fmt.fmt.pix.height - 1) << ISI_PSIZE_PREV_VSIZE_OFFSET) &
  143. ISI_PSIZE_PREV_VSIZE_MASK;
  144. isi_writel(isi, ISI_PSIZE, psize);
  145. isi_writel(isi, ISI_PDECF, ISI_PDECF_NO_SAMPLING);
  146. }
  147. static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi)
  148. {
  149. if (isi->active) {
  150. struct vb2_v4l2_buffer *vbuf = &isi->active->vb;
  151. struct frame_buffer *buf = isi->active;
  152. list_del_init(&buf->list);
  153. vbuf->vb2_buf.timestamp = ktime_get_ns();
  154. vbuf->sequence = isi->sequence++;
  155. vbuf->field = V4L2_FIELD_NONE;
  156. vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE);
  157. }
  158. if (list_empty(&isi->video_buffer_list)) {
  159. isi->active = NULL;
  160. } else {
  161. /* start next dma frame. */
  162. isi->active = list_entry(isi->video_buffer_list.next,
  163. struct frame_buffer, list);
  164. if (!isi->enable_preview_path) {
  165. isi_writel(isi, ISI_DMA_C_DSCR,
  166. (u32)isi->active->p_dma_desc->fbd_phys);
  167. isi_writel(isi, ISI_DMA_C_CTRL,
  168. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  169. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  170. } else {
  171. isi_writel(isi, ISI_DMA_P_DSCR,
  172. (u32)isi->active->p_dma_desc->fbd_phys);
  173. isi_writel(isi, ISI_DMA_P_CTRL,
  174. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  175. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_P_CH);
  176. }
  177. }
  178. return IRQ_HANDLED;
  179. }
  180. /* ISI interrupt service routine */
  181. static irqreturn_t isi_interrupt(int irq, void *dev_id)
  182. {
  183. struct atmel_isi *isi = dev_id;
  184. u32 status, mask, pending;
  185. irqreturn_t ret = IRQ_NONE;
  186. spin_lock(&isi->irqlock);
  187. status = isi_readl(isi, ISI_STATUS);
  188. mask = isi_readl(isi, ISI_INTMASK);
  189. pending = status & mask;
  190. if (pending & ISI_CTRL_SRST) {
  191. complete(&isi->complete);
  192. isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST);
  193. ret = IRQ_HANDLED;
  194. } else if (pending & ISI_CTRL_DIS) {
  195. complete(&isi->complete);
  196. isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS);
  197. ret = IRQ_HANDLED;
  198. } else {
  199. if (likely(pending & ISI_SR_CXFR_DONE) ||
  200. likely(pending & ISI_SR_PXFR_DONE))
  201. ret = atmel_isi_handle_streaming(isi);
  202. }
  203. spin_unlock(&isi->irqlock);
  204. return ret;
  205. }
  206. #define WAIT_ISI_RESET 1
  207. #define WAIT_ISI_DISABLE 0
  208. static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset)
  209. {
  210. unsigned long timeout;
  211. /*
  212. * The reset or disable will only succeed if we have a
  213. * pixel clock from the camera.
  214. */
  215. init_completion(&isi->complete);
  216. if (wait_reset) {
  217. isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST);
  218. isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST);
  219. } else {
  220. isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS);
  221. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  222. }
  223. timeout = wait_for_completion_timeout(&isi->complete,
  224. msecs_to_jiffies(500));
  225. if (timeout == 0)
  226. return -ETIMEDOUT;
  227. return 0;
  228. }
  229. /* ------------------------------------------------------------------
  230. Videobuf operations
  231. ------------------------------------------------------------------*/
  232. static int queue_setup(struct vb2_queue *vq,
  233. unsigned int *nbuffers, unsigned int *nplanes,
  234. unsigned int sizes[], struct device *alloc_devs[])
  235. {
  236. struct atmel_isi *isi = vb2_get_drv_priv(vq);
  237. unsigned long size;
  238. size = isi->fmt.fmt.pix.sizeimage;
  239. /* Make sure the image size is large enough. */
  240. if (*nplanes)
  241. return sizes[0] < size ? -EINVAL : 0;
  242. *nplanes = 1;
  243. sizes[0] = size;
  244. isi->active = NULL;
  245. dev_dbg(isi->dev, "%s, count=%d, size=%ld\n", __func__,
  246. *nbuffers, size);
  247. return 0;
  248. }
  249. static int buffer_init(struct vb2_buffer *vb)
  250. {
  251. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  252. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  253. buf->p_dma_desc = NULL;
  254. INIT_LIST_HEAD(&buf->list);
  255. return 0;
  256. }
  257. static int buffer_prepare(struct vb2_buffer *vb)
  258. {
  259. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  260. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  261. struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue);
  262. unsigned long size;
  263. struct isi_dma_desc *desc;
  264. size = isi->fmt.fmt.pix.sizeimage;
  265. if (vb2_plane_size(vb, 0) < size) {
  266. dev_err(isi->dev, "%s data will not fit into plane (%lu < %lu)\n",
  267. __func__, vb2_plane_size(vb, 0), size);
  268. return -EINVAL;
  269. }
  270. vb2_set_plane_payload(vb, 0, size);
  271. if (!buf->p_dma_desc) {
  272. if (list_empty(&isi->dma_desc_head)) {
  273. dev_err(isi->dev, "Not enough dma descriptors.\n");
  274. return -EINVAL;
  275. } else {
  276. /* Get an available descriptor */
  277. desc = list_entry(isi->dma_desc_head.next,
  278. struct isi_dma_desc, list);
  279. /* Delete the descriptor since now it is used */
  280. list_del_init(&desc->list);
  281. /* Initialize the dma descriptor */
  282. desc->p_fbd->fb_address =
  283. vb2_dma_contig_plane_dma_addr(vb, 0);
  284. desc->p_fbd->next_fbd_address = 0;
  285. set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
  286. buf->p_dma_desc = desc;
  287. }
  288. }
  289. return 0;
  290. }
  291. static void buffer_cleanup(struct vb2_buffer *vb)
  292. {
  293. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  294. struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue);
  295. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  296. /* This descriptor is available now and we add to head list */
  297. if (buf->p_dma_desc)
  298. list_add(&buf->p_dma_desc->list, &isi->dma_desc_head);
  299. }
  300. static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
  301. {
  302. u32 ctrl, cfg1;
  303. cfg1 = isi_readl(isi, ISI_CFG1);
  304. /* Enable irq: cxfr for the codec path, pxfr for the preview path */
  305. isi_writel(isi, ISI_INTEN,
  306. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  307. /* Check if already in a frame */
  308. if (!isi->enable_preview_path) {
  309. if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) {
  310. dev_err(isi->dev, "Already in frame handling.\n");
  311. return;
  312. }
  313. isi_writel(isi, ISI_DMA_C_DSCR,
  314. (u32)buffer->p_dma_desc->fbd_phys);
  315. isi_writel(isi, ISI_DMA_C_CTRL,
  316. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  317. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  318. } else {
  319. isi_writel(isi, ISI_DMA_P_DSCR,
  320. (u32)buffer->p_dma_desc->fbd_phys);
  321. isi_writel(isi, ISI_DMA_P_CTRL,
  322. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  323. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_P_CH);
  324. }
  325. cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK;
  326. /* Enable linked list */
  327. cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR;
  328. /* Enable ISI */
  329. ctrl = ISI_CTRL_EN;
  330. if (!isi->enable_preview_path)
  331. ctrl |= ISI_CTRL_CDC;
  332. isi_writel(isi, ISI_CTRL, ctrl);
  333. isi_writel(isi, ISI_CFG1, cfg1);
  334. }
  335. static void buffer_queue(struct vb2_buffer *vb)
  336. {
  337. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  338. struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue);
  339. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  340. unsigned long flags = 0;
  341. spin_lock_irqsave(&isi->irqlock, flags);
  342. list_add_tail(&buf->list, &isi->video_buffer_list);
  343. if (isi->active == NULL) {
  344. isi->active = buf;
  345. if (vb2_is_streaming(vb->vb2_queue))
  346. start_dma(isi, buf);
  347. }
  348. spin_unlock_irqrestore(&isi->irqlock, flags);
  349. }
  350. static int start_streaming(struct vb2_queue *vq, unsigned int count)
  351. {
  352. struct atmel_isi *isi = vb2_get_drv_priv(vq);
  353. struct frame_buffer *buf, *node;
  354. int ret;
  355. /* Enable stream on the sub device */
  356. ret = v4l2_subdev_call(isi->entity.subdev, video, s_stream, 1);
  357. if (ret && ret != -ENOIOCTLCMD) {
  358. dev_err(isi->dev, "stream on failed in subdev\n");
  359. goto err_start_stream;
  360. }
  361. pm_runtime_get_sync(isi->dev);
  362. /* Reset ISI */
  363. ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET);
  364. if (ret < 0) {
  365. dev_err(isi->dev, "Reset ISI timed out\n");
  366. goto err_reset;
  367. }
  368. /* Disable all interrupts */
  369. isi_writel(isi, ISI_INTDIS, (u32)~0UL);
  370. isi->sequence = 0;
  371. configure_geometry(isi);
  372. spin_lock_irq(&isi->irqlock);
  373. /* Clear any pending interrupt */
  374. isi_readl(isi, ISI_STATUS);
  375. start_dma(isi, isi->active);
  376. spin_unlock_irq(&isi->irqlock);
  377. return 0;
  378. err_reset:
  379. pm_runtime_put(isi->dev);
  380. v4l2_subdev_call(isi->entity.subdev, video, s_stream, 0);
  381. err_start_stream:
  382. spin_lock_irq(&isi->irqlock);
  383. isi->active = NULL;
  384. /* Release all active buffers */
  385. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  386. list_del_init(&buf->list);
  387. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
  388. }
  389. spin_unlock_irq(&isi->irqlock);
  390. return ret;
  391. }
  392. /* abort streaming and wait for last buffer */
  393. static void stop_streaming(struct vb2_queue *vq)
  394. {
  395. struct atmel_isi *isi = vb2_get_drv_priv(vq);
  396. struct frame_buffer *buf, *node;
  397. int ret = 0;
  398. unsigned long timeout;
  399. /* Disable stream on the sub device */
  400. ret = v4l2_subdev_call(isi->entity.subdev, video, s_stream, 0);
  401. if (ret && ret != -ENOIOCTLCMD)
  402. dev_err(isi->dev, "stream off failed in subdev\n");
  403. spin_lock_irq(&isi->irqlock);
  404. isi->active = NULL;
  405. /* Release all active buffers */
  406. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  407. list_del_init(&buf->list);
  408. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  409. }
  410. spin_unlock_irq(&isi->irqlock);
  411. if (!isi->enable_preview_path) {
  412. timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ;
  413. /* Wait until the end of the current frame. */
  414. while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) &&
  415. time_before(jiffies, timeout))
  416. msleep(1);
  417. if (time_after(jiffies, timeout))
  418. dev_err(isi->dev,
  419. "Timeout waiting for finishing codec request\n");
  420. }
  421. /* Disable interrupts */
  422. isi_writel(isi, ISI_INTDIS,
  423. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  424. /* Disable ISI and wait for it is done */
  425. ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE);
  426. if (ret < 0)
  427. dev_err(isi->dev, "Disable ISI timed out\n");
  428. pm_runtime_put(isi->dev);
  429. }
  430. static const struct vb2_ops isi_video_qops = {
  431. .queue_setup = queue_setup,
  432. .buf_init = buffer_init,
  433. .buf_prepare = buffer_prepare,
  434. .buf_cleanup = buffer_cleanup,
  435. .buf_queue = buffer_queue,
  436. .start_streaming = start_streaming,
  437. .stop_streaming = stop_streaming,
  438. .wait_prepare = vb2_ops_wait_prepare,
  439. .wait_finish = vb2_ops_wait_finish,
  440. };
  441. static int isi_g_fmt_vid_cap(struct file *file, void *priv,
  442. struct v4l2_format *fmt)
  443. {
  444. struct atmel_isi *isi = video_drvdata(file);
  445. *fmt = isi->fmt;
  446. return 0;
  447. }
  448. static const struct isi_format *find_format_by_fourcc(struct atmel_isi *isi,
  449. unsigned int fourcc)
  450. {
  451. unsigned int num_formats = isi->num_user_formats;
  452. const struct isi_format *fmt;
  453. unsigned int i;
  454. for (i = 0; i < num_formats; i++) {
  455. fmt = isi->user_formats[i];
  456. if (fmt->fourcc == fourcc)
  457. return fmt;
  458. }
  459. return NULL;
  460. }
  461. static int isi_try_fmt(struct atmel_isi *isi, struct v4l2_format *f,
  462. const struct isi_format **current_fmt)
  463. {
  464. const struct isi_format *isi_fmt;
  465. struct v4l2_pix_format *pixfmt = &f->fmt.pix;
  466. struct v4l2_subdev_pad_config pad_cfg;
  467. struct v4l2_subdev_format format = {
  468. .which = V4L2_SUBDEV_FORMAT_TRY,
  469. };
  470. int ret;
  471. if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  472. return -EINVAL;
  473. isi_fmt = find_format_by_fourcc(isi, pixfmt->pixelformat);
  474. if (!isi_fmt) {
  475. isi_fmt = isi->user_formats[isi->num_user_formats - 1];
  476. pixfmt->pixelformat = isi_fmt->fourcc;
  477. }
  478. /* Limit to Atmel ISC hardware capabilities */
  479. if (pixfmt->width > MAX_SUPPORT_WIDTH)
  480. pixfmt->width = MAX_SUPPORT_WIDTH;
  481. if (pixfmt->height > MAX_SUPPORT_HEIGHT)
  482. pixfmt->height = MAX_SUPPORT_HEIGHT;
  483. v4l2_fill_mbus_format(&format.format, pixfmt, isi_fmt->mbus_code);
  484. ret = v4l2_subdev_call(isi->entity.subdev, pad, set_fmt,
  485. &pad_cfg, &format);
  486. if (ret < 0)
  487. return ret;
  488. v4l2_fill_pix_format(pixfmt, &format.format);
  489. pixfmt->field = V4L2_FIELD_NONE;
  490. pixfmt->bytesperline = pixfmt->width * isi_fmt->bpp;
  491. pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height;
  492. if (current_fmt)
  493. *current_fmt = isi_fmt;
  494. return 0;
  495. }
  496. static int isi_set_fmt(struct atmel_isi *isi, struct v4l2_format *f)
  497. {
  498. struct v4l2_subdev_format format = {
  499. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  500. };
  501. const struct isi_format *current_fmt;
  502. int ret;
  503. ret = isi_try_fmt(isi, f, &current_fmt);
  504. if (ret)
  505. return ret;
  506. v4l2_fill_mbus_format(&format.format, &f->fmt.pix,
  507. current_fmt->mbus_code);
  508. ret = v4l2_subdev_call(isi->entity.subdev, pad,
  509. set_fmt, NULL, &format);
  510. if (ret < 0)
  511. return ret;
  512. isi->fmt = *f;
  513. isi->current_fmt = current_fmt;
  514. return 0;
  515. }
  516. static int isi_s_fmt_vid_cap(struct file *file, void *priv,
  517. struct v4l2_format *f)
  518. {
  519. struct atmel_isi *isi = video_drvdata(file);
  520. if (vb2_is_streaming(&isi->queue))
  521. return -EBUSY;
  522. return isi_set_fmt(isi, f);
  523. }
  524. static int isi_try_fmt_vid_cap(struct file *file, void *priv,
  525. struct v4l2_format *f)
  526. {
  527. struct atmel_isi *isi = video_drvdata(file);
  528. return isi_try_fmt(isi, f, NULL);
  529. }
  530. static int isi_enum_fmt_vid_cap(struct file *file, void *priv,
  531. struct v4l2_fmtdesc *f)
  532. {
  533. struct atmel_isi *isi = video_drvdata(file);
  534. if (f->index >= isi->num_user_formats)
  535. return -EINVAL;
  536. f->pixelformat = isi->user_formats[f->index]->fourcc;
  537. return 0;
  538. }
  539. static int isi_querycap(struct file *file, void *priv,
  540. struct v4l2_capability *cap)
  541. {
  542. strlcpy(cap->driver, "atmel-isi", sizeof(cap->driver));
  543. strlcpy(cap->card, "Atmel Image Sensor Interface", sizeof(cap->card));
  544. strlcpy(cap->bus_info, "platform:isi", sizeof(cap->bus_info));
  545. return 0;
  546. }
  547. static int isi_enum_input(struct file *file, void *priv,
  548. struct v4l2_input *i)
  549. {
  550. if (i->index != 0)
  551. return -EINVAL;
  552. i->type = V4L2_INPUT_TYPE_CAMERA;
  553. strlcpy(i->name, "Camera", sizeof(i->name));
  554. return 0;
  555. }
  556. static int isi_g_input(struct file *file, void *priv, unsigned int *i)
  557. {
  558. *i = 0;
  559. return 0;
  560. }
  561. static int isi_s_input(struct file *file, void *priv, unsigned int i)
  562. {
  563. if (i > 0)
  564. return -EINVAL;
  565. return 0;
  566. }
  567. static int isi_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a)
  568. {
  569. struct atmel_isi *isi = video_drvdata(file);
  570. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  571. return -EINVAL;
  572. a->parm.capture.readbuffers = 2;
  573. return v4l2_subdev_call(isi->entity.subdev, video, g_parm, a);
  574. }
  575. static int isi_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a)
  576. {
  577. struct atmel_isi *isi = video_drvdata(file);
  578. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  579. return -EINVAL;
  580. a->parm.capture.readbuffers = 2;
  581. return v4l2_subdev_call(isi->entity.subdev, video, s_parm, a);
  582. }
  583. static int isi_enum_framesizes(struct file *file, void *fh,
  584. struct v4l2_frmsizeenum *fsize)
  585. {
  586. struct atmel_isi *isi = video_drvdata(file);
  587. const struct isi_format *isi_fmt;
  588. struct v4l2_subdev_frame_size_enum fse = {
  589. .index = fsize->index,
  590. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  591. };
  592. int ret;
  593. isi_fmt = find_format_by_fourcc(isi, fsize->pixel_format);
  594. if (!isi_fmt)
  595. return -EINVAL;
  596. fse.code = isi_fmt->mbus_code;
  597. ret = v4l2_subdev_call(isi->entity.subdev, pad, enum_frame_size,
  598. NULL, &fse);
  599. if (ret)
  600. return ret;
  601. fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
  602. fsize->discrete.width = fse.max_width;
  603. fsize->discrete.height = fse.max_height;
  604. return 0;
  605. }
  606. static int isi_enum_frameintervals(struct file *file, void *fh,
  607. struct v4l2_frmivalenum *fival)
  608. {
  609. struct atmel_isi *isi = video_drvdata(file);
  610. const struct isi_format *isi_fmt;
  611. struct v4l2_subdev_frame_interval_enum fie = {
  612. .index = fival->index,
  613. .width = fival->width,
  614. .height = fival->height,
  615. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  616. };
  617. int ret;
  618. isi_fmt = find_format_by_fourcc(isi, fival->pixel_format);
  619. if (!isi_fmt)
  620. return -EINVAL;
  621. fie.code = isi_fmt->mbus_code;
  622. ret = v4l2_subdev_call(isi->entity.subdev, pad,
  623. enum_frame_interval, NULL, &fie);
  624. if (ret)
  625. return ret;
  626. fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
  627. fival->discrete = fie.interval;
  628. return 0;
  629. }
  630. static void isi_camera_set_bus_param(struct atmel_isi *isi)
  631. {
  632. u32 cfg1 = 0;
  633. /* set bus param for ISI */
  634. if (isi->pdata.hsync_act_low)
  635. cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW;
  636. if (isi->pdata.vsync_act_low)
  637. cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW;
  638. if (isi->pdata.pclk_act_falling)
  639. cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING;
  640. if (isi->pdata.has_emb_sync)
  641. cfg1 |= ISI_CFG1_EMB_SYNC;
  642. if (isi->pdata.full_mode)
  643. cfg1 |= ISI_CFG1_FULL_MODE;
  644. cfg1 |= ISI_CFG1_THMASK_BEATS_16;
  645. /* Enable PM and peripheral clock before operate isi registers */
  646. pm_runtime_get_sync(isi->dev);
  647. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  648. isi_writel(isi, ISI_CFG1, cfg1);
  649. pm_runtime_put(isi->dev);
  650. }
  651. /* -----------------------------------------------------------------------*/
  652. static int atmel_isi_parse_dt(struct atmel_isi *isi,
  653. struct platform_device *pdev)
  654. {
  655. struct device_node *np = pdev->dev.of_node;
  656. struct v4l2_of_endpoint ep;
  657. int err;
  658. /* Default settings for ISI */
  659. isi->pdata.full_mode = 1;
  660. isi->pdata.frate = ISI_CFG1_FRATE_CAPTURE_ALL;
  661. np = of_graph_get_next_endpoint(np, NULL);
  662. if (!np) {
  663. dev_err(&pdev->dev, "Could not find the endpoint\n");
  664. return -EINVAL;
  665. }
  666. err = v4l2_of_parse_endpoint(np, &ep);
  667. of_node_put(np);
  668. if (err) {
  669. dev_err(&pdev->dev, "Could not parse the endpoint\n");
  670. return err;
  671. }
  672. switch (ep.bus.parallel.bus_width) {
  673. case 8:
  674. isi->pdata.data_width_flags = ISI_DATAWIDTH_8;
  675. break;
  676. case 10:
  677. isi->pdata.data_width_flags =
  678. ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10;
  679. break;
  680. default:
  681. dev_err(&pdev->dev, "Unsupported bus width: %d\n",
  682. ep.bus.parallel.bus_width);
  683. return -EINVAL;
  684. }
  685. if (ep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  686. isi->pdata.hsync_act_low = true;
  687. if (ep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  688. isi->pdata.vsync_act_low = true;
  689. if (ep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  690. isi->pdata.pclk_act_falling = true;
  691. if (ep.bus_type == V4L2_MBUS_BT656)
  692. isi->pdata.has_emb_sync = true;
  693. return 0;
  694. }
  695. static int isi_open(struct file *file)
  696. {
  697. struct atmel_isi *isi = video_drvdata(file);
  698. struct v4l2_subdev *sd = isi->entity.subdev;
  699. int ret;
  700. if (mutex_lock_interruptible(&isi->lock))
  701. return -ERESTARTSYS;
  702. ret = v4l2_fh_open(file);
  703. if (ret < 0)
  704. goto unlock;
  705. if (!v4l2_fh_is_singular_file(file))
  706. goto fh_rel;
  707. ret = v4l2_subdev_call(sd, core, s_power, 1);
  708. if (ret < 0 && ret != -ENOIOCTLCMD)
  709. goto fh_rel;
  710. ret = isi_set_fmt(isi, &isi->fmt);
  711. if (ret)
  712. v4l2_subdev_call(sd, core, s_power, 0);
  713. fh_rel:
  714. if (ret)
  715. v4l2_fh_release(file);
  716. unlock:
  717. mutex_unlock(&isi->lock);
  718. return ret;
  719. }
  720. static int isi_release(struct file *file)
  721. {
  722. struct atmel_isi *isi = video_drvdata(file);
  723. struct v4l2_subdev *sd = isi->entity.subdev;
  724. bool fh_singular;
  725. int ret;
  726. mutex_lock(&isi->lock);
  727. fh_singular = v4l2_fh_is_singular_file(file);
  728. ret = _vb2_fop_release(file, NULL);
  729. if (fh_singular)
  730. v4l2_subdev_call(sd, core, s_power, 0);
  731. mutex_unlock(&isi->lock);
  732. return ret;
  733. }
  734. static const struct v4l2_ioctl_ops isi_ioctl_ops = {
  735. .vidioc_querycap = isi_querycap,
  736. .vidioc_try_fmt_vid_cap = isi_try_fmt_vid_cap,
  737. .vidioc_g_fmt_vid_cap = isi_g_fmt_vid_cap,
  738. .vidioc_s_fmt_vid_cap = isi_s_fmt_vid_cap,
  739. .vidioc_enum_fmt_vid_cap = isi_enum_fmt_vid_cap,
  740. .vidioc_enum_input = isi_enum_input,
  741. .vidioc_g_input = isi_g_input,
  742. .vidioc_s_input = isi_s_input,
  743. .vidioc_g_parm = isi_g_parm,
  744. .vidioc_s_parm = isi_s_parm,
  745. .vidioc_enum_framesizes = isi_enum_framesizes,
  746. .vidioc_enum_frameintervals = isi_enum_frameintervals,
  747. .vidioc_reqbufs = vb2_ioctl_reqbufs,
  748. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  749. .vidioc_querybuf = vb2_ioctl_querybuf,
  750. .vidioc_qbuf = vb2_ioctl_qbuf,
  751. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  752. .vidioc_expbuf = vb2_ioctl_expbuf,
  753. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  754. .vidioc_streamon = vb2_ioctl_streamon,
  755. .vidioc_streamoff = vb2_ioctl_streamoff,
  756. .vidioc_log_status = v4l2_ctrl_log_status,
  757. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  758. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  759. };
  760. static const struct v4l2_file_operations isi_fops = {
  761. .owner = THIS_MODULE,
  762. .unlocked_ioctl = video_ioctl2,
  763. .open = isi_open,
  764. .release = isi_release,
  765. .poll = vb2_fop_poll,
  766. .mmap = vb2_fop_mmap,
  767. .read = vb2_fop_read,
  768. };
  769. static int isi_set_default_fmt(struct atmel_isi *isi)
  770. {
  771. struct v4l2_format f = {
  772. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
  773. .fmt.pix = {
  774. .width = VGA_WIDTH,
  775. .height = VGA_HEIGHT,
  776. .field = V4L2_FIELD_NONE,
  777. .pixelformat = isi->user_formats[0]->fourcc,
  778. },
  779. };
  780. int ret;
  781. ret = isi_try_fmt(isi, &f, NULL);
  782. if (ret)
  783. return ret;
  784. isi->current_fmt = isi->user_formats[0];
  785. isi->fmt = f;
  786. return 0;
  787. }
  788. static const struct isi_format isi_formats[] = {
  789. {
  790. .fourcc = V4L2_PIX_FMT_YUYV,
  791. .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
  792. .bpp = 2,
  793. .swap = ISI_CFG2_YCC_SWAP_DEFAULT,
  794. }, {
  795. .fourcc = V4L2_PIX_FMT_YUYV,
  796. .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
  797. .bpp = 2,
  798. .swap = ISI_CFG2_YCC_SWAP_MODE_1,
  799. }, {
  800. .fourcc = V4L2_PIX_FMT_YUYV,
  801. .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
  802. .bpp = 2,
  803. .swap = ISI_CFG2_YCC_SWAP_MODE_2,
  804. }, {
  805. .fourcc = V4L2_PIX_FMT_YUYV,
  806. .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
  807. .bpp = 2,
  808. .swap = ISI_CFG2_YCC_SWAP_MODE_3,
  809. }, {
  810. .fourcc = V4L2_PIX_FMT_RGB565,
  811. .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
  812. .bpp = 2,
  813. .swap = ISI_CFG2_YCC_SWAP_MODE_2,
  814. }, {
  815. .fourcc = V4L2_PIX_FMT_RGB565,
  816. .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
  817. .bpp = 2,
  818. .swap = ISI_CFG2_YCC_SWAP_MODE_3,
  819. }, {
  820. .fourcc = V4L2_PIX_FMT_RGB565,
  821. .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
  822. .bpp = 2,
  823. .swap = ISI_CFG2_YCC_SWAP_DEFAULT,
  824. }, {
  825. .fourcc = V4L2_PIX_FMT_RGB565,
  826. .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
  827. .bpp = 2,
  828. .swap = ISI_CFG2_YCC_SWAP_MODE_1,
  829. },
  830. };
  831. static int isi_formats_init(struct atmel_isi *isi)
  832. {
  833. const struct isi_format *isi_fmts[ARRAY_SIZE(isi_formats)];
  834. unsigned int num_fmts = 0, i, j;
  835. struct v4l2_subdev *subdev = isi->entity.subdev;
  836. struct v4l2_subdev_mbus_code_enum mbus_code = {
  837. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  838. };
  839. while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
  840. NULL, &mbus_code)) {
  841. for (i = 0; i < ARRAY_SIZE(isi_formats); i++) {
  842. if (isi_formats[i].mbus_code != mbus_code.code)
  843. continue;
  844. /* Code supported, have we got this fourcc yet? */
  845. for (j = 0; j < num_fmts; j++)
  846. if (isi_fmts[j]->fourcc == isi_formats[i].fourcc)
  847. /* Already available */
  848. break;
  849. if (j == num_fmts)
  850. /* new */
  851. isi_fmts[num_fmts++] = isi_formats + i;
  852. }
  853. mbus_code.index++;
  854. }
  855. if (!num_fmts)
  856. return -ENXIO;
  857. isi->num_user_formats = num_fmts;
  858. isi->user_formats = devm_kcalloc(isi->dev,
  859. num_fmts, sizeof(struct isi_format *),
  860. GFP_KERNEL);
  861. if (!isi->user_formats) {
  862. dev_err(isi->dev, "could not allocate memory\n");
  863. return -ENOMEM;
  864. }
  865. memcpy(isi->user_formats, isi_fmts,
  866. num_fmts * sizeof(struct isi_format *));
  867. isi->current_fmt = isi->user_formats[0];
  868. return 0;
  869. }
  870. static int isi_graph_notify_complete(struct v4l2_async_notifier *notifier)
  871. {
  872. struct atmel_isi *isi = notifier_to_isi(notifier);
  873. int ret;
  874. isi->vdev->ctrl_handler = isi->entity.subdev->ctrl_handler;
  875. ret = isi_formats_init(isi);
  876. if (ret) {
  877. dev_err(isi->dev, "No supported mediabus format found\n");
  878. return ret;
  879. }
  880. isi_camera_set_bus_param(isi);
  881. ret = isi_set_default_fmt(isi);
  882. if (ret) {
  883. dev_err(isi->dev, "Could not set default format\n");
  884. return ret;
  885. }
  886. ret = video_register_device(isi->vdev, VFL_TYPE_GRABBER, -1);
  887. if (ret) {
  888. dev_err(isi->dev, "Failed to register video device\n");
  889. return ret;
  890. }
  891. dev_dbg(isi->dev, "Device registered as %s\n",
  892. video_device_node_name(isi->vdev));
  893. return 0;
  894. }
  895. static void isi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
  896. struct v4l2_subdev *sd,
  897. struct v4l2_async_subdev *asd)
  898. {
  899. struct atmel_isi *isi = notifier_to_isi(notifier);
  900. dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev));
  901. /* Checks internaly if vdev have been init or not */
  902. video_unregister_device(isi->vdev);
  903. }
  904. static int isi_graph_notify_bound(struct v4l2_async_notifier *notifier,
  905. struct v4l2_subdev *subdev,
  906. struct v4l2_async_subdev *asd)
  907. {
  908. struct atmel_isi *isi = notifier_to_isi(notifier);
  909. dev_dbg(isi->dev, "subdev %s bound\n", subdev->name);
  910. isi->entity.subdev = subdev;
  911. return 0;
  912. }
  913. static int isi_graph_parse(struct atmel_isi *isi, struct device_node *node)
  914. {
  915. struct device_node *ep = NULL;
  916. struct device_node *remote;
  917. while (1) {
  918. ep = of_graph_get_next_endpoint(node, ep);
  919. if (!ep)
  920. return -EINVAL;
  921. remote = of_graph_get_remote_port_parent(ep);
  922. if (!remote) {
  923. of_node_put(ep);
  924. return -EINVAL;
  925. }
  926. /* Remote node to connect */
  927. isi->entity.node = remote;
  928. isi->entity.asd.match_type = V4L2_ASYNC_MATCH_OF;
  929. isi->entity.asd.match.of.node = remote;
  930. return 0;
  931. }
  932. }
  933. static int isi_graph_init(struct atmel_isi *isi)
  934. {
  935. struct v4l2_async_subdev **subdevs = NULL;
  936. int ret;
  937. /* Parse the graph to extract a list of subdevice DT nodes. */
  938. ret = isi_graph_parse(isi, isi->dev->of_node);
  939. if (ret < 0) {
  940. dev_err(isi->dev, "Graph parsing failed\n");
  941. return ret;
  942. }
  943. /* Register the subdevices notifier. */
  944. subdevs = devm_kzalloc(isi->dev, sizeof(*subdevs), GFP_KERNEL);
  945. if (subdevs == NULL) {
  946. of_node_put(isi->entity.node);
  947. return -ENOMEM;
  948. }
  949. subdevs[0] = &isi->entity.asd;
  950. isi->notifier.subdevs = subdevs;
  951. isi->notifier.num_subdevs = 1;
  952. isi->notifier.bound = isi_graph_notify_bound;
  953. isi->notifier.unbind = isi_graph_notify_unbind;
  954. isi->notifier.complete = isi_graph_notify_complete;
  955. ret = v4l2_async_notifier_register(&isi->v4l2_dev, &isi->notifier);
  956. if (ret < 0) {
  957. dev_err(isi->dev, "Notifier registration failed\n");
  958. of_node_put(isi->entity.node);
  959. return ret;
  960. }
  961. return 0;
  962. }
  963. static int atmel_isi_probe(struct platform_device *pdev)
  964. {
  965. int irq;
  966. struct atmel_isi *isi;
  967. struct vb2_queue *q;
  968. struct resource *regs;
  969. int ret, i;
  970. isi = devm_kzalloc(&pdev->dev, sizeof(struct atmel_isi), GFP_KERNEL);
  971. if (!isi) {
  972. dev_err(&pdev->dev, "Can't allocate interface!\n");
  973. return -ENOMEM;
  974. }
  975. isi->pclk = devm_clk_get(&pdev->dev, "isi_clk");
  976. if (IS_ERR(isi->pclk))
  977. return PTR_ERR(isi->pclk);
  978. ret = atmel_isi_parse_dt(isi, pdev);
  979. if (ret)
  980. return ret;
  981. isi->active = NULL;
  982. isi->dev = &pdev->dev;
  983. mutex_init(&isi->lock);
  984. spin_lock_init(&isi->irqlock);
  985. INIT_LIST_HEAD(&isi->video_buffer_list);
  986. INIT_LIST_HEAD(&isi->dma_desc_head);
  987. q = &isi->queue;
  988. /* Initialize the top-level structure */
  989. ret = v4l2_device_register(&pdev->dev, &isi->v4l2_dev);
  990. if (ret)
  991. return ret;
  992. isi->vdev = video_device_alloc();
  993. if (isi->vdev == NULL) {
  994. ret = -ENOMEM;
  995. goto err_vdev_alloc;
  996. }
  997. /* video node */
  998. isi->vdev->fops = &isi_fops;
  999. isi->vdev->v4l2_dev = &isi->v4l2_dev;
  1000. isi->vdev->queue = &isi->queue;
  1001. strlcpy(isi->vdev->name, KBUILD_MODNAME, sizeof(isi->vdev->name));
  1002. isi->vdev->release = video_device_release;
  1003. isi->vdev->ioctl_ops = &isi_ioctl_ops;
  1004. isi->vdev->lock = &isi->lock;
  1005. isi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
  1006. V4L2_CAP_READWRITE;
  1007. video_set_drvdata(isi->vdev, isi);
  1008. /* buffer queue */
  1009. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1010. q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
  1011. q->lock = &isi->lock;
  1012. q->drv_priv = isi;
  1013. q->buf_struct_size = sizeof(struct frame_buffer);
  1014. q->ops = &isi_video_qops;
  1015. q->mem_ops = &vb2_dma_contig_memops;
  1016. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1017. q->min_buffers_needed = 2;
  1018. q->dev = &pdev->dev;
  1019. ret = vb2_queue_init(q);
  1020. if (ret < 0) {
  1021. dev_err(&pdev->dev, "failed to initialize VB2 queue\n");
  1022. goto err_vb2_queue;
  1023. }
  1024. isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev,
  1025. sizeof(struct fbd) * VIDEO_MAX_FRAME,
  1026. &isi->fb_descriptors_phys,
  1027. GFP_KERNEL);
  1028. if (!isi->p_fb_descriptors) {
  1029. dev_err(&pdev->dev, "Can't allocate descriptors!\n");
  1030. ret = -ENOMEM;
  1031. goto err_dma_alloc;
  1032. }
  1033. for (i = 0; i < VIDEO_MAX_FRAME; i++) {
  1034. isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i;
  1035. isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys +
  1036. i * sizeof(struct fbd);
  1037. list_add(&isi->dma_desc[i].list, &isi->dma_desc_head);
  1038. }
  1039. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1040. isi->regs = devm_ioremap_resource(&pdev->dev, regs);
  1041. if (IS_ERR(isi->regs)) {
  1042. ret = PTR_ERR(isi->regs);
  1043. goto err_ioremap;
  1044. }
  1045. if (isi->pdata.data_width_flags & ISI_DATAWIDTH_8)
  1046. isi->width_flags = 1 << 7;
  1047. if (isi->pdata.data_width_flags & ISI_DATAWIDTH_10)
  1048. isi->width_flags |= 1 << 9;
  1049. irq = platform_get_irq(pdev, 0);
  1050. if (irq < 0) {
  1051. ret = irq;
  1052. goto err_req_irq;
  1053. }
  1054. ret = devm_request_irq(&pdev->dev, irq, isi_interrupt, 0, "isi", isi);
  1055. if (ret) {
  1056. dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
  1057. goto err_req_irq;
  1058. }
  1059. isi->irq = irq;
  1060. ret = isi_graph_init(isi);
  1061. if (ret < 0)
  1062. goto err_req_irq;
  1063. pm_suspend_ignore_children(&pdev->dev, true);
  1064. pm_runtime_enable(&pdev->dev);
  1065. platform_set_drvdata(pdev, isi);
  1066. return 0;
  1067. err_req_irq:
  1068. err_ioremap:
  1069. dma_free_coherent(&pdev->dev,
  1070. sizeof(struct fbd) * VIDEO_MAX_FRAME,
  1071. isi->p_fb_descriptors,
  1072. isi->fb_descriptors_phys);
  1073. err_dma_alloc:
  1074. err_vb2_queue:
  1075. video_device_release(isi->vdev);
  1076. err_vdev_alloc:
  1077. v4l2_device_unregister(&isi->v4l2_dev);
  1078. return ret;
  1079. }
  1080. static int atmel_isi_remove(struct platform_device *pdev)
  1081. {
  1082. struct atmel_isi *isi = platform_get_drvdata(pdev);
  1083. dma_free_coherent(&pdev->dev,
  1084. sizeof(struct fbd) * VIDEO_MAX_FRAME,
  1085. isi->p_fb_descriptors,
  1086. isi->fb_descriptors_phys);
  1087. pm_runtime_disable(&pdev->dev);
  1088. v4l2_async_notifier_unregister(&isi->notifier);
  1089. v4l2_device_unregister(&isi->v4l2_dev);
  1090. return 0;
  1091. }
  1092. #ifdef CONFIG_PM
  1093. static int atmel_isi_runtime_suspend(struct device *dev)
  1094. {
  1095. struct atmel_isi *isi = dev_get_drvdata(dev);
  1096. clk_disable_unprepare(isi->pclk);
  1097. return 0;
  1098. }
  1099. static int atmel_isi_runtime_resume(struct device *dev)
  1100. {
  1101. struct atmel_isi *isi = dev_get_drvdata(dev);
  1102. return clk_prepare_enable(isi->pclk);
  1103. }
  1104. #endif /* CONFIG_PM */
  1105. static const struct dev_pm_ops atmel_isi_dev_pm_ops = {
  1106. SET_RUNTIME_PM_OPS(atmel_isi_runtime_suspend,
  1107. atmel_isi_runtime_resume, NULL)
  1108. };
  1109. static const struct of_device_id atmel_isi_of_match[] = {
  1110. { .compatible = "atmel,at91sam9g45-isi" },
  1111. { }
  1112. };
  1113. MODULE_DEVICE_TABLE(of, atmel_isi_of_match);
  1114. static struct platform_driver atmel_isi_driver = {
  1115. .driver = {
  1116. .name = "atmel_isi",
  1117. .of_match_table = of_match_ptr(atmel_isi_of_match),
  1118. .pm = &atmel_isi_dev_pm_ops,
  1119. },
  1120. .probe = atmel_isi_probe,
  1121. .remove = atmel_isi_remove,
  1122. };
  1123. module_platform_driver(atmel_isi_driver);
  1124. MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>");
  1125. MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux");
  1126. MODULE_LICENSE("GPL");
  1127. MODULE_SUPPORTED_DEVICE("video");