av7110.c 80 KB

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  1. /*
  2. * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
  3. * av7110.c: initialization and demux stuff
  4. *
  5. * Copyright (C) 1999-2002 Ralph Metzler
  6. * & Marcus Metzler for convergence integrated media GmbH
  7. *
  8. * originally based on code by:
  9. * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * To obtain the license, point your browser to
  23. * http://www.gnu.org/copyleft/gpl.html
  24. *
  25. *
  26. * the project's page is at https://linuxtv.org
  27. */
  28. #include <linux/module.h>
  29. #include <linux/kmod.h>
  30. #include <linux/delay.h>
  31. #include <linux/fs.h>
  32. #include <linux/timer.h>
  33. #include <linux/poll.h>
  34. #include <linux/kernel.h>
  35. #include <linux/sched.h>
  36. #include <linux/types.h>
  37. #include <linux/fcntl.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/string.h>
  40. #include <linux/pci.h>
  41. #include <linux/vmalloc.h>
  42. #include <linux/firmware.h>
  43. #include <linux/crc32.h>
  44. #include <linux/i2c.h>
  45. #include <linux/kthread.h>
  46. #include <linux/slab.h>
  47. #include <asm/unaligned.h>
  48. #include <asm/byteorder.h>
  49. #include <linux/dvb/frontend.h>
  50. #include "dvb_frontend.h"
  51. #include "ttpci-eeprom.h"
  52. #include "av7110.h"
  53. #include "av7110_hw.h"
  54. #include "av7110_av.h"
  55. #include "av7110_ca.h"
  56. #include "av7110_ipack.h"
  57. #include "bsbe1.h"
  58. #include "lnbp21.h"
  59. #include "bsru6.h"
  60. #define TS_WIDTH 376
  61. #define TS_HEIGHT 512
  62. #define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
  63. #define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
  64. int av7110_debug;
  65. static int vidmode = CVBS_RGB_OUT;
  66. static int pids_off;
  67. static int adac = DVB_ADAC_TI;
  68. static int hw_sections;
  69. static int rgb_on;
  70. static int volume = 255;
  71. static int budgetpatch;
  72. static int wss_cfg_4_3 = 0x4008;
  73. static int wss_cfg_16_9 = 0x0007;
  74. static int tv_standard;
  75. static int full_ts;
  76. module_param_named(debug, av7110_debug, int, 0644);
  77. MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
  78. module_param(vidmode, int, 0444);
  79. MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
  80. module_param(pids_off, int, 0444);
  81. MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
  82. module_param(adac, int, 0444);
  83. MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
  84. module_param(hw_sections, int, 0444);
  85. MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
  86. module_param(rgb_on, int, 0444);
  87. MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
  88. module_param(volume, int, 0444);
  89. MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
  90. module_param(budgetpatch, int, 0444);
  91. MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
  92. module_param(full_ts, int, 0444);
  93. MODULE_PARM_DESC(full_ts, "enable code for full-ts hardware modification: 0 disable (default), 1 enable");
  94. module_param(wss_cfg_4_3, int, 0444);
  95. MODULE_PARM_DESC(wss_cfg_4_3, "WSS 4:3 - default 0x4008 - bit 15: disable, 14: burst mode, 13..0: wss data");
  96. module_param(wss_cfg_16_9, int, 0444);
  97. MODULE_PARM_DESC(wss_cfg_16_9, "WSS 16:9 - default 0x0007 - bit 15: disable, 14: burst mode, 13..0: wss data");
  98. module_param(tv_standard, int, 0444);
  99. MODULE_PARM_DESC(tv_standard, "TV standard: 0 PAL (default), 1 NTSC");
  100. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  101. static void restart_feeds(struct av7110 *av7110);
  102. static int budget_start_feed(struct dvb_demux_feed *feed);
  103. static int budget_stop_feed(struct dvb_demux_feed *feed);
  104. static int av7110_num;
  105. #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
  106. {\
  107. if (fe_func != NULL) { \
  108. av7110_copy = fe_func; \
  109. fe_func = av7110_func; \
  110. } \
  111. }
  112. static void init_av7110_av(struct av7110 *av7110)
  113. {
  114. int ret;
  115. struct saa7146_dev *dev = av7110->dev;
  116. /* set internal volume control to maximum */
  117. av7110->adac_type = DVB_ADAC_TI;
  118. ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
  119. if (ret < 0)
  120. printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
  121. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetMonitorType,
  122. 1, (u16) av7110->display_ar);
  123. if (ret < 0)
  124. printk("dvb-ttpci: unable to set aspect ratio\n");
  125. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetPanScanType,
  126. 1, av7110->display_panscan);
  127. if (ret < 0)
  128. printk("dvb-ttpci: unable to set pan scan\n");
  129. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 2, wss_cfg_4_3);
  130. if (ret < 0)
  131. printk("dvb-ttpci: unable to configure 4:3 wss\n");
  132. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 3, wss_cfg_16_9);
  133. if (ret < 0)
  134. printk("dvb-ttpci: unable to configure 16:9 wss\n");
  135. ret = av7710_set_video_mode(av7110, vidmode);
  136. if (ret < 0)
  137. printk("dvb-ttpci:cannot set video mode:%d\n",ret);
  138. /* handle different card types */
  139. /* remaining inits according to card and frontend type */
  140. av7110->analog_tuner_flags = 0;
  141. av7110->current_input = 0;
  142. if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a)
  143. av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on
  144. if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
  145. printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
  146. av7110->dvb_adapter.num);
  147. av7110->adac_type = DVB_ADAC_CRYSTAL;
  148. i2c_writereg(av7110, 0x20, 0x01, 0xd2);
  149. i2c_writereg(av7110, 0x20, 0x02, 0x49);
  150. i2c_writereg(av7110, 0x20, 0x03, 0x00);
  151. i2c_writereg(av7110, 0x20, 0x04, 0x00);
  152. /**
  153. * some special handling for the Siemens DVB-C cards...
  154. */
  155. } else if (0 == av7110_init_analog_module(av7110)) {
  156. /* done. */
  157. }
  158. else if (dev->pci->subsystem_vendor == 0x110a) {
  159. printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
  160. av7110->dvb_adapter.num);
  161. av7110->adac_type = DVB_ADAC_NONE;
  162. }
  163. else {
  164. av7110->adac_type = adac;
  165. printk("dvb-ttpci: adac type set to %d @ card %d\n",
  166. av7110->adac_type, av7110->dvb_adapter.num);
  167. }
  168. if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) {
  169. // switch DVB SCART on
  170. ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
  171. if (ret < 0)
  172. printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
  173. ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
  174. if (ret < 0)
  175. printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
  176. if (rgb_on &&
  177. ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
  178. (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
  179. (av7110->dev->pci->subsystem_device == 0x0000)) {
  180. saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
  181. //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
  182. }
  183. }
  184. if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
  185. av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
  186. ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
  187. if (ret < 0)
  188. printk("dvb-ttpci:cannot set volume :%d\n",ret);
  189. }
  190. static void recover_arm(struct av7110 *av7110)
  191. {
  192. dprintk(4, "%p\n",av7110);
  193. av7110_bootarm(av7110);
  194. msleep(100);
  195. init_av7110_av(av7110);
  196. /* card-specific recovery */
  197. if (av7110->recover)
  198. av7110->recover(av7110);
  199. restart_feeds(av7110);
  200. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  201. av7110_check_ir_config(av7110, true);
  202. #endif
  203. }
  204. static void av7110_arm_sync(struct av7110 *av7110)
  205. {
  206. if (av7110->arm_thread)
  207. kthread_stop(av7110->arm_thread);
  208. av7110->arm_thread = NULL;
  209. }
  210. static int arm_thread(void *data)
  211. {
  212. struct av7110 *av7110 = data;
  213. u16 newloops = 0;
  214. int timeout;
  215. dprintk(4, "%p\n",av7110);
  216. for (;;) {
  217. timeout = wait_event_interruptible_timeout(av7110->arm_wait,
  218. kthread_should_stop(), 5 * HZ);
  219. if (-ERESTARTSYS == timeout || kthread_should_stop()) {
  220. /* got signal or told to quit*/
  221. break;
  222. }
  223. if (!av7110->arm_ready)
  224. continue;
  225. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  226. av7110_check_ir_config(av7110, false);
  227. #endif
  228. if (mutex_lock_interruptible(&av7110->dcomlock))
  229. break;
  230. newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
  231. mutex_unlock(&av7110->dcomlock);
  232. if (newloops == av7110->arm_loops || av7110->arm_errors > 3) {
  233. printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
  234. av7110->dvb_adapter.num);
  235. recover_arm(av7110);
  236. if (mutex_lock_interruptible(&av7110->dcomlock))
  237. break;
  238. newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
  239. mutex_unlock(&av7110->dcomlock);
  240. }
  241. av7110->arm_loops = newloops;
  242. av7110->arm_errors = 0;
  243. }
  244. return 0;
  245. }
  246. /****************************************************************************
  247. * IRQ handling
  248. ****************************************************************************/
  249. static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
  250. u8 *buffer2, size_t buffer2_len,
  251. struct dvb_demux_filter *dvbdmxfilter,
  252. struct av7110 *av7110)
  253. {
  254. if (!dvbdmxfilter->feed->demux->dmx.frontend)
  255. return 0;
  256. if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
  257. return 0;
  258. switch (dvbdmxfilter->type) {
  259. case DMX_TYPE_SEC:
  260. if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
  261. return 0;
  262. if (dvbdmxfilter->doneq) {
  263. struct dmx_section_filter *filter = &dvbdmxfilter->filter;
  264. int i;
  265. u8 xor, neq = 0;
  266. for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
  267. xor = filter->filter_value[i] ^ buffer1[i];
  268. neq |= dvbdmxfilter->maskandnotmode[i] & xor;
  269. }
  270. if (!neq)
  271. return 0;
  272. }
  273. return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
  274. buffer2, buffer2_len,
  275. &dvbdmxfilter->filter);
  276. case DMX_TYPE_TS:
  277. if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
  278. return 0;
  279. if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
  280. return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
  281. buffer2, buffer2_len,
  282. &dvbdmxfilter->feed->feed.ts);
  283. else
  284. av7110_p2t_write(buffer1, buffer1_len,
  285. dvbdmxfilter->feed->pid,
  286. &av7110->p2t_filter[dvbdmxfilter->index]);
  287. default:
  288. return 0;
  289. }
  290. }
  291. //#define DEBUG_TIMING
  292. static inline void print_time(char *s)
  293. {
  294. #ifdef DEBUG_TIMING
  295. struct timeval tv;
  296. do_gettimeofday(&tv);
  297. printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
  298. #endif
  299. }
  300. #define DEBI_READ 0
  301. #define DEBI_WRITE 1
  302. static inline void start_debi_dma(struct av7110 *av7110, int dir,
  303. unsigned long addr, unsigned int len)
  304. {
  305. dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
  306. if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
  307. printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
  308. return;
  309. }
  310. SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
  311. SAA7146_IER_ENABLE(av7110->dev, MASK_19);
  312. if (len < 5)
  313. len = 5; /* we want a real DEBI DMA */
  314. if (dir == DEBI_WRITE)
  315. iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
  316. else
  317. irdebi(av7110, DEBISWAB, addr, 0, len);
  318. }
  319. static void debiirq(unsigned long cookie)
  320. {
  321. struct av7110 *av7110 = (struct av7110 *)cookie;
  322. int type = av7110->debitype;
  323. int handle = (type >> 8) & 0x1f;
  324. unsigned int xfer = 0;
  325. print_time("debi");
  326. dprintk(4, "type 0x%04x\n", type);
  327. if (type == -1) {
  328. printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
  329. jiffies, saa7146_read(av7110->dev, PSR),
  330. saa7146_read(av7110->dev, SSR));
  331. goto debi_done;
  332. }
  333. av7110->debitype = -1;
  334. switch (type & 0xff) {
  335. case DATA_TS_RECORD:
  336. dvb_dmx_swfilter_packets(&av7110->demux,
  337. (const u8 *) av7110->debi_virt,
  338. av7110->debilen / 188);
  339. xfer = RX_BUFF;
  340. break;
  341. case DATA_PES_RECORD:
  342. if (av7110->demux.recording)
  343. av7110_record_cb(&av7110->p2t[handle],
  344. (u8 *) av7110->debi_virt,
  345. av7110->debilen);
  346. xfer = RX_BUFF;
  347. break;
  348. case DATA_IPMPE:
  349. case DATA_FSECTION:
  350. case DATA_PIPING:
  351. if (av7110->handle2filter[handle])
  352. DvbDmxFilterCallback((u8 *)av7110->debi_virt,
  353. av7110->debilen, NULL, 0,
  354. av7110->handle2filter[handle],
  355. av7110);
  356. xfer = RX_BUFF;
  357. break;
  358. case DATA_CI_GET:
  359. {
  360. u8 *data = av7110->debi_virt;
  361. if ((data[0] < 2) && data[2] == 0xff) {
  362. int flags = 0;
  363. if (data[5] > 0)
  364. flags |= CA_CI_MODULE_PRESENT;
  365. if (data[5] > 5)
  366. flags |= CA_CI_MODULE_READY;
  367. av7110->ci_slot[data[0]].flags = flags;
  368. } else
  369. ci_get_data(&av7110->ci_rbuffer,
  370. av7110->debi_virt,
  371. av7110->debilen);
  372. xfer = RX_BUFF;
  373. break;
  374. }
  375. case DATA_COMMON_INTERFACE:
  376. CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
  377. xfer = RX_BUFF;
  378. break;
  379. case DATA_DEBUG_MESSAGE:
  380. ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
  381. printk("%s\n", (s8 *) av7110->debi_virt);
  382. xfer = RX_BUFF;
  383. break;
  384. case DATA_CI_PUT:
  385. dprintk(4, "debi DATA_CI_PUT\n");
  386. case DATA_MPEG_PLAY:
  387. dprintk(4, "debi DATA_MPEG_PLAY\n");
  388. case DATA_BMP_LOAD:
  389. dprintk(4, "debi DATA_BMP_LOAD\n");
  390. xfer = TX_BUFF;
  391. break;
  392. default:
  393. break;
  394. }
  395. debi_done:
  396. spin_lock(&av7110->debilock);
  397. if (xfer)
  398. iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
  399. ARM_ClearMailBox(av7110);
  400. spin_unlock(&av7110->debilock);
  401. }
  402. /* irq from av7110 firmware writing the mailbox register in the DPRAM */
  403. static void gpioirq(unsigned long cookie)
  404. {
  405. struct av7110 *av7110 = (struct av7110 *)cookie;
  406. u32 rxbuf, txbuf;
  407. int len;
  408. if (av7110->debitype != -1)
  409. /* we shouldn't get any irq while a debi xfer is running */
  410. printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
  411. jiffies, saa7146_read(av7110->dev, PSR),
  412. saa7146_read(av7110->dev, SSR));
  413. if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
  414. printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
  415. BUG(); /* maybe we should try resetting the debi? */
  416. }
  417. spin_lock(&av7110->debilock);
  418. ARM_ClearIrq(av7110);
  419. /* see what the av7110 wants */
  420. av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
  421. av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  422. rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  423. txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  424. len = (av7110->debilen + 3) & ~3;
  425. print_time("gpio");
  426. dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
  427. switch (av7110->debitype & 0xff) {
  428. case DATA_TS_PLAY:
  429. case DATA_PES_PLAY:
  430. break;
  431. case DATA_MPEG_VIDEO_EVENT:
  432. {
  433. u32 h_ar;
  434. struct video_event event;
  435. av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
  436. h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
  437. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  438. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  439. av7110->video_size.h = h_ar & 0xfff;
  440. event.type = VIDEO_EVENT_SIZE_CHANGED;
  441. event.u.size.w = av7110->video_size.w;
  442. event.u.size.h = av7110->video_size.h;
  443. switch ((h_ar >> 12) & 0xf)
  444. {
  445. case 3:
  446. av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
  447. event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
  448. av7110->videostate.video_format = VIDEO_FORMAT_16_9;
  449. break;
  450. case 4:
  451. av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
  452. event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
  453. av7110->videostate.video_format = VIDEO_FORMAT_221_1;
  454. break;
  455. default:
  456. av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
  457. event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
  458. av7110->videostate.video_format = VIDEO_FORMAT_4_3;
  459. }
  460. dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
  461. av7110->video_size.w, av7110->video_size.h,
  462. av7110->video_size.aspect_ratio);
  463. dvb_video_add_event(av7110, &event);
  464. break;
  465. }
  466. case DATA_CI_PUT:
  467. {
  468. int avail;
  469. struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
  470. avail = dvb_ringbuffer_avail(cibuf);
  471. if (avail <= 2) {
  472. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  473. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  474. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  475. break;
  476. }
  477. len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
  478. len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
  479. if (avail < len + 2) {
  480. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  481. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  482. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  483. break;
  484. }
  485. DVB_RINGBUFFER_SKIP(cibuf, 2);
  486. dvb_ringbuffer_read(cibuf, av7110->debi_virt, len);
  487. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  488. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  489. dprintk(8, "DMA: CI\n");
  490. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
  491. spin_unlock(&av7110->debilock);
  492. wake_up(&cibuf->queue);
  493. return;
  494. }
  495. case DATA_MPEG_PLAY:
  496. if (!av7110->playing) {
  497. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  498. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  499. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  500. break;
  501. }
  502. len = 0;
  503. if (av7110->debitype & 0x100) {
  504. spin_lock(&av7110->aout.lock);
  505. len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
  506. spin_unlock(&av7110->aout.lock);
  507. }
  508. if (len <= 0 && (av7110->debitype & 0x200)
  509. &&av7110->videostate.play_state != VIDEO_FREEZED) {
  510. spin_lock(&av7110->avout.lock);
  511. len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
  512. spin_unlock(&av7110->avout.lock);
  513. }
  514. if (len <= 0) {
  515. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  516. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  517. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  518. break;
  519. }
  520. dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
  521. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  522. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  523. dprintk(8, "DMA: MPEG_PLAY\n");
  524. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
  525. spin_unlock(&av7110->debilock);
  526. return;
  527. case DATA_BMP_LOAD:
  528. len = av7110->debilen;
  529. dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
  530. if (!len) {
  531. av7110->bmp_state = BMP_LOADED;
  532. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  533. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  534. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  535. wake_up(&av7110->bmpq);
  536. dprintk(8, "gpio DATA_BMP_LOAD done\n");
  537. break;
  538. }
  539. if (len > av7110->bmplen)
  540. len = av7110->bmplen;
  541. if (len > 2 * 1024)
  542. len = 2 * 1024;
  543. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  544. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  545. memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
  546. av7110->bmpp += len;
  547. av7110->bmplen -= len;
  548. dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
  549. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
  550. spin_unlock(&av7110->debilock);
  551. return;
  552. case DATA_CI_GET:
  553. case DATA_COMMON_INTERFACE:
  554. case DATA_FSECTION:
  555. case DATA_IPMPE:
  556. case DATA_PIPING:
  557. if (!len || len > 4 * 1024) {
  558. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  559. break;
  560. }
  561. /* fall through */
  562. case DATA_TS_RECORD:
  563. case DATA_PES_RECORD:
  564. dprintk(8, "DMA: TS_REC etc.\n");
  565. start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
  566. spin_unlock(&av7110->debilock);
  567. return;
  568. case DATA_DEBUG_MESSAGE:
  569. if (!len || len > 0xff) {
  570. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  571. break;
  572. }
  573. start_debi_dma(av7110, DEBI_READ, Reserved, len);
  574. spin_unlock(&av7110->debilock);
  575. return;
  576. case DATA_IRCOMMAND:
  577. if (av7110->ir.ir_handler)
  578. av7110->ir.ir_handler(av7110,
  579. swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
  580. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  581. break;
  582. default:
  583. printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
  584. av7110->debitype, av7110->debilen);
  585. break;
  586. }
  587. av7110->debitype = -1;
  588. ARM_ClearMailBox(av7110);
  589. spin_unlock(&av7110->debilock);
  590. }
  591. #ifdef CONFIG_DVB_AV7110_OSD
  592. static int dvb_osd_ioctl(struct file *file,
  593. unsigned int cmd, void *parg)
  594. {
  595. struct dvb_device *dvbdev = file->private_data;
  596. struct av7110 *av7110 = dvbdev->priv;
  597. dprintk(4, "%p\n", av7110);
  598. if (cmd == OSD_SEND_CMD)
  599. return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
  600. if (cmd == OSD_GET_CAPABILITY)
  601. return av7110_osd_capability(av7110, (osd_cap_t *) parg);
  602. return -EINVAL;
  603. }
  604. static const struct file_operations dvb_osd_fops = {
  605. .owner = THIS_MODULE,
  606. .unlocked_ioctl = dvb_generic_ioctl,
  607. .open = dvb_generic_open,
  608. .release = dvb_generic_release,
  609. .llseek = noop_llseek,
  610. };
  611. static struct dvb_device dvbdev_osd = {
  612. .priv = NULL,
  613. .users = 1,
  614. .writers = 1,
  615. .fops = &dvb_osd_fops,
  616. .kernel_ioctl = dvb_osd_ioctl,
  617. };
  618. #endif /* CONFIG_DVB_AV7110_OSD */
  619. static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
  620. u16 subpid, u16 pcrpid)
  621. {
  622. u16 aflags = 0;
  623. dprintk(4, "%p\n", av7110);
  624. if (vpid == 0x1fff || apid == 0x1fff ||
  625. ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
  626. vpid = apid = ttpid = subpid = pcrpid = 0;
  627. av7110->pids[DMX_PES_VIDEO] = 0;
  628. av7110->pids[DMX_PES_AUDIO] = 0;
  629. av7110->pids[DMX_PES_TELETEXT] = 0;
  630. av7110->pids[DMX_PES_PCR] = 0;
  631. }
  632. if (av7110->audiostate.bypass_mode)
  633. aflags |= 0x8000;
  634. return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 6,
  635. pcrpid, vpid, apid, ttpid, subpid, aflags);
  636. }
  637. int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
  638. u16 subpid, u16 pcrpid)
  639. {
  640. int ret = 0;
  641. dprintk(4, "%p\n", av7110);
  642. if (mutex_lock_interruptible(&av7110->pid_mutex))
  643. return -ERESTARTSYS;
  644. if (!(vpid & 0x8000))
  645. av7110->pids[DMX_PES_VIDEO] = vpid;
  646. if (!(apid & 0x8000))
  647. av7110->pids[DMX_PES_AUDIO] = apid;
  648. if (!(ttpid & 0x8000))
  649. av7110->pids[DMX_PES_TELETEXT] = ttpid;
  650. if (!(pcrpid & 0x8000))
  651. av7110->pids[DMX_PES_PCR] = pcrpid;
  652. av7110->pids[DMX_PES_SUBTITLE] = 0;
  653. if (av7110->fe_synced) {
  654. pcrpid = av7110->pids[DMX_PES_PCR];
  655. ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
  656. }
  657. mutex_unlock(&av7110->pid_mutex);
  658. return ret;
  659. }
  660. /******************************************************************************
  661. * hardware filter functions
  662. ******************************************************************************/
  663. static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
  664. {
  665. struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
  666. struct av7110 *av7110 = dvbdmxfeed->demux->priv;
  667. u16 buf[20];
  668. int ret, i;
  669. u16 handle;
  670. // u16 mode = 0x0320;
  671. u16 mode = 0xb96a;
  672. dprintk(4, "%p\n", av7110);
  673. if (av7110->full_ts)
  674. return 0;
  675. if (dvbdmxfilter->type == DMX_TYPE_SEC) {
  676. if (hw_sections) {
  677. buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
  678. dvbdmxfilter->maskandmode[0];
  679. for (i = 3; i < 18; i++)
  680. buf[i + 4 - 2] =
  681. (dvbdmxfilter->filter.filter_value[i] << 8) |
  682. dvbdmxfilter->maskandmode[i];
  683. mode = 4;
  684. }
  685. } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
  686. !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
  687. av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
  688. }
  689. buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
  690. buf[1] = 16;
  691. buf[2] = dvbdmxfeed->pid;
  692. buf[3] = mode;
  693. ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
  694. if (ret != 0 || handle >= 32) {
  695. printk(KERN_ERR "dvb-ttpci: %s error buf %04x %04x %04x %04x ret %d handle %04x\n",
  696. __func__, buf[0], buf[1], buf[2], buf[3],
  697. ret, handle);
  698. dvbdmxfilter->hw_handle = 0xffff;
  699. if (!ret)
  700. ret = -1;
  701. return ret;
  702. }
  703. av7110->handle2filter[handle] = dvbdmxfilter;
  704. dvbdmxfilter->hw_handle = handle;
  705. return ret;
  706. }
  707. static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
  708. {
  709. struct av7110 *av7110 = dvbdmxfilter->feed->demux->priv;
  710. u16 buf[3];
  711. u16 answ[2];
  712. int ret;
  713. u16 handle;
  714. dprintk(4, "%p\n", av7110);
  715. if (av7110->full_ts)
  716. return 0;
  717. handle = dvbdmxfilter->hw_handle;
  718. if (handle >= 32) {
  719. printk("%s tried to stop invalid filter %04x, filter type = %x\n",
  720. __func__, handle, dvbdmxfilter->type);
  721. return -EINVAL;
  722. }
  723. av7110->handle2filter[handle] = NULL;
  724. buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
  725. buf[1] = 1;
  726. buf[2] = handle;
  727. ret = av7110_fw_request(av7110, buf, 3, answ, 2);
  728. if (ret != 0 || answ[1] != handle) {
  729. printk(KERN_ERR "dvb-ttpci: %s error cmd %04x %04x %04x ret %x resp %04x %04x pid %d\n",
  730. __func__, buf[0], buf[1], buf[2], ret,
  731. answ[0], answ[1], dvbdmxfilter->feed->pid);
  732. if (!ret)
  733. ret = -1;
  734. }
  735. return ret;
  736. }
  737. static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
  738. {
  739. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  740. struct av7110 *av7110 = dvbdmx->priv;
  741. u16 *pid = dvbdmx->pids, npids[5];
  742. int i;
  743. int ret = 0;
  744. dprintk(4, "%p\n", av7110);
  745. npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
  746. i = dvbdmxfeed->pes_type;
  747. npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
  748. if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
  749. npids[i] = 0;
  750. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  751. if (!ret)
  752. ret = StartHWFilter(dvbdmxfeed->filter);
  753. return ret;
  754. }
  755. if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
  756. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  757. if (ret)
  758. return ret;
  759. }
  760. if (dvbdmxfeed->pes_type < 2 && npids[0])
  761. if (av7110->fe_synced)
  762. {
  763. ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
  764. if (ret)
  765. return ret;
  766. }
  767. if ((dvbdmxfeed->ts_type & TS_PACKET) && !av7110->full_ts) {
  768. if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
  769. ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
  770. if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
  771. ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
  772. }
  773. return ret;
  774. }
  775. static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
  776. {
  777. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  778. struct av7110 *av7110 = dvbdmx->priv;
  779. u16 *pid = dvbdmx->pids, npids[5];
  780. int i;
  781. int ret = 0;
  782. dprintk(4, "%p\n", av7110);
  783. if (dvbdmxfeed->pes_type <= 1) {
  784. ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
  785. if (ret)
  786. return ret;
  787. if (!av7110->rec_mode)
  788. dvbdmx->recording = 0;
  789. if (!av7110->playing)
  790. dvbdmx->playing = 0;
  791. }
  792. npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
  793. i = dvbdmxfeed->pes_type;
  794. switch (i) {
  795. case 2: //teletext
  796. if (dvbdmxfeed->ts_type & TS_PACKET)
  797. ret = StopHWFilter(dvbdmxfeed->filter);
  798. npids[2] = 0;
  799. break;
  800. case 0:
  801. case 1:
  802. case 4:
  803. if (!pids_off)
  804. return 0;
  805. npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
  806. break;
  807. }
  808. if (!ret)
  809. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  810. return ret;
  811. }
  812. static int av7110_start_feed(struct dvb_demux_feed *feed)
  813. {
  814. struct dvb_demux *demux = feed->demux;
  815. struct av7110 *av7110 = demux->priv;
  816. int ret = 0;
  817. dprintk(4, "%p\n", av7110);
  818. if (!demux->dmx.frontend)
  819. return -EINVAL;
  820. if (!av7110->full_ts && feed->pid > 0x1fff)
  821. return -EINVAL;
  822. if (feed->type == DMX_TYPE_TS) {
  823. if ((feed->ts_type & TS_DECODER) &&
  824. (feed->pes_type <= DMX_PES_PCR)) {
  825. switch (demux->dmx.frontend->source) {
  826. case DMX_MEMORY_FE:
  827. if (feed->ts_type & TS_DECODER)
  828. if (feed->pes_type < 2 &&
  829. !(demux->pids[0] & 0x8000) &&
  830. !(demux->pids[1] & 0x8000)) {
  831. dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
  832. dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
  833. ret = av7110_av_start_play(av7110,RP_AV);
  834. if (!ret)
  835. demux->playing = 1;
  836. }
  837. break;
  838. default:
  839. ret = dvb_feed_start_pid(feed);
  840. break;
  841. }
  842. } else if ((feed->ts_type & TS_PACKET) &&
  843. (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
  844. ret = StartHWFilter(feed->filter);
  845. }
  846. }
  847. if (av7110->full_ts) {
  848. budget_start_feed(feed);
  849. return ret;
  850. }
  851. if (feed->type == DMX_TYPE_SEC) {
  852. int i;
  853. for (i = 0; i < demux->filternum; i++) {
  854. if (demux->filter[i].state != DMX_STATE_READY)
  855. continue;
  856. if (demux->filter[i].type != DMX_TYPE_SEC)
  857. continue;
  858. if (demux->filter[i].filter.parent != &feed->feed.sec)
  859. continue;
  860. demux->filter[i].state = DMX_STATE_GO;
  861. if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
  862. ret = StartHWFilter(&demux->filter[i]);
  863. if (ret)
  864. break;
  865. }
  866. }
  867. }
  868. return ret;
  869. }
  870. static int av7110_stop_feed(struct dvb_demux_feed *feed)
  871. {
  872. struct dvb_demux *demux = feed->demux;
  873. struct av7110 *av7110 = demux->priv;
  874. int i, rc, ret = 0;
  875. dprintk(4, "%p\n", av7110);
  876. if (feed->type == DMX_TYPE_TS) {
  877. if (feed->ts_type & TS_DECODER) {
  878. if (feed->pes_type >= DMX_PES_OTHER ||
  879. !demux->pesfilter[feed->pes_type])
  880. return -EINVAL;
  881. demux->pids[feed->pes_type] |= 0x8000;
  882. demux->pesfilter[feed->pes_type] = NULL;
  883. }
  884. if (feed->ts_type & TS_DECODER &&
  885. feed->pes_type < DMX_PES_OTHER) {
  886. ret = dvb_feed_stop_pid(feed);
  887. } else
  888. if ((feed->ts_type & TS_PACKET) &&
  889. (demux->dmx.frontend->source != DMX_MEMORY_FE))
  890. ret = StopHWFilter(feed->filter);
  891. }
  892. if (av7110->full_ts) {
  893. budget_stop_feed(feed);
  894. return ret;
  895. }
  896. if (feed->type == DMX_TYPE_SEC) {
  897. for (i = 0; i<demux->filternum; i++) {
  898. if (demux->filter[i].state == DMX_STATE_GO &&
  899. demux->filter[i].filter.parent == &feed->feed.sec) {
  900. demux->filter[i].state = DMX_STATE_READY;
  901. if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
  902. rc = StopHWFilter(&demux->filter[i]);
  903. if (!ret)
  904. ret = rc;
  905. /* keep going, stop as many filters as possible */
  906. }
  907. }
  908. }
  909. }
  910. return ret;
  911. }
  912. static void restart_feeds(struct av7110 *av7110)
  913. {
  914. struct dvb_demux *dvbdmx = &av7110->demux;
  915. struct dvb_demux_feed *feed;
  916. int mode;
  917. int feeding;
  918. int i, j;
  919. dprintk(4, "%p\n", av7110);
  920. mode = av7110->playing;
  921. av7110->playing = 0;
  922. av7110->rec_mode = 0;
  923. feeding = av7110->feeding1; /* full_ts mod */
  924. for (i = 0; i < dvbdmx->feednum; i++) {
  925. feed = &dvbdmx->feed[i];
  926. if (feed->state == DMX_STATE_GO) {
  927. if (feed->type == DMX_TYPE_SEC) {
  928. for (j = 0; j < dvbdmx->filternum; j++) {
  929. if (dvbdmx->filter[j].type != DMX_TYPE_SEC)
  930. continue;
  931. if (dvbdmx->filter[j].filter.parent != &feed->feed.sec)
  932. continue;
  933. if (dvbdmx->filter[j].state == DMX_STATE_GO)
  934. dvbdmx->filter[j].state = DMX_STATE_READY;
  935. }
  936. }
  937. av7110_start_feed(feed);
  938. }
  939. }
  940. av7110->feeding1 = feeding; /* full_ts mod */
  941. if (mode)
  942. av7110_av_start_play(av7110, mode);
  943. }
  944. static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
  945. uint64_t *stc, unsigned int *base)
  946. {
  947. int ret;
  948. u16 fwstc[4];
  949. u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
  950. struct dvb_demux *dvbdemux;
  951. struct av7110 *av7110;
  952. /* pointer casting paranoia... */
  953. BUG_ON(!demux);
  954. dvbdemux = demux->priv;
  955. BUG_ON(!dvbdemux);
  956. av7110 = dvbdemux->priv;
  957. dprintk(4, "%p\n", av7110);
  958. if (num != 0)
  959. return -EINVAL;
  960. ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
  961. if (ret) {
  962. printk(KERN_ERR "%s: av7110_fw_request error\n", __func__);
  963. return ret;
  964. }
  965. dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
  966. fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
  967. *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
  968. (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
  969. *base = 1;
  970. dprintk(4, "stc = %lu\n", (unsigned long)*stc);
  971. return 0;
  972. }
  973. /******************************************************************************
  974. * SEC device file operations
  975. ******************************************************************************/
  976. static int av7110_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
  977. {
  978. struct av7110* av7110 = fe->dvb->priv;
  979. switch (tone) {
  980. case SEC_TONE_ON:
  981. return Set22K(av7110, 1);
  982. case SEC_TONE_OFF:
  983. return Set22K(av7110, 0);
  984. default:
  985. return -EINVAL;
  986. }
  987. }
  988. static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
  989. struct dvb_diseqc_master_cmd* cmd)
  990. {
  991. struct av7110* av7110 = fe->dvb->priv;
  992. return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
  993. }
  994. static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
  995. enum fe_sec_mini_cmd minicmd)
  996. {
  997. struct av7110* av7110 = fe->dvb->priv;
  998. return av7110_diseqc_send(av7110, 0, NULL, minicmd);
  999. }
  1000. /* simplified code from budget-core.c */
  1001. static int stop_ts_capture(struct av7110 *budget)
  1002. {
  1003. dprintk(2, "budget: %p\n", budget);
  1004. if (--budget->feeding1)
  1005. return budget->feeding1;
  1006. saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
  1007. SAA7146_IER_DISABLE(budget->dev, MASK_10);
  1008. SAA7146_ISR_CLEAR(budget->dev, MASK_10);
  1009. return 0;
  1010. }
  1011. static int start_ts_capture(struct av7110 *budget)
  1012. {
  1013. unsigned y;
  1014. dprintk(2, "budget: %p\n", budget);
  1015. if (budget->feeding1)
  1016. return ++budget->feeding1;
  1017. for (y = 0; y < TS_HEIGHT; y++)
  1018. memset(budget->grabbing + y * TS_WIDTH, 0x00, TS_WIDTH);
  1019. budget->ttbp = 0;
  1020. SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */
  1021. SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
  1022. saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
  1023. return ++budget->feeding1;
  1024. }
  1025. static int budget_start_feed(struct dvb_demux_feed *feed)
  1026. {
  1027. struct dvb_demux *demux = feed->demux;
  1028. struct av7110 *budget = demux->priv;
  1029. int status;
  1030. dprintk(2, "av7110: %p\n", budget);
  1031. spin_lock(&budget->feedlock1);
  1032. feed->pusi_seen = 0; /* have a clean section start */
  1033. status = start_ts_capture(budget);
  1034. spin_unlock(&budget->feedlock1);
  1035. return status;
  1036. }
  1037. static int budget_stop_feed(struct dvb_demux_feed *feed)
  1038. {
  1039. struct dvb_demux *demux = feed->demux;
  1040. struct av7110 *budget = demux->priv;
  1041. int status;
  1042. dprintk(2, "budget: %p\n", budget);
  1043. spin_lock(&budget->feedlock1);
  1044. status = stop_ts_capture(budget);
  1045. spin_unlock(&budget->feedlock1);
  1046. return status;
  1047. }
  1048. static void vpeirq(unsigned long cookie)
  1049. {
  1050. struct av7110 *budget = (struct av7110 *)cookie;
  1051. u8 *mem = (u8 *) (budget->grabbing);
  1052. u32 olddma = budget->ttbp;
  1053. u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
  1054. struct dvb_demux *demux = budget->full_ts ? &budget->demux : &budget->demux1;
  1055. /* nearest lower position divisible by 188 */
  1056. newdma -= newdma % 188;
  1057. if (newdma >= TS_BUFLEN)
  1058. return;
  1059. budget->ttbp = newdma;
  1060. if (!budget->feeding1 || (newdma == olddma))
  1061. return;
  1062. /* Ensure streamed PCI data is synced to CPU */
  1063. pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE);
  1064. #if 0
  1065. /* track rps1 activity */
  1066. printk("vpeirq: %02x Event Counter 1 0x%04x\n",
  1067. mem[olddma],
  1068. saa7146_read(budget->dev, EC1R) & 0x3fff);
  1069. #endif
  1070. if (newdma > olddma)
  1071. /* no wraparound, dump olddma..newdma */
  1072. dvb_dmx_swfilter_packets(demux, mem + olddma, (newdma - olddma) / 188);
  1073. else {
  1074. /* wraparound, dump olddma..buflen and 0..newdma */
  1075. dvb_dmx_swfilter_packets(demux, mem + olddma, (TS_BUFLEN - olddma) / 188);
  1076. dvb_dmx_swfilter_packets(demux, mem, newdma / 188);
  1077. }
  1078. }
  1079. static int av7110_register(struct av7110 *av7110)
  1080. {
  1081. int ret, i;
  1082. struct dvb_demux *dvbdemux = &av7110->demux;
  1083. struct dvb_demux *dvbdemux1 = &av7110->demux1;
  1084. dprintk(4, "%p\n", av7110);
  1085. if (av7110->registered)
  1086. return -1;
  1087. av7110->registered = 1;
  1088. dvbdemux->priv = (void *) av7110;
  1089. for (i = 0; i < 32; i++)
  1090. av7110->handle2filter[i] = NULL;
  1091. dvbdemux->filternum = (av7110->full_ts) ? 256 : 32;
  1092. dvbdemux->feednum = (av7110->full_ts) ? 256 : 32;
  1093. dvbdemux->start_feed = av7110_start_feed;
  1094. dvbdemux->stop_feed = av7110_stop_feed;
  1095. dvbdemux->write_to_decoder = av7110_write_to_decoder;
  1096. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
  1097. DMX_MEMORY_BASED_FILTERING);
  1098. dvb_dmx_init(&av7110->demux);
  1099. av7110->demux.dmx.get_stc = dvb_get_stc;
  1100. av7110->dmxdev.filternum = (av7110->full_ts) ? 256 : 32;
  1101. av7110->dmxdev.demux = &dvbdemux->dmx;
  1102. av7110->dmxdev.capabilities = 0;
  1103. dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
  1104. av7110->hw_frontend.source = DMX_FRONTEND_0;
  1105. ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
  1106. if (ret < 0)
  1107. return ret;
  1108. av7110->mem_frontend.source = DMX_MEMORY_FE;
  1109. ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
  1110. if (ret < 0)
  1111. return ret;
  1112. ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
  1113. &av7110->hw_frontend);
  1114. if (ret < 0)
  1115. return ret;
  1116. av7110_av_register(av7110);
  1117. av7110_ca_register(av7110);
  1118. #ifdef CONFIG_DVB_AV7110_OSD
  1119. dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
  1120. &dvbdev_osd, av7110, DVB_DEVICE_OSD, 0);
  1121. #endif
  1122. dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
  1123. if (budgetpatch) {
  1124. /* initialize software demux1 without its own frontend
  1125. * demux1 hardware is connected to frontend0 of demux0
  1126. */
  1127. dvbdemux1->priv = (void *) av7110;
  1128. dvbdemux1->filternum = 256;
  1129. dvbdemux1->feednum = 256;
  1130. dvbdemux1->start_feed = budget_start_feed;
  1131. dvbdemux1->stop_feed = budget_stop_feed;
  1132. dvbdemux1->write_to_decoder = NULL;
  1133. dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
  1134. DMX_MEMORY_BASED_FILTERING);
  1135. dvb_dmx_init(&av7110->demux1);
  1136. av7110->dmxdev1.filternum = 256;
  1137. av7110->dmxdev1.demux = &dvbdemux1->dmx;
  1138. av7110->dmxdev1.capabilities = 0;
  1139. dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
  1140. dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
  1141. printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
  1142. }
  1143. return 0;
  1144. }
  1145. static void dvb_unregister(struct av7110 *av7110)
  1146. {
  1147. struct dvb_demux *dvbdemux = &av7110->demux;
  1148. struct dvb_demux *dvbdemux1 = &av7110->demux1;
  1149. dprintk(4, "%p\n", av7110);
  1150. if (!av7110->registered)
  1151. return;
  1152. if (budgetpatch) {
  1153. dvb_net_release(&av7110->dvb_net1);
  1154. dvbdemux->dmx.close(&dvbdemux1->dmx);
  1155. dvb_dmxdev_release(&av7110->dmxdev1);
  1156. dvb_dmx_release(&av7110->demux1);
  1157. }
  1158. dvb_net_release(&av7110->dvb_net);
  1159. dvbdemux->dmx.close(&dvbdemux->dmx);
  1160. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
  1161. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
  1162. dvb_dmxdev_release(&av7110->dmxdev);
  1163. dvb_dmx_release(&av7110->demux);
  1164. if (av7110->fe != NULL) {
  1165. dvb_unregister_frontend(av7110->fe);
  1166. dvb_frontend_detach(av7110->fe);
  1167. }
  1168. dvb_unregister_device(av7110->osd_dev);
  1169. av7110_av_unregister(av7110);
  1170. av7110_ca_unregister(av7110);
  1171. }
  1172. /****************************************************************************
  1173. * I2C client commands
  1174. ****************************************************************************/
  1175. int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
  1176. {
  1177. u8 msg[2] = { reg, val };
  1178. struct i2c_msg msgs;
  1179. msgs.flags = 0;
  1180. msgs.addr = id / 2;
  1181. msgs.len = 2;
  1182. msgs.buf = msg;
  1183. return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
  1184. }
  1185. u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
  1186. {
  1187. u8 mm1[] = {0x00};
  1188. u8 mm2[] = {0x00};
  1189. struct i2c_msg msgs[2];
  1190. msgs[0].flags = 0;
  1191. msgs[1].flags = I2C_M_RD;
  1192. msgs[0].addr = msgs[1].addr = id / 2;
  1193. mm1[0] = reg;
  1194. msgs[0].len = 1; msgs[1].len = 1;
  1195. msgs[0].buf = mm1; msgs[1].buf = mm2;
  1196. i2c_transfer(&av7110->i2c_adap, msgs, 2);
  1197. return mm2[0];
  1198. }
  1199. /****************************************************************************
  1200. * INITIALIZATION
  1201. ****************************************************************************/
  1202. static int check_firmware(struct av7110* av7110)
  1203. {
  1204. u32 crc = 0, len = 0;
  1205. unsigned char *ptr;
  1206. /* check for firmware magic */
  1207. ptr = av7110->bin_fw;
  1208. if (ptr[0] != 'A' || ptr[1] != 'V' ||
  1209. ptr[2] != 'F' || ptr[3] != 'W') {
  1210. printk("dvb-ttpci: this is not an av7110 firmware\n");
  1211. return -EINVAL;
  1212. }
  1213. ptr += 4;
  1214. /* check dpram file */
  1215. crc = get_unaligned_be32(ptr);
  1216. ptr += 4;
  1217. len = get_unaligned_be32(ptr);
  1218. ptr += 4;
  1219. if (len >= 512) {
  1220. printk("dvb-ttpci: dpram file is way too big.\n");
  1221. return -EINVAL;
  1222. }
  1223. if (crc != crc32_le(0, ptr, len)) {
  1224. printk("dvb-ttpci: crc32 of dpram file does not match.\n");
  1225. return -EINVAL;
  1226. }
  1227. av7110->bin_dpram = ptr;
  1228. av7110->size_dpram = len;
  1229. ptr += len;
  1230. /* check root file */
  1231. crc = get_unaligned_be32(ptr);
  1232. ptr += 4;
  1233. len = get_unaligned_be32(ptr);
  1234. ptr += 4;
  1235. if (len <= 200000 || len >= 300000 ||
  1236. len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
  1237. printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
  1238. return -EINVAL;
  1239. }
  1240. if( crc != crc32_le(0, ptr, len)) {
  1241. printk("dvb-ttpci: crc32 of root file does not match.\n");
  1242. return -EINVAL;
  1243. }
  1244. av7110->bin_root = ptr;
  1245. av7110->size_root = len;
  1246. return 0;
  1247. }
  1248. static void put_firmware(struct av7110* av7110)
  1249. {
  1250. vfree(av7110->bin_fw);
  1251. }
  1252. static int get_firmware(struct av7110* av7110)
  1253. {
  1254. int ret;
  1255. const struct firmware *fw;
  1256. /* request the av7110 firmware, this will block until someone uploads it */
  1257. ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
  1258. if (ret) {
  1259. if (ret == -ENOENT) {
  1260. printk(KERN_ERR "dvb-ttpci: could not load firmware, file not found: dvb-ttpci-01.fw\n");
  1261. printk(KERN_ERR "dvb-ttpci: usually this should be in /usr/lib/hotplug/firmware or /lib/firmware\n");
  1262. printk(KERN_ERR "dvb-ttpci: and can be downloaded from https://linuxtv.org/download/dvb/firmware/\n");
  1263. } else
  1264. printk(KERN_ERR "dvb-ttpci: cannot request firmware (error %i)\n",
  1265. ret);
  1266. return -EINVAL;
  1267. }
  1268. if (fw->size <= 200000) {
  1269. printk("dvb-ttpci: this firmware is way too small.\n");
  1270. release_firmware(fw);
  1271. return -EINVAL;
  1272. }
  1273. /* check if the firmware is available */
  1274. av7110->bin_fw = vmalloc(fw->size);
  1275. if (NULL == av7110->bin_fw) {
  1276. dprintk(1, "out of memory\n");
  1277. release_firmware(fw);
  1278. return -ENOMEM;
  1279. }
  1280. memcpy(av7110->bin_fw, fw->data, fw->size);
  1281. av7110->size_fw = fw->size;
  1282. if ((ret = check_firmware(av7110)))
  1283. vfree(av7110->bin_fw);
  1284. release_firmware(fw);
  1285. return ret;
  1286. }
  1287. static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
  1288. {
  1289. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1290. struct av7110* av7110 = fe->dvb->priv;
  1291. u8 pwr = 0;
  1292. u8 buf[4];
  1293. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
  1294. u32 div = (p->frequency + 479500) / 125;
  1295. if (p->frequency > 2000000)
  1296. pwr = 3;
  1297. else if (p->frequency > 1800000)
  1298. pwr = 2;
  1299. else if (p->frequency > 1600000)
  1300. pwr = 1;
  1301. else if (p->frequency > 1200000)
  1302. pwr = 0;
  1303. else if (p->frequency >= 1100000)
  1304. pwr = 1;
  1305. else
  1306. pwr = 2;
  1307. buf[0] = (div >> 8) & 0x7f;
  1308. buf[1] = div & 0xff;
  1309. buf[2] = ((div & 0x18000) >> 10) | 0x95;
  1310. buf[3] = (pwr << 6) | 0x30;
  1311. // NOTE: since we're using a prescaler of 2, we set the
  1312. // divisor frequency to 62.5kHz and divide by 125 above
  1313. if (fe->ops.i2c_gate_ctrl)
  1314. fe->ops.i2c_gate_ctrl(fe, 1);
  1315. if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
  1316. return -EIO;
  1317. return 0;
  1318. }
  1319. static struct ves1x93_config alps_bsrv2_config = {
  1320. .demod_address = 0x08,
  1321. .xin = 90100000UL,
  1322. .invert_pwm = 0,
  1323. };
  1324. static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
  1325. {
  1326. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1327. struct av7110* av7110 = fe->dvb->priv;
  1328. u32 div;
  1329. u8 data[4];
  1330. struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
  1331. div = (p->frequency + 35937500 + 31250) / 62500;
  1332. data[0] = (div >> 8) & 0x7f;
  1333. data[1] = div & 0xff;
  1334. data[2] = 0x85 | ((div >> 10) & 0x60);
  1335. data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
  1336. if (fe->ops.i2c_gate_ctrl)
  1337. fe->ops.i2c_gate_ctrl(fe, 1);
  1338. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1339. return -EIO;
  1340. return 0;
  1341. }
  1342. static struct ves1820_config alps_tdbe2_config = {
  1343. .demod_address = 0x09,
  1344. .xin = 57840000UL,
  1345. .invert = 1,
  1346. .selagc = VES1820_SELAGC_SIGNAMPERR,
  1347. };
  1348. static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
  1349. {
  1350. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1351. struct av7110* av7110 = fe->dvb->priv;
  1352. u32 div;
  1353. u8 data[4];
  1354. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1355. div = p->frequency / 125;
  1356. data[0] = (div >> 8) & 0x7f;
  1357. data[1] = div & 0xff;
  1358. data[2] = 0x8e;
  1359. data[3] = 0x00;
  1360. if (fe->ops.i2c_gate_ctrl)
  1361. fe->ops.i2c_gate_ctrl(fe, 1);
  1362. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1363. return -EIO;
  1364. return 0;
  1365. }
  1366. static struct tda8083_config grundig_29504_451_config = {
  1367. .demod_address = 0x68,
  1368. };
  1369. static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe)
  1370. {
  1371. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1372. struct av7110* av7110 = fe->dvb->priv;
  1373. u32 div;
  1374. u32 f = p->frequency;
  1375. u8 data[4];
  1376. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1377. div = (f + 36125000 + 31250) / 62500;
  1378. data[0] = (div >> 8) & 0x7f;
  1379. data[1] = div & 0xff;
  1380. data[2] = 0x8e;
  1381. data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
  1382. if (fe->ops.i2c_gate_ctrl)
  1383. fe->ops.i2c_gate_ctrl(fe, 1);
  1384. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1385. return -EIO;
  1386. return 0;
  1387. }
  1388. static struct ves1820_config philips_cd1516_config = {
  1389. .demod_address = 0x09,
  1390. .xin = 57840000UL,
  1391. .invert = 1,
  1392. .selagc = VES1820_SELAGC_SIGNAMPERR,
  1393. };
  1394. static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe)
  1395. {
  1396. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1397. struct av7110* av7110 = fe->dvb->priv;
  1398. u32 div, pwr;
  1399. u8 data[4];
  1400. struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
  1401. div = (p->frequency + 36200000) / 166666;
  1402. if (p->frequency <= 782000000)
  1403. pwr = 1;
  1404. else
  1405. pwr = 2;
  1406. data[0] = (div >> 8) & 0x7f;
  1407. data[1] = div & 0xff;
  1408. data[2] = 0x85;
  1409. data[3] = pwr << 6;
  1410. if (fe->ops.i2c_gate_ctrl)
  1411. fe->ops.i2c_gate_ctrl(fe, 1);
  1412. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1413. return -EIO;
  1414. return 0;
  1415. }
  1416. static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
  1417. {
  1418. #if IS_ENABLED(CONFIG_DVB_SP8870)
  1419. struct av7110* av7110 = fe->dvb->priv;
  1420. return request_firmware(fw, name, &av7110->dev->pci->dev);
  1421. #else
  1422. return -EINVAL;
  1423. #endif
  1424. }
  1425. static const struct sp8870_config alps_tdlb7_config = {
  1426. .demod_address = 0x71,
  1427. .request_firmware = alps_tdlb7_request_firmware,
  1428. };
  1429. static u8 nexusca_stv0297_inittab[] = {
  1430. 0x80, 0x01,
  1431. 0x80, 0x00,
  1432. 0x81, 0x01,
  1433. 0x81, 0x00,
  1434. 0x00, 0x09,
  1435. 0x01, 0x69,
  1436. 0x03, 0x00,
  1437. 0x04, 0x00,
  1438. 0x07, 0x00,
  1439. 0x08, 0x00,
  1440. 0x20, 0x00,
  1441. 0x21, 0x40,
  1442. 0x22, 0x00,
  1443. 0x23, 0x00,
  1444. 0x24, 0x40,
  1445. 0x25, 0x88,
  1446. 0x30, 0xff,
  1447. 0x31, 0x00,
  1448. 0x32, 0xff,
  1449. 0x33, 0x00,
  1450. 0x34, 0x50,
  1451. 0x35, 0x7f,
  1452. 0x36, 0x00,
  1453. 0x37, 0x20,
  1454. 0x38, 0x00,
  1455. 0x40, 0x1c,
  1456. 0x41, 0xff,
  1457. 0x42, 0x29,
  1458. 0x43, 0x00,
  1459. 0x44, 0xff,
  1460. 0x45, 0x00,
  1461. 0x46, 0x00,
  1462. 0x49, 0x04,
  1463. 0x4a, 0x00,
  1464. 0x4b, 0x7b,
  1465. 0x52, 0x30,
  1466. 0x55, 0xae,
  1467. 0x56, 0x47,
  1468. 0x57, 0xe1,
  1469. 0x58, 0x3a,
  1470. 0x5a, 0x1e,
  1471. 0x5b, 0x34,
  1472. 0x60, 0x00,
  1473. 0x63, 0x00,
  1474. 0x64, 0x00,
  1475. 0x65, 0x00,
  1476. 0x66, 0x00,
  1477. 0x67, 0x00,
  1478. 0x68, 0x00,
  1479. 0x69, 0x00,
  1480. 0x6a, 0x02,
  1481. 0x6b, 0x00,
  1482. 0x70, 0xff,
  1483. 0x71, 0x00,
  1484. 0x72, 0x00,
  1485. 0x73, 0x00,
  1486. 0x74, 0x0c,
  1487. 0x80, 0x00,
  1488. 0x81, 0x00,
  1489. 0x82, 0x00,
  1490. 0x83, 0x00,
  1491. 0x84, 0x04,
  1492. 0x85, 0x80,
  1493. 0x86, 0x24,
  1494. 0x87, 0x78,
  1495. 0x88, 0x10,
  1496. 0x89, 0x00,
  1497. 0x90, 0x01,
  1498. 0x91, 0x01,
  1499. 0xa0, 0x04,
  1500. 0xa1, 0x00,
  1501. 0xa2, 0x00,
  1502. 0xb0, 0x91,
  1503. 0xb1, 0x0b,
  1504. 0xc0, 0x53,
  1505. 0xc1, 0x70,
  1506. 0xc2, 0x12,
  1507. 0xd0, 0x00,
  1508. 0xd1, 0x00,
  1509. 0xd2, 0x00,
  1510. 0xd3, 0x00,
  1511. 0xd4, 0x00,
  1512. 0xd5, 0x00,
  1513. 0xde, 0x00,
  1514. 0xdf, 0x00,
  1515. 0x61, 0x49,
  1516. 0x62, 0x0b,
  1517. 0x53, 0x08,
  1518. 0x59, 0x08,
  1519. 0xff, 0xff,
  1520. };
  1521. static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe)
  1522. {
  1523. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1524. struct av7110* av7110 = fe->dvb->priv;
  1525. u32 div;
  1526. u8 data[4];
  1527. struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
  1528. struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
  1529. int i;
  1530. div = (p->frequency + 36150000 + 31250) / 62500;
  1531. data[0] = (div >> 8) & 0x7f;
  1532. data[1] = div & 0xff;
  1533. data[2] = 0xce;
  1534. if (p->frequency < 45000000)
  1535. return -EINVAL;
  1536. else if (p->frequency < 137000000)
  1537. data[3] = 0x01;
  1538. else if (p->frequency < 403000000)
  1539. data[3] = 0x02;
  1540. else if (p->frequency < 860000000)
  1541. data[3] = 0x04;
  1542. else
  1543. return -EINVAL;
  1544. if (fe->ops.i2c_gate_ctrl)
  1545. fe->ops.i2c_gate_ctrl(fe, 1);
  1546. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
  1547. printk("nexusca: pll transfer failed!\n");
  1548. return -EIO;
  1549. }
  1550. // wait for PLL lock
  1551. for(i = 0; i < 20; i++) {
  1552. if (fe->ops.i2c_gate_ctrl)
  1553. fe->ops.i2c_gate_ctrl(fe, 1);
  1554. if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
  1555. if (data[0] & 0x40) break;
  1556. msleep(10);
  1557. }
  1558. return 0;
  1559. }
  1560. static struct stv0297_config nexusca_stv0297_config = {
  1561. .demod_address = 0x1C,
  1562. .inittab = nexusca_stv0297_inittab,
  1563. .invert = 1,
  1564. .stop_during_read = 1,
  1565. };
  1566. static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
  1567. {
  1568. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1569. struct av7110* av7110 = fe->dvb->priv;
  1570. u32 div;
  1571. u8 cfg, cpump, band_select;
  1572. u8 data[4];
  1573. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1574. div = (36125000 + p->frequency) / 166666;
  1575. cfg = 0x88;
  1576. if (p->frequency < 175000000)
  1577. cpump = 2;
  1578. else if (p->frequency < 390000000)
  1579. cpump = 1;
  1580. else if (p->frequency < 470000000)
  1581. cpump = 2;
  1582. else if (p->frequency < 750000000)
  1583. cpump = 1;
  1584. else
  1585. cpump = 3;
  1586. if (p->frequency < 175000000)
  1587. band_select = 0x0e;
  1588. else if (p->frequency < 470000000)
  1589. band_select = 0x05;
  1590. else
  1591. band_select = 0x03;
  1592. data[0] = (div >> 8) & 0x7f;
  1593. data[1] = div & 0xff;
  1594. data[2] = ((div >> 10) & 0x60) | cfg;
  1595. data[3] = (cpump << 6) | band_select;
  1596. if (fe->ops.i2c_gate_ctrl)
  1597. fe->ops.i2c_gate_ctrl(fe, 1);
  1598. if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
  1599. return 0;
  1600. }
  1601. static struct l64781_config grundig_29504_401_config = {
  1602. .demod_address = 0x55,
  1603. };
  1604. static int av7110_fe_lock_fix(struct av7110 *av7110, enum fe_status status)
  1605. {
  1606. int ret = 0;
  1607. int synced = (status & FE_HAS_LOCK) ? 1 : 0;
  1608. av7110->fe_status = status;
  1609. if (av7110->fe_synced == synced)
  1610. return 0;
  1611. if (av7110->playing) {
  1612. av7110->fe_synced = synced;
  1613. return 0;
  1614. }
  1615. if (mutex_lock_interruptible(&av7110->pid_mutex))
  1616. return -ERESTARTSYS;
  1617. if (synced) {
  1618. ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
  1619. av7110->pids[DMX_PES_AUDIO],
  1620. av7110->pids[DMX_PES_TELETEXT], 0,
  1621. av7110->pids[DMX_PES_PCR]);
  1622. if (!ret)
  1623. ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
  1624. } else {
  1625. ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
  1626. if (!ret) {
  1627. ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
  1628. if (!ret)
  1629. ret = av7110_wait_msgstate(av7110, GPMQBusy);
  1630. }
  1631. }
  1632. if (!ret)
  1633. av7110->fe_synced = synced;
  1634. mutex_unlock(&av7110->pid_mutex);
  1635. return ret;
  1636. }
  1637. static int av7110_fe_set_frontend(struct dvb_frontend *fe)
  1638. {
  1639. struct av7110* av7110 = fe->dvb->priv;
  1640. int ret = av7110_fe_lock_fix(av7110, 0);
  1641. if (!ret)
  1642. ret = av7110->fe_set_frontend(fe);
  1643. return ret;
  1644. }
  1645. static int av7110_fe_init(struct dvb_frontend* fe)
  1646. {
  1647. struct av7110* av7110 = fe->dvb->priv;
  1648. int ret = av7110_fe_lock_fix(av7110, 0);
  1649. if (!ret)
  1650. ret = av7110->fe_init(fe);
  1651. return ret;
  1652. }
  1653. static int av7110_fe_read_status(struct dvb_frontend *fe,
  1654. enum fe_status *status)
  1655. {
  1656. struct av7110* av7110 = fe->dvb->priv;
  1657. /* call the real implementation */
  1658. int ret = av7110->fe_read_status(fe, status);
  1659. if (!ret)
  1660. if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
  1661. ret = av7110_fe_lock_fix(av7110, *status);
  1662. return ret;
  1663. }
  1664. static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
  1665. {
  1666. struct av7110* av7110 = fe->dvb->priv;
  1667. int ret = av7110_fe_lock_fix(av7110, 0);
  1668. if (!ret)
  1669. ret = av7110->fe_diseqc_reset_overload(fe);
  1670. return ret;
  1671. }
  1672. static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
  1673. struct dvb_diseqc_master_cmd* cmd)
  1674. {
  1675. struct av7110* av7110 = fe->dvb->priv;
  1676. int ret = av7110_fe_lock_fix(av7110, 0);
  1677. if (!ret) {
  1678. av7110->saved_master_cmd = *cmd;
  1679. ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
  1680. }
  1681. return ret;
  1682. }
  1683. static int av7110_fe_diseqc_send_burst(struct dvb_frontend *fe,
  1684. enum fe_sec_mini_cmd minicmd)
  1685. {
  1686. struct av7110* av7110 = fe->dvb->priv;
  1687. int ret = av7110_fe_lock_fix(av7110, 0);
  1688. if (!ret) {
  1689. av7110->saved_minicmd = minicmd;
  1690. ret = av7110->fe_diseqc_send_burst(fe, minicmd);
  1691. }
  1692. return ret;
  1693. }
  1694. static int av7110_fe_set_tone(struct dvb_frontend *fe,
  1695. enum fe_sec_tone_mode tone)
  1696. {
  1697. struct av7110* av7110 = fe->dvb->priv;
  1698. int ret = av7110_fe_lock_fix(av7110, 0);
  1699. if (!ret) {
  1700. av7110->saved_tone = tone;
  1701. ret = av7110->fe_set_tone(fe, tone);
  1702. }
  1703. return ret;
  1704. }
  1705. static int av7110_fe_set_voltage(struct dvb_frontend *fe,
  1706. enum fe_sec_voltage voltage)
  1707. {
  1708. struct av7110* av7110 = fe->dvb->priv;
  1709. int ret = av7110_fe_lock_fix(av7110, 0);
  1710. if (!ret) {
  1711. av7110->saved_voltage = voltage;
  1712. ret = av7110->fe_set_voltage(fe, voltage);
  1713. }
  1714. return ret;
  1715. }
  1716. static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned long cmd)
  1717. {
  1718. struct av7110* av7110 = fe->dvb->priv;
  1719. int ret = av7110_fe_lock_fix(av7110, 0);
  1720. if (!ret)
  1721. ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
  1722. return ret;
  1723. }
  1724. static void dvb_s_recover(struct av7110* av7110)
  1725. {
  1726. av7110_fe_init(av7110->fe);
  1727. av7110_fe_set_voltage(av7110->fe, av7110->saved_voltage);
  1728. if (av7110->saved_master_cmd.msg_len) {
  1729. msleep(20);
  1730. av7110_fe_diseqc_send_master_cmd(av7110->fe, &av7110->saved_master_cmd);
  1731. }
  1732. msleep(20);
  1733. av7110_fe_diseqc_send_burst(av7110->fe, av7110->saved_minicmd);
  1734. msleep(20);
  1735. av7110_fe_set_tone(av7110->fe, av7110->saved_tone);
  1736. av7110_fe_set_frontend(av7110->fe);
  1737. }
  1738. static u8 read_pwm(struct av7110* av7110)
  1739. {
  1740. u8 b = 0xff;
  1741. u8 pwm;
  1742. struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
  1743. { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
  1744. if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
  1745. pwm = 0x48;
  1746. return pwm;
  1747. }
  1748. static int frontend_init(struct av7110 *av7110)
  1749. {
  1750. int ret;
  1751. if (av7110->dev->pci->subsystem_vendor == 0x110a) {
  1752. switch(av7110->dev->pci->subsystem_device) {
  1753. case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
  1754. av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config,
  1755. &av7110->i2c_adap, read_pwm(av7110));
  1756. if (av7110->fe) {
  1757. av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
  1758. }
  1759. break;
  1760. }
  1761. } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
  1762. switch(av7110->dev->pci->subsystem_device) {
  1763. case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
  1764. case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
  1765. case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
  1766. // try the ALPS BSRV2 first of all
  1767. av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
  1768. if (av7110->fe) {
  1769. av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
  1770. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1771. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1772. av7110->fe->ops.set_tone = av7110_set_tone;
  1773. av7110->recover = dvb_s_recover;
  1774. break;
  1775. }
  1776. // try the ALPS BSRU6 now
  1777. av7110->fe = dvb_attach(stv0299_attach, &alps_bsru6_config, &av7110->i2c_adap);
  1778. if (av7110->fe) {
  1779. av7110->fe->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  1780. av7110->fe->tuner_priv = &av7110->i2c_adap;
  1781. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1782. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1783. av7110->fe->ops.set_tone = av7110_set_tone;
  1784. av7110->recover = dvb_s_recover;
  1785. break;
  1786. }
  1787. // Try the grundig 29504-451
  1788. av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
  1789. if (av7110->fe) {
  1790. av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
  1791. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1792. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1793. av7110->fe->ops.set_tone = av7110_set_tone;
  1794. av7110->recover = dvb_s_recover;
  1795. break;
  1796. }
  1797. /* Try DVB-C cards */
  1798. switch(av7110->dev->pci->subsystem_device) {
  1799. case 0x0000:
  1800. /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
  1801. av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, &av7110->i2c_adap,
  1802. read_pwm(av7110));
  1803. if (av7110->fe) {
  1804. av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
  1805. }
  1806. break;
  1807. case 0x0003:
  1808. /* Hauppauge DVB-C 2.1 VES1820/ALPS TDBE2 */
  1809. av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap,
  1810. read_pwm(av7110));
  1811. if (av7110->fe) {
  1812. av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
  1813. }
  1814. break;
  1815. }
  1816. break;
  1817. case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
  1818. {
  1819. struct dvb_frontend *fe;
  1820. // try ALPS TDLB7 first, then Grundig 29504-401
  1821. fe = dvb_attach(sp8870_attach, &alps_tdlb7_config, &av7110->i2c_adap);
  1822. if (fe) {
  1823. fe->ops.tuner_ops.set_params = alps_tdlb7_tuner_set_params;
  1824. av7110->fe = fe;
  1825. break;
  1826. }
  1827. }
  1828. /* fall-thru */
  1829. case 0x0008: // Hauppauge/TT DVB-T
  1830. // Grundig 29504-401
  1831. av7110->fe = dvb_attach(l64781_attach, &grundig_29504_401_config, &av7110->i2c_adap);
  1832. if (av7110->fe)
  1833. av7110->fe->ops.tuner_ops.set_params = grundig_29504_401_tuner_set_params;
  1834. break;
  1835. case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
  1836. av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
  1837. if (av7110->fe) {
  1838. av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
  1839. }
  1840. break;
  1841. case 0x0004: // Galaxis DVB-S rev1.3
  1842. /* ALPS BSRV2 */
  1843. av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
  1844. if (av7110->fe) {
  1845. av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
  1846. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1847. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1848. av7110->fe->ops.set_tone = av7110_set_tone;
  1849. av7110->recover = dvb_s_recover;
  1850. }
  1851. break;
  1852. case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
  1853. /* Grundig 29504-451 */
  1854. av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
  1855. if (av7110->fe) {
  1856. av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
  1857. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1858. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1859. av7110->fe->ops.set_tone = av7110_set_tone;
  1860. av7110->recover = dvb_s_recover;
  1861. }
  1862. break;
  1863. case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
  1864. av7110->fe = dvb_attach(stv0297_attach, &nexusca_stv0297_config, &av7110->i2c_adap);
  1865. if (av7110->fe) {
  1866. av7110->fe->ops.tuner_ops.set_params = nexusca_stv0297_tuner_set_params;
  1867. /* set TDA9819 into DVB mode */
  1868. saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9819 pin9(STD)
  1869. saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9819 pin30(VIF)
  1870. /* tuner on this needs a slower i2c bus speed */
  1871. av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
  1872. break;
  1873. }
  1874. break;
  1875. case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
  1876. /* ALPS BSBE1 */
  1877. av7110->fe = dvb_attach(stv0299_attach, &alps_bsbe1_config, &av7110->i2c_adap);
  1878. if (av7110->fe) {
  1879. av7110->fe->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  1880. av7110->fe->tuner_priv = &av7110->i2c_adap;
  1881. if (dvb_attach(lnbp21_attach, av7110->fe, &av7110->i2c_adap, 0, 0) == NULL) {
  1882. printk("dvb-ttpci: LNBP21 not found!\n");
  1883. if (av7110->fe->ops.release)
  1884. av7110->fe->ops.release(av7110->fe);
  1885. av7110->fe = NULL;
  1886. } else {
  1887. av7110->fe->ops.dishnetwork_send_legacy_command = NULL;
  1888. av7110->recover = dvb_s_recover;
  1889. }
  1890. }
  1891. break;
  1892. }
  1893. }
  1894. if (!av7110->fe) {
  1895. /* FIXME: propagate the failure code from the lower layers */
  1896. ret = -ENOMEM;
  1897. printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
  1898. av7110->dev->pci->vendor,
  1899. av7110->dev->pci->device,
  1900. av7110->dev->pci->subsystem_vendor,
  1901. av7110->dev->pci->subsystem_device);
  1902. } else {
  1903. FE_FUNC_OVERRIDE(av7110->fe->ops.init, av7110->fe_init, av7110_fe_init);
  1904. FE_FUNC_OVERRIDE(av7110->fe->ops.read_status, av7110->fe_read_status, av7110_fe_read_status);
  1905. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
  1906. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
  1907. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
  1908. FE_FUNC_OVERRIDE(av7110->fe->ops.set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
  1909. FE_FUNC_OVERRIDE(av7110->fe->ops.set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage);
  1910. FE_FUNC_OVERRIDE(av7110->fe->ops.dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
  1911. FE_FUNC_OVERRIDE(av7110->fe->ops.set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
  1912. ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
  1913. if (ret < 0) {
  1914. printk("av7110: Frontend registration failed!\n");
  1915. dvb_frontend_detach(av7110->fe);
  1916. av7110->fe = NULL;
  1917. }
  1918. }
  1919. return ret;
  1920. }
  1921. /* Budgetpatch note:
  1922. * Original hardware design by Roberto Deza:
  1923. * There is a DVB_Wiki at
  1924. * https://linuxtv.org
  1925. *
  1926. * New software triggering design by Emard that works on
  1927. * original Roberto Deza's hardware:
  1928. *
  1929. * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
  1930. * GPIO3 is in budget-patch hardware connectd to port B VSYNC
  1931. * HS is an internal event of 7146, accessible with RPS
  1932. * and temporarily raised high every n lines
  1933. * (n in defined in the RPS_THRESH1 counter threshold)
  1934. * I think HS is raised high on the beginning of the n-th line
  1935. * and remains high until this n-th line that triggered
  1936. * it is completely received. When the receiption of n-th line
  1937. * ends, HS is lowered.
  1938. *
  1939. * To transmit data over DMA, 7146 needs changing state at
  1940. * port B VSYNC pin. Any changing of port B VSYNC will
  1941. * cause some DMA data transfer, with more or less packets loss.
  1942. * It depends on the phase and frequency of VSYNC and
  1943. * the way of 7146 is instructed to trigger on port B (defined
  1944. * in DD1_INIT register, 3rd nibble from the right valid
  1945. * numbers are 0-7, see datasheet)
  1946. *
  1947. * The correct triggering can minimize packet loss,
  1948. * dvbtraffic should give this stable bandwidths:
  1949. * 22k transponder = 33814 kbit/s
  1950. * 27.5k transponder = 38045 kbit/s
  1951. * by experiment it is found that the best results
  1952. * (stable bandwidths and almost no packet loss)
  1953. * are obtained using DD1_INIT triggering number 2
  1954. * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
  1955. * and a VSYNC phase that occurs in the middle of DMA transfer
  1956. * (about byte 188*512=96256 in the DMA window).
  1957. *
  1958. * Phase of HS is still not clear to me how to control,
  1959. * It just happens to be so. It can be seen if one enables
  1960. * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
  1961. * time RPS_INTERRUPT is called, the Event Counter 1 will
  1962. * increment. That's how the 7146 is programmed to do event
  1963. * counting in this budget-patch.c
  1964. * I *think* HPS setting has something to do with the phase
  1965. * of HS but I can't be 100% sure in that.
  1966. *
  1967. * hardware debug note: a working budget card (including budget patch)
  1968. * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
  1969. * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
  1970. * and that means 3*25=75 Hz of interrupt freqency, as seen by
  1971. * watch cat /proc/interrupts
  1972. *
  1973. * If this frequency is 3x lower (and data received in the DMA
  1974. * buffer don't start with 0x47, but in the middle of packets,
  1975. * whose lengths appear to be like 188 292 188 104 etc.
  1976. * this means VSYNC line is not connected in the hardware.
  1977. * (check soldering pcb and pins)
  1978. * The same behaviour of missing VSYNC can be duplicated on budget
  1979. * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
  1980. */
  1981. static int av7110_attach(struct saa7146_dev* dev,
  1982. struct saa7146_pci_extension_data *pci_ext)
  1983. {
  1984. const int length = TS_WIDTH * TS_HEIGHT;
  1985. struct pci_dev *pdev = dev->pci;
  1986. struct av7110 *av7110;
  1987. struct task_struct *thread;
  1988. int ret, count = 0;
  1989. dprintk(4, "dev: %p\n", dev);
  1990. /* Set RPS_IRQ to 1 to track rps1 activity.
  1991. * Enabling this won't send any interrupt to PC CPU.
  1992. */
  1993. #define RPS_IRQ 0
  1994. if (budgetpatch == 1) {
  1995. budgetpatch = 0;
  1996. /* autodetect the presence of budget patch
  1997. * this only works if saa7146 has been recently
  1998. * reset with with MASK_31 to MC1
  1999. *
  2000. * will wait for VBI_B event (vertical blank at port B)
  2001. * and will reset GPIO3 after VBI_B is detected.
  2002. * (GPIO3 should be raised high by CPU to
  2003. * test if GPIO3 will generate vertical blank signal
  2004. * in budget patch GPIO3 is connected to VSYNC_B
  2005. */
  2006. /* RESET SAA7146 */
  2007. saa7146_write(dev, MC1, MASK_31);
  2008. /* autodetection success seems to be time-dependend after reset */
  2009. /* Fix VSYNC level */
  2010. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
  2011. /* set vsync_b triggering */
  2012. saa7146_write(dev, DD1_STREAM_B, 0);
  2013. /* port B VSYNC at rising edge */
  2014. saa7146_write(dev, DD1_INIT, 0x00000200);
  2015. saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
  2016. saa7146_write(dev, MC2,
  2017. 1 * (MASK_08 | MASK_24) | // BRS control
  2018. 0 * (MASK_09 | MASK_25) | // a
  2019. 1 * (MASK_10 | MASK_26) | // b
  2020. 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
  2021. 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
  2022. 0 * (MASK_01 | MASK_15) // DEBI
  2023. );
  2024. /* start writing RPS1 code from beginning */
  2025. count = 0;
  2026. /* Disable RPS1 */
  2027. saa7146_write(dev, MC1, MASK_29);
  2028. /* RPS1 timeout disable */
  2029. saa7146_write(dev, RPS_TOV1, 0);
  2030. WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
  2031. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2032. WRITE_RPS1(GPIO3_MSK);
  2033. WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
  2034. #if RPS_IRQ
  2035. /* issue RPS1 interrupt to increment counter */
  2036. WRITE_RPS1(CMD_INTERRUPT);
  2037. #endif
  2038. WRITE_RPS1(CMD_STOP);
  2039. /* Jump to begin of RPS program as safety measure (p37) */
  2040. WRITE_RPS1(CMD_JUMP);
  2041. WRITE_RPS1(dev->d_rps1.dma_handle);
  2042. #if RPS_IRQ
  2043. /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
  2044. * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
  2045. * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
  2046. */
  2047. saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
  2048. /* set event counter 1 threshold to maximum allowed value (rEC p55) */
  2049. saa7146_write(dev, ECT1R, 0x3fff );
  2050. #endif
  2051. /* Set RPS1 Address register to point to RPS code (r108 p42) */
  2052. saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
  2053. /* Enable RPS1, (rFC p33) */
  2054. saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
  2055. mdelay(10);
  2056. /* now send VSYNC_B to rps1 by rising GPIO3 */
  2057. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
  2058. mdelay(10);
  2059. /* if rps1 responded by lowering the GPIO3,
  2060. * then we have budgetpatch hardware
  2061. */
  2062. if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
  2063. budgetpatch = 1;
  2064. printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
  2065. }
  2066. /* Disable RPS1 */
  2067. saa7146_write(dev, MC1, ( MASK_29 ));
  2068. #if RPS_IRQ
  2069. printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
  2070. #endif
  2071. }
  2072. /* prepare the av7110 device struct */
  2073. av7110 = kzalloc(sizeof(struct av7110), GFP_KERNEL);
  2074. if (!av7110) {
  2075. dprintk(1, "out of memory\n");
  2076. return -ENOMEM;
  2077. }
  2078. av7110->card_name = (char*) pci_ext->ext_priv;
  2079. av7110->dev = dev;
  2080. dev->ext_priv = av7110;
  2081. ret = get_firmware(av7110);
  2082. if (ret < 0)
  2083. goto err_kfree_0;
  2084. ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
  2085. THIS_MODULE, &dev->pci->dev, adapter_nr);
  2086. if (ret < 0)
  2087. goto err_put_firmware_1;
  2088. /* the Siemens DVB needs this if you want to have the i2c chips
  2089. get recognized before the main driver is fully loaded */
  2090. saa7146_write(dev, GPIO_CTRL, 0x500000);
  2091. strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
  2092. saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
  2093. ret = i2c_add_adapter(&av7110->i2c_adap);
  2094. if (ret < 0)
  2095. goto err_dvb_unregister_adapter_2;
  2096. ttpci_eeprom_parse_mac(&av7110->i2c_adap,
  2097. av7110->dvb_adapter.proposed_mac);
  2098. ret = -ENOMEM;
  2099. /* full-ts mod? */
  2100. if (full_ts)
  2101. av7110->full_ts = true;
  2102. /* check for full-ts flag in eeprom */
  2103. if (i2c_readreg(av7110, 0xaa, 0) == 0x4f && i2c_readreg(av7110, 0xaa, 1) == 0x45) {
  2104. u8 flags = i2c_readreg(av7110, 0xaa, 2);
  2105. if (flags != 0xff && (flags & 0x01))
  2106. av7110->full_ts = true;
  2107. }
  2108. if (av7110->full_ts) {
  2109. printk(KERN_INFO "dvb-ttpci: full-ts mode enabled for saa7146 port B\n");
  2110. spin_lock_init(&av7110->feedlock1);
  2111. av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
  2112. &av7110->pt);
  2113. if (!av7110->grabbing)
  2114. goto err_i2c_del_3;
  2115. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2116. saa7146_write(dev, MC2, (MASK_10 | MASK_26));
  2117. saa7146_write(dev, DD1_INIT, 0x00000600);
  2118. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2119. saa7146_write(dev, BRS_CTRL, 0x60000000);
  2120. saa7146_write(dev, MC2, MASK_08 | MASK_24);
  2121. /* dma3 */
  2122. saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000));
  2123. saa7146_write(dev, BASE_ODD3, 0);
  2124. saa7146_write(dev, BASE_EVEN3, 0);
  2125. saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
  2126. saa7146_write(dev, PITCH3, TS_WIDTH);
  2127. saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
  2128. saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
  2129. saa7146_write(dev, MC2, MASK_04 | MASK_20);
  2130. tasklet_init(&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
  2131. } else if (budgetpatch) {
  2132. spin_lock_init(&av7110->feedlock1);
  2133. av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
  2134. &av7110->pt);
  2135. if (!av7110->grabbing)
  2136. goto err_i2c_del_3;
  2137. saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
  2138. saa7146_write(dev, BCS_CTRL, 0x80400040);
  2139. /* set dd1 stream a & b */
  2140. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2141. saa7146_write(dev, DD1_INIT, 0x03000200);
  2142. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2143. saa7146_write(dev, BRS_CTRL, 0x60000000);
  2144. saa7146_write(dev, BASE_ODD3, 0);
  2145. saa7146_write(dev, BASE_EVEN3, 0);
  2146. saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
  2147. saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
  2148. saa7146_write(dev, PITCH3, TS_WIDTH);
  2149. saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
  2150. /* upload all */
  2151. saa7146_write(dev, MC2, 0x077c077c);
  2152. saa7146_write(dev, GPIO_CTRL, 0x000000);
  2153. #if RPS_IRQ
  2154. /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
  2155. * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
  2156. * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
  2157. */
  2158. saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
  2159. /* set event counter 1 threshold to maximum allowed value (rEC p55) */
  2160. saa7146_write(dev, ECT1R, 0x3fff );
  2161. #endif
  2162. /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
  2163. count = 0;
  2164. /* Wait Source Line Counter Threshold (p36) */
  2165. WRITE_RPS1(CMD_PAUSE | EVT_HS);
  2166. /* Set GPIO3=1 (p42) */
  2167. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2168. WRITE_RPS1(GPIO3_MSK);
  2169. WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
  2170. #if RPS_IRQ
  2171. /* issue RPS1 interrupt */
  2172. WRITE_RPS1(CMD_INTERRUPT);
  2173. #endif
  2174. /* Wait reset Source Line Counter Threshold (p36) */
  2175. WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
  2176. /* Set GPIO3=0 (p42) */
  2177. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2178. WRITE_RPS1(GPIO3_MSK);
  2179. WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
  2180. #if RPS_IRQ
  2181. /* issue RPS1 interrupt */
  2182. WRITE_RPS1(CMD_INTERRUPT);
  2183. #endif
  2184. /* Jump to begin of RPS program (p37) */
  2185. WRITE_RPS1(CMD_JUMP);
  2186. WRITE_RPS1(dev->d_rps1.dma_handle);
  2187. /* Fix VSYNC level */
  2188. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
  2189. /* Set RPS1 Address register to point to RPS code (r108 p42) */
  2190. saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
  2191. /* Set Source Line Counter Threshold, using BRS (rCC p43)
  2192. * It generates HS event every TS_HEIGHT lines
  2193. * this is related to TS_WIDTH set in register
  2194. * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
  2195. * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
  2196. * then RPS_THRESH1 should be set to trigger
  2197. * every TS_HEIGHT (512) lines.
  2198. */
  2199. saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
  2200. /* Enable RPS1 (rFC p33) */
  2201. saa7146_write(dev, MC1, (MASK_13 | MASK_29));
  2202. /* end of budgetpatch register initialization */
  2203. tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
  2204. } else {
  2205. saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
  2206. saa7146_write(dev, BCS_CTRL, 0x80400040);
  2207. /* set dd1 stream a & b */
  2208. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2209. saa7146_write(dev, DD1_INIT, 0x03000000);
  2210. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2211. /* upload all */
  2212. saa7146_write(dev, MC2, 0x077c077c);
  2213. saa7146_write(dev, GPIO_CTRL, 0x000000);
  2214. }
  2215. tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
  2216. tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
  2217. mutex_init(&av7110->pid_mutex);
  2218. /* locks for data transfers from/to AV7110 */
  2219. spin_lock_init(&av7110->debilock);
  2220. mutex_init(&av7110->dcomlock);
  2221. av7110->debitype = -1;
  2222. /* default OSD window */
  2223. av7110->osdwin = 1;
  2224. mutex_init(&av7110->osd_mutex);
  2225. /* TV standard */
  2226. av7110->vidmode = tv_standard == 1 ? AV7110_VIDEO_MODE_NTSC
  2227. : AV7110_VIDEO_MODE_PAL;
  2228. /* ARM "watchdog" */
  2229. init_waitqueue_head(&av7110->arm_wait);
  2230. av7110->arm_thread = NULL;
  2231. /* allocate and init buffers */
  2232. av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
  2233. if (!av7110->debi_virt)
  2234. goto err_saa71466_vfree_4;
  2235. av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
  2236. if (!av7110->iobuf)
  2237. goto err_pci_free_5;
  2238. ret = av7110_av_init(av7110);
  2239. if (ret < 0)
  2240. goto err_iobuf_vfree_6;
  2241. /* init BMP buffer */
  2242. av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
  2243. init_waitqueue_head(&av7110->bmpq);
  2244. ret = av7110_ca_init(av7110);
  2245. if (ret < 0)
  2246. goto err_av7110_av_exit_7;
  2247. /* load firmware into AV7110 cards */
  2248. ret = av7110_bootarm(av7110);
  2249. if (ret < 0)
  2250. goto err_av7110_ca_exit_8;
  2251. ret = av7110_firmversion(av7110);
  2252. if (ret < 0)
  2253. goto err_stop_arm_9;
  2254. if (FW_VERSION(av7110->arm_app)<0x2501)
  2255. printk(KERN_WARNING
  2256. "dvb-ttpci: Warning, firmware version 0x%04x is too old. System might be unstable!\n",
  2257. FW_VERSION(av7110->arm_app));
  2258. thread = kthread_run(arm_thread, (void *) av7110, "arm_mon");
  2259. if (IS_ERR(thread)) {
  2260. ret = PTR_ERR(thread);
  2261. goto err_stop_arm_9;
  2262. }
  2263. av7110->arm_thread = thread;
  2264. /* set initial volume in mixer struct */
  2265. av7110->mixer.volume_left = volume;
  2266. av7110->mixer.volume_right = volume;
  2267. ret = av7110_register(av7110);
  2268. if (ret < 0)
  2269. goto err_arm_thread_stop_10;
  2270. init_av7110_av(av7110);
  2271. /* special case DVB-C: these cards have an analog tuner
  2272. plus need some special handling, so we have separate
  2273. saa7146_ext_vv data for these... */
  2274. ret = av7110_init_v4l(av7110);
  2275. if (ret < 0)
  2276. goto err_av7110_unregister_11;
  2277. av7110->dvb_adapter.priv = av7110;
  2278. ret = frontend_init(av7110);
  2279. if (ret < 0)
  2280. goto err_av7110_exit_v4l_12;
  2281. mutex_init(&av7110->ioctl_mutex);
  2282. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  2283. av7110_ir_init(av7110);
  2284. #endif
  2285. printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
  2286. av7110_num++;
  2287. out:
  2288. return ret;
  2289. err_av7110_exit_v4l_12:
  2290. av7110_exit_v4l(av7110);
  2291. err_av7110_unregister_11:
  2292. dvb_unregister(av7110);
  2293. err_arm_thread_stop_10:
  2294. av7110_arm_sync(av7110);
  2295. err_stop_arm_9:
  2296. /* Nothing to do. Rejoice. */
  2297. err_av7110_ca_exit_8:
  2298. av7110_ca_exit(av7110);
  2299. err_av7110_av_exit_7:
  2300. av7110_av_exit(av7110);
  2301. err_iobuf_vfree_6:
  2302. vfree(av7110->iobuf);
  2303. err_pci_free_5:
  2304. pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
  2305. err_saa71466_vfree_4:
  2306. if (av7110->grabbing)
  2307. saa7146_vfree_destroy_pgtable(pdev, av7110->grabbing, &av7110->pt);
  2308. err_i2c_del_3:
  2309. i2c_del_adapter(&av7110->i2c_adap);
  2310. err_dvb_unregister_adapter_2:
  2311. dvb_unregister_adapter(&av7110->dvb_adapter);
  2312. err_put_firmware_1:
  2313. put_firmware(av7110);
  2314. err_kfree_0:
  2315. kfree(av7110);
  2316. goto out;
  2317. }
  2318. static int av7110_detach(struct saa7146_dev* saa)
  2319. {
  2320. struct av7110 *av7110 = saa->ext_priv;
  2321. dprintk(4, "%p\n", av7110);
  2322. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  2323. av7110_ir_exit(av7110);
  2324. #endif
  2325. if (budgetpatch || av7110->full_ts) {
  2326. if (budgetpatch) {
  2327. /* Disable RPS1 */
  2328. saa7146_write(saa, MC1, MASK_29);
  2329. /* VSYNC LOW (inactive) */
  2330. saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
  2331. }
  2332. saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
  2333. SAA7146_IER_DISABLE(saa, MASK_10);
  2334. SAA7146_ISR_CLEAR(saa, MASK_10);
  2335. msleep(50);
  2336. tasklet_kill(&av7110->vpe_tasklet);
  2337. saa7146_vfree_destroy_pgtable(saa->pci, av7110->grabbing, &av7110->pt);
  2338. }
  2339. av7110_exit_v4l(av7110);
  2340. av7110_arm_sync(av7110);
  2341. tasklet_kill(&av7110->debi_tasklet);
  2342. tasklet_kill(&av7110->gpio_tasklet);
  2343. dvb_unregister(av7110);
  2344. SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
  2345. SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
  2346. av7110_ca_exit(av7110);
  2347. av7110_av_exit(av7110);
  2348. vfree(av7110->iobuf);
  2349. pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
  2350. av7110->debi_bus);
  2351. i2c_del_adapter(&av7110->i2c_adap);
  2352. dvb_unregister_adapter (&av7110->dvb_adapter);
  2353. av7110_num--;
  2354. put_firmware(av7110);
  2355. kfree(av7110);
  2356. saa->ext_priv = NULL;
  2357. return 0;
  2358. }
  2359. static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
  2360. {
  2361. struct av7110 *av7110 = dev->ext_priv;
  2362. //print_time("av7110_irq");
  2363. /* Note: Don't try to handle the DEBI error irq (MASK_18), in
  2364. * intel mode the timeout is asserted all the time...
  2365. */
  2366. if (*isr & MASK_19) {
  2367. //printk("av7110_irq: DEBI\n");
  2368. /* Note 1: The DEBI irq is level triggered: We must enable it
  2369. * only after we started a DMA xfer, and disable it here
  2370. * immediately, or it will be signalled all the time while
  2371. * DEBI is idle.
  2372. * Note 2: You would think that an irq which is masked is
  2373. * not signalled by the hardware. Not so for the SAA7146:
  2374. * An irq is signalled as long as the corresponding bit
  2375. * in the ISR is set, and disabling irqs just prevents the
  2376. * hardware from setting the ISR bit. This means a) that we
  2377. * must clear the ISR *after* disabling the irq (which is why
  2378. * we must do it here even though saa7146_core did it already),
  2379. * and b) that if we were to disable an edge triggered irq
  2380. * (like the gpio irqs sadly are) temporarily we would likely
  2381. * loose some. This sucks :-(
  2382. */
  2383. SAA7146_IER_DISABLE(av7110->dev, MASK_19);
  2384. SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
  2385. tasklet_schedule(&av7110->debi_tasklet);
  2386. }
  2387. if (*isr & MASK_03) {
  2388. //printk("av7110_irq: GPIO\n");
  2389. tasklet_schedule(&av7110->gpio_tasklet);
  2390. }
  2391. if (*isr & MASK_10)
  2392. tasklet_schedule(&av7110->vpe_tasklet);
  2393. }
  2394. static struct saa7146_extension av7110_extension_driver;
  2395. #define MAKE_AV7110_INFO(x_var,x_name) \
  2396. static struct saa7146_pci_extension_data x_var = { \
  2397. .ext_priv = x_name, \
  2398. .ext = &av7110_extension_driver }
  2399. MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
  2400. MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
  2401. MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
  2402. MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
  2403. MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
  2404. MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
  2405. MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
  2406. MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
  2407. MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
  2408. MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
  2409. MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3");
  2410. static struct pci_device_id pci_tbl[] = {
  2411. MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
  2412. MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
  2413. MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
  2414. MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
  2415. MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
  2416. MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004),
  2417. MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
  2418. MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
  2419. MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
  2420. MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
  2421. MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
  2422. /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
  2423. /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
  2424. {
  2425. .vendor = 0,
  2426. }
  2427. };
  2428. MODULE_DEVICE_TABLE(pci, pci_tbl);
  2429. static struct saa7146_extension av7110_extension_driver = {
  2430. .name = "av7110",
  2431. .flags = SAA7146_USE_I2C_IRQ,
  2432. .module = THIS_MODULE,
  2433. .pci_tbl = &pci_tbl[0],
  2434. .attach = av7110_attach,
  2435. .detach = av7110_detach,
  2436. .irq_mask = MASK_19 | MASK_03 | MASK_10,
  2437. .irq_func = av7110_irq,
  2438. };
  2439. static int __init av7110_init(void)
  2440. {
  2441. return saa7146_register_extension(&av7110_extension_driver);
  2442. }
  2443. static void __exit av7110_exit(void)
  2444. {
  2445. saa7146_unregister_extension(&av7110_extension_driver);
  2446. }
  2447. module_init(av7110_init);
  2448. module_exit(av7110_exit);
  2449. MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by Siemens, Technotrend, Hauppauge");
  2450. MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
  2451. MODULE_LICENSE("GPL");