pvrdma_main.c 30 KB

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  1. /*
  2. * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of EITHER the GNU General Public License
  6. * version 2 as published by the Free Software Foundation or the BSD
  7. * 2-Clause License. This program is distributed in the hope that it
  8. * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
  9. * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
  10. * See the GNU General Public License version 2 for more details at
  11. * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program available in the file COPYING in the main
  15. * directory of this source tree.
  16. *
  17. * The BSD 2-Clause License
  18. *
  19. * Redistribution and use in source and binary forms, with or
  20. * without modification, are permitted provided that the following
  21. * conditions are met:
  22. *
  23. * - Redistributions of source code must retain the above
  24. * copyright notice, this list of conditions and the following
  25. * disclaimer.
  26. *
  27. * - Redistributions in binary form must reproduce the above
  28. * copyright notice, this list of conditions and the following
  29. * disclaimer in the documentation and/or other materials
  30. * provided with the distribution.
  31. *
  32. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  33. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  34. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  35. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  36. * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  37. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  38. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  39. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  40. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  41. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  43. * OF THE POSSIBILITY OF SUCH DAMAGE.
  44. */
  45. #include <linux/errno.h>
  46. #include <linux/inetdevice.h>
  47. #include <linux/init.h>
  48. #include <linux/module.h>
  49. #include <linux/slab.h>
  50. #include <rdma/ib_addr.h>
  51. #include <rdma/ib_smi.h>
  52. #include <rdma/ib_user_verbs.h>
  53. #include <net/addrconf.h>
  54. #include "pvrdma.h"
  55. #define DRV_NAME "vmw_pvrdma"
  56. #define DRV_VERSION "1.0.1.0-k"
  57. static DEFINE_MUTEX(pvrdma_device_list_lock);
  58. static LIST_HEAD(pvrdma_device_list);
  59. static struct workqueue_struct *event_wq;
  60. static int pvrdma_add_gid(struct ib_device *ibdev,
  61. u8 port_num,
  62. unsigned int index,
  63. const union ib_gid *gid,
  64. const struct ib_gid_attr *attr,
  65. void **context);
  66. static int pvrdma_del_gid(struct ib_device *ibdev,
  67. u8 port_num,
  68. unsigned int index,
  69. void **context);
  70. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  71. char *buf)
  72. {
  73. return sprintf(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
  74. }
  75. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  76. char *buf)
  77. {
  78. return sprintf(buf, "%d\n", PVRDMA_REV_ID);
  79. }
  80. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  81. char *buf)
  82. {
  83. return sprintf(buf, "%d\n", PVRDMA_BOARD_ID);
  84. }
  85. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  86. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  87. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  88. static struct device_attribute *pvrdma_class_attributes[] = {
  89. &dev_attr_hw_rev,
  90. &dev_attr_hca_type,
  91. &dev_attr_board_id
  92. };
  93. static void pvrdma_get_fw_ver_str(struct ib_device *device, char *str,
  94. size_t str_len)
  95. {
  96. struct pvrdma_dev *dev =
  97. container_of(device, struct pvrdma_dev, ib_dev);
  98. snprintf(str, str_len, "%d.%d.%d\n",
  99. (int) (dev->dsr->caps.fw_ver >> 32),
  100. (int) (dev->dsr->caps.fw_ver >> 16) & 0xffff,
  101. (int) dev->dsr->caps.fw_ver & 0xffff);
  102. }
  103. static int pvrdma_init_device(struct pvrdma_dev *dev)
  104. {
  105. /* Initialize some device related stuff */
  106. spin_lock_init(&dev->cmd_lock);
  107. sema_init(&dev->cmd_sema, 1);
  108. atomic_set(&dev->num_qps, 0);
  109. atomic_set(&dev->num_cqs, 0);
  110. atomic_set(&dev->num_pds, 0);
  111. atomic_set(&dev->num_ahs, 0);
  112. return 0;
  113. }
  114. static int pvrdma_port_immutable(struct ib_device *ibdev, u8 port_num,
  115. struct ib_port_immutable *immutable)
  116. {
  117. struct ib_port_attr attr;
  118. int err;
  119. immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
  120. err = ib_query_port(ibdev, port_num, &attr);
  121. if (err)
  122. return err;
  123. immutable->pkey_tbl_len = attr.pkey_tbl_len;
  124. immutable->gid_tbl_len = attr.gid_tbl_len;
  125. immutable->max_mad_size = IB_MGMT_MAD_SIZE;
  126. return 0;
  127. }
  128. static struct net_device *pvrdma_get_netdev(struct ib_device *ibdev,
  129. u8 port_num)
  130. {
  131. struct net_device *netdev;
  132. struct pvrdma_dev *dev = to_vdev(ibdev);
  133. if (port_num != 1)
  134. return NULL;
  135. rcu_read_lock();
  136. netdev = dev->netdev;
  137. if (netdev)
  138. dev_hold(netdev);
  139. rcu_read_unlock();
  140. return netdev;
  141. }
  142. static int pvrdma_register_device(struct pvrdma_dev *dev)
  143. {
  144. int ret = -1;
  145. int i = 0;
  146. strlcpy(dev->ib_dev.name, "vmw_pvrdma%d", IB_DEVICE_NAME_MAX);
  147. dev->ib_dev.node_guid = dev->dsr->caps.node_guid;
  148. dev->sys_image_guid = dev->dsr->caps.sys_image_guid;
  149. dev->flags = 0;
  150. dev->ib_dev.owner = THIS_MODULE;
  151. dev->ib_dev.num_comp_vectors = 1;
  152. dev->ib_dev.dev.parent = &dev->pdev->dev;
  153. dev->ib_dev.uverbs_abi_ver = PVRDMA_UVERBS_ABI_VERSION;
  154. dev->ib_dev.uverbs_cmd_mask =
  155. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  156. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  157. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  158. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  159. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  160. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  161. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  162. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  163. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  164. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  165. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  166. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  167. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  168. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  169. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  170. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  171. (1ull << IB_USER_VERBS_CMD_POST_SEND) |
  172. (1ull << IB_USER_VERBS_CMD_POST_RECV) |
  173. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  174. (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
  175. dev->ib_dev.node_type = RDMA_NODE_IB_CA;
  176. dev->ib_dev.phys_port_cnt = dev->dsr->caps.phys_port_cnt;
  177. dev->ib_dev.query_device = pvrdma_query_device;
  178. dev->ib_dev.query_port = pvrdma_query_port;
  179. dev->ib_dev.query_gid = pvrdma_query_gid;
  180. dev->ib_dev.query_pkey = pvrdma_query_pkey;
  181. dev->ib_dev.modify_port = pvrdma_modify_port;
  182. dev->ib_dev.alloc_ucontext = pvrdma_alloc_ucontext;
  183. dev->ib_dev.dealloc_ucontext = pvrdma_dealloc_ucontext;
  184. dev->ib_dev.mmap = pvrdma_mmap;
  185. dev->ib_dev.alloc_pd = pvrdma_alloc_pd;
  186. dev->ib_dev.dealloc_pd = pvrdma_dealloc_pd;
  187. dev->ib_dev.create_ah = pvrdma_create_ah;
  188. dev->ib_dev.destroy_ah = pvrdma_destroy_ah;
  189. dev->ib_dev.create_qp = pvrdma_create_qp;
  190. dev->ib_dev.modify_qp = pvrdma_modify_qp;
  191. dev->ib_dev.query_qp = pvrdma_query_qp;
  192. dev->ib_dev.destroy_qp = pvrdma_destroy_qp;
  193. dev->ib_dev.post_send = pvrdma_post_send;
  194. dev->ib_dev.post_recv = pvrdma_post_recv;
  195. dev->ib_dev.create_cq = pvrdma_create_cq;
  196. dev->ib_dev.modify_cq = pvrdma_modify_cq;
  197. dev->ib_dev.resize_cq = pvrdma_resize_cq;
  198. dev->ib_dev.destroy_cq = pvrdma_destroy_cq;
  199. dev->ib_dev.poll_cq = pvrdma_poll_cq;
  200. dev->ib_dev.req_notify_cq = pvrdma_req_notify_cq;
  201. dev->ib_dev.get_dma_mr = pvrdma_get_dma_mr;
  202. dev->ib_dev.reg_user_mr = pvrdma_reg_user_mr;
  203. dev->ib_dev.dereg_mr = pvrdma_dereg_mr;
  204. dev->ib_dev.alloc_mr = pvrdma_alloc_mr;
  205. dev->ib_dev.map_mr_sg = pvrdma_map_mr_sg;
  206. dev->ib_dev.add_gid = pvrdma_add_gid;
  207. dev->ib_dev.del_gid = pvrdma_del_gid;
  208. dev->ib_dev.get_netdev = pvrdma_get_netdev;
  209. dev->ib_dev.get_port_immutable = pvrdma_port_immutable;
  210. dev->ib_dev.get_link_layer = pvrdma_port_link_layer;
  211. dev->ib_dev.get_dev_fw_str = pvrdma_get_fw_ver_str;
  212. mutex_init(&dev->port_mutex);
  213. spin_lock_init(&dev->desc_lock);
  214. dev->cq_tbl = kcalloc(dev->dsr->caps.max_cq, sizeof(void *),
  215. GFP_KERNEL);
  216. if (!dev->cq_tbl)
  217. return ret;
  218. spin_lock_init(&dev->cq_tbl_lock);
  219. dev->qp_tbl = kcalloc(dev->dsr->caps.max_qp, sizeof(void *),
  220. GFP_KERNEL);
  221. if (!dev->qp_tbl)
  222. goto err_cq_free;
  223. spin_lock_init(&dev->qp_tbl_lock);
  224. ret = ib_register_device(&dev->ib_dev, NULL);
  225. if (ret)
  226. goto err_qp_free;
  227. for (i = 0; i < ARRAY_SIZE(pvrdma_class_attributes); ++i) {
  228. ret = device_create_file(&dev->ib_dev.dev,
  229. pvrdma_class_attributes[i]);
  230. if (ret)
  231. goto err_class;
  232. }
  233. dev->ib_active = true;
  234. return 0;
  235. err_class:
  236. ib_unregister_device(&dev->ib_dev);
  237. err_qp_free:
  238. kfree(dev->qp_tbl);
  239. err_cq_free:
  240. kfree(dev->cq_tbl);
  241. return ret;
  242. }
  243. static irqreturn_t pvrdma_intr0_handler(int irq, void *dev_id)
  244. {
  245. u32 icr = PVRDMA_INTR_CAUSE_RESPONSE;
  246. struct pvrdma_dev *dev = dev_id;
  247. dev_dbg(&dev->pdev->dev, "interrupt 0 (response) handler\n");
  248. if (!dev->pdev->msix_enabled) {
  249. /* Legacy intr */
  250. icr = pvrdma_read_reg(dev, PVRDMA_REG_ICR);
  251. if (icr == 0)
  252. return IRQ_NONE;
  253. }
  254. if (icr == PVRDMA_INTR_CAUSE_RESPONSE)
  255. complete(&dev->cmd_done);
  256. return IRQ_HANDLED;
  257. }
  258. static void pvrdma_qp_event(struct pvrdma_dev *dev, u32 qpn, int type)
  259. {
  260. struct pvrdma_qp *qp;
  261. unsigned long flags;
  262. spin_lock_irqsave(&dev->qp_tbl_lock, flags);
  263. qp = dev->qp_tbl[qpn % dev->dsr->caps.max_qp];
  264. if (qp)
  265. atomic_inc(&qp->refcnt);
  266. spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
  267. if (qp && qp->ibqp.event_handler) {
  268. struct ib_qp *ibqp = &qp->ibqp;
  269. struct ib_event e;
  270. e.device = ibqp->device;
  271. e.element.qp = ibqp;
  272. e.event = type; /* 1:1 mapping for now. */
  273. ibqp->event_handler(&e, ibqp->qp_context);
  274. }
  275. if (qp) {
  276. atomic_dec(&qp->refcnt);
  277. if (atomic_read(&qp->refcnt) == 0)
  278. wake_up(&qp->wait);
  279. }
  280. }
  281. static void pvrdma_cq_event(struct pvrdma_dev *dev, u32 cqn, int type)
  282. {
  283. struct pvrdma_cq *cq;
  284. unsigned long flags;
  285. spin_lock_irqsave(&dev->cq_tbl_lock, flags);
  286. cq = dev->cq_tbl[cqn % dev->dsr->caps.max_cq];
  287. if (cq)
  288. atomic_inc(&cq->refcnt);
  289. spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
  290. if (cq && cq->ibcq.event_handler) {
  291. struct ib_cq *ibcq = &cq->ibcq;
  292. struct ib_event e;
  293. e.device = ibcq->device;
  294. e.element.cq = ibcq;
  295. e.event = type; /* 1:1 mapping for now. */
  296. ibcq->event_handler(&e, ibcq->cq_context);
  297. }
  298. if (cq) {
  299. atomic_dec(&cq->refcnt);
  300. if (atomic_read(&cq->refcnt) == 0)
  301. wake_up(&cq->wait);
  302. }
  303. }
  304. static void pvrdma_dispatch_event(struct pvrdma_dev *dev, int port,
  305. enum ib_event_type event)
  306. {
  307. struct ib_event ib_event;
  308. memset(&ib_event, 0, sizeof(ib_event));
  309. ib_event.device = &dev->ib_dev;
  310. ib_event.element.port_num = port;
  311. ib_event.event = event;
  312. ib_dispatch_event(&ib_event);
  313. }
  314. static void pvrdma_dev_event(struct pvrdma_dev *dev, u8 port, int type)
  315. {
  316. if (port < 1 || port > dev->dsr->caps.phys_port_cnt) {
  317. dev_warn(&dev->pdev->dev, "event on port %d\n", port);
  318. return;
  319. }
  320. pvrdma_dispatch_event(dev, port, type);
  321. }
  322. static inline struct pvrdma_eqe *get_eqe(struct pvrdma_dev *dev, unsigned int i)
  323. {
  324. return (struct pvrdma_eqe *)pvrdma_page_dir_get_ptr(
  325. &dev->async_pdir,
  326. PAGE_SIZE +
  327. sizeof(struct pvrdma_eqe) * i);
  328. }
  329. static irqreturn_t pvrdma_intr1_handler(int irq, void *dev_id)
  330. {
  331. struct pvrdma_dev *dev = dev_id;
  332. struct pvrdma_ring *ring = &dev->async_ring_state->rx;
  333. int ring_slots = (dev->dsr->async_ring_pages.num_pages - 1) *
  334. PAGE_SIZE / sizeof(struct pvrdma_eqe);
  335. unsigned int head;
  336. dev_dbg(&dev->pdev->dev, "interrupt 1 (async event) handler\n");
  337. /*
  338. * Don't process events until the IB device is registered. Otherwise
  339. * we'll try to ib_dispatch_event() on an invalid device.
  340. */
  341. if (!dev->ib_active)
  342. return IRQ_HANDLED;
  343. while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
  344. struct pvrdma_eqe *eqe;
  345. eqe = get_eqe(dev, head);
  346. switch (eqe->type) {
  347. case PVRDMA_EVENT_QP_FATAL:
  348. case PVRDMA_EVENT_QP_REQ_ERR:
  349. case PVRDMA_EVENT_QP_ACCESS_ERR:
  350. case PVRDMA_EVENT_COMM_EST:
  351. case PVRDMA_EVENT_SQ_DRAINED:
  352. case PVRDMA_EVENT_PATH_MIG:
  353. case PVRDMA_EVENT_PATH_MIG_ERR:
  354. case PVRDMA_EVENT_QP_LAST_WQE_REACHED:
  355. pvrdma_qp_event(dev, eqe->info, eqe->type);
  356. break;
  357. case PVRDMA_EVENT_CQ_ERR:
  358. pvrdma_cq_event(dev, eqe->info, eqe->type);
  359. break;
  360. case PVRDMA_EVENT_SRQ_ERR:
  361. case PVRDMA_EVENT_SRQ_LIMIT_REACHED:
  362. break;
  363. case PVRDMA_EVENT_PORT_ACTIVE:
  364. case PVRDMA_EVENT_PORT_ERR:
  365. case PVRDMA_EVENT_LID_CHANGE:
  366. case PVRDMA_EVENT_PKEY_CHANGE:
  367. case PVRDMA_EVENT_SM_CHANGE:
  368. case PVRDMA_EVENT_CLIENT_REREGISTER:
  369. case PVRDMA_EVENT_GID_CHANGE:
  370. pvrdma_dev_event(dev, eqe->info, eqe->type);
  371. break;
  372. case PVRDMA_EVENT_DEVICE_FATAL:
  373. pvrdma_dev_event(dev, 1, eqe->type);
  374. break;
  375. default:
  376. break;
  377. }
  378. pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
  379. }
  380. return IRQ_HANDLED;
  381. }
  382. static inline struct pvrdma_cqne *get_cqne(struct pvrdma_dev *dev,
  383. unsigned int i)
  384. {
  385. return (struct pvrdma_cqne *)pvrdma_page_dir_get_ptr(
  386. &dev->cq_pdir,
  387. PAGE_SIZE +
  388. sizeof(struct pvrdma_cqne) * i);
  389. }
  390. static irqreturn_t pvrdma_intrx_handler(int irq, void *dev_id)
  391. {
  392. struct pvrdma_dev *dev = dev_id;
  393. struct pvrdma_ring *ring = &dev->cq_ring_state->rx;
  394. int ring_slots = (dev->dsr->cq_ring_pages.num_pages - 1) * PAGE_SIZE /
  395. sizeof(struct pvrdma_cqne);
  396. unsigned int head;
  397. unsigned long flags;
  398. dev_dbg(&dev->pdev->dev, "interrupt x (completion) handler\n");
  399. while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
  400. struct pvrdma_cqne *cqne;
  401. struct pvrdma_cq *cq;
  402. cqne = get_cqne(dev, head);
  403. spin_lock_irqsave(&dev->cq_tbl_lock, flags);
  404. cq = dev->cq_tbl[cqne->info % dev->dsr->caps.max_cq];
  405. if (cq)
  406. atomic_inc(&cq->refcnt);
  407. spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
  408. if (cq && cq->ibcq.comp_handler)
  409. cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
  410. if (cq) {
  411. atomic_dec(&cq->refcnt);
  412. if (atomic_read(&cq->refcnt))
  413. wake_up(&cq->wait);
  414. }
  415. pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
  416. }
  417. return IRQ_HANDLED;
  418. }
  419. static void pvrdma_free_irq(struct pvrdma_dev *dev)
  420. {
  421. int i;
  422. dev_dbg(&dev->pdev->dev, "freeing interrupts\n");
  423. for (i = 0; i < dev->nr_vectors; i++)
  424. free_irq(pci_irq_vector(dev->pdev, i), dev);
  425. }
  426. static void pvrdma_enable_intrs(struct pvrdma_dev *dev)
  427. {
  428. dev_dbg(&dev->pdev->dev, "enable interrupts\n");
  429. pvrdma_write_reg(dev, PVRDMA_REG_IMR, 0);
  430. }
  431. static void pvrdma_disable_intrs(struct pvrdma_dev *dev)
  432. {
  433. dev_dbg(&dev->pdev->dev, "disable interrupts\n");
  434. pvrdma_write_reg(dev, PVRDMA_REG_IMR, ~0);
  435. }
  436. static int pvrdma_alloc_intrs(struct pvrdma_dev *dev)
  437. {
  438. struct pci_dev *pdev = dev->pdev;
  439. int ret = 0, i;
  440. ret = pci_alloc_irq_vectors(pdev, 1, PVRDMA_MAX_INTERRUPTS,
  441. PCI_IRQ_MSIX);
  442. if (ret < 0) {
  443. ret = pci_alloc_irq_vectors(pdev, 1, 1,
  444. PCI_IRQ_MSI | PCI_IRQ_LEGACY);
  445. if (ret < 0)
  446. return ret;
  447. }
  448. dev->nr_vectors = ret;
  449. ret = request_irq(pci_irq_vector(dev->pdev, 0), pvrdma_intr0_handler,
  450. pdev->msix_enabled ? 0 : IRQF_SHARED, DRV_NAME, dev);
  451. if (ret) {
  452. dev_err(&dev->pdev->dev,
  453. "failed to request interrupt 0\n");
  454. goto out_free_vectors;
  455. }
  456. for (i = 1; i < dev->nr_vectors; i++) {
  457. ret = request_irq(pci_irq_vector(dev->pdev, i),
  458. i == 1 ? pvrdma_intr1_handler :
  459. pvrdma_intrx_handler,
  460. 0, DRV_NAME, dev);
  461. if (ret) {
  462. dev_err(&dev->pdev->dev,
  463. "failed to request interrupt %d\n", i);
  464. goto free_irqs;
  465. }
  466. }
  467. return 0;
  468. free_irqs:
  469. while (--i >= 0)
  470. free_irq(pci_irq_vector(dev->pdev, i), dev);
  471. out_free_vectors:
  472. pci_free_irq_vectors(pdev);
  473. return ret;
  474. }
  475. static void pvrdma_free_slots(struct pvrdma_dev *dev)
  476. {
  477. struct pci_dev *pdev = dev->pdev;
  478. if (dev->resp_slot)
  479. dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->resp_slot,
  480. dev->dsr->resp_slot_dma);
  481. if (dev->cmd_slot)
  482. dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->cmd_slot,
  483. dev->dsr->cmd_slot_dma);
  484. }
  485. static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
  486. const union ib_gid *gid,
  487. int index)
  488. {
  489. int ret;
  490. union pvrdma_cmd_req req;
  491. struct pvrdma_cmd_create_bind *cmd_bind = &req.create_bind;
  492. if (!dev->sgid_tbl) {
  493. dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
  494. return -EINVAL;
  495. }
  496. memset(cmd_bind, 0, sizeof(*cmd_bind));
  497. cmd_bind->hdr.cmd = PVRDMA_CMD_CREATE_BIND;
  498. memcpy(cmd_bind->new_gid, gid->raw, 16);
  499. cmd_bind->mtu = ib_mtu_enum_to_int(IB_MTU_1024);
  500. cmd_bind->vlan = 0xfff;
  501. cmd_bind->index = index;
  502. cmd_bind->gid_type = PVRDMA_GID_TYPE_FLAG_ROCE_V1;
  503. ret = pvrdma_cmd_post(dev, &req, NULL, 0);
  504. if (ret < 0) {
  505. dev_warn(&dev->pdev->dev,
  506. "could not create binding, error: %d\n", ret);
  507. return -EFAULT;
  508. }
  509. memcpy(&dev->sgid_tbl[index], gid, sizeof(*gid));
  510. return 0;
  511. }
  512. static int pvrdma_add_gid(struct ib_device *ibdev,
  513. u8 port_num,
  514. unsigned int index,
  515. const union ib_gid *gid,
  516. const struct ib_gid_attr *attr,
  517. void **context)
  518. {
  519. struct pvrdma_dev *dev = to_vdev(ibdev);
  520. return pvrdma_add_gid_at_index(dev, gid, index);
  521. }
  522. static int pvrdma_del_gid_at_index(struct pvrdma_dev *dev, int index)
  523. {
  524. int ret;
  525. union pvrdma_cmd_req req;
  526. struct pvrdma_cmd_destroy_bind *cmd_dest = &req.destroy_bind;
  527. /* Update sgid table. */
  528. if (!dev->sgid_tbl) {
  529. dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
  530. return -EINVAL;
  531. }
  532. memset(cmd_dest, 0, sizeof(*cmd_dest));
  533. cmd_dest->hdr.cmd = PVRDMA_CMD_DESTROY_BIND;
  534. memcpy(cmd_dest->dest_gid, &dev->sgid_tbl[index], 16);
  535. cmd_dest->index = index;
  536. ret = pvrdma_cmd_post(dev, &req, NULL, 0);
  537. if (ret < 0) {
  538. dev_warn(&dev->pdev->dev,
  539. "could not destroy binding, error: %d\n", ret);
  540. return ret;
  541. }
  542. memset(&dev->sgid_tbl[index], 0, 16);
  543. return 0;
  544. }
  545. static int pvrdma_del_gid(struct ib_device *ibdev,
  546. u8 port_num,
  547. unsigned int index,
  548. void **context)
  549. {
  550. struct pvrdma_dev *dev = to_vdev(ibdev);
  551. dev_dbg(&dev->pdev->dev, "removing gid at index %u from %s",
  552. index, dev->netdev->name);
  553. return pvrdma_del_gid_at_index(dev, index);
  554. }
  555. static void pvrdma_netdevice_event_handle(struct pvrdma_dev *dev,
  556. unsigned long event)
  557. {
  558. switch (event) {
  559. case NETDEV_REBOOT:
  560. case NETDEV_DOWN:
  561. pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ERR);
  562. break;
  563. case NETDEV_UP:
  564. pvrdma_write_reg(dev, PVRDMA_REG_CTL,
  565. PVRDMA_DEVICE_CTL_UNQUIESCE);
  566. mb();
  567. if (pvrdma_read_reg(dev, PVRDMA_REG_ERR))
  568. dev_err(&dev->pdev->dev,
  569. "failed to activate device during link up\n");
  570. else
  571. pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE);
  572. break;
  573. default:
  574. dev_dbg(&dev->pdev->dev, "ignore netdevice event %ld on %s\n",
  575. event, dev->ib_dev.name);
  576. break;
  577. }
  578. }
  579. static void pvrdma_netdevice_event_work(struct work_struct *work)
  580. {
  581. struct pvrdma_netdevice_work *netdev_work;
  582. struct pvrdma_dev *dev;
  583. netdev_work = container_of(work, struct pvrdma_netdevice_work, work);
  584. mutex_lock(&pvrdma_device_list_lock);
  585. list_for_each_entry(dev, &pvrdma_device_list, device_link) {
  586. if (dev->netdev == netdev_work->event_netdev) {
  587. pvrdma_netdevice_event_handle(dev, netdev_work->event);
  588. break;
  589. }
  590. }
  591. mutex_unlock(&pvrdma_device_list_lock);
  592. kfree(netdev_work);
  593. }
  594. static int pvrdma_netdevice_event(struct notifier_block *this,
  595. unsigned long event, void *ptr)
  596. {
  597. struct net_device *event_netdev = netdev_notifier_info_to_dev(ptr);
  598. struct pvrdma_netdevice_work *netdev_work;
  599. netdev_work = kmalloc(sizeof(*netdev_work), GFP_ATOMIC);
  600. if (!netdev_work)
  601. return NOTIFY_BAD;
  602. INIT_WORK(&netdev_work->work, pvrdma_netdevice_event_work);
  603. netdev_work->event_netdev = event_netdev;
  604. netdev_work->event = event;
  605. queue_work(event_wq, &netdev_work->work);
  606. return NOTIFY_DONE;
  607. }
  608. static int pvrdma_pci_probe(struct pci_dev *pdev,
  609. const struct pci_device_id *id)
  610. {
  611. struct pci_dev *pdev_net;
  612. struct pvrdma_dev *dev;
  613. int ret;
  614. unsigned long start;
  615. unsigned long len;
  616. unsigned int version;
  617. dma_addr_t slot_dma = 0;
  618. dev_dbg(&pdev->dev, "initializing driver %s\n", pci_name(pdev));
  619. /* Allocate zero-out device */
  620. dev = (struct pvrdma_dev *)ib_alloc_device(sizeof(*dev));
  621. if (!dev) {
  622. dev_err(&pdev->dev, "failed to allocate IB device\n");
  623. return -ENOMEM;
  624. }
  625. mutex_lock(&pvrdma_device_list_lock);
  626. list_add(&dev->device_link, &pvrdma_device_list);
  627. mutex_unlock(&pvrdma_device_list_lock);
  628. ret = pvrdma_init_device(dev);
  629. if (ret)
  630. goto err_free_device;
  631. dev->pdev = pdev;
  632. pci_set_drvdata(pdev, dev);
  633. ret = pci_enable_device(pdev);
  634. if (ret) {
  635. dev_err(&pdev->dev, "cannot enable PCI device\n");
  636. goto err_free_device;
  637. }
  638. dev_dbg(&pdev->dev, "PCI resource flags BAR0 %#lx\n",
  639. pci_resource_flags(pdev, 0));
  640. dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
  641. (unsigned long long)pci_resource_len(pdev, 0));
  642. dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
  643. (unsigned long long)pci_resource_start(pdev, 0));
  644. dev_dbg(&pdev->dev, "PCI resource flags BAR1 %#lx\n",
  645. pci_resource_flags(pdev, 1));
  646. dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
  647. (unsigned long long)pci_resource_len(pdev, 1));
  648. dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
  649. (unsigned long long)pci_resource_start(pdev, 1));
  650. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  651. !(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  652. dev_err(&pdev->dev, "PCI BAR region not MMIO\n");
  653. ret = -ENOMEM;
  654. goto err_free_device;
  655. }
  656. ret = pci_request_regions(pdev, DRV_NAME);
  657. if (ret) {
  658. dev_err(&pdev->dev, "cannot request PCI resources\n");
  659. goto err_disable_pdev;
  660. }
  661. /* Enable 64-Bit DMA */
  662. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
  663. ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  664. if (ret != 0) {
  665. dev_err(&pdev->dev,
  666. "pci_set_consistent_dma_mask failed\n");
  667. goto err_free_resource;
  668. }
  669. } else {
  670. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  671. if (ret != 0) {
  672. dev_err(&pdev->dev,
  673. "pci_set_dma_mask failed\n");
  674. goto err_free_resource;
  675. }
  676. }
  677. pci_set_master(pdev);
  678. /* Map register space */
  679. start = pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
  680. len = pci_resource_len(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
  681. dev->regs = ioremap(start, len);
  682. if (!dev->regs) {
  683. dev_err(&pdev->dev, "register mapping failed\n");
  684. ret = -ENOMEM;
  685. goto err_free_resource;
  686. }
  687. /* Setup per-device UAR. */
  688. dev->driver_uar.index = 0;
  689. dev->driver_uar.pfn =
  690. pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_UAR) >>
  691. PAGE_SHIFT;
  692. dev->driver_uar.map =
  693. ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  694. if (!dev->driver_uar.map) {
  695. dev_err(&pdev->dev, "failed to remap UAR pages\n");
  696. ret = -ENOMEM;
  697. goto err_unmap_regs;
  698. }
  699. version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
  700. dev_info(&pdev->dev, "device version %d, driver version %d\n",
  701. version, PVRDMA_VERSION);
  702. if (version < PVRDMA_VERSION) {
  703. dev_err(&pdev->dev, "incompatible device version\n");
  704. goto err_uar_unmap;
  705. }
  706. dev->dsr = dma_alloc_coherent(&pdev->dev, sizeof(*dev->dsr),
  707. &dev->dsrbase, GFP_KERNEL);
  708. if (!dev->dsr) {
  709. dev_err(&pdev->dev, "failed to allocate shared region\n");
  710. ret = -ENOMEM;
  711. goto err_uar_unmap;
  712. }
  713. /* Setup the shared region */
  714. memset(dev->dsr, 0, sizeof(*dev->dsr));
  715. dev->dsr->driver_version = PVRDMA_VERSION;
  716. dev->dsr->gos_info.gos_bits = sizeof(void *) == 4 ?
  717. PVRDMA_GOS_BITS_32 :
  718. PVRDMA_GOS_BITS_64;
  719. dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX;
  720. dev->dsr->gos_info.gos_ver = 1;
  721. dev->dsr->uar_pfn = dev->driver_uar.pfn;
  722. /* Command slot. */
  723. dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
  724. &slot_dma, GFP_KERNEL);
  725. if (!dev->cmd_slot) {
  726. ret = -ENOMEM;
  727. goto err_free_dsr;
  728. }
  729. dev->dsr->cmd_slot_dma = (u64)slot_dma;
  730. /* Response slot. */
  731. dev->resp_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
  732. &slot_dma, GFP_KERNEL);
  733. if (!dev->resp_slot) {
  734. ret = -ENOMEM;
  735. goto err_free_slots;
  736. }
  737. dev->dsr->resp_slot_dma = (u64)slot_dma;
  738. /* Async event ring */
  739. dev->dsr->async_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
  740. ret = pvrdma_page_dir_init(dev, &dev->async_pdir,
  741. dev->dsr->async_ring_pages.num_pages, true);
  742. if (ret)
  743. goto err_free_slots;
  744. dev->async_ring_state = dev->async_pdir.pages[0];
  745. dev->dsr->async_ring_pages.pdir_dma = dev->async_pdir.dir_dma;
  746. /* CQ notification ring */
  747. dev->dsr->cq_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
  748. ret = pvrdma_page_dir_init(dev, &dev->cq_pdir,
  749. dev->dsr->cq_ring_pages.num_pages, true);
  750. if (ret)
  751. goto err_free_async_ring;
  752. dev->cq_ring_state = dev->cq_pdir.pages[0];
  753. dev->dsr->cq_ring_pages.pdir_dma = dev->cq_pdir.dir_dma;
  754. /*
  755. * Write the PA of the shared region to the device. The writes must be
  756. * ordered such that the high bits are written last. When the writes
  757. * complete, the device will have filled out the capabilities.
  758. */
  759. pvrdma_write_reg(dev, PVRDMA_REG_DSRLOW, (u32)dev->dsrbase);
  760. pvrdma_write_reg(dev, PVRDMA_REG_DSRHIGH,
  761. (u32)((u64)(dev->dsrbase) >> 32));
  762. /* Make sure the write is complete before reading status. */
  763. mb();
  764. /* Currently, the driver only supports RoCE mode. */
  765. if (dev->dsr->caps.mode != PVRDMA_DEVICE_MODE_ROCE) {
  766. dev_err(&pdev->dev, "unsupported transport %d\n",
  767. dev->dsr->caps.mode);
  768. ret = -EFAULT;
  769. goto err_free_cq_ring;
  770. }
  771. /* Currently, the driver only supports RoCE V1. */
  772. if (!(dev->dsr->caps.gid_types & PVRDMA_GID_TYPE_FLAG_ROCE_V1)) {
  773. dev_err(&pdev->dev, "driver needs RoCE v1 support\n");
  774. ret = -EFAULT;
  775. goto err_free_cq_ring;
  776. }
  777. /* Paired vmxnet3 will have same bus, slot. But func will be 0 */
  778. pdev_net = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
  779. if (!pdev_net) {
  780. dev_err(&pdev->dev, "failed to find paired net device\n");
  781. ret = -ENODEV;
  782. goto err_free_cq_ring;
  783. }
  784. if (pdev_net->vendor != PCI_VENDOR_ID_VMWARE ||
  785. pdev_net->device != PCI_DEVICE_ID_VMWARE_VMXNET3) {
  786. dev_err(&pdev->dev, "failed to find paired vmxnet3 device\n");
  787. pci_dev_put(pdev_net);
  788. ret = -ENODEV;
  789. goto err_free_cq_ring;
  790. }
  791. dev->netdev = pci_get_drvdata(pdev_net);
  792. pci_dev_put(pdev_net);
  793. if (!dev->netdev) {
  794. dev_err(&pdev->dev, "failed to get vmxnet3 device\n");
  795. ret = -ENODEV;
  796. goto err_free_cq_ring;
  797. }
  798. dev_info(&pdev->dev, "paired device to %s\n", dev->netdev->name);
  799. /* Interrupt setup */
  800. ret = pvrdma_alloc_intrs(dev);
  801. if (ret) {
  802. dev_err(&pdev->dev, "failed to allocate interrupts\n");
  803. ret = -ENOMEM;
  804. goto err_free_cq_ring;
  805. }
  806. /* Allocate UAR table. */
  807. ret = pvrdma_uar_table_init(dev);
  808. if (ret) {
  809. dev_err(&pdev->dev, "failed to allocate UAR table\n");
  810. ret = -ENOMEM;
  811. goto err_free_intrs;
  812. }
  813. /* Allocate GID table */
  814. dev->sgid_tbl = kcalloc(dev->dsr->caps.gid_tbl_len,
  815. sizeof(union ib_gid), GFP_KERNEL);
  816. if (!dev->sgid_tbl) {
  817. ret = -ENOMEM;
  818. goto err_free_uar_table;
  819. }
  820. dev_dbg(&pdev->dev, "gid table len %d\n", dev->dsr->caps.gid_tbl_len);
  821. pvrdma_enable_intrs(dev);
  822. /* Activate pvrdma device */
  823. pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_ACTIVATE);
  824. /* Make sure the write is complete before reading status. */
  825. mb();
  826. /* Check if device was successfully activated */
  827. ret = pvrdma_read_reg(dev, PVRDMA_REG_ERR);
  828. if (ret != 0) {
  829. dev_err(&pdev->dev, "failed to activate device\n");
  830. ret = -EFAULT;
  831. goto err_disable_intr;
  832. }
  833. /* Register IB device */
  834. ret = pvrdma_register_device(dev);
  835. if (ret) {
  836. dev_err(&pdev->dev, "failed to register IB device\n");
  837. goto err_disable_intr;
  838. }
  839. dev->nb_netdev.notifier_call = pvrdma_netdevice_event;
  840. ret = register_netdevice_notifier(&dev->nb_netdev);
  841. if (ret) {
  842. dev_err(&pdev->dev, "failed to register netdevice events\n");
  843. goto err_unreg_ibdev;
  844. }
  845. dev_info(&pdev->dev, "attached to device\n");
  846. return 0;
  847. err_unreg_ibdev:
  848. ib_unregister_device(&dev->ib_dev);
  849. err_disable_intr:
  850. pvrdma_disable_intrs(dev);
  851. kfree(dev->sgid_tbl);
  852. err_free_uar_table:
  853. pvrdma_uar_table_cleanup(dev);
  854. err_free_intrs:
  855. pvrdma_free_irq(dev);
  856. pci_free_irq_vectors(pdev);
  857. err_free_cq_ring:
  858. pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
  859. err_free_async_ring:
  860. pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
  861. err_free_slots:
  862. pvrdma_free_slots(dev);
  863. err_free_dsr:
  864. dma_free_coherent(&pdev->dev, sizeof(*dev->dsr), dev->dsr,
  865. dev->dsrbase);
  866. err_uar_unmap:
  867. iounmap(dev->driver_uar.map);
  868. err_unmap_regs:
  869. iounmap(dev->regs);
  870. err_free_resource:
  871. pci_release_regions(pdev);
  872. err_disable_pdev:
  873. pci_disable_device(pdev);
  874. pci_set_drvdata(pdev, NULL);
  875. err_free_device:
  876. mutex_lock(&pvrdma_device_list_lock);
  877. list_del(&dev->device_link);
  878. mutex_unlock(&pvrdma_device_list_lock);
  879. ib_dealloc_device(&dev->ib_dev);
  880. return ret;
  881. }
  882. static void pvrdma_pci_remove(struct pci_dev *pdev)
  883. {
  884. struct pvrdma_dev *dev = pci_get_drvdata(pdev);
  885. if (!dev)
  886. return;
  887. dev_info(&pdev->dev, "detaching from device\n");
  888. unregister_netdevice_notifier(&dev->nb_netdev);
  889. dev->nb_netdev.notifier_call = NULL;
  890. flush_workqueue(event_wq);
  891. /* Unregister ib device */
  892. ib_unregister_device(&dev->ib_dev);
  893. mutex_lock(&pvrdma_device_list_lock);
  894. list_del(&dev->device_link);
  895. mutex_unlock(&pvrdma_device_list_lock);
  896. pvrdma_disable_intrs(dev);
  897. pvrdma_free_irq(dev);
  898. pci_free_irq_vectors(pdev);
  899. /* Deactivate pvrdma device */
  900. pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_RESET);
  901. pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
  902. pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
  903. pvrdma_free_slots(dev);
  904. iounmap(dev->regs);
  905. kfree(dev->sgid_tbl);
  906. kfree(dev->cq_tbl);
  907. kfree(dev->qp_tbl);
  908. pvrdma_uar_table_cleanup(dev);
  909. iounmap(dev->driver_uar.map);
  910. ib_dealloc_device(&dev->ib_dev);
  911. /* Free pci resources */
  912. pci_release_regions(pdev);
  913. pci_disable_device(pdev);
  914. pci_set_drvdata(pdev, NULL);
  915. }
  916. static struct pci_device_id pvrdma_pci_table[] = {
  917. { PCI_DEVICE(PCI_VENDOR_ID_VMWARE, PCI_DEVICE_ID_VMWARE_PVRDMA), },
  918. { 0 },
  919. };
  920. MODULE_DEVICE_TABLE(pci, pvrdma_pci_table);
  921. static struct pci_driver pvrdma_driver = {
  922. .name = DRV_NAME,
  923. .id_table = pvrdma_pci_table,
  924. .probe = pvrdma_pci_probe,
  925. .remove = pvrdma_pci_remove,
  926. };
  927. static int __init pvrdma_init(void)
  928. {
  929. int err;
  930. event_wq = alloc_ordered_workqueue("pvrdma_event_wq", WQ_MEM_RECLAIM);
  931. if (!event_wq)
  932. return -ENOMEM;
  933. err = pci_register_driver(&pvrdma_driver);
  934. if (err)
  935. destroy_workqueue(event_wq);
  936. return err;
  937. }
  938. static void __exit pvrdma_cleanup(void)
  939. {
  940. pci_unregister_driver(&pvrdma_driver);
  941. destroy_workqueue(event_wq);
  942. }
  943. module_init(pvrdma_init);
  944. module_exit(pvrdma_cleanup);
  945. MODULE_AUTHOR("VMware, Inc");
  946. MODULE_DESCRIPTION("VMware Paravirtual RDMA driver");
  947. MODULE_VERSION(DRV_VERSION);
  948. MODULE_LICENSE("Dual BSD/GPL");