i40iw_utils.c 38 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/mii.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include <net/netevent.h>
  50. #include <net/neighbour.h>
  51. #include "i40iw.h"
  52. /**
  53. * i40iw_arp_table - manage arp table
  54. * @iwdev: iwarp device
  55. * @ip_addr: ip address for device
  56. * @mac_addr: mac address ptr
  57. * @action: modify, delete or add
  58. */
  59. int i40iw_arp_table(struct i40iw_device *iwdev,
  60. u32 *ip_addr,
  61. bool ipv4,
  62. u8 *mac_addr,
  63. u32 action)
  64. {
  65. int arp_index;
  66. int err;
  67. u32 ip[4];
  68. if (ipv4) {
  69. memset(ip, 0, sizeof(ip));
  70. ip[0] = *ip_addr;
  71. } else {
  72. memcpy(ip, ip_addr, sizeof(ip));
  73. }
  74. for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++)
  75. if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0)
  76. break;
  77. switch (action) {
  78. case I40IW_ARP_ADD:
  79. if (arp_index != iwdev->arp_table_size)
  80. return -1;
  81. arp_index = 0;
  82. err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps,
  83. iwdev->arp_table_size,
  84. (u32 *)&arp_index,
  85. &iwdev->next_arp_index);
  86. if (err)
  87. return err;
  88. memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip));
  89. ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr);
  90. break;
  91. case I40IW_ARP_RESOLVE:
  92. if (arp_index == iwdev->arp_table_size)
  93. return -1;
  94. break;
  95. case I40IW_ARP_DELETE:
  96. if (arp_index == iwdev->arp_table_size)
  97. return -1;
  98. memset(iwdev->arp_table[arp_index].ip_addr, 0,
  99. sizeof(iwdev->arp_table[arp_index].ip_addr));
  100. eth_zero_addr(iwdev->arp_table[arp_index].mac_addr);
  101. i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index);
  102. break;
  103. default:
  104. return -1;
  105. }
  106. return arp_index;
  107. }
  108. /**
  109. * i40iw_wr32 - write 32 bits to hw register
  110. * @hw: hardware information including registers
  111. * @reg: register offset
  112. * @value: vvalue to write to register
  113. */
  114. inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value)
  115. {
  116. writel(value, hw->hw_addr + reg);
  117. }
  118. /**
  119. * i40iw_rd32 - read a 32 bit hw register
  120. * @hw: hardware information including registers
  121. * @reg: register offset
  122. *
  123. * Return value of register content
  124. */
  125. inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg)
  126. {
  127. return readl(hw->hw_addr + reg);
  128. }
  129. /**
  130. * i40iw_inetaddr_event - system notifier for netdev events
  131. * @notfier: not used
  132. * @event: event for notifier
  133. * @ptr: if address
  134. */
  135. int i40iw_inetaddr_event(struct notifier_block *notifier,
  136. unsigned long event,
  137. void *ptr)
  138. {
  139. struct in_ifaddr *ifa = ptr;
  140. struct net_device *event_netdev = ifa->ifa_dev->dev;
  141. struct net_device *netdev;
  142. struct net_device *upper_dev;
  143. struct i40iw_device *iwdev;
  144. struct i40iw_handler *hdl;
  145. u32 local_ipaddr;
  146. u32 action = I40IW_ARP_ADD;
  147. hdl = i40iw_find_netdev(event_netdev);
  148. if (!hdl)
  149. return NOTIFY_DONE;
  150. iwdev = &hdl->device;
  151. if (iwdev->init_state < INET_NOTIFIER)
  152. return NOTIFY_DONE;
  153. netdev = iwdev->ldev->netdev;
  154. upper_dev = netdev_master_upper_dev_get(netdev);
  155. if (netdev != event_netdev)
  156. return NOTIFY_DONE;
  157. if (upper_dev)
  158. local_ipaddr = ntohl(
  159. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address);
  160. else
  161. local_ipaddr = ntohl(ifa->ifa_address);
  162. switch (event) {
  163. case NETDEV_DOWN:
  164. action = I40IW_ARP_DELETE;
  165. /* Fall through */
  166. case NETDEV_UP:
  167. /* Fall through */
  168. case NETDEV_CHANGEADDR:
  169. i40iw_manage_arp_cache(iwdev,
  170. netdev->dev_addr,
  171. &local_ipaddr,
  172. true,
  173. action);
  174. i40iw_if_notify(iwdev, netdev, &local_ipaddr, true,
  175. (action == I40IW_ARP_ADD) ? true : false);
  176. break;
  177. default:
  178. break;
  179. }
  180. return NOTIFY_DONE;
  181. }
  182. /**
  183. * i40iw_inet6addr_event - system notifier for ipv6 netdev events
  184. * @notfier: not used
  185. * @event: event for notifier
  186. * @ptr: if address
  187. */
  188. int i40iw_inet6addr_event(struct notifier_block *notifier,
  189. unsigned long event,
  190. void *ptr)
  191. {
  192. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  193. struct net_device *event_netdev = ifa->idev->dev;
  194. struct net_device *netdev;
  195. struct i40iw_device *iwdev;
  196. struct i40iw_handler *hdl;
  197. u32 local_ipaddr6[4];
  198. u32 action = I40IW_ARP_ADD;
  199. hdl = i40iw_find_netdev(event_netdev);
  200. if (!hdl)
  201. return NOTIFY_DONE;
  202. iwdev = &hdl->device;
  203. if (iwdev->init_state < INET_NOTIFIER)
  204. return NOTIFY_DONE;
  205. netdev = iwdev->ldev->netdev;
  206. if (netdev != event_netdev)
  207. return NOTIFY_DONE;
  208. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  209. switch (event) {
  210. case NETDEV_DOWN:
  211. action = I40IW_ARP_DELETE;
  212. /* Fall through */
  213. case NETDEV_UP:
  214. /* Fall through */
  215. case NETDEV_CHANGEADDR:
  216. i40iw_manage_arp_cache(iwdev,
  217. netdev->dev_addr,
  218. local_ipaddr6,
  219. false,
  220. action);
  221. i40iw_if_notify(iwdev, netdev, local_ipaddr6, false,
  222. (action == I40IW_ARP_ADD) ? true : false);
  223. break;
  224. default:
  225. break;
  226. }
  227. return NOTIFY_DONE;
  228. }
  229. /**
  230. * i40iw_net_event - system notifier for net events
  231. * @notfier: not used
  232. * @event: event for notifier
  233. * @ptr: neighbor
  234. */
  235. int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr)
  236. {
  237. struct neighbour *neigh = ptr;
  238. struct i40iw_device *iwdev;
  239. struct i40iw_handler *iwhdl;
  240. __be32 *p;
  241. u32 local_ipaddr[4];
  242. switch (event) {
  243. case NETEVENT_NEIGH_UPDATE:
  244. iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev);
  245. if (!iwhdl)
  246. return NOTIFY_DONE;
  247. iwdev = &iwhdl->device;
  248. if (iwdev->init_state < INET_NOTIFIER)
  249. return NOTIFY_DONE;
  250. p = (__be32 *)neigh->primary_key;
  251. i40iw_copy_ip_ntohl(local_ipaddr, p);
  252. if (neigh->nud_state & NUD_VALID) {
  253. i40iw_manage_arp_cache(iwdev,
  254. neigh->ha,
  255. local_ipaddr,
  256. false,
  257. I40IW_ARP_ADD);
  258. } else {
  259. i40iw_manage_arp_cache(iwdev,
  260. neigh->ha,
  261. local_ipaddr,
  262. false,
  263. I40IW_ARP_DELETE);
  264. }
  265. break;
  266. default:
  267. break;
  268. }
  269. return NOTIFY_DONE;
  270. }
  271. /**
  272. * i40iw_get_cqp_request - get cqp struct
  273. * @cqp: device cqp ptr
  274. * @wait: cqp to be used in wait mode
  275. */
  276. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait)
  277. {
  278. struct i40iw_cqp_request *cqp_request = NULL;
  279. unsigned long flags;
  280. spin_lock_irqsave(&cqp->req_lock, flags);
  281. if (!list_empty(&cqp->cqp_avail_reqs)) {
  282. cqp_request = list_entry(cqp->cqp_avail_reqs.next,
  283. struct i40iw_cqp_request, list);
  284. list_del_init(&cqp_request->list);
  285. }
  286. spin_unlock_irqrestore(&cqp->req_lock, flags);
  287. if (!cqp_request) {
  288. cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
  289. if (cqp_request) {
  290. cqp_request->dynamic = true;
  291. INIT_LIST_HEAD(&cqp_request->list);
  292. init_waitqueue_head(&cqp_request->waitq);
  293. }
  294. }
  295. if (!cqp_request) {
  296. i40iw_pr_err("CQP Request Fail: No Memory");
  297. return NULL;
  298. }
  299. if (wait) {
  300. atomic_set(&cqp_request->refcount, 2);
  301. cqp_request->waiting = true;
  302. } else {
  303. atomic_set(&cqp_request->refcount, 1);
  304. }
  305. return cqp_request;
  306. }
  307. /**
  308. * i40iw_free_cqp_request - free cqp request
  309. * @cqp: cqp ptr
  310. * @cqp_request: to be put back in cqp list
  311. */
  312. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request)
  313. {
  314. unsigned long flags;
  315. if (cqp_request->dynamic) {
  316. kfree(cqp_request);
  317. } else {
  318. cqp_request->request_done = false;
  319. cqp_request->callback_fcn = NULL;
  320. cqp_request->waiting = false;
  321. spin_lock_irqsave(&cqp->req_lock, flags);
  322. list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
  323. spin_unlock_irqrestore(&cqp->req_lock, flags);
  324. }
  325. }
  326. /**
  327. * i40iw_put_cqp_request - dec ref count and free if 0
  328. * @cqp: cqp ptr
  329. * @cqp_request: to be put back in cqp list
  330. */
  331. void i40iw_put_cqp_request(struct i40iw_cqp *cqp,
  332. struct i40iw_cqp_request *cqp_request)
  333. {
  334. if (atomic_dec_and_test(&cqp_request->refcount))
  335. i40iw_free_cqp_request(cqp, cqp_request);
  336. }
  337. /**
  338. * i40iw_free_qp - callback after destroy cqp completes
  339. * @cqp_request: cqp request for destroy qp
  340. * @num: not used
  341. */
  342. static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num)
  343. {
  344. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param;
  345. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  346. struct i40iw_device *iwdev;
  347. u32 qp_num = iwqp->ibqp.qp_num;
  348. iwdev = iwqp->iwdev;
  349. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  350. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  351. i40iw_rem_devusecount(iwdev);
  352. }
  353. /**
  354. * i40iw_wait_event - wait for completion
  355. * @iwdev: iwarp device
  356. * @cqp_request: cqp request to wait
  357. */
  358. static int i40iw_wait_event(struct i40iw_device *iwdev,
  359. struct i40iw_cqp_request *cqp_request)
  360. {
  361. struct cqp_commands_info *info = &cqp_request->info;
  362. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  363. bool cqp_error = false;
  364. int err_code = 0;
  365. int timeout_ret = 0;
  366. timeout_ret = wait_event_timeout(cqp_request->waitq,
  367. cqp_request->request_done,
  368. I40IW_EVENT_TIMEOUT);
  369. if (!timeout_ret) {
  370. i40iw_pr_err("error cqp command 0x%x timed out ret = %d\n",
  371. info->cqp_cmd, timeout_ret);
  372. err_code = -ETIME;
  373. if (!iwdev->reset) {
  374. iwdev->reset = true;
  375. i40iw_request_reset(iwdev);
  376. }
  377. goto done;
  378. }
  379. cqp_error = cqp_request->compl_info.error;
  380. if (cqp_error) {
  381. i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n",
  382. info->cqp_cmd, cqp_request->compl_info.maj_err_code,
  383. cqp_request->compl_info.min_err_code);
  384. err_code = -EPROTO;
  385. goto done;
  386. }
  387. done:
  388. i40iw_put_cqp_request(iwcqp, cqp_request);
  389. return err_code;
  390. }
  391. /**
  392. * i40iw_handle_cqp_op - process cqp command
  393. * @iwdev: iwarp device
  394. * @cqp_request: cqp request to process
  395. */
  396. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  397. struct i40iw_cqp_request
  398. *cqp_request)
  399. {
  400. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  401. enum i40iw_status_code status;
  402. struct cqp_commands_info *info = &cqp_request->info;
  403. int err_code = 0;
  404. if (iwdev->reset) {
  405. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  406. return I40IW_ERR_CQP_COMPL_ERROR;
  407. }
  408. status = i40iw_process_cqp_cmd(dev, info);
  409. if (status) {
  410. i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd);
  411. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  412. return status;
  413. }
  414. if (cqp_request->waiting)
  415. err_code = i40iw_wait_event(iwdev, cqp_request);
  416. if (err_code)
  417. status = I40IW_ERR_CQP_COMPL_ERROR;
  418. return status;
  419. }
  420. /**
  421. * i40iw_add_devusecount - add dev refcount
  422. * @iwdev: dev for refcount
  423. */
  424. void i40iw_add_devusecount(struct i40iw_device *iwdev)
  425. {
  426. atomic64_inc(&iwdev->use_count);
  427. }
  428. /**
  429. * i40iw_rem_devusecount - decrement refcount for dev
  430. * @iwdev: device
  431. */
  432. void i40iw_rem_devusecount(struct i40iw_device *iwdev)
  433. {
  434. if (!atomic64_dec_and_test(&iwdev->use_count))
  435. return;
  436. wake_up(&iwdev->close_wq);
  437. }
  438. /**
  439. * i40iw_add_pdusecount - add pd refcount
  440. * @iwpd: pd for refcount
  441. */
  442. void i40iw_add_pdusecount(struct i40iw_pd *iwpd)
  443. {
  444. atomic_inc(&iwpd->usecount);
  445. }
  446. /**
  447. * i40iw_rem_pdusecount - decrement refcount for pd and free if 0
  448. * @iwpd: pd for refcount
  449. * @iwdev: iwarp device
  450. */
  451. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev)
  452. {
  453. if (!atomic_dec_and_test(&iwpd->usecount))
  454. return;
  455. i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id);
  456. kfree(iwpd);
  457. }
  458. /**
  459. * i40iw_add_ref - add refcount for qp
  460. * @ibqp: iqarp qp
  461. */
  462. void i40iw_add_ref(struct ib_qp *ibqp)
  463. {
  464. struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp;
  465. atomic_inc(&iwqp->refcount);
  466. }
  467. /**
  468. * i40iw_rem_ref - rem refcount for qp and free if 0
  469. * @ibqp: iqarp qp
  470. */
  471. void i40iw_rem_ref(struct ib_qp *ibqp)
  472. {
  473. struct i40iw_qp *iwqp;
  474. enum i40iw_status_code status;
  475. struct i40iw_cqp_request *cqp_request;
  476. struct cqp_commands_info *cqp_info;
  477. struct i40iw_device *iwdev;
  478. u32 qp_num;
  479. unsigned long flags;
  480. iwqp = to_iwqp(ibqp);
  481. iwdev = iwqp->iwdev;
  482. spin_lock_irqsave(&iwdev->qptable_lock, flags);
  483. if (!atomic_dec_and_test(&iwqp->refcount)) {
  484. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  485. return;
  486. }
  487. qp_num = iwqp->ibqp.qp_num;
  488. iwdev->qp_table[qp_num] = NULL;
  489. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  490. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  491. if (!cqp_request)
  492. return;
  493. cqp_request->callback_fcn = i40iw_free_qp;
  494. cqp_request->param = (void *)&iwqp->sc_qp;
  495. cqp_info = &cqp_request->info;
  496. cqp_info->cqp_cmd = OP_QP_DESTROY;
  497. cqp_info->post_sq = 1;
  498. cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp;
  499. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  500. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  501. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  502. if (status)
  503. i40iw_pr_err("CQP-OP Destroy QP fail");
  504. }
  505. /**
  506. * i40iw_get_qp - get qp address
  507. * @device: iwarp device
  508. * @qpn: qp number
  509. */
  510. struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn)
  511. {
  512. struct i40iw_device *iwdev = to_iwdev(device);
  513. if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp))
  514. return NULL;
  515. return &iwdev->qp_table[qpn]->ibqp;
  516. }
  517. /**
  518. * i40iw_debug_buf - print debug msg and buffer is mask set
  519. * @dev: hardware control device structure
  520. * @mask: mask to compare if to print debug buffer
  521. * @buf: points buffer addr
  522. * @size: saize of buffer to print
  523. */
  524. void i40iw_debug_buf(struct i40iw_sc_dev *dev,
  525. enum i40iw_debug_flag mask,
  526. char *desc,
  527. u64 *buf,
  528. u32 size)
  529. {
  530. u32 i;
  531. if (!(dev->debug_mask & mask))
  532. return;
  533. i40iw_debug(dev, mask, "%s\n", desc);
  534. i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf,
  535. (unsigned long long)virt_to_phys(buf));
  536. for (i = 0; i < size; i += 8)
  537. i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]);
  538. }
  539. /**
  540. * i40iw_get_hw_addr - return hw addr
  541. * @par: points to shared dev
  542. */
  543. u8 __iomem *i40iw_get_hw_addr(void *par)
  544. {
  545. struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par;
  546. return dev->hw->hw_addr;
  547. }
  548. /**
  549. * i40iw_remove_head - return head entry and remove from list
  550. * @list: list for entry
  551. */
  552. void *i40iw_remove_head(struct list_head *list)
  553. {
  554. struct list_head *entry;
  555. if (list_empty(list))
  556. return NULL;
  557. entry = (void *)list->next;
  558. list_del(entry);
  559. return (void *)entry;
  560. }
  561. /**
  562. * i40iw_allocate_dma_mem - Memory alloc helper fn
  563. * @hw: pointer to the HW structure
  564. * @mem: ptr to mem struct to fill out
  565. * @size: size of memory requested
  566. * @alignment: what to align the allocation to
  567. */
  568. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  569. struct i40iw_dma_mem *mem,
  570. u64 size,
  571. u32 alignment)
  572. {
  573. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  574. if (!mem)
  575. return I40IW_ERR_PARAM;
  576. mem->size = ALIGN(size, alignment);
  577. mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size,
  578. (dma_addr_t *)&mem->pa, GFP_KERNEL);
  579. if (!mem->va)
  580. return I40IW_ERR_NO_MEMORY;
  581. return 0;
  582. }
  583. /**
  584. * i40iw_free_dma_mem - Memory free helper fn
  585. * @hw: pointer to the HW structure
  586. * @mem: ptr to mem struct to free
  587. */
  588. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem)
  589. {
  590. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  591. if (!mem || !mem->va)
  592. return;
  593. dma_free_coherent(&pcidev->dev, mem->size,
  594. mem->va, (dma_addr_t)mem->pa);
  595. mem->va = NULL;
  596. }
  597. /**
  598. * i40iw_allocate_virt_mem - virtual memory alloc helper fn
  599. * @hw: pointer to the HW structure
  600. * @mem: ptr to mem struct to fill out
  601. * @size: size of memory requested
  602. */
  603. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  604. struct i40iw_virt_mem *mem,
  605. u32 size)
  606. {
  607. if (!mem)
  608. return I40IW_ERR_PARAM;
  609. mem->size = size;
  610. mem->va = kzalloc(size, GFP_KERNEL);
  611. if (mem->va)
  612. return 0;
  613. else
  614. return I40IW_ERR_NO_MEMORY;
  615. }
  616. /**
  617. * i40iw_free_virt_mem - virtual memory free helper fn
  618. * @hw: pointer to the HW structure
  619. * @mem: ptr to mem struct to free
  620. */
  621. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  622. struct i40iw_virt_mem *mem)
  623. {
  624. if (!mem)
  625. return I40IW_ERR_PARAM;
  626. /*
  627. * mem->va points to the parent of mem, so both mem and mem->va
  628. * can not be touched once mem->va is freed
  629. */
  630. kfree(mem->va);
  631. return 0;
  632. }
  633. /**
  634. * i40iw_cqp_sds_cmd - create cqp command for sd
  635. * @dev: hardware control device structure
  636. * @sd_info: information for sd cqp
  637. *
  638. */
  639. enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
  640. struct i40iw_update_sds_info *sdinfo)
  641. {
  642. enum i40iw_status_code status;
  643. struct i40iw_cqp_request *cqp_request;
  644. struct cqp_commands_info *cqp_info;
  645. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  646. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  647. if (!cqp_request)
  648. return I40IW_ERR_NO_MEMORY;
  649. cqp_info = &cqp_request->info;
  650. memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
  651. sizeof(cqp_info->in.u.update_pe_sds.info));
  652. cqp_info->cqp_cmd = OP_UPDATE_PE_SDS;
  653. cqp_info->post_sq = 1;
  654. cqp_info->in.u.update_pe_sds.dev = dev;
  655. cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
  656. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  657. if (status)
  658. i40iw_pr_err("CQP-OP Update SD's fail");
  659. return status;
  660. }
  661. /**
  662. * i40iw_qp_suspend_resume - cqp command for suspend/resume
  663. * @dev: hardware control device structure
  664. * @qp: hardware control qp
  665. * @suspend: flag if suspend or resume
  666. */
  667. void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend)
  668. {
  669. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  670. struct i40iw_cqp_request *cqp_request;
  671. struct i40iw_sc_cqp *cqp = dev->cqp;
  672. struct cqp_commands_info *cqp_info;
  673. enum i40iw_status_code status;
  674. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  675. if (!cqp_request)
  676. return;
  677. cqp_info = &cqp_request->info;
  678. cqp_info->cqp_cmd = (suspend) ? OP_SUSPEND : OP_RESUME;
  679. cqp_info->in.u.suspend_resume.cqp = cqp;
  680. cqp_info->in.u.suspend_resume.qp = qp;
  681. cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request;
  682. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  683. if (status)
  684. i40iw_pr_err("CQP-OP QP Suspend/Resume fail");
  685. }
  686. /**
  687. * i40iw_term_modify_qp - modify qp for term message
  688. * @qp: hardware control qp
  689. * @next_state: qp's next state
  690. * @term: terminate code
  691. * @term_len: length
  692. */
  693. void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len)
  694. {
  695. struct i40iw_qp *iwqp;
  696. iwqp = (struct i40iw_qp *)qp->back_qp;
  697. i40iw_next_iw_state(iwqp, next_state, 0, term, term_len);
  698. };
  699. /**
  700. * i40iw_terminate_done - after terminate is completed
  701. * @qp: hardware control qp
  702. * @timeout_occurred: indicates if terminate timer expired
  703. */
  704. void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred)
  705. {
  706. struct i40iw_qp *iwqp;
  707. u32 next_iwarp_state = I40IW_QP_STATE_ERROR;
  708. u8 hte = 0;
  709. bool first_time;
  710. unsigned long flags;
  711. iwqp = (struct i40iw_qp *)qp->back_qp;
  712. spin_lock_irqsave(&iwqp->lock, flags);
  713. if (iwqp->hte_added) {
  714. iwqp->hte_added = 0;
  715. hte = 1;
  716. }
  717. first_time = !(qp->term_flags & I40IW_TERM_DONE);
  718. qp->term_flags |= I40IW_TERM_DONE;
  719. spin_unlock_irqrestore(&iwqp->lock, flags);
  720. if (first_time) {
  721. if (!timeout_occurred)
  722. i40iw_terminate_del_timer(qp);
  723. else
  724. next_iwarp_state = I40IW_QP_STATE_CLOSING;
  725. i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0);
  726. i40iw_cm_disconn(iwqp);
  727. }
  728. }
  729. /**
  730. * i40iw_terminate_imeout - timeout happened
  731. * @context: points to iwarp qp
  732. */
  733. static void i40iw_terminate_timeout(unsigned long context)
  734. {
  735. struct i40iw_qp *iwqp = (struct i40iw_qp *)context;
  736. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp;
  737. i40iw_terminate_done(qp, 1);
  738. i40iw_rem_ref(&iwqp->ibqp);
  739. }
  740. /**
  741. * i40iw_terminate_start_timer - start terminate timeout
  742. * @qp: hardware control qp
  743. */
  744. void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp)
  745. {
  746. struct i40iw_qp *iwqp;
  747. iwqp = (struct i40iw_qp *)qp->back_qp;
  748. i40iw_add_ref(&iwqp->ibqp);
  749. setup_timer(&iwqp->terminate_timer, i40iw_terminate_timeout,
  750. (unsigned long)iwqp);
  751. iwqp->terminate_timer.expires = jiffies + HZ;
  752. add_timer(&iwqp->terminate_timer);
  753. }
  754. /**
  755. * i40iw_terminate_del_timer - delete terminate timeout
  756. * @qp: hardware control qp
  757. */
  758. void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp)
  759. {
  760. struct i40iw_qp *iwqp;
  761. iwqp = (struct i40iw_qp *)qp->back_qp;
  762. if (del_timer(&iwqp->terminate_timer))
  763. i40iw_rem_ref(&iwqp->ibqp);
  764. }
  765. /**
  766. * i40iw_cqp_generic_worker - generic worker for cqp
  767. * @work: work pointer
  768. */
  769. static void i40iw_cqp_generic_worker(struct work_struct *work)
  770. {
  771. struct i40iw_virtchnl_work_info *work_info =
  772. &((struct virtchnl_work *)work)->work_info;
  773. if (work_info->worker_vf_dev)
  774. work_info->callback_fcn(work_info->worker_vf_dev);
  775. }
  776. /**
  777. * i40iw_cqp_spawn_worker - spawn worket thread
  778. * @iwdev: device struct pointer
  779. * @work_info: work request info
  780. * @iw_vf_idx: virtual function index
  781. */
  782. void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev,
  783. struct i40iw_virtchnl_work_info *work_info,
  784. u32 iw_vf_idx)
  785. {
  786. struct virtchnl_work *work;
  787. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  788. work = &iwdev->virtchnl_w[iw_vf_idx];
  789. memcpy(&work->work_info, work_info, sizeof(*work_info));
  790. INIT_WORK(&work->work, i40iw_cqp_generic_worker);
  791. queue_work(iwdev->virtchnl_wq, &work->work);
  792. }
  793. /**
  794. * i40iw_cqp_manage_hmc_fcn_worker -
  795. * @work: work pointer for hmc info
  796. */
  797. static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work)
  798. {
  799. struct i40iw_cqp_request *cqp_request =
  800. ((struct virtchnl_work *)work)->cqp_request;
  801. struct i40iw_ccq_cqe_info ccq_cqe_info;
  802. struct i40iw_hmc_fcn_info *hmcfcninfo =
  803. &cqp_request->info.in.u.manage_hmc_pm.info;
  804. struct i40iw_device *iwdev =
  805. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev;
  806. ccq_cqe_info.cqp = NULL;
  807. ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code;
  808. ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code;
  809. ccq_cqe_info.op_code = cqp_request->compl_info.op_code;
  810. ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val;
  811. ccq_cqe_info.scratch = 0;
  812. ccq_cqe_info.error = cqp_request->compl_info.error;
  813. hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev,
  814. hmcfcninfo->cqp_callback_param, &ccq_cqe_info);
  815. i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
  816. }
  817. /**
  818. * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion
  819. * @cqp_request: cqp request info struct for hmc fun
  820. * @unused: unused param of callback
  821. */
  822. static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request,
  823. u32 unused)
  824. {
  825. struct virtchnl_work *work;
  826. struct i40iw_hmc_fcn_info *hmcfcninfo =
  827. &cqp_request->info.in.u.manage_hmc_pm.info;
  828. struct i40iw_device *iwdev =
  829. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->
  830. back_dev;
  831. if (hmcfcninfo && hmcfcninfo->callback_fcn) {
  832. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__);
  833. atomic_inc(&cqp_request->refcount);
  834. work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx];
  835. work->cqp_request = cqp_request;
  836. INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker);
  837. queue_work(iwdev->virtchnl_wq, &work->work);
  838. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__);
  839. } else {
  840. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__);
  841. }
  842. }
  843. /**
  844. * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc
  845. * @dev: hardware control device structure
  846. * @hmcfcninfo: info for hmc
  847. */
  848. enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev,
  849. struct i40iw_hmc_fcn_info *hmcfcninfo)
  850. {
  851. enum i40iw_status_code status;
  852. struct i40iw_cqp_request *cqp_request;
  853. struct cqp_commands_info *cqp_info;
  854. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  855. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__);
  856. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  857. if (!cqp_request)
  858. return I40IW_ERR_NO_MEMORY;
  859. cqp_info = &cqp_request->info;
  860. cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback;
  861. cqp_request->param = hmcfcninfo;
  862. memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo,
  863. sizeof(*hmcfcninfo));
  864. cqp_info->in.u.manage_hmc_pm.dev = dev;
  865. cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE;
  866. cqp_info->post_sq = 1;
  867. cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request;
  868. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  869. if (status)
  870. i40iw_pr_err("CQP-OP Manage HMC fail");
  871. return status;
  872. }
  873. /**
  874. * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm
  875. * @iwdev: function device struct
  876. * @values_mem: buffer for fpm
  877. * @hmc_fn_id: function id for fpm
  878. */
  879. enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev,
  880. struct i40iw_dma_mem *values_mem,
  881. u8 hmc_fn_id)
  882. {
  883. enum i40iw_status_code status;
  884. struct i40iw_cqp_request *cqp_request;
  885. struct cqp_commands_info *cqp_info;
  886. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  887. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  888. if (!cqp_request)
  889. return I40IW_ERR_NO_MEMORY;
  890. cqp_info = &cqp_request->info;
  891. cqp_request->param = NULL;
  892. cqp_info->in.u.query_fpm_values.cqp = dev->cqp;
  893. cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa;
  894. cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va;
  895. cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id;
  896. cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES;
  897. cqp_info->post_sq = 1;
  898. cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request;
  899. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  900. if (status)
  901. i40iw_pr_err("CQP-OP Query FPM fail");
  902. return status;
  903. }
  904. /**
  905. * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw
  906. * @dev: hardware control device structure
  907. * @values_mem: buffer with fpm values
  908. * @hmc_fn_id: function id for fpm
  909. */
  910. enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev,
  911. struct i40iw_dma_mem *values_mem,
  912. u8 hmc_fn_id)
  913. {
  914. enum i40iw_status_code status;
  915. struct i40iw_cqp_request *cqp_request;
  916. struct cqp_commands_info *cqp_info;
  917. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  918. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  919. if (!cqp_request)
  920. return I40IW_ERR_NO_MEMORY;
  921. cqp_info = &cqp_request->info;
  922. cqp_request->param = NULL;
  923. cqp_info->in.u.commit_fpm_values.cqp = dev->cqp;
  924. cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa;
  925. cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va;
  926. cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id;
  927. cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES;
  928. cqp_info->post_sq = 1;
  929. cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request;
  930. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  931. if (status)
  932. i40iw_pr_err("CQP-OP Commit FPM fail");
  933. return status;
  934. }
  935. /**
  936. * i40iw_vf_wait_vchnl_resp - wait for channel msg
  937. * @iwdev: function's device struct
  938. */
  939. enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev)
  940. {
  941. struct i40iw_device *iwdev = dev->back_dev;
  942. int timeout_ret;
  943. i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n",
  944. __func__, __LINE__, dev, iwdev);
  945. atomic_set(&iwdev->vchnl_msgs, 2);
  946. timeout_ret = wait_event_timeout(iwdev->vchnl_waitq,
  947. (atomic_read(&iwdev->vchnl_msgs) == 1),
  948. I40IW_VCHNL_EVENT_TIMEOUT);
  949. atomic_dec(&iwdev->vchnl_msgs);
  950. if (!timeout_ret) {
  951. i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret);
  952. atomic_set(&iwdev->vchnl_msgs, 0);
  953. dev->vchnl_up = false;
  954. return I40IW_ERR_TIMEOUT;
  955. }
  956. wake_up(&dev->vf_reqs);
  957. return 0;
  958. }
  959. /**
  960. * i40iw_cqp_cq_create_cmd - create a cq for the cqp
  961. * @dev: device pointer
  962. * @cq: pointer to created cq
  963. */
  964. enum i40iw_status_code i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev *dev,
  965. struct i40iw_sc_cq *cq)
  966. {
  967. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  968. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  969. struct i40iw_cqp_request *cqp_request;
  970. struct cqp_commands_info *cqp_info;
  971. enum i40iw_status_code status;
  972. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  973. if (!cqp_request)
  974. return I40IW_ERR_NO_MEMORY;
  975. cqp_info = &cqp_request->info;
  976. cqp_info->cqp_cmd = OP_CQ_CREATE;
  977. cqp_info->post_sq = 1;
  978. cqp_info->in.u.cq_create.cq = cq;
  979. cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
  980. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  981. if (status)
  982. i40iw_pr_err("CQP-OP Create QP fail");
  983. return status;
  984. }
  985. /**
  986. * i40iw_cqp_qp_create_cmd - create a qp for the cqp
  987. * @dev: device pointer
  988. * @qp: pointer to created qp
  989. */
  990. enum i40iw_status_code i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev *dev,
  991. struct i40iw_sc_qp *qp)
  992. {
  993. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  994. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  995. struct i40iw_cqp_request *cqp_request;
  996. struct cqp_commands_info *cqp_info;
  997. struct i40iw_create_qp_info *qp_info;
  998. enum i40iw_status_code status;
  999. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1000. if (!cqp_request)
  1001. return I40IW_ERR_NO_MEMORY;
  1002. cqp_info = &cqp_request->info;
  1003. qp_info = &cqp_request->info.in.u.qp_create.info;
  1004. memset(qp_info, 0, sizeof(*qp_info));
  1005. qp_info->cq_num_valid = true;
  1006. qp_info->next_iwarp_state = I40IW_QP_STATE_RTS;
  1007. cqp_info->cqp_cmd = OP_QP_CREATE;
  1008. cqp_info->post_sq = 1;
  1009. cqp_info->in.u.qp_create.qp = qp;
  1010. cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
  1011. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1012. if (status)
  1013. i40iw_pr_err("CQP-OP QP create fail");
  1014. return status;
  1015. }
  1016. /**
  1017. * i40iw_cqp_cq_destroy_cmd - destroy the cqp cq
  1018. * @dev: device pointer
  1019. * @cq: pointer to cq
  1020. */
  1021. void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq)
  1022. {
  1023. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1024. i40iw_cq_wq_destroy(iwdev, cq);
  1025. }
  1026. /**
  1027. * i40iw_cqp_qp_destroy_cmd - destroy the cqp
  1028. * @dev: device pointer
  1029. * @qp: pointer to qp
  1030. */
  1031. void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1032. {
  1033. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1034. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1035. struct i40iw_cqp_request *cqp_request;
  1036. struct cqp_commands_info *cqp_info;
  1037. enum i40iw_status_code status;
  1038. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1039. if (!cqp_request)
  1040. return;
  1041. cqp_info = &cqp_request->info;
  1042. memset(cqp_info, 0, sizeof(*cqp_info));
  1043. cqp_info->cqp_cmd = OP_QP_DESTROY;
  1044. cqp_info->post_sq = 1;
  1045. cqp_info->in.u.qp_destroy.qp = qp;
  1046. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  1047. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  1048. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1049. if (status)
  1050. i40iw_pr_err("CQP QP_DESTROY fail");
  1051. }
  1052. /**
  1053. * i40iw_ieq_mpa_crc_ae - generate AE for crc error
  1054. * @dev: hardware control device structure
  1055. * @qp: hardware control qp
  1056. */
  1057. void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1058. {
  1059. struct i40iw_qp_flush_info info;
  1060. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1061. i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__);
  1062. memset(&info, 0, sizeof(info));
  1063. info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR;
  1064. info.generate_ae = true;
  1065. info.ae_source = 0x3;
  1066. (void)i40iw_hw_flush_wqes(iwdev, qp, &info, false);
  1067. }
  1068. /**
  1069. * i40iw_init_hash_desc - initialize hash for crc calculation
  1070. * @desc: cryption type
  1071. */
  1072. enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
  1073. {
  1074. struct crypto_shash *tfm;
  1075. struct shash_desc *tdesc;
  1076. tfm = crypto_alloc_shash("crc32c", 0, 0);
  1077. if (IS_ERR(tfm))
  1078. return I40IW_ERR_MPA_CRC;
  1079. tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
  1080. GFP_KERNEL);
  1081. if (!tdesc) {
  1082. crypto_free_shash(tfm);
  1083. return I40IW_ERR_MPA_CRC;
  1084. }
  1085. tdesc->tfm = tfm;
  1086. *desc = tdesc;
  1087. return 0;
  1088. }
  1089. /**
  1090. * i40iw_free_hash_desc - free hash desc
  1091. * @desc: to be freed
  1092. */
  1093. void i40iw_free_hash_desc(struct shash_desc *desc)
  1094. {
  1095. if (desc) {
  1096. crypto_free_shash(desc->tfm);
  1097. kfree(desc);
  1098. }
  1099. }
  1100. /**
  1101. * i40iw_alloc_query_fpm_buf - allocate buffer for fpm
  1102. * @dev: hardware control device structure
  1103. * @mem: buffer ptr for fpm to be allocated
  1104. * @return: memory allocation status
  1105. */
  1106. enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
  1107. struct i40iw_dma_mem *mem)
  1108. {
  1109. enum i40iw_status_code status;
  1110. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1111. status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE,
  1112. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1113. return status;
  1114. }
  1115. /**
  1116. * i40iw_ieq_check_mpacrc - check if mpa crc is OK
  1117. * @desc: desc for hash
  1118. * @addr: address of buffer for crc
  1119. * @length: length of buffer
  1120. * @value: value to be compared
  1121. */
  1122. enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
  1123. void *addr,
  1124. u32 length,
  1125. u32 value)
  1126. {
  1127. u32 crc = 0;
  1128. int ret;
  1129. enum i40iw_status_code ret_code = 0;
  1130. crypto_shash_init(desc);
  1131. ret = crypto_shash_update(desc, addr, length);
  1132. if (!ret)
  1133. crypto_shash_final(desc, (u8 *)&crc);
  1134. if (crc != value) {
  1135. i40iw_pr_err("mpa crc check fail\n");
  1136. ret_code = I40IW_ERR_MPA_CRC;
  1137. }
  1138. return ret_code;
  1139. }
  1140. /**
  1141. * i40iw_ieq_get_qp - get qp based on quad in puda buffer
  1142. * @dev: hardware control device structure
  1143. * @buf: receive puda buffer on exception q
  1144. */
  1145. struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
  1146. struct i40iw_puda_buf *buf)
  1147. {
  1148. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1149. struct i40iw_qp *iwqp;
  1150. struct i40iw_cm_node *cm_node;
  1151. u32 loc_addr[4], rem_addr[4];
  1152. u16 loc_port, rem_port;
  1153. struct ipv6hdr *ip6h;
  1154. struct iphdr *iph = (struct iphdr *)buf->iph;
  1155. struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
  1156. if (iph->version == 4) {
  1157. memset(loc_addr, 0, sizeof(loc_addr));
  1158. loc_addr[0] = ntohl(iph->daddr);
  1159. memset(rem_addr, 0, sizeof(rem_addr));
  1160. rem_addr[0] = ntohl(iph->saddr);
  1161. } else {
  1162. ip6h = (struct ipv6hdr *)buf->iph;
  1163. i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
  1164. i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
  1165. }
  1166. loc_port = ntohs(tcph->dest);
  1167. rem_port = ntohs(tcph->source);
  1168. cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
  1169. loc_addr, false);
  1170. if (!cm_node)
  1171. return NULL;
  1172. iwqp = cm_node->iwqp;
  1173. return &iwqp->sc_qp;
  1174. }
  1175. /**
  1176. * i40iw_ieq_update_tcpip_info - update tcpip in the buffer
  1177. * @buf: puda to update
  1178. * @length: length of buffer
  1179. * @seqnum: seq number for tcp
  1180. */
  1181. void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum)
  1182. {
  1183. struct tcphdr *tcph;
  1184. struct iphdr *iph;
  1185. u16 iphlen;
  1186. u16 packetsize;
  1187. u8 *addr = (u8 *)buf->mem.va;
  1188. iphlen = (buf->ipv4) ? 20 : 40;
  1189. iph = (struct iphdr *)(addr + buf->maclen);
  1190. tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
  1191. packetsize = length + buf->tcphlen + iphlen;
  1192. iph->tot_len = htons(packetsize);
  1193. tcph->seq = htonl(seqnum);
  1194. }
  1195. /**
  1196. * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer
  1197. * @info: to get information
  1198. * @buf: puda buffer
  1199. */
  1200. enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
  1201. struct i40iw_puda_buf *buf)
  1202. {
  1203. struct iphdr *iph;
  1204. struct ipv6hdr *ip6h;
  1205. struct tcphdr *tcph;
  1206. u16 iphlen;
  1207. u16 pkt_len;
  1208. u8 *mem = (u8 *)buf->mem.va;
  1209. struct ethhdr *ethh = (struct ethhdr *)buf->mem.va;
  1210. if (ethh->h_proto == htons(0x8100)) {
  1211. info->vlan_valid = true;
  1212. buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK;
  1213. }
  1214. buf->maclen = (info->vlan_valid) ? 18 : 14;
  1215. iphlen = (info->l3proto) ? 40 : 20;
  1216. buf->ipv4 = (info->l3proto) ? false : true;
  1217. buf->iph = mem + buf->maclen;
  1218. iph = (struct iphdr *)buf->iph;
  1219. buf->tcph = buf->iph + iphlen;
  1220. tcph = (struct tcphdr *)buf->tcph;
  1221. if (buf->ipv4) {
  1222. pkt_len = ntohs(iph->tot_len);
  1223. } else {
  1224. ip6h = (struct ipv6hdr *)buf->iph;
  1225. pkt_len = ntohs(ip6h->payload_len) + iphlen;
  1226. }
  1227. buf->totallen = pkt_len + buf->maclen;
  1228. if (info->payload_len < buf->totallen) {
  1229. i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n",
  1230. info->payload_len, buf->totallen);
  1231. return I40IW_ERR_INVALID_SIZE;
  1232. }
  1233. buf->tcphlen = (tcph->doff) << 2;
  1234. buf->datalen = pkt_len - iphlen - buf->tcphlen;
  1235. buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL;
  1236. buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
  1237. buf->seqnum = ntohl(tcph->seq);
  1238. return 0;
  1239. }
  1240. /**
  1241. * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats
  1242. * @vsi: pointer to the vsi structure
  1243. */
  1244. static void i40iw_hw_stats_timeout(unsigned long vsi)
  1245. {
  1246. struct i40iw_sc_vsi *sc_vsi = (struct i40iw_sc_vsi *)vsi;
  1247. struct i40iw_sc_dev *pf_dev = sc_vsi->dev;
  1248. struct i40iw_vsi_pestat *pf_devstat = sc_vsi->pestat;
  1249. struct i40iw_vsi_pestat *vf_devstat = NULL;
  1250. u16 iw_vf_idx;
  1251. unsigned long flags;
  1252. /*PF*/
  1253. i40iw_hw_stats_read_all(pf_devstat, &pf_devstat->hw_stats);
  1254. for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) {
  1255. spin_lock_irqsave(&pf_devstat->lock, flags);
  1256. if (pf_dev->vf_dev[iw_vf_idx]) {
  1257. if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) {
  1258. vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->pestat;
  1259. i40iw_hw_stats_read_all(vf_devstat, &vf_devstat->hw_stats);
  1260. }
  1261. }
  1262. spin_unlock_irqrestore(&pf_devstat->lock, flags);
  1263. }
  1264. mod_timer(&pf_devstat->stats_timer,
  1265. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1266. }
  1267. /**
  1268. * i40iw_hw_stats_start_timer - Start periodic stats timer
  1269. * @vsi: pointer to the vsi structure
  1270. */
  1271. void i40iw_hw_stats_start_timer(struct i40iw_sc_vsi *vsi)
  1272. {
  1273. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1274. setup_timer(&devstat->stats_timer, i40iw_hw_stats_timeout,
  1275. (unsigned long)vsi);
  1276. mod_timer(&devstat->stats_timer,
  1277. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1278. }
  1279. /**
  1280. * i40iw_hw_stats_stop_timer - Delete periodic stats timer
  1281. * @vsi: pointer to the vsi structure
  1282. */
  1283. void i40iw_hw_stats_stop_timer(struct i40iw_sc_vsi *vsi)
  1284. {
  1285. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1286. del_timer_sync(&devstat->stats_timer);
  1287. }