main.c 34 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Main component of the bnxt_re driver
  37. */
  38. #include <linux/module.h>
  39. #include <linux/netdevice.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/mutex.h>
  42. #include <linux/list.h>
  43. #include <linux/rculist.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/pci.h>
  46. #include <net/dcbnl.h>
  47. #include <net/ipv6.h>
  48. #include <net/addrconf.h>
  49. #include <linux/if_ether.h>
  50. #include <rdma/ib_verbs.h>
  51. #include <rdma/ib_user_verbs.h>
  52. #include <rdma/ib_umem.h>
  53. #include <rdma/ib_addr.h>
  54. #include "bnxt_ulp.h"
  55. #include "roce_hsi.h"
  56. #include "qplib_res.h"
  57. #include "qplib_sp.h"
  58. #include "qplib_fp.h"
  59. #include "qplib_rcfw.h"
  60. #include "bnxt_re.h"
  61. #include "ib_verbs.h"
  62. #include <rdma/bnxt_re-abi.h>
  63. #include "bnxt.h"
  64. static char version[] =
  65. BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n";
  66. MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
  67. MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
  68. MODULE_LICENSE("Dual BSD/GPL");
  69. MODULE_VERSION(ROCE_DRV_MODULE_VERSION);
  70. /* globals */
  71. static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
  72. /* Mutex to protect the list of bnxt_re devices added */
  73. static DEFINE_MUTEX(bnxt_re_dev_lock);
  74. static struct workqueue_struct *bnxt_re_wq;
  75. /* for handling bnxt_en callbacks later */
  76. static void bnxt_re_stop(void *p)
  77. {
  78. }
  79. static void bnxt_re_start(void *p)
  80. {
  81. }
  82. static void bnxt_re_sriov_config(void *p, int num_vfs)
  83. {
  84. }
  85. static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
  86. .ulp_async_notifier = NULL,
  87. .ulp_stop = bnxt_re_stop,
  88. .ulp_start = bnxt_re_start,
  89. .ulp_sriov_config = bnxt_re_sriov_config
  90. };
  91. /* RoCE -> Net driver */
  92. /* Driver registration routines used to let the networking driver (bnxt_en)
  93. * to know that the RoCE driver is now installed
  94. */
  95. static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev, bool lock_wait)
  96. {
  97. struct bnxt_en_dev *en_dev;
  98. int rc;
  99. if (!rdev)
  100. return -EINVAL;
  101. en_dev = rdev->en_dev;
  102. /* Acquire rtnl lock if it is not invokded from netdev event */
  103. if (lock_wait)
  104. rtnl_lock();
  105. rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
  106. BNXT_ROCE_ULP);
  107. if (lock_wait)
  108. rtnl_unlock();
  109. return rc;
  110. }
  111. static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
  112. {
  113. struct bnxt_en_dev *en_dev;
  114. int rc = 0;
  115. if (!rdev)
  116. return -EINVAL;
  117. en_dev = rdev->en_dev;
  118. rtnl_lock();
  119. rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
  120. &bnxt_re_ulp_ops, rdev);
  121. rtnl_unlock();
  122. return rc;
  123. }
  124. static int bnxt_re_free_msix(struct bnxt_re_dev *rdev, bool lock_wait)
  125. {
  126. struct bnxt_en_dev *en_dev;
  127. int rc;
  128. if (!rdev)
  129. return -EINVAL;
  130. en_dev = rdev->en_dev;
  131. if (lock_wait)
  132. rtnl_lock();
  133. rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
  134. if (lock_wait)
  135. rtnl_unlock();
  136. return rc;
  137. }
  138. static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
  139. {
  140. int rc = 0, num_msix_want = BNXT_RE_MIN_MSIX, num_msix_got;
  141. struct bnxt_en_dev *en_dev;
  142. if (!rdev)
  143. return -EINVAL;
  144. en_dev = rdev->en_dev;
  145. rtnl_lock();
  146. num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
  147. rdev->msix_entries,
  148. num_msix_want);
  149. if (num_msix_got < BNXT_RE_MIN_MSIX) {
  150. rc = -EINVAL;
  151. goto done;
  152. }
  153. if (num_msix_got != num_msix_want) {
  154. dev_warn(rdev_to_dev(rdev),
  155. "Requested %d MSI-X vectors, got %d\n",
  156. num_msix_want, num_msix_got);
  157. }
  158. rdev->num_msix = num_msix_got;
  159. done:
  160. rtnl_unlock();
  161. return rc;
  162. }
  163. static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
  164. u16 opcd, u16 crid, u16 trid)
  165. {
  166. hdr->req_type = cpu_to_le16(opcd);
  167. hdr->cmpl_ring = cpu_to_le16(crid);
  168. hdr->target_id = cpu_to_le16(trid);
  169. }
  170. static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
  171. int msg_len, void *resp, int resp_max_len,
  172. int timeout)
  173. {
  174. fw_msg->msg = msg;
  175. fw_msg->msg_len = msg_len;
  176. fw_msg->resp = resp;
  177. fw_msg->resp_max_len = resp_max_len;
  178. fw_msg->timeout = timeout;
  179. }
  180. static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id,
  181. bool lock_wait)
  182. {
  183. struct bnxt_en_dev *en_dev = rdev->en_dev;
  184. struct hwrm_ring_free_input req = {0};
  185. struct hwrm_ring_free_output resp;
  186. struct bnxt_fw_msg fw_msg;
  187. bool do_unlock = false;
  188. int rc = -EINVAL;
  189. if (!en_dev)
  190. return rc;
  191. memset(&fw_msg, 0, sizeof(fw_msg));
  192. if (lock_wait) {
  193. rtnl_lock();
  194. do_unlock = true;
  195. }
  196. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
  197. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  198. req.ring_id = cpu_to_le16(fw_ring_id);
  199. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  200. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  201. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  202. if (rc)
  203. dev_err(rdev_to_dev(rdev),
  204. "Failed to free HW ring:%d :%#x", req.ring_id, rc);
  205. if (do_unlock)
  206. rtnl_unlock();
  207. return rc;
  208. }
  209. static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr,
  210. int pages, int type, u32 ring_mask,
  211. u32 map_index, u16 *fw_ring_id)
  212. {
  213. struct bnxt_en_dev *en_dev = rdev->en_dev;
  214. struct hwrm_ring_alloc_input req = {0};
  215. struct hwrm_ring_alloc_output resp;
  216. struct bnxt_fw_msg fw_msg;
  217. int rc = -EINVAL;
  218. if (!en_dev)
  219. return rc;
  220. memset(&fw_msg, 0, sizeof(fw_msg));
  221. rtnl_lock();
  222. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
  223. req.enables = 0;
  224. req.page_tbl_addr = cpu_to_le64(dma_arr[0]);
  225. if (pages > 1) {
  226. /* Page size is in log2 units */
  227. req.page_size = BNXT_PAGE_SHIFT;
  228. req.page_tbl_depth = 1;
  229. }
  230. req.fbo = 0;
  231. /* Association of ring index with doorbell index and MSIX number */
  232. req.logical_id = cpu_to_le16(map_index);
  233. req.length = cpu_to_le32(ring_mask + 1);
  234. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  235. req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
  236. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  237. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  238. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  239. if (!rc)
  240. *fw_ring_id = le16_to_cpu(resp.ring_id);
  241. rtnl_unlock();
  242. return rc;
  243. }
  244. static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
  245. u32 fw_stats_ctx_id, bool lock_wait)
  246. {
  247. struct bnxt_en_dev *en_dev = rdev->en_dev;
  248. struct hwrm_stat_ctx_free_input req = {0};
  249. struct bnxt_fw_msg fw_msg;
  250. bool do_unlock = false;
  251. int rc = -EINVAL;
  252. if (!en_dev)
  253. return rc;
  254. memset(&fw_msg, 0, sizeof(fw_msg));
  255. if (lock_wait) {
  256. rtnl_lock();
  257. do_unlock = true;
  258. }
  259. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
  260. req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
  261. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
  262. sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
  263. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  264. if (rc)
  265. dev_err(rdev_to_dev(rdev),
  266. "Failed to free HW stats context %#x", rc);
  267. if (do_unlock)
  268. rtnl_unlock();
  269. return rc;
  270. }
  271. static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
  272. dma_addr_t dma_map,
  273. u32 *fw_stats_ctx_id)
  274. {
  275. struct hwrm_stat_ctx_alloc_output resp = {0};
  276. struct hwrm_stat_ctx_alloc_input req = {0};
  277. struct bnxt_en_dev *en_dev = rdev->en_dev;
  278. struct bnxt_fw_msg fw_msg;
  279. int rc = -EINVAL;
  280. *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
  281. if (!en_dev)
  282. return rc;
  283. memset(&fw_msg, 0, sizeof(fw_msg));
  284. rtnl_lock();
  285. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
  286. req.update_period_ms = cpu_to_le32(1000);
  287. req.stats_dma_addr = cpu_to_le64(dma_map);
  288. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  289. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  290. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  291. if (!rc)
  292. *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
  293. rtnl_unlock();
  294. return rc;
  295. }
  296. /* Device */
  297. static bool is_bnxt_re_dev(struct net_device *netdev)
  298. {
  299. struct ethtool_drvinfo drvinfo;
  300. if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
  301. memset(&drvinfo, 0, sizeof(drvinfo));
  302. netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
  303. if (strcmp(drvinfo.driver, "bnxt_en"))
  304. return false;
  305. return true;
  306. }
  307. return false;
  308. }
  309. static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
  310. {
  311. struct bnxt_re_dev *rdev;
  312. rcu_read_lock();
  313. list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) {
  314. if (rdev->netdev == netdev) {
  315. rcu_read_unlock();
  316. return rdev;
  317. }
  318. }
  319. rcu_read_unlock();
  320. return NULL;
  321. }
  322. static void bnxt_re_dev_unprobe(struct net_device *netdev,
  323. struct bnxt_en_dev *en_dev)
  324. {
  325. dev_put(netdev);
  326. module_put(en_dev->pdev->driver->driver.owner);
  327. }
  328. static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
  329. {
  330. struct bnxt *bp = netdev_priv(netdev);
  331. struct bnxt_en_dev *en_dev;
  332. struct pci_dev *pdev;
  333. /* Call bnxt_en's RoCE probe via indirect API */
  334. if (!bp->ulp_probe)
  335. return ERR_PTR(-EINVAL);
  336. en_dev = bp->ulp_probe(netdev);
  337. if (IS_ERR(en_dev))
  338. return en_dev;
  339. pdev = en_dev->pdev;
  340. if (!pdev)
  341. return ERR_PTR(-EINVAL);
  342. if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
  343. dev_dbg(&pdev->dev,
  344. "%s: probe error: RoCE is not supported on this device",
  345. ROCE_DRV_MODULE_NAME);
  346. return ERR_PTR(-ENODEV);
  347. }
  348. /* Bump net device reference count */
  349. if (!try_module_get(pdev->driver->driver.owner))
  350. return ERR_PTR(-ENODEV);
  351. dev_hold(netdev);
  352. return en_dev;
  353. }
  354. static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev)
  355. {
  356. ib_unregister_device(&rdev->ibdev);
  357. }
  358. static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
  359. {
  360. struct ib_device *ibdev = &rdev->ibdev;
  361. /* ib device init */
  362. ibdev->owner = THIS_MODULE;
  363. ibdev->node_type = RDMA_NODE_IB_CA;
  364. strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX);
  365. strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
  366. strlen(BNXT_RE_DESC) + 5);
  367. ibdev->phys_port_cnt = 1;
  368. bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
  369. ibdev->num_comp_vectors = 1;
  370. ibdev->dev.parent = &rdev->en_dev->pdev->dev;
  371. ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
  372. /* User space */
  373. ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION;
  374. ibdev->uverbs_cmd_mask =
  375. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  376. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  377. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  378. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  379. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  380. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  381. (1ull << IB_USER_VERBS_CMD_REREG_MR) |
  382. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  383. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  384. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  385. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  386. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  387. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  388. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  389. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  390. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  391. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  392. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  393. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  394. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  395. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  396. (1ull << IB_USER_VERBS_CMD_MODIFY_AH) |
  397. (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
  398. (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
  399. /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */
  400. /* Kernel verbs */
  401. ibdev->query_device = bnxt_re_query_device;
  402. ibdev->modify_device = bnxt_re_modify_device;
  403. ibdev->query_port = bnxt_re_query_port;
  404. ibdev->modify_port = bnxt_re_modify_port;
  405. ibdev->get_port_immutable = bnxt_re_get_port_immutable;
  406. ibdev->query_pkey = bnxt_re_query_pkey;
  407. ibdev->query_gid = bnxt_re_query_gid;
  408. ibdev->get_netdev = bnxt_re_get_netdev;
  409. ibdev->add_gid = bnxt_re_add_gid;
  410. ibdev->del_gid = bnxt_re_del_gid;
  411. ibdev->get_link_layer = bnxt_re_get_link_layer;
  412. ibdev->alloc_pd = bnxt_re_alloc_pd;
  413. ibdev->dealloc_pd = bnxt_re_dealloc_pd;
  414. ibdev->create_ah = bnxt_re_create_ah;
  415. ibdev->modify_ah = bnxt_re_modify_ah;
  416. ibdev->query_ah = bnxt_re_query_ah;
  417. ibdev->destroy_ah = bnxt_re_destroy_ah;
  418. ibdev->create_qp = bnxt_re_create_qp;
  419. ibdev->modify_qp = bnxt_re_modify_qp;
  420. ibdev->query_qp = bnxt_re_query_qp;
  421. ibdev->destroy_qp = bnxt_re_destroy_qp;
  422. ibdev->post_send = bnxt_re_post_send;
  423. ibdev->post_recv = bnxt_re_post_recv;
  424. ibdev->create_cq = bnxt_re_create_cq;
  425. ibdev->destroy_cq = bnxt_re_destroy_cq;
  426. ibdev->poll_cq = bnxt_re_poll_cq;
  427. ibdev->req_notify_cq = bnxt_re_req_notify_cq;
  428. ibdev->get_dma_mr = bnxt_re_get_dma_mr;
  429. ibdev->dereg_mr = bnxt_re_dereg_mr;
  430. ibdev->alloc_mr = bnxt_re_alloc_mr;
  431. ibdev->map_mr_sg = bnxt_re_map_mr_sg;
  432. ibdev->alloc_fmr = bnxt_re_alloc_fmr;
  433. ibdev->map_phys_fmr = bnxt_re_map_phys_fmr;
  434. ibdev->unmap_fmr = bnxt_re_unmap_fmr;
  435. ibdev->dealloc_fmr = bnxt_re_dealloc_fmr;
  436. ibdev->reg_user_mr = bnxt_re_reg_user_mr;
  437. ibdev->alloc_ucontext = bnxt_re_alloc_ucontext;
  438. ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext;
  439. ibdev->mmap = bnxt_re_mmap;
  440. return ib_register_device(ibdev, NULL);
  441. }
  442. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  443. char *buf)
  444. {
  445. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  446. return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);
  447. }
  448. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  449. char *buf)
  450. {
  451. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  452. return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->dev_attr.fw_ver);
  453. }
  454. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  455. char *buf)
  456. {
  457. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  458. return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);
  459. }
  460. static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL);
  461. static DEVICE_ATTR(fw_rev, 0444, show_fw_ver, NULL);
  462. static DEVICE_ATTR(hca_type, 0444, show_hca, NULL);
  463. static struct device_attribute *bnxt_re_attributes[] = {
  464. &dev_attr_hw_rev,
  465. &dev_attr_fw_rev,
  466. &dev_attr_hca_type
  467. };
  468. static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
  469. {
  470. dev_put(rdev->netdev);
  471. rdev->netdev = NULL;
  472. mutex_lock(&bnxt_re_dev_lock);
  473. list_del_rcu(&rdev->list);
  474. mutex_unlock(&bnxt_re_dev_lock);
  475. synchronize_rcu();
  476. flush_workqueue(bnxt_re_wq);
  477. ib_dealloc_device(&rdev->ibdev);
  478. /* rdev is gone */
  479. }
  480. static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
  481. struct bnxt_en_dev *en_dev)
  482. {
  483. struct bnxt_re_dev *rdev;
  484. /* Allocate bnxt_re_dev instance here */
  485. rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev));
  486. if (!rdev) {
  487. dev_err(NULL, "%s: bnxt_re_dev allocation failure!",
  488. ROCE_DRV_MODULE_NAME);
  489. return NULL;
  490. }
  491. /* Default values */
  492. rdev->netdev = netdev;
  493. dev_hold(rdev->netdev);
  494. rdev->en_dev = en_dev;
  495. rdev->id = rdev->en_dev->pdev->devfn;
  496. INIT_LIST_HEAD(&rdev->qp_list);
  497. mutex_init(&rdev->qp_lock);
  498. atomic_set(&rdev->qp_count, 0);
  499. atomic_set(&rdev->cq_count, 0);
  500. atomic_set(&rdev->srq_count, 0);
  501. atomic_set(&rdev->mr_count, 0);
  502. atomic_set(&rdev->mw_count, 0);
  503. rdev->cosq[0] = 0xFFFF;
  504. rdev->cosq[1] = 0xFFFF;
  505. mutex_lock(&bnxt_re_dev_lock);
  506. list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
  507. mutex_unlock(&bnxt_re_dev_lock);
  508. return rdev;
  509. }
  510. static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
  511. struct creq_func_event *aeqe)
  512. {
  513. switch (aeqe->event) {
  514. case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
  515. break;
  516. case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
  517. break;
  518. case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
  519. break;
  520. case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
  521. break;
  522. case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
  523. break;
  524. case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
  525. break;
  526. case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
  527. break;
  528. case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
  529. break;
  530. case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
  531. break;
  532. case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
  533. break;
  534. case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
  535. break;
  536. default:
  537. return -EINVAL;
  538. }
  539. return 0;
  540. }
  541. static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
  542. struct bnxt_qplib_cq *handle)
  543. {
  544. struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
  545. qplib_cq);
  546. if (!cq) {
  547. dev_err(NULL, "%s: CQ is NULL, CQN not handled",
  548. ROCE_DRV_MODULE_NAME);
  549. return -EINVAL;
  550. }
  551. if (cq->ib_cq.comp_handler) {
  552. /* Lock comp_handler? */
  553. (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
  554. }
  555. return 0;
  556. }
  557. static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
  558. {
  559. if (rdev->nq.hwq.max_elements)
  560. bnxt_qplib_disable_nq(&rdev->nq);
  561. if (rdev->qplib_res.rcfw)
  562. bnxt_qplib_cleanup_res(&rdev->qplib_res);
  563. }
  564. static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
  565. {
  566. int rc = 0;
  567. bnxt_qplib_init_res(&rdev->qplib_res);
  568. if (rdev->msix_entries[BNXT_RE_NQ_IDX].vector <= 0)
  569. return -EINVAL;
  570. rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq,
  571. rdev->msix_entries[BNXT_RE_NQ_IDX].vector,
  572. rdev->msix_entries[BNXT_RE_NQ_IDX].db_offset,
  573. &bnxt_re_cqn_handler,
  574. NULL);
  575. if (rc)
  576. dev_err(rdev_to_dev(rdev), "Failed to enable NQ: %#x", rc);
  577. return rc;
  578. }
  579. static void bnxt_re_free_res(struct bnxt_re_dev *rdev, bool lock_wait)
  580. {
  581. if (rdev->nq.hwq.max_elements) {
  582. bnxt_re_net_ring_free(rdev, rdev->nq.ring_id, lock_wait);
  583. bnxt_qplib_free_nq(&rdev->nq);
  584. }
  585. if (rdev->qplib_res.dpi_tbl.max) {
  586. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  587. &rdev->qplib_res.dpi_tbl,
  588. &rdev->dpi_privileged);
  589. }
  590. if (rdev->qplib_res.rcfw) {
  591. bnxt_qplib_free_res(&rdev->qplib_res);
  592. rdev->qplib_res.rcfw = NULL;
  593. }
  594. }
  595. static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
  596. {
  597. int rc = 0;
  598. /* Configure and allocate resources for qplib */
  599. rdev->qplib_res.rcfw = &rdev->rcfw;
  600. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr);
  601. if (rc)
  602. goto fail;
  603. rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
  604. rdev->netdev, &rdev->dev_attr);
  605. if (rc)
  606. goto fail;
  607. rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
  608. &rdev->dpi_privileged,
  609. rdev);
  610. if (rc)
  611. goto fail;
  612. rdev->nq.hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
  613. BNXT_RE_MAX_SRQC_COUNT + 2;
  614. rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq);
  615. if (rc) {
  616. dev_err(rdev_to_dev(rdev),
  617. "Failed to allocate NQ memory: %#x", rc);
  618. goto fail;
  619. }
  620. rc = bnxt_re_net_ring_alloc
  621. (rdev, rdev->nq.hwq.pbl[PBL_LVL_0].pg_map_arr,
  622. rdev->nq.hwq.pbl[rdev->nq.hwq.level].pg_count,
  623. HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_NQE_MAX_CNT - 1,
  624. rdev->msix_entries[BNXT_RE_NQ_IDX].ring_idx,
  625. &rdev->nq.ring_id);
  626. if (rc) {
  627. dev_err(rdev_to_dev(rdev),
  628. "Failed to allocate NQ ring: %#x", rc);
  629. goto free_nq;
  630. }
  631. return 0;
  632. free_nq:
  633. bnxt_qplib_free_nq(&rdev->nq);
  634. fail:
  635. rdev->qplib_res.rcfw = NULL;
  636. return rc;
  637. }
  638. static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
  639. u8 port_num, enum ib_event_type event)
  640. {
  641. struct ib_event ib_event;
  642. ib_event.device = ibdev;
  643. if (qp)
  644. ib_event.element.qp = qp;
  645. else
  646. ib_event.element.port_num = port_num;
  647. ib_event.event = event;
  648. ib_dispatch_event(&ib_event);
  649. }
  650. #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
  651. static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
  652. u64 *cid_map)
  653. {
  654. struct hwrm_queue_pri2cos_qcfg_input req = {0};
  655. struct bnxt *bp = netdev_priv(rdev->netdev);
  656. struct hwrm_queue_pri2cos_qcfg_output resp;
  657. struct bnxt_en_dev *en_dev = rdev->en_dev;
  658. struct bnxt_fw_msg fw_msg;
  659. u32 flags = 0;
  660. u8 *qcfgmap, *tmp_map;
  661. int rc = 0, i;
  662. if (!cid_map)
  663. return -EINVAL;
  664. memset(&fw_msg, 0, sizeof(fw_msg));
  665. bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
  666. HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
  667. flags |= (dir & 0x01);
  668. flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
  669. req.flags = cpu_to_le32(flags);
  670. req.port_id = bp->pf.port_id;
  671. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  672. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  673. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  674. if (rc)
  675. return rc;
  676. if (resp.queue_cfg_info) {
  677. dev_warn(rdev_to_dev(rdev),
  678. "Asymmetric cos queue configuration detected");
  679. dev_warn(rdev_to_dev(rdev),
  680. " on device, QoS may not be fully functional\n");
  681. }
  682. qcfgmap = &resp.pri0_cos_queue_id;
  683. tmp_map = (u8 *)cid_map;
  684. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  685. tmp_map[i] = qcfgmap[i];
  686. return rc;
  687. }
  688. static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
  689. struct bnxt_re_qp *qp)
  690. {
  691. return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp);
  692. }
  693. static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
  694. {
  695. int mask = IB_QP_STATE;
  696. struct ib_qp_attr qp_attr;
  697. struct bnxt_re_qp *qp;
  698. qp_attr.qp_state = IB_QPS_ERR;
  699. mutex_lock(&rdev->qp_lock);
  700. list_for_each_entry(qp, &rdev->qp_list, list) {
  701. /* Modify the state of all QPs except QP1/Shadow QP */
  702. if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
  703. if (qp->qplib_qp.state !=
  704. CMDQ_MODIFY_QP_NEW_STATE_RESET &&
  705. qp->qplib_qp.state !=
  706. CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  707. bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
  708. 1, IB_EVENT_QP_FATAL);
  709. bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
  710. NULL);
  711. }
  712. }
  713. }
  714. mutex_unlock(&rdev->qp_lock);
  715. }
  716. static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
  717. {
  718. u32 prio_map = 0, tmp_map = 0;
  719. struct net_device *netdev;
  720. struct dcb_app app;
  721. netdev = rdev->netdev;
  722. memset(&app, 0, sizeof(app));
  723. app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
  724. app.protocol = ETH_P_IBOE;
  725. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  726. prio_map = tmp_map;
  727. app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
  728. app.protocol = ROCE_V2_UDP_DPORT;
  729. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  730. prio_map |= tmp_map;
  731. if (!prio_map)
  732. prio_map = -EFAULT;
  733. return prio_map;
  734. }
  735. static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
  736. {
  737. u16 prio;
  738. u8 id;
  739. for (prio = 0, id = 0; prio < 8; prio++) {
  740. if (prio_map & (1 << prio)) {
  741. cosq[id] = cid_map[prio];
  742. id++;
  743. if (id == 2) /* Max 2 tcs supported */
  744. break;
  745. }
  746. }
  747. }
  748. static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
  749. {
  750. u8 prio_map = 0;
  751. u64 cid_map;
  752. int rc;
  753. /* Get priority for roce */
  754. rc = bnxt_re_get_priority_mask(rdev);
  755. if (rc < 0)
  756. return rc;
  757. prio_map = (u8)rc;
  758. if (prio_map == rdev->cur_prio_map)
  759. return 0;
  760. rdev->cur_prio_map = prio_map;
  761. /* Get cosq id for this priority */
  762. rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
  763. if (rc) {
  764. dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map);
  765. return rc;
  766. }
  767. /* Parse CoS IDs for app priority */
  768. bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
  769. /* Config BONO. */
  770. rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
  771. if (rc) {
  772. dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n",
  773. rdev->cosq[0], rdev->cosq[1]);
  774. return rc;
  775. }
  776. return 0;
  777. }
  778. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait)
  779. {
  780. int i, rc;
  781. if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) {
  782. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++)
  783. device_remove_file(&rdev->ibdev.dev,
  784. bnxt_re_attributes[i]);
  785. /* Cleanup ib dev */
  786. bnxt_re_unregister_ib(rdev);
  787. }
  788. if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
  789. cancel_delayed_work(&rdev->worker);
  790. bnxt_re_cleanup_res(rdev);
  791. bnxt_re_free_res(rdev, lock_wait);
  792. if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
  793. rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
  794. if (rc)
  795. dev_warn(rdev_to_dev(rdev),
  796. "Failed to deinitialize RCFW: %#x", rc);
  797. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id,
  798. lock_wait);
  799. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  800. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  801. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, lock_wait);
  802. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  803. }
  804. if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
  805. rc = bnxt_re_free_msix(rdev, lock_wait);
  806. if (rc)
  807. dev_warn(rdev_to_dev(rdev),
  808. "Failed to free MSI-X vectors: %#x", rc);
  809. }
  810. if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
  811. rc = bnxt_re_unregister_netdev(rdev, lock_wait);
  812. if (rc)
  813. dev_warn(rdev_to_dev(rdev),
  814. "Failed to unregister with netdev: %#x", rc);
  815. }
  816. }
  817. static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
  818. {
  819. u32 i;
  820. rdev->qplib_ctx.qpc_count = BNXT_RE_MAX_QPC_COUNT;
  821. rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT;
  822. rdev->qplib_ctx.srqc_count = BNXT_RE_MAX_SRQC_COUNT;
  823. rdev->qplib_ctx.cq_count = BNXT_RE_MAX_CQ_COUNT;
  824. for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
  825. rdev->qplib_ctx.tqm_count[i] =
  826. rdev->dev_attr.tqm_alloc_reqs[i];
  827. }
  828. /* worker thread for polling periodic events. Now used for QoS programming*/
  829. static void bnxt_re_worker(struct work_struct *work)
  830. {
  831. struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
  832. worker.work);
  833. bnxt_re_setup_qos(rdev);
  834. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  835. }
  836. static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
  837. {
  838. int i, j, rc;
  839. /* Registered a new RoCE device instance to netdev */
  840. rc = bnxt_re_register_netdev(rdev);
  841. if (rc) {
  842. pr_err("Failed to register with netedev: %#x\n", rc);
  843. return -EINVAL;
  844. }
  845. set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
  846. rc = bnxt_re_request_msix(rdev);
  847. if (rc) {
  848. pr_err("Failed to get MSI-X vectors: %#x\n", rc);
  849. rc = -EINVAL;
  850. goto fail;
  851. }
  852. set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
  853. /* Establish RCFW Communication Channel to initialize the context
  854. * memory for the function and all child VFs
  855. */
  856. rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw);
  857. if (rc)
  858. goto fail;
  859. rc = bnxt_re_net_ring_alloc
  860. (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr,
  861. rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count,
  862. HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1,
  863. rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx,
  864. &rdev->rcfw.creq_ring_id);
  865. if (rc) {
  866. pr_err("Failed to allocate CREQ: %#x\n", rc);
  867. goto free_rcfw;
  868. }
  869. rc = bnxt_qplib_enable_rcfw_channel
  870. (rdev->en_dev->pdev, &rdev->rcfw,
  871. rdev->msix_entries[BNXT_RE_AEQ_IDX].vector,
  872. rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset,
  873. 0, &bnxt_re_aeq_handler);
  874. if (rc) {
  875. pr_err("Failed to enable RCFW channel: %#x\n", rc);
  876. goto free_ring;
  877. }
  878. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr);
  879. if (rc)
  880. goto disable_rcfw;
  881. bnxt_re_set_resource_limits(rdev);
  882. rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0);
  883. if (rc) {
  884. pr_err("Failed to allocate QPLIB context: %#x\n", rc);
  885. goto disable_rcfw;
  886. }
  887. rc = bnxt_re_net_stats_ctx_alloc(rdev,
  888. rdev->qplib_ctx.stats.dma_map,
  889. &rdev->qplib_ctx.stats.fw_id);
  890. if (rc) {
  891. pr_err("Failed to allocate stats context: %#x\n", rc);
  892. goto free_ctx;
  893. }
  894. rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 0);
  895. if (rc) {
  896. pr_err("Failed to initialize RCFW: %#x\n", rc);
  897. goto free_sctx;
  898. }
  899. set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
  900. /* Resources based on the 'new' device caps */
  901. rc = bnxt_re_alloc_res(rdev);
  902. if (rc) {
  903. pr_err("Failed to allocate resources: %#x\n", rc);
  904. goto fail;
  905. }
  906. rc = bnxt_re_init_res(rdev);
  907. if (rc) {
  908. pr_err("Failed to initialize resources: %#x\n", rc);
  909. goto fail;
  910. }
  911. rc = bnxt_re_setup_qos(rdev);
  912. if (rc)
  913. pr_info("RoCE priority not yet configured\n");
  914. INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
  915. set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
  916. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  917. /* Register ib dev */
  918. rc = bnxt_re_register_ib(rdev);
  919. if (rc) {
  920. pr_err("Failed to register with IB: %#x\n", rc);
  921. goto fail;
  922. }
  923. dev_info(rdev_to_dev(rdev), "Device registered successfully");
  924. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) {
  925. rc = device_create_file(&rdev->ibdev.dev,
  926. bnxt_re_attributes[i]);
  927. if (rc) {
  928. dev_err(rdev_to_dev(rdev),
  929. "Failed to create IB sysfs: %#x", rc);
  930. /* Must clean up all created device files */
  931. for (j = 0; j < i; j++)
  932. device_remove_file(&rdev->ibdev.dev,
  933. bnxt_re_attributes[j]);
  934. bnxt_re_unregister_ib(rdev);
  935. goto fail;
  936. }
  937. }
  938. set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
  939. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE);
  940. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE);
  941. return 0;
  942. free_sctx:
  943. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, true);
  944. free_ctx:
  945. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  946. disable_rcfw:
  947. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  948. free_ring:
  949. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, true);
  950. free_rcfw:
  951. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  952. fail:
  953. bnxt_re_ib_unreg(rdev, true);
  954. return rc;
  955. }
  956. static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
  957. {
  958. struct bnxt_en_dev *en_dev = rdev->en_dev;
  959. struct net_device *netdev = rdev->netdev;
  960. bnxt_re_dev_remove(rdev);
  961. if (netdev)
  962. bnxt_re_dev_unprobe(netdev, en_dev);
  963. }
  964. static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
  965. {
  966. struct bnxt_en_dev *en_dev;
  967. int rc = 0;
  968. if (!is_bnxt_re_dev(netdev))
  969. return -ENODEV;
  970. en_dev = bnxt_re_dev_probe(netdev);
  971. if (IS_ERR(en_dev)) {
  972. if (en_dev != ERR_PTR(-ENODEV))
  973. pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME);
  974. rc = PTR_ERR(en_dev);
  975. goto exit;
  976. }
  977. *rdev = bnxt_re_dev_add(netdev, en_dev);
  978. if (!*rdev) {
  979. rc = -ENOMEM;
  980. bnxt_re_dev_unprobe(netdev, en_dev);
  981. goto exit;
  982. }
  983. exit:
  984. return rc;
  985. }
  986. static void bnxt_re_remove_one(struct bnxt_re_dev *rdev)
  987. {
  988. pci_dev_put(rdev->en_dev->pdev);
  989. }
  990. /* Handle all deferred netevents tasks */
  991. static void bnxt_re_task(struct work_struct *work)
  992. {
  993. struct bnxt_re_work *re_work;
  994. struct bnxt_re_dev *rdev;
  995. int rc = 0;
  996. re_work = container_of(work, struct bnxt_re_work, work);
  997. rdev = re_work->rdev;
  998. if (re_work->event != NETDEV_REGISTER &&
  999. !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  1000. return;
  1001. switch (re_work->event) {
  1002. case NETDEV_REGISTER:
  1003. rc = bnxt_re_ib_reg(rdev);
  1004. if (rc)
  1005. dev_err(rdev_to_dev(rdev),
  1006. "Failed to register with IB: %#x", rc);
  1007. break;
  1008. case NETDEV_UP:
  1009. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1010. IB_EVENT_PORT_ACTIVE);
  1011. break;
  1012. case NETDEV_DOWN:
  1013. bnxt_re_dev_stop(rdev);
  1014. break;
  1015. case NETDEV_CHANGE:
  1016. if (!netif_carrier_ok(rdev->netdev))
  1017. bnxt_re_dev_stop(rdev);
  1018. else if (netif_carrier_ok(rdev->netdev))
  1019. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1020. IB_EVENT_PORT_ACTIVE);
  1021. break;
  1022. default:
  1023. break;
  1024. }
  1025. kfree(re_work);
  1026. }
  1027. static void bnxt_re_init_one(struct bnxt_re_dev *rdev)
  1028. {
  1029. pci_dev_get(rdev->en_dev->pdev);
  1030. }
  1031. /*
  1032. * "Notifier chain callback can be invoked for the same chain from
  1033. * different CPUs at the same time".
  1034. *
  1035. * For cases when the netdev is already present, our call to the
  1036. * register_netdevice_notifier() will actually get the rtnl_lock()
  1037. * before sending NETDEV_REGISTER and (if up) NETDEV_UP
  1038. * events.
  1039. *
  1040. * But for cases when the netdev is not already present, the notifier
  1041. * chain is subjected to be invoked from different CPUs simultaneously.
  1042. *
  1043. * This is protected by the netdev_mutex.
  1044. */
  1045. static int bnxt_re_netdev_event(struct notifier_block *notifier,
  1046. unsigned long event, void *ptr)
  1047. {
  1048. struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
  1049. struct bnxt_re_work *re_work;
  1050. struct bnxt_re_dev *rdev;
  1051. int rc = 0;
  1052. bool sch_work = false;
  1053. real_dev = rdma_vlan_dev_real_dev(netdev);
  1054. if (!real_dev)
  1055. real_dev = netdev;
  1056. rdev = bnxt_re_from_netdev(real_dev);
  1057. if (!rdev && event != NETDEV_REGISTER)
  1058. goto exit;
  1059. if (real_dev != netdev)
  1060. goto exit;
  1061. switch (event) {
  1062. case NETDEV_REGISTER:
  1063. if (rdev)
  1064. break;
  1065. rc = bnxt_re_dev_reg(&rdev, real_dev);
  1066. if (rc == -ENODEV)
  1067. break;
  1068. if (rc) {
  1069. pr_err("Failed to register with the device %s: %#x\n",
  1070. real_dev->name, rc);
  1071. break;
  1072. }
  1073. bnxt_re_init_one(rdev);
  1074. sch_work = true;
  1075. break;
  1076. case NETDEV_UNREGISTER:
  1077. bnxt_re_ib_unreg(rdev, false);
  1078. bnxt_re_remove_one(rdev);
  1079. bnxt_re_dev_unreg(rdev);
  1080. break;
  1081. default:
  1082. sch_work = true;
  1083. break;
  1084. }
  1085. if (sch_work) {
  1086. /* Allocate for the deferred task */
  1087. re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
  1088. if (re_work) {
  1089. re_work->rdev = rdev;
  1090. re_work->event = event;
  1091. re_work->vlan_dev = (real_dev == netdev ?
  1092. NULL : netdev);
  1093. INIT_WORK(&re_work->work, bnxt_re_task);
  1094. queue_work(bnxt_re_wq, &re_work->work);
  1095. }
  1096. }
  1097. exit:
  1098. return NOTIFY_DONE;
  1099. }
  1100. static struct notifier_block bnxt_re_netdev_notifier = {
  1101. .notifier_call = bnxt_re_netdev_event
  1102. };
  1103. static int __init bnxt_re_mod_init(void)
  1104. {
  1105. int rc = 0;
  1106. pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
  1107. bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
  1108. if (!bnxt_re_wq)
  1109. return -ENOMEM;
  1110. INIT_LIST_HEAD(&bnxt_re_dev_list);
  1111. rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
  1112. if (rc) {
  1113. pr_err("%s: Cannot register to netdevice_notifier",
  1114. ROCE_DRV_MODULE_NAME);
  1115. goto err_netdev;
  1116. }
  1117. return 0;
  1118. err_netdev:
  1119. destroy_workqueue(bnxt_re_wq);
  1120. return rc;
  1121. }
  1122. static void __exit bnxt_re_mod_exit(void)
  1123. {
  1124. unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
  1125. if (bnxt_re_wq)
  1126. destroy_workqueue(bnxt_re_wq);
  1127. }
  1128. module_init(bnxt_re_mod_init);
  1129. module_exit(bnxt_re_mod_exit);