i2c-designware-platdrv.c 11 KB

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  1. /*
  2. * Synopsys DesignWare I2C adapter driver (master only).
  3. *
  4. * Based on the TI DAVINCI I2C adapter driver.
  5. *
  6. * Copyright (C) 2006 Texas Instruments.
  7. * Copyright (C) 2007 MontaVista Software Inc.
  8. * Copyright (C) 2009 Provigent Ltd.
  9. *
  10. * ----------------------------------------------------------------------------
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. * ----------------------------------------------------------------------------
  22. *
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/delay.h>
  27. #include <linux/dmi.h>
  28. #include <linux/i2c.h>
  29. #include <linux/clk.h>
  30. #include <linux/clk-provider.h>
  31. #include <linux/errno.h>
  32. #include <linux/sched.h>
  33. #include <linux/err.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/of.h>
  36. #include <linux/platform_device.h>
  37. #include <linux/pm.h>
  38. #include <linux/pm_runtime.h>
  39. #include <linux/property.h>
  40. #include <linux/io.h>
  41. #include <linux/reset.h>
  42. #include <linux/slab.h>
  43. #include <linux/acpi.h>
  44. #include <linux/platform_data/i2c-designware.h>
  45. #include "i2c-designware-core.h"
  46. static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
  47. {
  48. return clk_get_rate(dev->clk)/1000;
  49. }
  50. #ifdef CONFIG_ACPI
  51. /*
  52. * The HCNT/LCNT information coming from ACPI should be the most accurate
  53. * for given platform. However, some systems get it wrong. On such systems
  54. * we get better results by calculating those based on the input clock.
  55. */
  56. static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
  57. {
  58. .ident = "Dell Inspiron 7348",
  59. .matches = {
  60. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  61. DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
  62. },
  63. },
  64. { }
  65. };
  66. static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
  67. u16 *hcnt, u16 *lcnt, u32 *sda_hold)
  68. {
  69. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
  70. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  71. union acpi_object *obj;
  72. if (dmi_check_system(dw_i2c_no_acpi_params))
  73. return;
  74. if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
  75. return;
  76. obj = (union acpi_object *)buf.pointer;
  77. if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
  78. const union acpi_object *objs = obj->package.elements;
  79. *hcnt = (u16)objs[0].integer.value;
  80. *lcnt = (u16)objs[1].integer.value;
  81. *sda_hold = (u32)objs[2].integer.value;
  82. }
  83. kfree(buf.pointer);
  84. }
  85. static int dw_i2c_acpi_configure(struct platform_device *pdev)
  86. {
  87. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  88. u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
  89. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  90. const struct acpi_device_id *id;
  91. struct acpi_device *adev;
  92. const char *uid;
  93. dev->adapter.nr = -1;
  94. dev->tx_fifo_depth = 32;
  95. dev->rx_fifo_depth = 32;
  96. /*
  97. * Try to get SDA hold time and *CNT values from an ACPI method for
  98. * selected speed modes.
  99. */
  100. dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
  101. dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
  102. dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
  103. dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
  104. switch (dev->clk_freq) {
  105. case 100000:
  106. dev->sda_hold_time = ss_ht;
  107. break;
  108. case 1000000:
  109. dev->sda_hold_time = fp_ht;
  110. break;
  111. case 3400000:
  112. dev->sda_hold_time = hs_ht;
  113. break;
  114. case 400000:
  115. default:
  116. dev->sda_hold_time = fs_ht;
  117. break;
  118. }
  119. id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
  120. if (id && id->driver_data)
  121. dev->flags |= (u32)id->driver_data;
  122. if (acpi_bus_get_device(handle, &adev))
  123. return -ENODEV;
  124. /*
  125. * Cherrytrail I2C7 gets used for the PMIC which gets accessed
  126. * through ACPI opregions during late suspend / early resume
  127. * disable pm for it.
  128. */
  129. uid = adev->pnp.unique_id;
  130. if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
  131. dev->pm_disabled = true;
  132. return 0;
  133. }
  134. static const struct acpi_device_id dw_i2c_acpi_match[] = {
  135. { "INT33C2", 0 },
  136. { "INT33C3", 0 },
  137. { "INT3432", 0 },
  138. { "INT3433", 0 },
  139. { "80860F41", 0 },
  140. { "808622C1", MODEL_CHERRYTRAIL },
  141. { "AMD0010", ACCESS_INTR_MASK },
  142. { "AMDI0010", ACCESS_INTR_MASK },
  143. { "AMDI0510", 0 },
  144. { "APMC0D0F", 0 },
  145. { "HISI02A1", 0 },
  146. { "HISI02A2", 0 },
  147. { }
  148. };
  149. MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
  150. #else
  151. static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
  152. {
  153. return -ENODEV;
  154. }
  155. #endif
  156. static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
  157. {
  158. if (IS_ERR(i_dev->clk))
  159. return PTR_ERR(i_dev->clk);
  160. if (prepare)
  161. return clk_prepare_enable(i_dev->clk);
  162. clk_disable_unprepare(i_dev->clk);
  163. return 0;
  164. }
  165. static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
  166. {
  167. u32 param, tx_fifo_depth, rx_fifo_depth;
  168. /*
  169. * Try to detect the FIFO depth if not set by interface driver,
  170. * the depth could be from 2 to 256 from HW spec.
  171. */
  172. param = i2c_dw_read_comp_param(dev);
  173. tx_fifo_depth = ((param >> 16) & 0xff) + 1;
  174. rx_fifo_depth = ((param >> 8) & 0xff) + 1;
  175. if (!dev->tx_fifo_depth) {
  176. dev->tx_fifo_depth = tx_fifo_depth;
  177. dev->rx_fifo_depth = rx_fifo_depth;
  178. dev->adapter.nr = id;
  179. } else if (tx_fifo_depth >= 2) {
  180. dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
  181. tx_fifo_depth);
  182. dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
  183. rx_fifo_depth);
  184. }
  185. }
  186. static int dw_i2c_plat_probe(struct platform_device *pdev)
  187. {
  188. struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
  189. struct dw_i2c_dev *dev;
  190. struct i2c_adapter *adap;
  191. struct resource *mem;
  192. int irq, r;
  193. u32 acpi_speed, ht = 0;
  194. irq = platform_get_irq(pdev, 0);
  195. if (irq < 0)
  196. return irq;
  197. dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
  198. if (!dev)
  199. return -ENOMEM;
  200. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  201. dev->base = devm_ioremap_resource(&pdev->dev, mem);
  202. if (IS_ERR(dev->base))
  203. return PTR_ERR(dev->base);
  204. dev->dev = &pdev->dev;
  205. dev->irq = irq;
  206. platform_set_drvdata(pdev, dev);
  207. dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
  208. if (IS_ERR(dev->rst)) {
  209. if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
  210. return -EPROBE_DEFER;
  211. } else {
  212. reset_control_deassert(dev->rst);
  213. }
  214. if (pdata) {
  215. dev->clk_freq = pdata->i2c_scl_freq;
  216. } else {
  217. device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
  218. &ht);
  219. device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
  220. &dev->sda_falling_time);
  221. device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
  222. &dev->scl_falling_time);
  223. device_property_read_u32(&pdev->dev, "clock-frequency",
  224. &dev->clk_freq);
  225. }
  226. acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
  227. /*
  228. * Find bus speed from the "clock-frequency" device property, ACPI
  229. * or by using fast mode if neither is set.
  230. */
  231. if (acpi_speed && dev->clk_freq)
  232. dev->clk_freq = min(dev->clk_freq, acpi_speed);
  233. else if (acpi_speed || dev->clk_freq)
  234. dev->clk_freq = max(dev->clk_freq, acpi_speed);
  235. else
  236. dev->clk_freq = 400000;
  237. if (has_acpi_companion(&pdev->dev))
  238. dw_i2c_acpi_configure(pdev);
  239. /*
  240. * Only standard mode at 100kHz, fast mode at 400kHz,
  241. * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
  242. */
  243. if (dev->clk_freq != 100000 && dev->clk_freq != 400000
  244. && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
  245. dev_err(&pdev->dev,
  246. "Only 100kHz, 400kHz, 1MHz and 3.4MHz supported");
  247. r = -EINVAL;
  248. goto exit_reset;
  249. }
  250. r = i2c_dw_probe_lock_support(dev);
  251. if (r)
  252. goto exit_reset;
  253. dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
  254. dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
  255. DW_IC_CON_RESTART_EN;
  256. switch (dev->clk_freq) {
  257. case 100000:
  258. dev->master_cfg |= DW_IC_CON_SPEED_STD;
  259. break;
  260. case 3400000:
  261. dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
  262. break;
  263. default:
  264. dev->master_cfg |= DW_IC_CON_SPEED_FAST;
  265. }
  266. dev->clk = devm_clk_get(&pdev->dev, NULL);
  267. if (!i2c_dw_plat_prepare_clk(dev, true)) {
  268. dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
  269. if (!dev->sda_hold_time && ht)
  270. dev->sda_hold_time = div_u64(
  271. (u64)dev->get_clk_rate_khz(dev) * ht + 500000,
  272. 1000000);
  273. }
  274. dw_i2c_set_fifo_size(dev, pdev->id);
  275. adap = &dev->adapter;
  276. adap->owner = THIS_MODULE;
  277. adap->class = I2C_CLASS_DEPRECATED;
  278. ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
  279. adap->dev.of_node = pdev->dev.of_node;
  280. if (dev->pm_disabled) {
  281. pm_runtime_forbid(&pdev->dev);
  282. } else {
  283. pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
  284. pm_runtime_use_autosuspend(&pdev->dev);
  285. pm_runtime_set_active(&pdev->dev);
  286. pm_runtime_enable(&pdev->dev);
  287. }
  288. r = i2c_dw_probe(dev);
  289. if (r)
  290. goto exit_probe;
  291. return r;
  292. exit_probe:
  293. if (!dev->pm_disabled)
  294. pm_runtime_disable(&pdev->dev);
  295. exit_reset:
  296. if (!IS_ERR_OR_NULL(dev->rst))
  297. reset_control_assert(dev->rst);
  298. return r;
  299. }
  300. static int dw_i2c_plat_remove(struct platform_device *pdev)
  301. {
  302. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  303. pm_runtime_get_sync(&pdev->dev);
  304. i2c_del_adapter(&dev->adapter);
  305. i2c_dw_disable(dev);
  306. pm_runtime_dont_use_autosuspend(&pdev->dev);
  307. pm_runtime_put_sync(&pdev->dev);
  308. if (!dev->pm_disabled)
  309. pm_runtime_disable(&pdev->dev);
  310. if (!IS_ERR_OR_NULL(dev->rst))
  311. reset_control_assert(dev->rst);
  312. i2c_dw_remove_lock_support(dev);
  313. return 0;
  314. }
  315. #ifdef CONFIG_OF
  316. static const struct of_device_id dw_i2c_of_match[] = {
  317. { .compatible = "snps,designware-i2c", },
  318. {},
  319. };
  320. MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
  321. #endif
  322. #ifdef CONFIG_PM_SLEEP
  323. static int dw_i2c_plat_prepare(struct device *dev)
  324. {
  325. return pm_runtime_suspended(dev);
  326. }
  327. static void dw_i2c_plat_complete(struct device *dev)
  328. {
  329. if (dev->power.direct_complete)
  330. pm_request_resume(dev);
  331. }
  332. #else
  333. #define dw_i2c_plat_prepare NULL
  334. #define dw_i2c_plat_complete NULL
  335. #endif
  336. #ifdef CONFIG_PM
  337. static int dw_i2c_plat_suspend(struct device *dev)
  338. {
  339. struct platform_device *pdev = to_platform_device(dev);
  340. struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
  341. i2c_dw_disable(i_dev);
  342. i2c_dw_plat_prepare_clk(i_dev, false);
  343. return 0;
  344. }
  345. static int dw_i2c_plat_resume(struct device *dev)
  346. {
  347. struct platform_device *pdev = to_platform_device(dev);
  348. struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
  349. i2c_dw_plat_prepare_clk(i_dev, true);
  350. i2c_dw_init(i_dev);
  351. return 0;
  352. }
  353. static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
  354. .prepare = dw_i2c_plat_prepare,
  355. .complete = dw_i2c_plat_complete,
  356. SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
  357. SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
  358. };
  359. #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
  360. #else
  361. #define DW_I2C_DEV_PMOPS NULL
  362. #endif
  363. /* work with hotplug and coldplug */
  364. MODULE_ALIAS("platform:i2c_designware");
  365. static struct platform_driver dw_i2c_driver = {
  366. .probe = dw_i2c_plat_probe,
  367. .remove = dw_i2c_plat_remove,
  368. .driver = {
  369. .name = "i2c_designware",
  370. .of_match_table = of_match_ptr(dw_i2c_of_match),
  371. .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
  372. .pm = DW_I2C_DEV_PMOPS,
  373. },
  374. };
  375. static int __init dw_i2c_init_driver(void)
  376. {
  377. return platform_driver_register(&dw_i2c_driver);
  378. }
  379. subsys_initcall(dw_i2c_init_driver);
  380. static void __exit dw_i2c_exit_driver(void)
  381. {
  382. platform_driver_unregister(&dw_i2c_driver);
  383. }
  384. module_exit(dw_i2c_exit_driver);
  385. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  386. MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
  387. MODULE_LICENSE("GPL");