sun4i_tv.c 19 KB

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  1. /*
  2. * Copyright (C) 2015 Free Electrons
  3. * Copyright (C) 2015 NextThing Co
  4. *
  5. * Maxime Ripard <maxime.ripard@free-electrons.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/component.h>
  14. #include <linux/of_address.h>
  15. #include <linux/regmap.h>
  16. #include <linux/reset.h>
  17. #include <drm/drmP.h>
  18. #include <drm/drm_atomic_helper.h>
  19. #include <drm/drm_crtc_helper.h>
  20. #include <drm/drm_of.h>
  21. #include <drm/drm_panel.h>
  22. #include "sun4i_backend.h"
  23. #include "sun4i_crtc.h"
  24. #include "sun4i_drv.h"
  25. #include "sun4i_tcon.h"
  26. #define SUN4I_TVE_EN_REG 0x000
  27. #define SUN4I_TVE_EN_DAC_MAP_MASK GENMASK(19, 4)
  28. #define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4)
  29. #define SUN4I_TVE_EN_ENABLE BIT(0)
  30. #define SUN4I_TVE_CFG0_REG 0x004
  31. #define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26)
  32. #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M BIT(25)
  33. #define SUN4I_TVE_CFG0_CORE_CONTROL_54M BIT(24)
  34. #define SUN4I_TVE_CFG0_YC_EN BIT(17)
  35. #define SUN4I_TVE_CFG0_COMP_EN BIT(16)
  36. #define SUN4I_TVE_CFG0_RES(x) ((x) & 0xf)
  37. #define SUN4I_TVE_CFG0_RES_480i SUN4I_TVE_CFG0_RES(0)
  38. #define SUN4I_TVE_CFG0_RES_576i SUN4I_TVE_CFG0_RES(1)
  39. #define SUN4I_TVE_DAC0_REG 0x008
  40. #define SUN4I_TVE_DAC0_CLOCK_INVERT BIT(24)
  41. #define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20)
  42. #define SUN4I_TVE_DAC0_LUMA_0_4 SUN4I_TVE_DAC0_LUMA(3)
  43. #define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18)
  44. #define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3)
  45. #define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16)
  46. #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS SUN4I_TVE_DAC0_INTERNAL_DAC(3)
  47. #define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac)
  48. #define SUN4I_TVE_NOTCH_REG 0x00c
  49. #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3))
  50. #define SUN4I_TVE_CHROMA_FREQ_REG 0x010
  51. #define SUN4I_TVE_PORCH_REG 0x014
  52. #define SUN4I_TVE_PORCH_BACK(x) ((x) << 16)
  53. #define SUN4I_TVE_PORCH_FRONT(x) (x)
  54. #define SUN4I_TVE_LINE_REG 0x01c
  55. #define SUN4I_TVE_LINE_FIRST(x) ((x) << 16)
  56. #define SUN4I_TVE_LINE_NUMBER(x) (x)
  57. #define SUN4I_TVE_LEVEL_REG 0x020
  58. #define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16)
  59. #define SUN4I_TVE_LEVEL_BLACK(x) (x)
  60. #define SUN4I_TVE_DAC1_REG 0x024
  61. #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8))
  62. #define SUN4I_TVE_DETECT_STA_REG 0x038
  63. #define SUN4I_TVE_DETECT_STA_DAC(dac) BIT((dac * 8))
  64. #define SUN4I_TVE_DETECT_STA_UNCONNECTED 0
  65. #define SUN4I_TVE_DETECT_STA_CONNECTED 1
  66. #define SUN4I_TVE_DETECT_STA_GROUND 2
  67. #define SUN4I_TVE_CB_CR_LVL_REG 0x10c
  68. #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x) ((x) << 8)
  69. #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x) (x)
  70. #define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110
  71. #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x)
  72. #define SUN4I_TVE_BURST_WIDTH_REG 0x114
  73. #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16)
  74. #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8)
  75. #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x)
  76. #define SUN4I_TVE_CB_CR_GAIN_REG 0x118
  77. #define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8)
  78. #define SUN4I_TVE_CB_CR_GAIN_CB(x) (x)
  79. #define SUN4I_TVE_SYNC_VBI_REG 0x11c
  80. #define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16)
  81. #define SUN4I_TVE_SYNC_VBI_VBLANK(x) (x)
  82. #define SUN4I_TVE_ACTIVE_LINE_REG 0x124
  83. #define SUN4I_TVE_ACTIVE_LINE(x) (x)
  84. #define SUN4I_TVE_CHROMA_REG 0x128
  85. #define SUN4I_TVE_CHROMA_COMP_GAIN(x) ((x) & 3)
  86. #define SUN4I_TVE_CHROMA_COMP_GAIN_50 SUN4I_TVE_CHROMA_COMP_GAIN(2)
  87. #define SUN4I_TVE_12C_REG 0x12c
  88. #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE BIT(8)
  89. #define SUN4I_TVE_12C_COMP_YUV_EN BIT(0)
  90. #define SUN4I_TVE_RESYNC_REG 0x130
  91. #define SUN4I_TVE_RESYNC_FIELD BIT(31)
  92. #define SUN4I_TVE_RESYNC_LINE(x) ((x) << 16)
  93. #define SUN4I_TVE_RESYNC_PIXEL(x) (x)
  94. #define SUN4I_TVE_SLAVE_REG 0x134
  95. #define SUN4I_TVE_WSS_DATA2_REG 0x244
  96. struct color_gains {
  97. u16 cb;
  98. u16 cr;
  99. };
  100. struct burst_levels {
  101. u16 cb;
  102. u16 cr;
  103. };
  104. struct video_levels {
  105. u16 black;
  106. u16 blank;
  107. };
  108. struct resync_parameters {
  109. bool field;
  110. u16 line;
  111. u16 pixel;
  112. };
  113. struct tv_mode {
  114. char *name;
  115. u32 mode;
  116. u32 chroma_freq;
  117. u16 back_porch;
  118. u16 front_porch;
  119. u16 line_number;
  120. u16 vblank_level;
  121. u32 hdisplay;
  122. u16 hfront_porch;
  123. u16 hsync_len;
  124. u16 hback_porch;
  125. u32 vdisplay;
  126. u16 vfront_porch;
  127. u16 vsync_len;
  128. u16 vback_porch;
  129. bool yc_en;
  130. bool dac3_en;
  131. bool dac_bit25_en;
  132. const struct color_gains *color_gains;
  133. const struct burst_levels *burst_levels;
  134. const struct video_levels *video_levels;
  135. const struct resync_parameters *resync_params;
  136. };
  137. struct sun4i_tv {
  138. struct drm_connector connector;
  139. struct drm_encoder encoder;
  140. struct clk *clk;
  141. struct regmap *regs;
  142. struct reset_control *reset;
  143. struct sun4i_drv *drv;
  144. };
  145. static const struct video_levels ntsc_video_levels = {
  146. .black = 282, .blank = 240,
  147. };
  148. static const struct video_levels pal_video_levels = {
  149. .black = 252, .blank = 252,
  150. };
  151. static const struct burst_levels ntsc_burst_levels = {
  152. .cb = 79, .cr = 0,
  153. };
  154. static const struct burst_levels pal_burst_levels = {
  155. .cb = 40, .cr = 40,
  156. };
  157. static const struct color_gains ntsc_color_gains = {
  158. .cb = 160, .cr = 160,
  159. };
  160. static const struct color_gains pal_color_gains = {
  161. .cb = 224, .cr = 224,
  162. };
  163. static const struct resync_parameters ntsc_resync_parameters = {
  164. .field = false, .line = 14, .pixel = 12,
  165. };
  166. static const struct resync_parameters pal_resync_parameters = {
  167. .field = true, .line = 13, .pixel = 12,
  168. };
  169. static const struct tv_mode tv_modes[] = {
  170. {
  171. .name = "NTSC",
  172. .mode = SUN4I_TVE_CFG0_RES_480i,
  173. .chroma_freq = 0x21f07c1f,
  174. .yc_en = true,
  175. .dac3_en = true,
  176. .dac_bit25_en = true,
  177. .back_porch = 118,
  178. .front_porch = 32,
  179. .line_number = 525,
  180. .hdisplay = 720,
  181. .hfront_porch = 18,
  182. .hsync_len = 2,
  183. .hback_porch = 118,
  184. .vdisplay = 480,
  185. .vfront_porch = 26,
  186. .vsync_len = 2,
  187. .vback_porch = 17,
  188. .vblank_level = 240,
  189. .color_gains = &ntsc_color_gains,
  190. .burst_levels = &ntsc_burst_levels,
  191. .video_levels = &ntsc_video_levels,
  192. .resync_params = &ntsc_resync_parameters,
  193. },
  194. {
  195. .name = "PAL",
  196. .mode = SUN4I_TVE_CFG0_RES_576i,
  197. .chroma_freq = 0x2a098acb,
  198. .back_porch = 138,
  199. .front_porch = 24,
  200. .line_number = 625,
  201. .hdisplay = 720,
  202. .hfront_porch = 3,
  203. .hsync_len = 2,
  204. .hback_porch = 139,
  205. .vdisplay = 576,
  206. .vfront_porch = 28,
  207. .vsync_len = 2,
  208. .vback_porch = 19,
  209. .vblank_level = 252,
  210. .color_gains = &pal_color_gains,
  211. .burst_levels = &pal_burst_levels,
  212. .video_levels = &pal_video_levels,
  213. .resync_params = &pal_resync_parameters,
  214. },
  215. };
  216. static inline struct sun4i_tv *
  217. drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
  218. {
  219. return container_of(encoder, struct sun4i_tv,
  220. encoder);
  221. }
  222. static inline struct sun4i_tv *
  223. drm_connector_to_sun4i_tv(struct drm_connector *connector)
  224. {
  225. return container_of(connector, struct sun4i_tv,
  226. connector);
  227. }
  228. /*
  229. * FIXME: If only the drm_display_mode private field was usable, this
  230. * could go away...
  231. *
  232. * So far, it doesn't seem to be preserved when the mode is passed by
  233. * to mode_set for some reason.
  234. */
  235. static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_mode *mode)
  236. {
  237. int i;
  238. /* First try to identify the mode by name */
  239. for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
  240. const struct tv_mode *tv_mode = &tv_modes[i];
  241. DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
  242. mode->name, tv_mode->name);
  243. if (!strcmp(mode->name, tv_mode->name))
  244. return tv_mode;
  245. }
  246. /* Then by number of lines */
  247. for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
  248. const struct tv_mode *tv_mode = &tv_modes[i];
  249. DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
  250. mode->name, tv_mode->name,
  251. mode->vdisplay, tv_mode->vdisplay);
  252. if (mode->vdisplay == tv_mode->vdisplay)
  253. return tv_mode;
  254. }
  255. return NULL;
  256. }
  257. static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode,
  258. struct drm_display_mode *mode)
  259. {
  260. DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
  261. mode->type = DRM_MODE_TYPE_DRIVER;
  262. mode->clock = 13500;
  263. mode->flags = DRM_MODE_FLAG_INTERLACE;
  264. mode->hdisplay = tv_mode->hdisplay;
  265. mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch;
  266. mode->hsync_end = mode->hsync_start + tv_mode->hsync_len;
  267. mode->htotal = mode->hsync_end + tv_mode->hback_porch;
  268. mode->vdisplay = tv_mode->vdisplay;
  269. mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch;
  270. mode->vsync_end = mode->vsync_start + tv_mode->vsync_len;
  271. mode->vtotal = mode->vsync_end + tv_mode->vback_porch;
  272. }
  273. static int sun4i_tv_atomic_check(struct drm_encoder *encoder,
  274. struct drm_crtc_state *crtc_state,
  275. struct drm_connector_state *conn_state)
  276. {
  277. return 0;
  278. }
  279. static void sun4i_tv_disable(struct drm_encoder *encoder)
  280. {
  281. struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
  282. struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
  283. struct sun4i_tcon *tcon = crtc->tcon;
  284. struct sun4i_backend *backend = crtc->backend;
  285. DRM_DEBUG_DRIVER("Disabling the TV Output\n");
  286. sun4i_tcon_channel_disable(tcon, 1);
  287. regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
  288. SUN4I_TVE_EN_ENABLE,
  289. 0);
  290. sun4i_backend_disable_color_correction(backend);
  291. }
  292. static void sun4i_tv_enable(struct drm_encoder *encoder)
  293. {
  294. struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
  295. struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
  296. struct sun4i_tcon *tcon = crtc->tcon;
  297. struct sun4i_backend *backend = crtc->backend;
  298. DRM_DEBUG_DRIVER("Enabling the TV Output\n");
  299. sun4i_backend_apply_color_correction(backend);
  300. regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
  301. SUN4I_TVE_EN_ENABLE,
  302. SUN4I_TVE_EN_ENABLE);
  303. sun4i_tcon_channel_enable(tcon, 1);
  304. }
  305. static void sun4i_tv_mode_set(struct drm_encoder *encoder,
  306. struct drm_display_mode *mode,
  307. struct drm_display_mode *adjusted_mode)
  308. {
  309. struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
  310. struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
  311. struct sun4i_tcon *tcon = crtc->tcon;
  312. const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode);
  313. sun4i_tcon1_mode_set(tcon, mode);
  314. /* Enable and map the DAC to the output */
  315. regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
  316. SUN4I_TVE_EN_DAC_MAP_MASK,
  317. SUN4I_TVE_EN_DAC_MAP(0, 1) |
  318. SUN4I_TVE_EN_DAC_MAP(1, 2) |
  319. SUN4I_TVE_EN_DAC_MAP(2, 3) |
  320. SUN4I_TVE_EN_DAC_MAP(3, 4));
  321. /* Set PAL settings */
  322. regmap_write(tv->regs, SUN4I_TVE_CFG0_REG,
  323. tv_mode->mode |
  324. (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) |
  325. SUN4I_TVE_CFG0_COMP_EN |
  326. SUN4I_TVE_CFG0_DAC_CONTROL_54M |
  327. SUN4I_TVE_CFG0_CORE_DATAPATH_54M |
  328. SUN4I_TVE_CFG0_CORE_CONTROL_54M);
  329. /* Configure the DAC for a composite output */
  330. regmap_write(tv->regs, SUN4I_TVE_DAC0_REG,
  331. SUN4I_TVE_DAC0_DAC_EN(0) |
  332. (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) |
  333. SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS |
  334. SUN4I_TVE_DAC0_CHROMA_0_75 |
  335. SUN4I_TVE_DAC0_LUMA_0_4 |
  336. SUN4I_TVE_DAC0_CLOCK_INVERT |
  337. (tv_mode->dac_bit25_en ? BIT(25) : 0) |
  338. BIT(30));
  339. /* Configure the sample delay between DAC0 and the other DAC */
  340. regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG,
  341. SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) |
  342. SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0));
  343. regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG,
  344. tv_mode->chroma_freq);
  345. /* Set the front and back porch */
  346. regmap_write(tv->regs, SUN4I_TVE_PORCH_REG,
  347. SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) |
  348. SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch));
  349. /* Set the lines setup */
  350. regmap_write(tv->regs, SUN4I_TVE_LINE_REG,
  351. SUN4I_TVE_LINE_FIRST(22) |
  352. SUN4I_TVE_LINE_NUMBER(tv_mode->line_number));
  353. regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG,
  354. SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) |
  355. SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black));
  356. regmap_write(tv->regs, SUN4I_TVE_DAC1_REG,
  357. SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) |
  358. SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) |
  359. SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) |
  360. SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18));
  361. regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG,
  362. SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) |
  363. SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr));
  364. /* Set burst width for a composite output */
  365. regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG,
  366. SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) |
  367. SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) |
  368. SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22));
  369. regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG,
  370. SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) |
  371. SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr));
  372. regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG,
  373. SUN4I_TVE_SYNC_VBI_SYNC(0x10) |
  374. SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level));
  375. regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG,
  376. SUN4I_TVE_ACTIVE_LINE(1440));
  377. /* Set composite chroma gain to 50 % */
  378. regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG,
  379. SUN4I_TVE_CHROMA_COMP_GAIN_50);
  380. regmap_write(tv->regs, SUN4I_TVE_12C_REG,
  381. SUN4I_TVE_12C_COMP_YUV_EN |
  382. SUN4I_TVE_12C_NOTCH_WIDTH_WIDE);
  383. regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG,
  384. SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) |
  385. SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) |
  386. (tv_mode->resync_params->field ?
  387. SUN4I_TVE_RESYNC_FIELD : 0));
  388. regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0);
  389. clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000);
  390. }
  391. static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {
  392. .atomic_check = sun4i_tv_atomic_check,
  393. .disable = sun4i_tv_disable,
  394. .enable = sun4i_tv_enable,
  395. .mode_set = sun4i_tv_mode_set,
  396. };
  397. static void sun4i_tv_destroy(struct drm_encoder *encoder)
  398. {
  399. drm_encoder_cleanup(encoder);
  400. }
  401. static struct drm_encoder_funcs sun4i_tv_funcs = {
  402. .destroy = sun4i_tv_destroy,
  403. };
  404. static int sun4i_tv_comp_get_modes(struct drm_connector *connector)
  405. {
  406. int i;
  407. for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
  408. struct drm_display_mode *mode;
  409. const struct tv_mode *tv_mode = &tv_modes[i];
  410. mode = drm_mode_create(connector->dev);
  411. if (!mode) {
  412. DRM_ERROR("Failed to create a new display mode\n");
  413. return 0;
  414. }
  415. strcpy(mode->name, tv_mode->name);
  416. sun4i_tv_mode_to_drm_mode(tv_mode, mode);
  417. drm_mode_probed_add(connector, mode);
  418. }
  419. return i;
  420. }
  421. static int sun4i_tv_comp_mode_valid(struct drm_connector *connector,
  422. struct drm_display_mode *mode)
  423. {
  424. /* TODO */
  425. return MODE_OK;
  426. }
  427. static struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = {
  428. .get_modes = sun4i_tv_comp_get_modes,
  429. .mode_valid = sun4i_tv_comp_mode_valid,
  430. };
  431. static void
  432. sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
  433. {
  434. drm_connector_cleanup(connector);
  435. }
  436. static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
  437. .dpms = drm_atomic_helper_connector_dpms,
  438. .fill_modes = drm_helper_probe_single_connector_modes,
  439. .destroy = sun4i_tv_comp_connector_destroy,
  440. .reset = drm_atomic_helper_connector_reset,
  441. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  442. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  443. };
  444. static struct regmap_config sun4i_tv_regmap_config = {
  445. .reg_bits = 32,
  446. .val_bits = 32,
  447. .reg_stride = 4,
  448. .max_register = SUN4I_TVE_WSS_DATA2_REG,
  449. .name = "tv-encoder",
  450. };
  451. static int sun4i_tv_bind(struct device *dev, struct device *master,
  452. void *data)
  453. {
  454. struct platform_device *pdev = to_platform_device(dev);
  455. struct drm_device *drm = data;
  456. struct sun4i_drv *drv = drm->dev_private;
  457. struct sun4i_tv *tv;
  458. struct resource *res;
  459. void __iomem *regs;
  460. int ret;
  461. tv = devm_kzalloc(dev, sizeof(*tv), GFP_KERNEL);
  462. if (!tv)
  463. return -ENOMEM;
  464. tv->drv = drv;
  465. dev_set_drvdata(dev, tv);
  466. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  467. regs = devm_ioremap_resource(dev, res);
  468. if (IS_ERR(regs)) {
  469. dev_err(dev, "Couldn't map the TV encoder registers\n");
  470. return PTR_ERR(regs);
  471. }
  472. tv->regs = devm_regmap_init_mmio(dev, regs,
  473. &sun4i_tv_regmap_config);
  474. if (IS_ERR(tv->regs)) {
  475. dev_err(dev, "Couldn't create the TV encoder regmap\n");
  476. return PTR_ERR(tv->regs);
  477. }
  478. tv->reset = devm_reset_control_get(dev, NULL);
  479. if (IS_ERR(tv->reset)) {
  480. dev_err(dev, "Couldn't get our reset line\n");
  481. return PTR_ERR(tv->reset);
  482. }
  483. ret = reset_control_deassert(tv->reset);
  484. if (ret) {
  485. dev_err(dev, "Couldn't deassert our reset line\n");
  486. return ret;
  487. }
  488. tv->clk = devm_clk_get(dev, NULL);
  489. if (IS_ERR(tv->clk)) {
  490. dev_err(dev, "Couldn't get the TV encoder clock\n");
  491. ret = PTR_ERR(tv->clk);
  492. goto err_assert_reset;
  493. }
  494. clk_prepare_enable(tv->clk);
  495. drm_encoder_helper_add(&tv->encoder,
  496. &sun4i_tv_helper_funcs);
  497. ret = drm_encoder_init(drm,
  498. &tv->encoder,
  499. &sun4i_tv_funcs,
  500. DRM_MODE_ENCODER_TVDAC,
  501. NULL);
  502. if (ret) {
  503. dev_err(dev, "Couldn't initialise the TV encoder\n");
  504. goto err_disable_clk;
  505. }
  506. tv->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm,
  507. dev->of_node);
  508. if (!tv->encoder.possible_crtcs) {
  509. ret = -EPROBE_DEFER;
  510. goto err_disable_clk;
  511. }
  512. drm_connector_helper_add(&tv->connector,
  513. &sun4i_tv_comp_connector_helper_funcs);
  514. ret = drm_connector_init(drm, &tv->connector,
  515. &sun4i_tv_comp_connector_funcs,
  516. DRM_MODE_CONNECTOR_Composite);
  517. if (ret) {
  518. dev_err(dev,
  519. "Couldn't initialise the Composite connector\n");
  520. goto err_cleanup_connector;
  521. }
  522. tv->connector.interlace_allowed = true;
  523. drm_mode_connector_attach_encoder(&tv->connector, &tv->encoder);
  524. return 0;
  525. err_cleanup_connector:
  526. drm_encoder_cleanup(&tv->encoder);
  527. err_disable_clk:
  528. clk_disable_unprepare(tv->clk);
  529. err_assert_reset:
  530. reset_control_assert(tv->reset);
  531. return ret;
  532. }
  533. static void sun4i_tv_unbind(struct device *dev, struct device *master,
  534. void *data)
  535. {
  536. struct sun4i_tv *tv = dev_get_drvdata(dev);
  537. drm_connector_cleanup(&tv->connector);
  538. drm_encoder_cleanup(&tv->encoder);
  539. clk_disable_unprepare(tv->clk);
  540. }
  541. static const struct component_ops sun4i_tv_ops = {
  542. .bind = sun4i_tv_bind,
  543. .unbind = sun4i_tv_unbind,
  544. };
  545. static int sun4i_tv_probe(struct platform_device *pdev)
  546. {
  547. return component_add(&pdev->dev, &sun4i_tv_ops);
  548. }
  549. static int sun4i_tv_remove(struct platform_device *pdev)
  550. {
  551. component_del(&pdev->dev, &sun4i_tv_ops);
  552. return 0;
  553. }
  554. static const struct of_device_id sun4i_tv_of_table[] = {
  555. { .compatible = "allwinner,sun4i-a10-tv-encoder" },
  556. { }
  557. };
  558. MODULE_DEVICE_TABLE(of, sun4i_tv_of_table);
  559. static struct platform_driver sun4i_tv_platform_driver = {
  560. .probe = sun4i_tv_probe,
  561. .remove = sun4i_tv_remove,
  562. .driver = {
  563. .name = "sun4i-tve",
  564. .of_match_table = sun4i_tv_of_table,
  565. },
  566. };
  567. module_platform_driver(sun4i_tv_platform_driver);
  568. MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
  569. MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver");
  570. MODULE_LICENSE("GPL");