msgqueue.h 7.2 KB

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  1. /*
  2. * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #ifndef __NVKM_CORE_FALCON_MSGQUEUE_H
  24. #define __NVKM_CORE_FALCON_MSGQUEUE_H
  25. #include <core/msgqueue.h>
  26. /*
  27. * The struct nvkm_msgqueue (named so for lack of better candidate) manages
  28. * a firmware (typically, NVIDIA signed firmware) running under a given falcon.
  29. *
  30. * Such firmwares expect to receive commands (through one or several command
  31. * queues) and will reply to such command by sending messages (using one
  32. * message queue).
  33. *
  34. * Each firmware can support one or several units - ACR for managing secure
  35. * falcons, PMU for power management, etc. A unit can be seen as a class to
  36. * which command can be sent.
  37. *
  38. * One usage example would be to send a command to the SEC falcon to ask it to
  39. * reset a secure falcon. The SEC falcon will receive the command, process it,
  40. * and send a message to signal success or failure. Only when the corresponding
  41. * message is received can the requester assume the request has been processed.
  42. *
  43. * Since we expect many variations between the firmwares NVIDIA will release
  44. * across GPU generations, this library is built in a very modular way. Message
  45. * formats and queues details (such as number of usage) are left to
  46. * specializations of struct nvkm_msgqueue, while the functions in msgqueue.c
  47. * take care of posting commands and processing messages in a fashion that is
  48. * universal.
  49. *
  50. */
  51. enum msgqueue_msg_priority {
  52. MSGQUEUE_MSG_PRIORITY_HIGH,
  53. MSGQUEUE_MSG_PRIORITY_LOW,
  54. };
  55. /**
  56. * struct nvkm_msgqueue_hdr - header for all commands/messages
  57. * @unit_id: id of firmware using receiving the command/sending the message
  58. * @size: total size of command/message
  59. * @ctrl_flags: type of command/message
  60. * @seq_id: used to match a message from its corresponding command
  61. */
  62. struct nvkm_msgqueue_hdr {
  63. u8 unit_id;
  64. u8 size;
  65. u8 ctrl_flags;
  66. u8 seq_id;
  67. };
  68. /**
  69. * struct nvkm_msgqueue_msg - base message.
  70. *
  71. * This is just a header and a message (or command) type. Useful when
  72. * building command-specific structures.
  73. */
  74. struct nvkm_msgqueue_msg {
  75. struct nvkm_msgqueue_hdr hdr;
  76. u8 msg_type;
  77. };
  78. struct nvkm_msgqueue;
  79. typedef void
  80. (*nvkm_msgqueue_callback)(struct nvkm_msgqueue *, struct nvkm_msgqueue_hdr *);
  81. /**
  82. * struct nvkm_msgqueue_init_func - msgqueue functions related to initialization
  83. *
  84. * @gen_cmdline: build the commandline into a pre-allocated buffer
  85. * @init_callback: called to process the init message
  86. */
  87. struct nvkm_msgqueue_init_func {
  88. void (*gen_cmdline)(struct nvkm_msgqueue *, void *);
  89. int (*init_callback)(struct nvkm_msgqueue *, struct nvkm_msgqueue_hdr *);
  90. };
  91. /**
  92. * struct nvkm_msgqueue_acr_func - msgqueue functions related to ACR
  93. *
  94. * @boot_falcon: build and send the command to reset a given falcon
  95. * @boot_multiple_falcons: build and send the command to reset several falcons
  96. */
  97. struct nvkm_msgqueue_acr_func {
  98. int (*boot_falcon)(struct nvkm_msgqueue *, enum nvkm_secboot_falcon);
  99. int (*boot_multiple_falcons)(struct nvkm_msgqueue *, unsigned long);
  100. };
  101. struct nvkm_msgqueue_func {
  102. const struct nvkm_msgqueue_init_func *init_func;
  103. const struct nvkm_msgqueue_acr_func *acr_func;
  104. void (*dtor)(struct nvkm_msgqueue *);
  105. struct nvkm_msgqueue_queue *(*cmd_queue)(struct nvkm_msgqueue *,
  106. enum msgqueue_msg_priority);
  107. void (*recv)(struct nvkm_msgqueue *queue);
  108. };
  109. /**
  110. * struct nvkm_msgqueue_queue - information about a command or message queue
  111. *
  112. * The number of queues is firmware-dependent. All queues must have their
  113. * information filled by the init message handler.
  114. *
  115. * @mutex_lock: to be acquired when the queue is being used
  116. * @index: physical queue index
  117. * @offset: DMEM offset where this queue begins
  118. * @size: size allocated to this queue in DMEM (in bytes)
  119. * @position: current write position
  120. * @head_reg: address of the HEAD register for this queue
  121. * @tail_reg: address of the TAIL register for this queue
  122. */
  123. struct nvkm_msgqueue_queue {
  124. struct mutex mutex;
  125. u32 index;
  126. u32 offset;
  127. u32 size;
  128. u32 position;
  129. u32 head_reg;
  130. u32 tail_reg;
  131. };
  132. /**
  133. * struct nvkm_msgqueue_seq - keep track of ongoing commands
  134. *
  135. * Every time a command is sent, a sequence is assigned to it so the
  136. * corresponding message can be matched. Upon receiving the message, a callback
  137. * can be called and/or a completion signaled.
  138. *
  139. * @id: sequence ID
  140. * @state: current state
  141. * @callback: callback to call upon receiving matching message
  142. * @completion: completion to signal after callback is called
  143. */
  144. struct nvkm_msgqueue_seq {
  145. u16 id;
  146. enum {
  147. SEQ_STATE_FREE = 0,
  148. SEQ_STATE_PENDING,
  149. SEQ_STATE_USED,
  150. SEQ_STATE_CANCELLED
  151. } state;
  152. nvkm_msgqueue_callback callback;
  153. struct completion *completion;
  154. };
  155. /*
  156. * We can have an arbitrary number of sequences, but realistically we will
  157. * probably not use that much simultaneously.
  158. */
  159. #define NVKM_MSGQUEUE_NUM_SEQUENCES 16
  160. /**
  161. * struct nvkm_msgqueue - manage a command/message based FW on a falcon
  162. *
  163. * @falcon: falcon to be managed
  164. * @func: implementation of the firmware to use
  165. * @init_msg_received: whether the init message has already been received
  166. * @init_done: whether all init is complete and commands can be processed
  167. * @seq_lock: protects seq and seq_tbl
  168. * @seq: sequences to match commands and messages
  169. * @seq_tbl: bitmap of sequences currently in use
  170. */
  171. struct nvkm_msgqueue {
  172. struct nvkm_falcon *falcon;
  173. const struct nvkm_msgqueue_func *func;
  174. u32 fw_version;
  175. bool init_msg_received;
  176. struct completion init_done;
  177. struct mutex seq_lock;
  178. struct nvkm_msgqueue_seq seq[NVKM_MSGQUEUE_NUM_SEQUENCES];
  179. unsigned long seq_tbl[BITS_TO_LONGS(NVKM_MSGQUEUE_NUM_SEQUENCES)];
  180. };
  181. void nvkm_msgqueue_ctor(const struct nvkm_msgqueue_func *, struct nvkm_falcon *,
  182. struct nvkm_msgqueue *);
  183. int nvkm_msgqueue_post(struct nvkm_msgqueue *, enum msgqueue_msg_priority,
  184. struct nvkm_msgqueue_hdr *, nvkm_msgqueue_callback,
  185. struct completion *, bool);
  186. void nvkm_msgqueue_process_msgs(struct nvkm_msgqueue *,
  187. struct nvkm_msgqueue_queue *);
  188. int msgqueue_0137c63d_new(struct nvkm_falcon *, const struct nvkm_secboot *,
  189. struct nvkm_msgqueue **);
  190. int msgqueue_0137bca5_new(struct nvkm_falcon *, const struct nvkm_secboot *,
  191. struct nvkm_msgqueue **);
  192. int msgqueue_0148cdec_new(struct nvkm_falcon *, const struct nvkm_secboot *,
  193. struct nvkm_msgqueue **);
  194. #endif