mpt.h 7.9 KB

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  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eddie Dong <eddie.dong@intel.com>
  25. * Dexuan Cui
  26. * Jike Song <jike.song@intel.com>
  27. *
  28. * Contributors:
  29. * Zhi Wang <zhi.a.wang@intel.com>
  30. *
  31. */
  32. #ifndef _GVT_MPT_H_
  33. #define _GVT_MPT_H_
  34. /**
  35. * DOC: Hypervisor Service APIs for GVT-g Core Logic
  36. *
  37. * This is the glue layer between specific hypervisor MPT modules and GVT-g core
  38. * logic. Each kind of hypervisor MPT module provides a collection of function
  39. * callbacks and will be attached to GVT host when the driver is loading.
  40. * GVT-g core logic will call these APIs to request specific services from
  41. * hypervisor.
  42. */
  43. /**
  44. * intel_gvt_hypervisor_host_init - init GVT-g host side
  45. *
  46. * Returns:
  47. * Zero on success, negative error code if failed
  48. */
  49. static inline int intel_gvt_hypervisor_host_init(struct device *dev,
  50. void *gvt, const void *ops)
  51. {
  52. /* optional to provide */
  53. if (!intel_gvt_host.mpt->host_init)
  54. return 0;
  55. return intel_gvt_host.mpt->host_init(dev, gvt, ops);
  56. }
  57. /**
  58. * intel_gvt_hypervisor_host_exit - exit GVT-g host side
  59. */
  60. static inline void intel_gvt_hypervisor_host_exit(struct device *dev,
  61. void *gvt)
  62. {
  63. /* optional to provide */
  64. if (!intel_gvt_host.mpt->host_exit)
  65. return;
  66. intel_gvt_host.mpt->host_exit(dev, gvt);
  67. }
  68. /**
  69. * intel_gvt_hypervisor_attach_vgpu - call hypervisor to initialize vGPU
  70. * related stuffs inside hypervisor.
  71. *
  72. * Returns:
  73. * Zero on success, negative error code if failed.
  74. */
  75. static inline int intel_gvt_hypervisor_attach_vgpu(struct intel_vgpu *vgpu)
  76. {
  77. /* optional to provide */
  78. if (!intel_gvt_host.mpt->attach_vgpu)
  79. return 0;
  80. return intel_gvt_host.mpt->attach_vgpu(vgpu, &vgpu->handle);
  81. }
  82. /**
  83. * intel_gvt_hypervisor_detach_vgpu - call hypervisor to release vGPU
  84. * related stuffs inside hypervisor.
  85. *
  86. * Returns:
  87. * Zero on success, negative error code if failed.
  88. */
  89. static inline void intel_gvt_hypervisor_detach_vgpu(struct intel_vgpu *vgpu)
  90. {
  91. /* optional to provide */
  92. if (!intel_gvt_host.mpt->detach_vgpu)
  93. return;
  94. intel_gvt_host.mpt->detach_vgpu(vgpu->handle);
  95. }
  96. #define MSI_CAP_CONTROL(offset) (offset + 2)
  97. #define MSI_CAP_ADDRESS(offset) (offset + 4)
  98. #define MSI_CAP_DATA(offset) (offset + 8)
  99. #define MSI_CAP_EN 0x1
  100. /**
  101. * intel_gvt_hypervisor_inject_msi - inject a MSI interrupt into vGPU
  102. *
  103. * Returns:
  104. * Zero on success, negative error code if failed.
  105. */
  106. static inline int intel_gvt_hypervisor_inject_msi(struct intel_vgpu *vgpu)
  107. {
  108. unsigned long offset = vgpu->gvt->device_info.msi_cap_offset;
  109. u16 control, data;
  110. u32 addr;
  111. int ret;
  112. control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));
  113. addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset));
  114. data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset));
  115. /* Do not generate MSI if MSIEN is disable */
  116. if (!(control & MSI_CAP_EN))
  117. return 0;
  118. if (WARN(control & GENMASK(15, 1), "only support one MSI format\n"))
  119. return -EINVAL;
  120. gvt_dbg_irq("vgpu%d: inject msi address %x data%x\n", vgpu->id, addr,
  121. data);
  122. ret = intel_gvt_host.mpt->inject_msi(vgpu->handle, addr, data);
  123. if (ret)
  124. return ret;
  125. return 0;
  126. }
  127. /**
  128. * intel_gvt_hypervisor_set_wp_page - translate a host VA into MFN
  129. * @p: host kernel virtual address
  130. *
  131. * Returns:
  132. * MFN on success, INTEL_GVT_INVALID_ADDR if failed.
  133. */
  134. static inline unsigned long intel_gvt_hypervisor_virt_to_mfn(void *p)
  135. {
  136. return intel_gvt_host.mpt->from_virt_to_mfn(p);
  137. }
  138. /**
  139. * intel_gvt_hypervisor_set_wp_page - set a guest page to write-protected
  140. * @vgpu: a vGPU
  141. * @p: intel_vgpu_guest_page
  142. *
  143. * Returns:
  144. * Zero on success, negative error code if failed.
  145. */
  146. static inline int intel_gvt_hypervisor_set_wp_page(struct intel_vgpu *vgpu,
  147. struct intel_vgpu_guest_page *p)
  148. {
  149. int ret;
  150. if (p->writeprotection)
  151. return 0;
  152. ret = intel_gvt_host.mpt->set_wp_page(vgpu->handle, p->gfn);
  153. if (ret)
  154. return ret;
  155. p->writeprotection = true;
  156. atomic_inc(&vgpu->gtt.n_write_protected_guest_page);
  157. return 0;
  158. }
  159. /**
  160. * intel_gvt_hypervisor_unset_wp_page - remove the write-protection of a
  161. * guest page
  162. * @vgpu: a vGPU
  163. * @p: intel_vgpu_guest_page
  164. *
  165. * Returns:
  166. * Zero on success, negative error code if failed.
  167. */
  168. static inline int intel_gvt_hypervisor_unset_wp_page(struct intel_vgpu *vgpu,
  169. struct intel_vgpu_guest_page *p)
  170. {
  171. int ret;
  172. if (!p->writeprotection)
  173. return 0;
  174. ret = intel_gvt_host.mpt->unset_wp_page(vgpu->handle, p->gfn);
  175. if (ret)
  176. return ret;
  177. p->writeprotection = false;
  178. atomic_dec(&vgpu->gtt.n_write_protected_guest_page);
  179. return 0;
  180. }
  181. /**
  182. * intel_gvt_hypervisor_read_gpa - copy data from GPA to host data buffer
  183. * @vgpu: a vGPU
  184. * @gpa: guest physical address
  185. * @buf: host data buffer
  186. * @len: data length
  187. *
  188. * Returns:
  189. * Zero on success, negative error code if failed.
  190. */
  191. static inline int intel_gvt_hypervisor_read_gpa(struct intel_vgpu *vgpu,
  192. unsigned long gpa, void *buf, unsigned long len)
  193. {
  194. return intel_gvt_host.mpt->read_gpa(vgpu->handle, gpa, buf, len);
  195. }
  196. /**
  197. * intel_gvt_hypervisor_write_gpa - copy data from host data buffer to GPA
  198. * @vgpu: a vGPU
  199. * @gpa: guest physical address
  200. * @buf: host data buffer
  201. * @len: data length
  202. *
  203. * Returns:
  204. * Zero on success, negative error code if failed.
  205. */
  206. static inline int intel_gvt_hypervisor_write_gpa(struct intel_vgpu *vgpu,
  207. unsigned long gpa, void *buf, unsigned long len)
  208. {
  209. return intel_gvt_host.mpt->write_gpa(vgpu->handle, gpa, buf, len);
  210. }
  211. /**
  212. * intel_gvt_hypervisor_gfn_to_mfn - translate a GFN to MFN
  213. * @vgpu: a vGPU
  214. * @gpfn: guest pfn
  215. *
  216. * Returns:
  217. * MFN on success, INTEL_GVT_INVALID_ADDR if failed.
  218. */
  219. static inline unsigned long intel_gvt_hypervisor_gfn_to_mfn(
  220. struct intel_vgpu *vgpu, unsigned long gfn)
  221. {
  222. return intel_gvt_host.mpt->gfn_to_mfn(vgpu->handle, gfn);
  223. }
  224. /**
  225. * intel_gvt_hypervisor_map_gfn_to_mfn - map a GFN region to MFN
  226. * @vgpu: a vGPU
  227. * @gfn: guest PFN
  228. * @mfn: host PFN
  229. * @nr: amount of PFNs
  230. * @map: map or unmap
  231. *
  232. * Returns:
  233. * Zero on success, negative error code if failed.
  234. */
  235. static inline int intel_gvt_hypervisor_map_gfn_to_mfn(
  236. struct intel_vgpu *vgpu, unsigned long gfn,
  237. unsigned long mfn, unsigned int nr,
  238. bool map)
  239. {
  240. /* a MPT implementation could have MMIO mapped elsewhere */
  241. if (!intel_gvt_host.mpt->map_gfn_to_mfn)
  242. return 0;
  243. return intel_gvt_host.mpt->map_gfn_to_mfn(vgpu->handle, gfn, mfn, nr,
  244. map);
  245. }
  246. /**
  247. * intel_gvt_hypervisor_set_trap_area - Trap a guest PA region
  248. * @vgpu: a vGPU
  249. * @start: the beginning of the guest physical address region
  250. * @end: the end of the guest physical address region
  251. * @map: map or unmap
  252. *
  253. * Returns:
  254. * Zero on success, negative error code if failed.
  255. */
  256. static inline int intel_gvt_hypervisor_set_trap_area(
  257. struct intel_vgpu *vgpu, u64 start, u64 end, bool map)
  258. {
  259. /* a MPT implementation could have MMIO trapped elsewhere */
  260. if (!intel_gvt_host.mpt->set_trap_area)
  261. return 0;
  262. return intel_gvt_host.mpt->set_trap_area(vgpu->handle, start, end, map);
  263. }
  264. #endif /* _GVT_MPT_H_ */