mtk-sha.c 33 KB

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  1. /*
  2. * Cryptographic API.
  3. *
  4. * Driver for EIP97 SHA1/SHA2(HMAC) acceleration.
  5. *
  6. * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Some ideas are from atmel-sha.c and omap-sham.c drivers.
  13. */
  14. #include <crypto/sha.h>
  15. #include "mtk-platform.h"
  16. #define SHA_ALIGN_MSK (sizeof(u32) - 1)
  17. #define SHA_QUEUE_SIZE 512
  18. #define SHA_BUF_SIZE ((u32)PAGE_SIZE)
  19. #define SHA_OP_UPDATE 1
  20. #define SHA_OP_FINAL 2
  21. #define SHA_DATA_LEN_MSK cpu_to_le32(GENMASK(16, 0))
  22. #define SHA_MAX_DIGEST_BUF_SIZE 32
  23. /* SHA command token */
  24. #define SHA_CT_SIZE 5
  25. #define SHA_CT_CTRL_HDR cpu_to_le32(0x02220000)
  26. #define SHA_CMD0 cpu_to_le32(0x03020000)
  27. #define SHA_CMD1 cpu_to_le32(0x21060000)
  28. #define SHA_CMD2 cpu_to_le32(0xe0e63802)
  29. /* SHA transform information */
  30. #define SHA_TFM_HASH cpu_to_le32(0x2 << 0)
  31. #define SHA_TFM_SIZE(x) cpu_to_le32((x) << 8)
  32. #define SHA_TFM_START cpu_to_le32(0x1 << 4)
  33. #define SHA_TFM_CONTINUE cpu_to_le32(0x1 << 5)
  34. #define SHA_TFM_HASH_STORE cpu_to_le32(0x1 << 19)
  35. #define SHA_TFM_SHA1 cpu_to_le32(0x2 << 23)
  36. #define SHA_TFM_SHA256 cpu_to_le32(0x3 << 23)
  37. #define SHA_TFM_SHA224 cpu_to_le32(0x4 << 23)
  38. #define SHA_TFM_SHA512 cpu_to_le32(0x5 << 23)
  39. #define SHA_TFM_SHA384 cpu_to_le32(0x6 << 23)
  40. #define SHA_TFM_DIGEST(x) cpu_to_le32(((x) & GENMASK(3, 0)) << 24)
  41. /* SHA flags */
  42. #define SHA_FLAGS_BUSY BIT(0)
  43. #define SHA_FLAGS_FINAL BIT(1)
  44. #define SHA_FLAGS_FINUP BIT(2)
  45. #define SHA_FLAGS_SG BIT(3)
  46. #define SHA_FLAGS_ALGO_MSK GENMASK(8, 4)
  47. #define SHA_FLAGS_SHA1 BIT(4)
  48. #define SHA_FLAGS_SHA224 BIT(5)
  49. #define SHA_FLAGS_SHA256 BIT(6)
  50. #define SHA_FLAGS_SHA384 BIT(7)
  51. #define SHA_FLAGS_SHA512 BIT(8)
  52. #define SHA_FLAGS_HMAC BIT(9)
  53. #define SHA_FLAGS_PAD BIT(10)
  54. /**
  55. * mtk_sha_info - hardware information of AES
  56. * @cmd: command token, hardware instruction
  57. * @tfm: transform state of cipher algorithm.
  58. * @state: contains keys and initial vectors.
  59. *
  60. */
  61. struct mtk_sha_info {
  62. __le32 ctrl[2];
  63. __le32 cmd[3];
  64. __le32 tfm[2];
  65. __le32 digest[SHA_MAX_DIGEST_BUF_SIZE];
  66. };
  67. struct mtk_sha_reqctx {
  68. struct mtk_sha_info info;
  69. unsigned long flags;
  70. unsigned long op;
  71. u64 digcnt;
  72. size_t bufcnt;
  73. dma_addr_t dma_addr;
  74. __le32 ct_hdr;
  75. u32 ct_size;
  76. dma_addr_t ct_dma;
  77. dma_addr_t tfm_dma;
  78. /* Walk state */
  79. struct scatterlist *sg;
  80. u32 offset; /* Offset in current sg */
  81. u32 total; /* Total request */
  82. size_t ds;
  83. size_t bs;
  84. u8 *buffer;
  85. };
  86. struct mtk_sha_hmac_ctx {
  87. struct crypto_shash *shash;
  88. u8 ipad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
  89. u8 opad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
  90. };
  91. struct mtk_sha_ctx {
  92. struct mtk_cryp *cryp;
  93. unsigned long flags;
  94. u8 id;
  95. u8 buf[SHA_BUF_SIZE] __aligned(sizeof(u32));
  96. struct mtk_sha_hmac_ctx base[0];
  97. };
  98. struct mtk_sha_drv {
  99. struct list_head dev_list;
  100. /* Device list lock */
  101. spinlock_t lock;
  102. };
  103. static struct mtk_sha_drv mtk_sha = {
  104. .dev_list = LIST_HEAD_INIT(mtk_sha.dev_list),
  105. .lock = __SPIN_LOCK_UNLOCKED(mtk_sha.lock),
  106. };
  107. static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
  108. struct ahash_request *req);
  109. static inline u32 mtk_sha_read(struct mtk_cryp *cryp, u32 offset)
  110. {
  111. return readl_relaxed(cryp->base + offset);
  112. }
  113. static inline void mtk_sha_write(struct mtk_cryp *cryp,
  114. u32 offset, u32 value)
  115. {
  116. writel_relaxed(value, cryp->base + offset);
  117. }
  118. static inline void mtk_sha_ring_shift(struct mtk_ring *ring,
  119. struct mtk_desc **cmd_curr,
  120. struct mtk_desc **res_curr,
  121. int *count)
  122. {
  123. *cmd_curr = ring->cmd_next++;
  124. *res_curr = ring->res_next++;
  125. (*count)++;
  126. if (ring->cmd_next == ring->cmd_base + MTK_DESC_NUM) {
  127. ring->cmd_next = ring->cmd_base;
  128. ring->res_next = ring->res_base;
  129. }
  130. }
  131. static struct mtk_cryp *mtk_sha_find_dev(struct mtk_sha_ctx *tctx)
  132. {
  133. struct mtk_cryp *cryp = NULL;
  134. struct mtk_cryp *tmp;
  135. spin_lock_bh(&mtk_sha.lock);
  136. if (!tctx->cryp) {
  137. list_for_each_entry(tmp, &mtk_sha.dev_list, sha_list) {
  138. cryp = tmp;
  139. break;
  140. }
  141. tctx->cryp = cryp;
  142. } else {
  143. cryp = tctx->cryp;
  144. }
  145. /*
  146. * Assign record id to tfm in round-robin fashion, and this
  147. * will help tfm to bind to corresponding descriptor rings.
  148. */
  149. tctx->id = cryp->rec;
  150. cryp->rec = !cryp->rec;
  151. spin_unlock_bh(&mtk_sha.lock);
  152. return cryp;
  153. }
  154. static int mtk_sha_append_sg(struct mtk_sha_reqctx *ctx)
  155. {
  156. size_t count;
  157. while ((ctx->bufcnt < SHA_BUF_SIZE) && ctx->total) {
  158. count = min(ctx->sg->length - ctx->offset, ctx->total);
  159. count = min(count, SHA_BUF_SIZE - ctx->bufcnt);
  160. if (count <= 0) {
  161. /*
  162. * Check if count <= 0 because the buffer is full or
  163. * because the sg length is 0. In the latest case,
  164. * check if there is another sg in the list, a 0 length
  165. * sg doesn't necessarily mean the end of the sg list.
  166. */
  167. if ((ctx->sg->length == 0) && !sg_is_last(ctx->sg)) {
  168. ctx->sg = sg_next(ctx->sg);
  169. continue;
  170. } else {
  171. break;
  172. }
  173. }
  174. scatterwalk_map_and_copy(ctx->buffer + ctx->bufcnt, ctx->sg,
  175. ctx->offset, count, 0);
  176. ctx->bufcnt += count;
  177. ctx->offset += count;
  178. ctx->total -= count;
  179. if (ctx->offset == ctx->sg->length) {
  180. ctx->sg = sg_next(ctx->sg);
  181. if (ctx->sg)
  182. ctx->offset = 0;
  183. else
  184. ctx->total = 0;
  185. }
  186. }
  187. return 0;
  188. }
  189. /*
  190. * The purpose of this padding is to ensure that the padded message is a
  191. * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512).
  192. * The bit "1" is appended at the end of the message followed by
  193. * "padlen-1" zero bits. Then a 64 bits block (SHA1/SHA224/SHA256) or
  194. * 128 bits block (SHA384/SHA512) equals to the message length in bits
  195. * is appended.
  196. *
  197. * For SHA1/SHA224/SHA256, padlen is calculated as followed:
  198. * - if message length < 56 bytes then padlen = 56 - message length
  199. * - else padlen = 64 + 56 - message length
  200. *
  201. * For SHA384/SHA512, padlen is calculated as followed:
  202. * - if message length < 112 bytes then padlen = 112 - message length
  203. * - else padlen = 128 + 112 - message length
  204. */
  205. static void mtk_sha_fill_padding(struct mtk_sha_reqctx *ctx, u32 len)
  206. {
  207. u32 index, padlen;
  208. u64 bits[2];
  209. u64 size = ctx->digcnt;
  210. size += ctx->bufcnt;
  211. size += len;
  212. bits[1] = cpu_to_be64(size << 3);
  213. bits[0] = cpu_to_be64(size >> 61);
  214. switch (ctx->flags & SHA_FLAGS_ALGO_MSK) {
  215. case SHA_FLAGS_SHA384:
  216. case SHA_FLAGS_SHA512:
  217. index = ctx->bufcnt & 0x7f;
  218. padlen = (index < 112) ? (112 - index) : ((128 + 112) - index);
  219. *(ctx->buffer + ctx->bufcnt) = 0x80;
  220. memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1);
  221. memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 16);
  222. ctx->bufcnt += padlen + 16;
  223. ctx->flags |= SHA_FLAGS_PAD;
  224. break;
  225. default:
  226. index = ctx->bufcnt & 0x3f;
  227. padlen = (index < 56) ? (56 - index) : ((64 + 56) - index);
  228. *(ctx->buffer + ctx->bufcnt) = 0x80;
  229. memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1);
  230. memcpy(ctx->buffer + ctx->bufcnt + padlen, &bits[1], 8);
  231. ctx->bufcnt += padlen + 8;
  232. ctx->flags |= SHA_FLAGS_PAD;
  233. break;
  234. }
  235. }
  236. /* Initialize basic transform information of SHA */
  237. static void mtk_sha_info_init(struct mtk_sha_reqctx *ctx)
  238. {
  239. struct mtk_sha_info *info = &ctx->info;
  240. ctx->ct_hdr = SHA_CT_CTRL_HDR;
  241. ctx->ct_size = SHA_CT_SIZE;
  242. info->tfm[0] = SHA_TFM_HASH | SHA_TFM_SIZE(SIZE_IN_WORDS(ctx->ds));
  243. switch (ctx->flags & SHA_FLAGS_ALGO_MSK) {
  244. case SHA_FLAGS_SHA1:
  245. info->tfm[0] |= SHA_TFM_SHA1;
  246. break;
  247. case SHA_FLAGS_SHA224:
  248. info->tfm[0] |= SHA_TFM_SHA224;
  249. break;
  250. case SHA_FLAGS_SHA256:
  251. info->tfm[0] |= SHA_TFM_SHA256;
  252. break;
  253. case SHA_FLAGS_SHA384:
  254. info->tfm[0] |= SHA_TFM_SHA384;
  255. break;
  256. case SHA_FLAGS_SHA512:
  257. info->tfm[0] |= SHA_TFM_SHA512;
  258. break;
  259. default:
  260. /* Should not happen... */
  261. return;
  262. }
  263. info->tfm[1] = SHA_TFM_HASH_STORE;
  264. info->ctrl[0] = info->tfm[0] | SHA_TFM_CONTINUE | SHA_TFM_START;
  265. info->ctrl[1] = info->tfm[1];
  266. info->cmd[0] = SHA_CMD0;
  267. info->cmd[1] = SHA_CMD1;
  268. info->cmd[2] = SHA_CMD2 | SHA_TFM_DIGEST(SIZE_IN_WORDS(ctx->ds));
  269. }
  270. /*
  271. * Update input data length field of transform information and
  272. * map it to DMA region.
  273. */
  274. static int mtk_sha_info_update(struct mtk_cryp *cryp,
  275. struct mtk_sha_rec *sha,
  276. size_t len1, size_t len2)
  277. {
  278. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  279. struct mtk_sha_info *info = &ctx->info;
  280. ctx->ct_hdr &= ~SHA_DATA_LEN_MSK;
  281. ctx->ct_hdr |= cpu_to_le32(len1 + len2);
  282. info->cmd[0] &= ~SHA_DATA_LEN_MSK;
  283. info->cmd[0] |= cpu_to_le32(len1 + len2);
  284. /* Setting SHA_TFM_START only for the first iteration */
  285. if (ctx->digcnt)
  286. info->ctrl[0] &= ~SHA_TFM_START;
  287. ctx->digcnt += len1;
  288. ctx->ct_dma = dma_map_single(cryp->dev, info, sizeof(*info),
  289. DMA_BIDIRECTIONAL);
  290. if (unlikely(dma_mapping_error(cryp->dev, ctx->ct_dma))) {
  291. dev_err(cryp->dev, "dma %zu bytes error\n", sizeof(*info));
  292. return -EINVAL;
  293. }
  294. ctx->tfm_dma = ctx->ct_dma + sizeof(info->ctrl) + sizeof(info->cmd);
  295. return 0;
  296. }
  297. /*
  298. * Because of hardware limitation, we must pre-calculate the inner
  299. * and outer digest that need to be processed firstly by engine, then
  300. * apply the result digest to the input message. These complex hashing
  301. * procedures limits HMAC performance, so we use fallback SW encoding.
  302. */
  303. static int mtk_sha_finish_hmac(struct ahash_request *req)
  304. {
  305. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
  306. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  307. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  308. SHASH_DESC_ON_STACK(shash, bctx->shash);
  309. shash->tfm = bctx->shash;
  310. shash->flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */
  311. return crypto_shash_init(shash) ?:
  312. crypto_shash_update(shash, bctx->opad, ctx->bs) ?:
  313. crypto_shash_finup(shash, req->result, ctx->ds, req->result);
  314. }
  315. /* Initialize request context */
  316. static int mtk_sha_init(struct ahash_request *req)
  317. {
  318. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  319. struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm);
  320. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  321. ctx->flags = 0;
  322. ctx->ds = crypto_ahash_digestsize(tfm);
  323. switch (ctx->ds) {
  324. case SHA1_DIGEST_SIZE:
  325. ctx->flags |= SHA_FLAGS_SHA1;
  326. ctx->bs = SHA1_BLOCK_SIZE;
  327. break;
  328. case SHA224_DIGEST_SIZE:
  329. ctx->flags |= SHA_FLAGS_SHA224;
  330. ctx->bs = SHA224_BLOCK_SIZE;
  331. break;
  332. case SHA256_DIGEST_SIZE:
  333. ctx->flags |= SHA_FLAGS_SHA256;
  334. ctx->bs = SHA256_BLOCK_SIZE;
  335. break;
  336. case SHA384_DIGEST_SIZE:
  337. ctx->flags |= SHA_FLAGS_SHA384;
  338. ctx->bs = SHA384_BLOCK_SIZE;
  339. break;
  340. case SHA512_DIGEST_SIZE:
  341. ctx->flags |= SHA_FLAGS_SHA512;
  342. ctx->bs = SHA512_BLOCK_SIZE;
  343. break;
  344. default:
  345. return -EINVAL;
  346. }
  347. ctx->bufcnt = 0;
  348. ctx->digcnt = 0;
  349. ctx->buffer = tctx->buf;
  350. if (tctx->flags & SHA_FLAGS_HMAC) {
  351. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  352. memcpy(ctx->buffer, bctx->ipad, ctx->bs);
  353. ctx->bufcnt = ctx->bs;
  354. ctx->flags |= SHA_FLAGS_HMAC;
  355. }
  356. return 0;
  357. }
  358. static int mtk_sha_xmit(struct mtk_cryp *cryp, struct mtk_sha_rec *sha,
  359. dma_addr_t addr1, size_t len1,
  360. dma_addr_t addr2, size_t len2)
  361. {
  362. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  363. struct mtk_ring *ring = cryp->ring[sha->id];
  364. struct mtk_desc *cmd, *res;
  365. int err, count = 0;
  366. err = mtk_sha_info_update(cryp, sha, len1, len2);
  367. if (err)
  368. return err;
  369. /* Fill in the command/result descriptors */
  370. mtk_sha_ring_shift(ring, &cmd, &res, &count);
  371. res->hdr = MTK_DESC_FIRST | MTK_DESC_BUF_LEN(len1);
  372. cmd->hdr = MTK_DESC_FIRST | MTK_DESC_BUF_LEN(len1) |
  373. MTK_DESC_CT_LEN(ctx->ct_size);
  374. cmd->buf = cpu_to_le32(addr1);
  375. cmd->ct = cpu_to_le32(ctx->ct_dma);
  376. cmd->ct_hdr = ctx->ct_hdr;
  377. cmd->tfm = cpu_to_le32(ctx->tfm_dma);
  378. if (len2) {
  379. mtk_sha_ring_shift(ring, &cmd, &res, &count);
  380. res->hdr = MTK_DESC_BUF_LEN(len2);
  381. cmd->hdr = MTK_DESC_BUF_LEN(len2);
  382. cmd->buf = cpu_to_le32(addr2);
  383. }
  384. cmd->hdr |= MTK_DESC_LAST;
  385. res->hdr |= MTK_DESC_LAST;
  386. /*
  387. * Make sure that all changes to the DMA ring are done before we
  388. * start engine.
  389. */
  390. wmb();
  391. /* Start DMA transfer */
  392. mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(count));
  393. mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(count));
  394. return -EINPROGRESS;
  395. }
  396. static int mtk_sha_dma_map(struct mtk_cryp *cryp,
  397. struct mtk_sha_rec *sha,
  398. struct mtk_sha_reqctx *ctx,
  399. size_t count)
  400. {
  401. ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer,
  402. SHA_BUF_SIZE, DMA_TO_DEVICE);
  403. if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) {
  404. dev_err(cryp->dev, "dma map error\n");
  405. return -EINVAL;
  406. }
  407. ctx->flags &= ~SHA_FLAGS_SG;
  408. return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count, 0, 0);
  409. }
  410. static int mtk_sha_update_slow(struct mtk_cryp *cryp,
  411. struct mtk_sha_rec *sha)
  412. {
  413. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  414. size_t count;
  415. u32 final;
  416. mtk_sha_append_sg(ctx);
  417. final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
  418. dev_dbg(cryp->dev, "slow: bufcnt: %zu\n", ctx->bufcnt);
  419. if (final) {
  420. sha->flags |= SHA_FLAGS_FINAL;
  421. mtk_sha_fill_padding(ctx, 0);
  422. }
  423. if (final || (ctx->bufcnt == SHA_BUF_SIZE && ctx->total)) {
  424. count = ctx->bufcnt;
  425. ctx->bufcnt = 0;
  426. return mtk_sha_dma_map(cryp, sha, ctx, count);
  427. }
  428. return 0;
  429. }
  430. static int mtk_sha_update_start(struct mtk_cryp *cryp,
  431. struct mtk_sha_rec *sha)
  432. {
  433. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  434. u32 len, final, tail;
  435. struct scatterlist *sg;
  436. if (!ctx->total)
  437. return 0;
  438. if (ctx->bufcnt || ctx->offset)
  439. return mtk_sha_update_slow(cryp, sha);
  440. sg = ctx->sg;
  441. if (!IS_ALIGNED(sg->offset, sizeof(u32)))
  442. return mtk_sha_update_slow(cryp, sha);
  443. if (!sg_is_last(sg) && !IS_ALIGNED(sg->length, ctx->bs))
  444. /* size is not ctx->bs aligned */
  445. return mtk_sha_update_slow(cryp, sha);
  446. len = min(ctx->total, sg->length);
  447. if (sg_is_last(sg)) {
  448. if (!(ctx->flags & SHA_FLAGS_FINUP)) {
  449. /* not last sg must be ctx->bs aligned */
  450. tail = len & (ctx->bs - 1);
  451. len -= tail;
  452. }
  453. }
  454. ctx->total -= len;
  455. ctx->offset = len; /* offset where to start slow */
  456. final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
  457. /* Add padding */
  458. if (final) {
  459. size_t count;
  460. tail = len & (ctx->bs - 1);
  461. len -= tail;
  462. ctx->total += tail;
  463. ctx->offset = len; /* offset where to start slow */
  464. sg = ctx->sg;
  465. mtk_sha_append_sg(ctx);
  466. mtk_sha_fill_padding(ctx, len);
  467. ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer,
  468. SHA_BUF_SIZE, DMA_TO_DEVICE);
  469. if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) {
  470. dev_err(cryp->dev, "dma map bytes error\n");
  471. return -EINVAL;
  472. }
  473. sha->flags |= SHA_FLAGS_FINAL;
  474. count = ctx->bufcnt;
  475. ctx->bufcnt = 0;
  476. if (len == 0) {
  477. ctx->flags &= ~SHA_FLAGS_SG;
  478. return mtk_sha_xmit(cryp, sha, ctx->dma_addr,
  479. count, 0, 0);
  480. } else {
  481. ctx->sg = sg;
  482. if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
  483. dev_err(cryp->dev, "dma_map_sg error\n");
  484. return -EINVAL;
  485. }
  486. ctx->flags |= SHA_FLAGS_SG;
  487. return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg),
  488. len, ctx->dma_addr, count);
  489. }
  490. }
  491. if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
  492. dev_err(cryp->dev, "dma_map_sg error\n");
  493. return -EINVAL;
  494. }
  495. ctx->flags |= SHA_FLAGS_SG;
  496. return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg),
  497. len, 0, 0);
  498. }
  499. static int mtk_sha_final_req(struct mtk_cryp *cryp,
  500. struct mtk_sha_rec *sha)
  501. {
  502. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  503. size_t count;
  504. mtk_sha_fill_padding(ctx, 0);
  505. sha->flags |= SHA_FLAGS_FINAL;
  506. count = ctx->bufcnt;
  507. ctx->bufcnt = 0;
  508. return mtk_sha_dma_map(cryp, sha, ctx, count);
  509. }
  510. /* Copy ready hash (+ finalize hmac) */
  511. static int mtk_sha_finish(struct ahash_request *req)
  512. {
  513. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  514. __le32 *digest = ctx->info.digest;
  515. u32 *result = (u32 *)req->result;
  516. int i;
  517. /* Get the hash from the digest buffer */
  518. for (i = 0; i < SIZE_IN_WORDS(ctx->ds); i++)
  519. result[i] = le32_to_cpu(digest[i]);
  520. if (ctx->flags & SHA_FLAGS_HMAC)
  521. return mtk_sha_finish_hmac(req);
  522. return 0;
  523. }
  524. static void mtk_sha_finish_req(struct mtk_cryp *cryp,
  525. struct mtk_sha_rec *sha,
  526. int err)
  527. {
  528. if (likely(!err && (SHA_FLAGS_FINAL & sha->flags)))
  529. err = mtk_sha_finish(sha->req);
  530. sha->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL);
  531. sha->req->base.complete(&sha->req->base, err);
  532. /* Handle new request */
  533. tasklet_schedule(&sha->queue_task);
  534. }
  535. static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
  536. struct ahash_request *req)
  537. {
  538. struct mtk_sha_rec *sha = cryp->sha[id];
  539. struct crypto_async_request *async_req, *backlog;
  540. struct mtk_sha_reqctx *ctx;
  541. unsigned long flags;
  542. int err = 0, ret = 0;
  543. spin_lock_irqsave(&sha->lock, flags);
  544. if (req)
  545. ret = ahash_enqueue_request(&sha->queue, req);
  546. if (SHA_FLAGS_BUSY & sha->flags) {
  547. spin_unlock_irqrestore(&sha->lock, flags);
  548. return ret;
  549. }
  550. backlog = crypto_get_backlog(&sha->queue);
  551. async_req = crypto_dequeue_request(&sha->queue);
  552. if (async_req)
  553. sha->flags |= SHA_FLAGS_BUSY;
  554. spin_unlock_irqrestore(&sha->lock, flags);
  555. if (!async_req)
  556. return ret;
  557. if (backlog)
  558. backlog->complete(backlog, -EINPROGRESS);
  559. req = ahash_request_cast(async_req);
  560. ctx = ahash_request_ctx(req);
  561. sha->req = req;
  562. mtk_sha_info_init(ctx);
  563. if (ctx->op == SHA_OP_UPDATE) {
  564. err = mtk_sha_update_start(cryp, sha);
  565. if (err != -EINPROGRESS && (ctx->flags & SHA_FLAGS_FINUP))
  566. /* No final() after finup() */
  567. err = mtk_sha_final_req(cryp, sha);
  568. } else if (ctx->op == SHA_OP_FINAL) {
  569. err = mtk_sha_final_req(cryp, sha);
  570. }
  571. if (unlikely(err != -EINPROGRESS))
  572. /* Task will not finish it, so do it here */
  573. mtk_sha_finish_req(cryp, sha, err);
  574. return ret;
  575. }
  576. static int mtk_sha_enqueue(struct ahash_request *req, u32 op)
  577. {
  578. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  579. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
  580. ctx->op = op;
  581. return mtk_sha_handle_queue(tctx->cryp, tctx->id, req);
  582. }
  583. static void mtk_sha_unmap(struct mtk_cryp *cryp, struct mtk_sha_rec *sha)
  584. {
  585. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  586. dma_unmap_single(cryp->dev, ctx->ct_dma, sizeof(ctx->info),
  587. DMA_BIDIRECTIONAL);
  588. if (ctx->flags & SHA_FLAGS_SG) {
  589. dma_unmap_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE);
  590. if (ctx->sg->length == ctx->offset) {
  591. ctx->sg = sg_next(ctx->sg);
  592. if (ctx->sg)
  593. ctx->offset = 0;
  594. }
  595. if (ctx->flags & SHA_FLAGS_PAD) {
  596. dma_unmap_single(cryp->dev, ctx->dma_addr,
  597. SHA_BUF_SIZE, DMA_TO_DEVICE);
  598. }
  599. } else
  600. dma_unmap_single(cryp->dev, ctx->dma_addr,
  601. SHA_BUF_SIZE, DMA_TO_DEVICE);
  602. }
  603. static void mtk_sha_complete(struct mtk_cryp *cryp,
  604. struct mtk_sha_rec *sha)
  605. {
  606. int err = 0;
  607. err = mtk_sha_update_start(cryp, sha);
  608. if (err != -EINPROGRESS)
  609. mtk_sha_finish_req(cryp, sha, err);
  610. }
  611. static int mtk_sha_update(struct ahash_request *req)
  612. {
  613. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  614. ctx->total = req->nbytes;
  615. ctx->sg = req->src;
  616. ctx->offset = 0;
  617. if ((ctx->bufcnt + ctx->total < SHA_BUF_SIZE) &&
  618. !(ctx->flags & SHA_FLAGS_FINUP))
  619. return mtk_sha_append_sg(ctx);
  620. return mtk_sha_enqueue(req, SHA_OP_UPDATE);
  621. }
  622. static int mtk_sha_final(struct ahash_request *req)
  623. {
  624. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  625. ctx->flags |= SHA_FLAGS_FINUP;
  626. if (ctx->flags & SHA_FLAGS_PAD)
  627. return mtk_sha_finish(req);
  628. return mtk_sha_enqueue(req, SHA_OP_FINAL);
  629. }
  630. static int mtk_sha_finup(struct ahash_request *req)
  631. {
  632. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  633. int err1, err2;
  634. ctx->flags |= SHA_FLAGS_FINUP;
  635. err1 = mtk_sha_update(req);
  636. if (err1 == -EINPROGRESS || err1 == -EBUSY)
  637. return err1;
  638. /*
  639. * final() has to be always called to cleanup resources
  640. * even if update() failed
  641. */
  642. err2 = mtk_sha_final(req);
  643. return err1 ?: err2;
  644. }
  645. static int mtk_sha_digest(struct ahash_request *req)
  646. {
  647. return mtk_sha_init(req) ?: mtk_sha_finup(req);
  648. }
  649. static int mtk_sha_setkey(struct crypto_ahash *tfm, const u8 *key,
  650. u32 keylen)
  651. {
  652. struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm);
  653. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  654. size_t bs = crypto_shash_blocksize(bctx->shash);
  655. size_t ds = crypto_shash_digestsize(bctx->shash);
  656. int err, i;
  657. SHASH_DESC_ON_STACK(shash, bctx->shash);
  658. shash->tfm = bctx->shash;
  659. shash->flags = crypto_shash_get_flags(bctx->shash) &
  660. CRYPTO_TFM_REQ_MAY_SLEEP;
  661. if (keylen > bs) {
  662. err = crypto_shash_digest(shash, key, keylen, bctx->ipad);
  663. if (err)
  664. return err;
  665. keylen = ds;
  666. } else {
  667. memcpy(bctx->ipad, key, keylen);
  668. }
  669. memset(bctx->ipad + keylen, 0, bs - keylen);
  670. memcpy(bctx->opad, bctx->ipad, bs);
  671. for (i = 0; i < bs; i++) {
  672. bctx->ipad[i] ^= 0x36;
  673. bctx->opad[i] ^= 0x5c;
  674. }
  675. return 0;
  676. }
  677. static int mtk_sha_export(struct ahash_request *req, void *out)
  678. {
  679. const struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  680. memcpy(out, ctx, sizeof(*ctx));
  681. return 0;
  682. }
  683. static int mtk_sha_import(struct ahash_request *req, const void *in)
  684. {
  685. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  686. memcpy(ctx, in, sizeof(*ctx));
  687. return 0;
  688. }
  689. static int mtk_sha_cra_init_alg(struct crypto_tfm *tfm,
  690. const char *alg_base)
  691. {
  692. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm);
  693. struct mtk_cryp *cryp = NULL;
  694. cryp = mtk_sha_find_dev(tctx);
  695. if (!cryp)
  696. return -ENODEV;
  697. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  698. sizeof(struct mtk_sha_reqctx));
  699. if (alg_base) {
  700. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  701. tctx->flags |= SHA_FLAGS_HMAC;
  702. bctx->shash = crypto_alloc_shash(alg_base, 0,
  703. CRYPTO_ALG_NEED_FALLBACK);
  704. if (IS_ERR(bctx->shash)) {
  705. pr_err("base driver %s could not be loaded.\n",
  706. alg_base);
  707. return PTR_ERR(bctx->shash);
  708. }
  709. }
  710. return 0;
  711. }
  712. static int mtk_sha_cra_init(struct crypto_tfm *tfm)
  713. {
  714. return mtk_sha_cra_init_alg(tfm, NULL);
  715. }
  716. static int mtk_sha_cra_sha1_init(struct crypto_tfm *tfm)
  717. {
  718. return mtk_sha_cra_init_alg(tfm, "sha1");
  719. }
  720. static int mtk_sha_cra_sha224_init(struct crypto_tfm *tfm)
  721. {
  722. return mtk_sha_cra_init_alg(tfm, "sha224");
  723. }
  724. static int mtk_sha_cra_sha256_init(struct crypto_tfm *tfm)
  725. {
  726. return mtk_sha_cra_init_alg(tfm, "sha256");
  727. }
  728. static int mtk_sha_cra_sha384_init(struct crypto_tfm *tfm)
  729. {
  730. return mtk_sha_cra_init_alg(tfm, "sha384");
  731. }
  732. static int mtk_sha_cra_sha512_init(struct crypto_tfm *tfm)
  733. {
  734. return mtk_sha_cra_init_alg(tfm, "sha512");
  735. }
  736. static void mtk_sha_cra_exit(struct crypto_tfm *tfm)
  737. {
  738. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm);
  739. if (tctx->flags & SHA_FLAGS_HMAC) {
  740. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  741. crypto_free_shash(bctx->shash);
  742. }
  743. }
  744. static struct ahash_alg algs_sha1_sha224_sha256[] = {
  745. {
  746. .init = mtk_sha_init,
  747. .update = mtk_sha_update,
  748. .final = mtk_sha_final,
  749. .finup = mtk_sha_finup,
  750. .digest = mtk_sha_digest,
  751. .export = mtk_sha_export,
  752. .import = mtk_sha_import,
  753. .halg.digestsize = SHA1_DIGEST_SIZE,
  754. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  755. .halg.base = {
  756. .cra_name = "sha1",
  757. .cra_driver_name = "mtk-sha1",
  758. .cra_priority = 400,
  759. .cra_flags = CRYPTO_ALG_ASYNC,
  760. .cra_blocksize = SHA1_BLOCK_SIZE,
  761. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  762. .cra_alignmask = SHA_ALIGN_MSK,
  763. .cra_module = THIS_MODULE,
  764. .cra_init = mtk_sha_cra_init,
  765. .cra_exit = mtk_sha_cra_exit,
  766. }
  767. },
  768. {
  769. .init = mtk_sha_init,
  770. .update = mtk_sha_update,
  771. .final = mtk_sha_final,
  772. .finup = mtk_sha_finup,
  773. .digest = mtk_sha_digest,
  774. .export = mtk_sha_export,
  775. .import = mtk_sha_import,
  776. .halg.digestsize = SHA224_DIGEST_SIZE,
  777. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  778. .halg.base = {
  779. .cra_name = "sha224",
  780. .cra_driver_name = "mtk-sha224",
  781. .cra_priority = 400,
  782. .cra_flags = CRYPTO_ALG_ASYNC,
  783. .cra_blocksize = SHA224_BLOCK_SIZE,
  784. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  785. .cra_alignmask = SHA_ALIGN_MSK,
  786. .cra_module = THIS_MODULE,
  787. .cra_init = mtk_sha_cra_init,
  788. .cra_exit = mtk_sha_cra_exit,
  789. }
  790. },
  791. {
  792. .init = mtk_sha_init,
  793. .update = mtk_sha_update,
  794. .final = mtk_sha_final,
  795. .finup = mtk_sha_finup,
  796. .digest = mtk_sha_digest,
  797. .export = mtk_sha_export,
  798. .import = mtk_sha_import,
  799. .halg.digestsize = SHA256_DIGEST_SIZE,
  800. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  801. .halg.base = {
  802. .cra_name = "sha256",
  803. .cra_driver_name = "mtk-sha256",
  804. .cra_priority = 400,
  805. .cra_flags = CRYPTO_ALG_ASYNC,
  806. .cra_blocksize = SHA256_BLOCK_SIZE,
  807. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  808. .cra_alignmask = SHA_ALIGN_MSK,
  809. .cra_module = THIS_MODULE,
  810. .cra_init = mtk_sha_cra_init,
  811. .cra_exit = mtk_sha_cra_exit,
  812. }
  813. },
  814. {
  815. .init = mtk_sha_init,
  816. .update = mtk_sha_update,
  817. .final = mtk_sha_final,
  818. .finup = mtk_sha_finup,
  819. .digest = mtk_sha_digest,
  820. .export = mtk_sha_export,
  821. .import = mtk_sha_import,
  822. .setkey = mtk_sha_setkey,
  823. .halg.digestsize = SHA1_DIGEST_SIZE,
  824. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  825. .halg.base = {
  826. .cra_name = "hmac(sha1)",
  827. .cra_driver_name = "mtk-hmac-sha1",
  828. .cra_priority = 400,
  829. .cra_flags = CRYPTO_ALG_ASYNC |
  830. CRYPTO_ALG_NEED_FALLBACK,
  831. .cra_blocksize = SHA1_BLOCK_SIZE,
  832. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  833. sizeof(struct mtk_sha_hmac_ctx),
  834. .cra_alignmask = SHA_ALIGN_MSK,
  835. .cra_module = THIS_MODULE,
  836. .cra_init = mtk_sha_cra_sha1_init,
  837. .cra_exit = mtk_sha_cra_exit,
  838. }
  839. },
  840. {
  841. .init = mtk_sha_init,
  842. .update = mtk_sha_update,
  843. .final = mtk_sha_final,
  844. .finup = mtk_sha_finup,
  845. .digest = mtk_sha_digest,
  846. .export = mtk_sha_export,
  847. .import = mtk_sha_import,
  848. .setkey = mtk_sha_setkey,
  849. .halg.digestsize = SHA224_DIGEST_SIZE,
  850. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  851. .halg.base = {
  852. .cra_name = "hmac(sha224)",
  853. .cra_driver_name = "mtk-hmac-sha224",
  854. .cra_priority = 400,
  855. .cra_flags = CRYPTO_ALG_ASYNC |
  856. CRYPTO_ALG_NEED_FALLBACK,
  857. .cra_blocksize = SHA224_BLOCK_SIZE,
  858. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  859. sizeof(struct mtk_sha_hmac_ctx),
  860. .cra_alignmask = SHA_ALIGN_MSK,
  861. .cra_module = THIS_MODULE,
  862. .cra_init = mtk_sha_cra_sha224_init,
  863. .cra_exit = mtk_sha_cra_exit,
  864. }
  865. },
  866. {
  867. .init = mtk_sha_init,
  868. .update = mtk_sha_update,
  869. .final = mtk_sha_final,
  870. .finup = mtk_sha_finup,
  871. .digest = mtk_sha_digest,
  872. .export = mtk_sha_export,
  873. .import = mtk_sha_import,
  874. .setkey = mtk_sha_setkey,
  875. .halg.digestsize = SHA256_DIGEST_SIZE,
  876. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  877. .halg.base = {
  878. .cra_name = "hmac(sha256)",
  879. .cra_driver_name = "mtk-hmac-sha256",
  880. .cra_priority = 400,
  881. .cra_flags = CRYPTO_ALG_ASYNC |
  882. CRYPTO_ALG_NEED_FALLBACK,
  883. .cra_blocksize = SHA256_BLOCK_SIZE,
  884. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  885. sizeof(struct mtk_sha_hmac_ctx),
  886. .cra_alignmask = SHA_ALIGN_MSK,
  887. .cra_module = THIS_MODULE,
  888. .cra_init = mtk_sha_cra_sha256_init,
  889. .cra_exit = mtk_sha_cra_exit,
  890. }
  891. },
  892. };
  893. static struct ahash_alg algs_sha384_sha512[] = {
  894. {
  895. .init = mtk_sha_init,
  896. .update = mtk_sha_update,
  897. .final = mtk_sha_final,
  898. .finup = mtk_sha_finup,
  899. .digest = mtk_sha_digest,
  900. .export = mtk_sha_export,
  901. .import = mtk_sha_import,
  902. .halg.digestsize = SHA384_DIGEST_SIZE,
  903. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  904. .halg.base = {
  905. .cra_name = "sha384",
  906. .cra_driver_name = "mtk-sha384",
  907. .cra_priority = 400,
  908. .cra_flags = CRYPTO_ALG_ASYNC,
  909. .cra_blocksize = SHA384_BLOCK_SIZE,
  910. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  911. .cra_alignmask = SHA_ALIGN_MSK,
  912. .cra_module = THIS_MODULE,
  913. .cra_init = mtk_sha_cra_init,
  914. .cra_exit = mtk_sha_cra_exit,
  915. }
  916. },
  917. {
  918. .init = mtk_sha_init,
  919. .update = mtk_sha_update,
  920. .final = mtk_sha_final,
  921. .finup = mtk_sha_finup,
  922. .digest = mtk_sha_digest,
  923. .export = mtk_sha_export,
  924. .import = mtk_sha_import,
  925. .halg.digestsize = SHA512_DIGEST_SIZE,
  926. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  927. .halg.base = {
  928. .cra_name = "sha512",
  929. .cra_driver_name = "mtk-sha512",
  930. .cra_priority = 400,
  931. .cra_flags = CRYPTO_ALG_ASYNC,
  932. .cra_blocksize = SHA512_BLOCK_SIZE,
  933. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  934. .cra_alignmask = SHA_ALIGN_MSK,
  935. .cra_module = THIS_MODULE,
  936. .cra_init = mtk_sha_cra_init,
  937. .cra_exit = mtk_sha_cra_exit,
  938. }
  939. },
  940. {
  941. .init = mtk_sha_init,
  942. .update = mtk_sha_update,
  943. .final = mtk_sha_final,
  944. .finup = mtk_sha_finup,
  945. .digest = mtk_sha_digest,
  946. .export = mtk_sha_export,
  947. .import = mtk_sha_import,
  948. .setkey = mtk_sha_setkey,
  949. .halg.digestsize = SHA384_DIGEST_SIZE,
  950. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  951. .halg.base = {
  952. .cra_name = "hmac(sha384)",
  953. .cra_driver_name = "mtk-hmac-sha384",
  954. .cra_priority = 400,
  955. .cra_flags = CRYPTO_ALG_ASYNC |
  956. CRYPTO_ALG_NEED_FALLBACK,
  957. .cra_blocksize = SHA384_BLOCK_SIZE,
  958. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  959. sizeof(struct mtk_sha_hmac_ctx),
  960. .cra_alignmask = SHA_ALIGN_MSK,
  961. .cra_module = THIS_MODULE,
  962. .cra_init = mtk_sha_cra_sha384_init,
  963. .cra_exit = mtk_sha_cra_exit,
  964. }
  965. },
  966. {
  967. .init = mtk_sha_init,
  968. .update = mtk_sha_update,
  969. .final = mtk_sha_final,
  970. .finup = mtk_sha_finup,
  971. .digest = mtk_sha_digest,
  972. .export = mtk_sha_export,
  973. .import = mtk_sha_import,
  974. .setkey = mtk_sha_setkey,
  975. .halg.digestsize = SHA512_DIGEST_SIZE,
  976. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  977. .halg.base = {
  978. .cra_name = "hmac(sha512)",
  979. .cra_driver_name = "mtk-hmac-sha512",
  980. .cra_priority = 400,
  981. .cra_flags = CRYPTO_ALG_ASYNC |
  982. CRYPTO_ALG_NEED_FALLBACK,
  983. .cra_blocksize = SHA512_BLOCK_SIZE,
  984. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  985. sizeof(struct mtk_sha_hmac_ctx),
  986. .cra_alignmask = SHA_ALIGN_MSK,
  987. .cra_module = THIS_MODULE,
  988. .cra_init = mtk_sha_cra_sha512_init,
  989. .cra_exit = mtk_sha_cra_exit,
  990. }
  991. },
  992. };
  993. static void mtk_sha_queue_task(unsigned long data)
  994. {
  995. struct mtk_sha_rec *sha = (struct mtk_sha_rec *)data;
  996. mtk_sha_handle_queue(sha->cryp, sha->id - MTK_RING2, NULL);
  997. }
  998. static void mtk_sha_done_task(unsigned long data)
  999. {
  1000. struct mtk_sha_rec *sha = (struct mtk_sha_rec *)data;
  1001. struct mtk_cryp *cryp = sha->cryp;
  1002. mtk_sha_unmap(cryp, sha);
  1003. mtk_sha_complete(cryp, sha);
  1004. }
  1005. static irqreturn_t mtk_sha_irq(int irq, void *dev_id)
  1006. {
  1007. struct mtk_sha_rec *sha = (struct mtk_sha_rec *)dev_id;
  1008. struct mtk_cryp *cryp = sha->cryp;
  1009. u32 val = mtk_sha_read(cryp, RDR_STAT(sha->id));
  1010. mtk_sha_write(cryp, RDR_STAT(sha->id), val);
  1011. if (likely((SHA_FLAGS_BUSY & sha->flags))) {
  1012. mtk_sha_write(cryp, RDR_PROC_COUNT(sha->id), MTK_CNT_RST);
  1013. mtk_sha_write(cryp, RDR_THRESH(sha->id),
  1014. MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE);
  1015. tasklet_schedule(&sha->done_task);
  1016. } else {
  1017. dev_warn(cryp->dev, "SHA interrupt when no active requests.\n");
  1018. }
  1019. return IRQ_HANDLED;
  1020. }
  1021. /*
  1022. * The purpose of two SHA records is used to get extra performance.
  1023. * It is similar to mtk_aes_record_init().
  1024. */
  1025. static int mtk_sha_record_init(struct mtk_cryp *cryp)
  1026. {
  1027. struct mtk_sha_rec **sha = cryp->sha;
  1028. int i, err = -ENOMEM;
  1029. for (i = 0; i < MTK_REC_NUM; i++) {
  1030. sha[i] = kzalloc(sizeof(**sha), GFP_KERNEL);
  1031. if (!sha[i])
  1032. goto err_cleanup;
  1033. sha[i]->cryp = cryp;
  1034. spin_lock_init(&sha[i]->lock);
  1035. crypto_init_queue(&sha[i]->queue, SHA_QUEUE_SIZE);
  1036. tasklet_init(&sha[i]->queue_task, mtk_sha_queue_task,
  1037. (unsigned long)sha[i]);
  1038. tasklet_init(&sha[i]->done_task, mtk_sha_done_task,
  1039. (unsigned long)sha[i]);
  1040. }
  1041. /* Link to ring2 and ring3 respectively */
  1042. sha[0]->id = MTK_RING2;
  1043. sha[1]->id = MTK_RING3;
  1044. cryp->rec = 1;
  1045. return 0;
  1046. err_cleanup:
  1047. for (; i--; )
  1048. kfree(sha[i]);
  1049. return err;
  1050. }
  1051. static void mtk_sha_record_free(struct mtk_cryp *cryp)
  1052. {
  1053. int i;
  1054. for (i = 0; i < MTK_REC_NUM; i++) {
  1055. tasklet_kill(&cryp->sha[i]->done_task);
  1056. tasklet_kill(&cryp->sha[i]->queue_task);
  1057. kfree(cryp->sha[i]);
  1058. }
  1059. }
  1060. static void mtk_sha_unregister_algs(void)
  1061. {
  1062. int i;
  1063. for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++)
  1064. crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]);
  1065. for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++)
  1066. crypto_unregister_ahash(&algs_sha384_sha512[i]);
  1067. }
  1068. static int mtk_sha_register_algs(void)
  1069. {
  1070. int err, i;
  1071. for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) {
  1072. err = crypto_register_ahash(&algs_sha1_sha224_sha256[i]);
  1073. if (err)
  1074. goto err_sha_224_256_algs;
  1075. }
  1076. for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) {
  1077. err = crypto_register_ahash(&algs_sha384_sha512[i]);
  1078. if (err)
  1079. goto err_sha_384_512_algs;
  1080. }
  1081. return 0;
  1082. err_sha_384_512_algs:
  1083. for (; i--; )
  1084. crypto_unregister_ahash(&algs_sha384_sha512[i]);
  1085. i = ARRAY_SIZE(algs_sha1_sha224_sha256);
  1086. err_sha_224_256_algs:
  1087. for (; i--; )
  1088. crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]);
  1089. return err;
  1090. }
  1091. int mtk_hash_alg_register(struct mtk_cryp *cryp)
  1092. {
  1093. int err;
  1094. INIT_LIST_HEAD(&cryp->sha_list);
  1095. /* Initialize two hash records */
  1096. err = mtk_sha_record_init(cryp);
  1097. if (err)
  1098. goto err_record;
  1099. err = devm_request_irq(cryp->dev, cryp->irq[MTK_RING2], mtk_sha_irq,
  1100. 0, "mtk-sha", cryp->sha[0]);
  1101. if (err) {
  1102. dev_err(cryp->dev, "unable to request sha irq0.\n");
  1103. goto err_res;
  1104. }
  1105. err = devm_request_irq(cryp->dev, cryp->irq[MTK_RING3], mtk_sha_irq,
  1106. 0, "mtk-sha", cryp->sha[1]);
  1107. if (err) {
  1108. dev_err(cryp->dev, "unable to request sha irq1.\n");
  1109. goto err_res;
  1110. }
  1111. /* Enable ring2 and ring3 interrupt for hash */
  1112. mtk_sha_write(cryp, AIC_ENABLE_SET(MTK_RING2), MTK_IRQ_RDR2);
  1113. mtk_sha_write(cryp, AIC_ENABLE_SET(MTK_RING3), MTK_IRQ_RDR3);
  1114. spin_lock(&mtk_sha.lock);
  1115. list_add_tail(&cryp->sha_list, &mtk_sha.dev_list);
  1116. spin_unlock(&mtk_sha.lock);
  1117. err = mtk_sha_register_algs();
  1118. if (err)
  1119. goto err_algs;
  1120. return 0;
  1121. err_algs:
  1122. spin_lock(&mtk_sha.lock);
  1123. list_del(&cryp->sha_list);
  1124. spin_unlock(&mtk_sha.lock);
  1125. err_res:
  1126. mtk_sha_record_free(cryp);
  1127. err_record:
  1128. dev_err(cryp->dev, "mtk-sha initialization failed.\n");
  1129. return err;
  1130. }
  1131. void mtk_hash_alg_release(struct mtk_cryp *cryp)
  1132. {
  1133. spin_lock(&mtk_sha.lock);
  1134. list_del(&cryp->sha_list);
  1135. spin_unlock(&mtk_sha.lock);
  1136. mtk_sha_unregister_algs();
  1137. mtk_sha_record_free(cryp);
  1138. }