qi.c 20 KB

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  1. /*
  2. * CAAM/SEC 4.x QI transport/backend driver
  3. * Queue Interface backend functionality
  4. *
  5. * Copyright 2013-2016 Freescale Semiconductor, Inc.
  6. * Copyright 2016-2017 NXP
  7. */
  8. #include <linux/cpumask.h>
  9. #include <linux/kthread.h>
  10. #include <soc/fsl/qman.h>
  11. #include "regs.h"
  12. #include "qi.h"
  13. #include "desc.h"
  14. #include "intern.h"
  15. #include "desc_constr.h"
  16. #define PREHDR_RSLS_SHIFT 31
  17. /*
  18. * Use a reasonable backlog of frames (per CPU) as congestion threshold,
  19. * so that resources used by the in-flight buffers do not become a memory hog.
  20. */
  21. #define MAX_RSP_FQ_BACKLOG_PER_CPU 256
  22. /* Length of a single buffer in the QI driver memory cache */
  23. #define CAAM_QI_MEMCACHE_SIZE 512
  24. #define CAAM_QI_ENQUEUE_RETRIES 10000
  25. #define CAAM_NAPI_WEIGHT 63
  26. /*
  27. * caam_napi - struct holding CAAM NAPI-related params
  28. * @irqtask: IRQ task for QI backend
  29. * @p: QMan portal
  30. */
  31. struct caam_napi {
  32. struct napi_struct irqtask;
  33. struct qman_portal *p;
  34. };
  35. /*
  36. * caam_qi_pcpu_priv - percpu private data structure to main list of pending
  37. * responses expected on each cpu.
  38. * @caam_napi: CAAM NAPI params
  39. * @net_dev: netdev used by NAPI
  40. * @rsp_fq: response FQ from CAAM
  41. */
  42. struct caam_qi_pcpu_priv {
  43. struct caam_napi caam_napi;
  44. struct net_device net_dev;
  45. struct qman_fq *rsp_fq;
  46. } ____cacheline_aligned;
  47. static DEFINE_PER_CPU(struct caam_qi_pcpu_priv, pcpu_qipriv);
  48. /*
  49. * caam_qi_priv - CAAM QI backend private params
  50. * @cgr: QMan congestion group
  51. * @qi_pdev: platform device for QI backend
  52. */
  53. struct caam_qi_priv {
  54. struct qman_cgr cgr;
  55. struct platform_device *qi_pdev;
  56. };
  57. static struct caam_qi_priv qipriv ____cacheline_aligned;
  58. /*
  59. * This is written by only one core - the one that initialized the CGR - and
  60. * read by multiple cores (all the others).
  61. */
  62. bool caam_congested __read_mostly;
  63. EXPORT_SYMBOL(caam_congested);
  64. #ifdef CONFIG_DEBUG_FS
  65. /*
  66. * This is a counter for the number of times the congestion group (where all
  67. * the request and response queueus are) reached congestion. Incremented
  68. * each time the congestion callback is called with congested == true.
  69. */
  70. static u64 times_congested;
  71. #endif
  72. /*
  73. * CPU from where the module initialised. This is required because QMan driver
  74. * requires CGRs to be removed from same CPU from where they were originally
  75. * allocated.
  76. */
  77. static int mod_init_cpu;
  78. /*
  79. * This is a a cache of buffers, from which the users of CAAM QI driver
  80. * can allocate short (CAAM_QI_MEMCACHE_SIZE) buffers. It's faster than
  81. * doing malloc on the hotpath.
  82. * NOTE: A more elegant solution would be to have some headroom in the frames
  83. * being processed. This could be added by the dpaa-ethernet driver.
  84. * This would pose a problem for userspace application processing which
  85. * cannot know of this limitation. So for now, this will work.
  86. * NOTE: The memcache is SMP-safe. No need to handle spinlocks in-here
  87. */
  88. static struct kmem_cache *qi_cache;
  89. int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req)
  90. {
  91. struct qm_fd fd;
  92. dma_addr_t addr;
  93. int ret;
  94. int num_retries = 0;
  95. qm_fd_clear_fd(&fd);
  96. qm_fd_set_compound(&fd, qm_sg_entry_get_len(&req->fd_sgt[1]));
  97. addr = dma_map_single(qidev, req->fd_sgt, sizeof(req->fd_sgt),
  98. DMA_BIDIRECTIONAL);
  99. if (dma_mapping_error(qidev, addr)) {
  100. dev_err(qidev, "DMA mapping error for QI enqueue request\n");
  101. return -EIO;
  102. }
  103. qm_fd_addr_set64(&fd, addr);
  104. do {
  105. ret = qman_enqueue(req->drv_ctx->req_fq, &fd);
  106. if (likely(!ret))
  107. return 0;
  108. if (ret != -EBUSY)
  109. break;
  110. num_retries++;
  111. } while (num_retries < CAAM_QI_ENQUEUE_RETRIES);
  112. dev_err(qidev, "qman_enqueue failed: %d\n", ret);
  113. return ret;
  114. }
  115. EXPORT_SYMBOL(caam_qi_enqueue);
  116. static void caam_fq_ern_cb(struct qman_portal *qm, struct qman_fq *fq,
  117. const union qm_mr_entry *msg)
  118. {
  119. const struct qm_fd *fd;
  120. struct caam_drv_req *drv_req;
  121. struct device *qidev = &(raw_cpu_ptr(&pcpu_qipriv)->net_dev.dev);
  122. fd = &msg->ern.fd;
  123. if (qm_fd_get_format(fd) != qm_fd_compound) {
  124. dev_err(qidev, "Non-compound FD from CAAM\n");
  125. return;
  126. }
  127. drv_req = (struct caam_drv_req *)phys_to_virt(qm_fd_addr_get64(fd));
  128. if (!drv_req) {
  129. dev_err(qidev,
  130. "Can't find original request for CAAM response\n");
  131. return;
  132. }
  133. dma_unmap_single(drv_req->drv_ctx->qidev, qm_fd_addr(fd),
  134. sizeof(drv_req->fd_sgt), DMA_BIDIRECTIONAL);
  135. drv_req->cbk(drv_req, -EIO);
  136. }
  137. static struct qman_fq *create_caam_req_fq(struct device *qidev,
  138. struct qman_fq *rsp_fq,
  139. dma_addr_t hwdesc,
  140. int fq_sched_flag)
  141. {
  142. int ret;
  143. struct qman_fq *req_fq;
  144. struct qm_mcc_initfq opts;
  145. req_fq = kzalloc(sizeof(*req_fq), GFP_ATOMIC);
  146. if (!req_fq)
  147. return ERR_PTR(-ENOMEM);
  148. req_fq->cb.ern = caam_fq_ern_cb;
  149. req_fq->cb.fqs = NULL;
  150. ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
  151. QMAN_FQ_FLAG_TO_DCPORTAL, req_fq);
  152. if (ret) {
  153. dev_err(qidev, "Failed to create session req FQ\n");
  154. goto create_req_fq_fail;
  155. }
  156. memset(&opts, 0, sizeof(opts));
  157. opts.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_DESTWQ |
  158. QM_INITFQ_WE_CONTEXTB |
  159. QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CGID);
  160. opts.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_CPCSTASH | QM_FQCTRL_CGE);
  161. qm_fqd_set_destwq(&opts.fqd, qm_channel_caam, 2);
  162. opts.fqd.context_b = cpu_to_be32(qman_fq_fqid(rsp_fq));
  163. qm_fqd_context_a_set64(&opts.fqd, hwdesc);
  164. opts.fqd.cgid = qipriv.cgr.cgrid;
  165. ret = qman_init_fq(req_fq, fq_sched_flag, &opts);
  166. if (ret) {
  167. dev_err(qidev, "Failed to init session req FQ\n");
  168. goto init_req_fq_fail;
  169. }
  170. dev_info(qidev, "Allocated request FQ %u for CPU %u\n", req_fq->fqid,
  171. smp_processor_id());
  172. return req_fq;
  173. init_req_fq_fail:
  174. qman_destroy_fq(req_fq);
  175. create_req_fq_fail:
  176. kfree(req_fq);
  177. return ERR_PTR(ret);
  178. }
  179. static int empty_retired_fq(struct device *qidev, struct qman_fq *fq)
  180. {
  181. int ret;
  182. ret = qman_volatile_dequeue(fq, QMAN_VOLATILE_FLAG_WAIT_INT |
  183. QMAN_VOLATILE_FLAG_FINISH,
  184. QM_VDQCR_PRECEDENCE_VDQCR |
  185. QM_VDQCR_NUMFRAMES_TILLEMPTY);
  186. if (ret) {
  187. dev_err(qidev, "Volatile dequeue fail for FQ: %u\n", fq->fqid);
  188. return ret;
  189. }
  190. do {
  191. struct qman_portal *p;
  192. p = qman_get_affine_portal(smp_processor_id());
  193. qman_p_poll_dqrr(p, 16);
  194. } while (fq->flags & QMAN_FQ_STATE_NE);
  195. return 0;
  196. }
  197. static int kill_fq(struct device *qidev, struct qman_fq *fq)
  198. {
  199. u32 flags;
  200. int ret;
  201. ret = qman_retire_fq(fq, &flags);
  202. if (ret < 0) {
  203. dev_err(qidev, "qman_retire_fq failed: %d\n", ret);
  204. return ret;
  205. }
  206. if (!ret)
  207. goto empty_fq;
  208. /* Async FQ retirement condition */
  209. if (ret == 1) {
  210. /* Retry till FQ gets in retired state */
  211. do {
  212. msleep(20);
  213. } while (fq->state != qman_fq_state_retired);
  214. WARN_ON(fq->flags & QMAN_FQ_STATE_BLOCKOOS);
  215. WARN_ON(fq->flags & QMAN_FQ_STATE_ORL);
  216. }
  217. empty_fq:
  218. if (fq->flags & QMAN_FQ_STATE_NE) {
  219. ret = empty_retired_fq(qidev, fq);
  220. if (ret) {
  221. dev_err(qidev, "empty_retired_fq fail for FQ: %u\n",
  222. fq->fqid);
  223. return ret;
  224. }
  225. }
  226. ret = qman_oos_fq(fq);
  227. if (ret)
  228. dev_err(qidev, "OOS of FQID: %u failed\n", fq->fqid);
  229. qman_destroy_fq(fq);
  230. return ret;
  231. }
  232. static int empty_caam_fq(struct qman_fq *fq)
  233. {
  234. int ret;
  235. struct qm_mcr_queryfq_np np;
  236. /* Wait till the older CAAM FQ get empty */
  237. do {
  238. ret = qman_query_fq_np(fq, &np);
  239. if (ret)
  240. return ret;
  241. if (!qm_mcr_np_get(&np, frm_cnt))
  242. break;
  243. msleep(20);
  244. } while (1);
  245. /*
  246. * Give extra time for pending jobs from this FQ in holding tanks
  247. * to get processed
  248. */
  249. msleep(20);
  250. return 0;
  251. }
  252. int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc)
  253. {
  254. int ret;
  255. u32 num_words;
  256. struct qman_fq *new_fq, *old_fq;
  257. struct device *qidev = drv_ctx->qidev;
  258. num_words = desc_len(sh_desc);
  259. if (num_words > MAX_SDLEN) {
  260. dev_err(qidev, "Invalid descriptor len: %d words\n", num_words);
  261. return -EINVAL;
  262. }
  263. /* Note down older req FQ */
  264. old_fq = drv_ctx->req_fq;
  265. /* Create a new req FQ in parked state */
  266. new_fq = create_caam_req_fq(drv_ctx->qidev, drv_ctx->rsp_fq,
  267. drv_ctx->context_a, 0);
  268. if (unlikely(IS_ERR_OR_NULL(new_fq))) {
  269. dev_err(qidev, "FQ allocation for shdesc update failed\n");
  270. return PTR_ERR(new_fq);
  271. }
  272. /* Hook up new FQ to context so that new requests keep queuing */
  273. drv_ctx->req_fq = new_fq;
  274. /* Empty and remove the older FQ */
  275. ret = empty_caam_fq(old_fq);
  276. if (ret) {
  277. dev_err(qidev, "Old CAAM FQ empty failed: %d\n", ret);
  278. /* We can revert to older FQ */
  279. drv_ctx->req_fq = old_fq;
  280. if (kill_fq(qidev, new_fq))
  281. dev_warn(qidev, "New CAAM FQ: %u kill failed\n",
  282. new_fq->fqid);
  283. return ret;
  284. }
  285. /*
  286. * Re-initialise pre-header. Set RSLS and SDLEN.
  287. * Update the shared descriptor for driver context.
  288. */
  289. drv_ctx->prehdr[0] = cpu_to_caam32((1 << PREHDR_RSLS_SHIFT) |
  290. num_words);
  291. memcpy(drv_ctx->sh_desc, sh_desc, desc_bytes(sh_desc));
  292. dma_sync_single_for_device(qidev, drv_ctx->context_a,
  293. sizeof(drv_ctx->sh_desc) +
  294. sizeof(drv_ctx->prehdr),
  295. DMA_BIDIRECTIONAL);
  296. /* Put the new FQ in scheduled state */
  297. ret = qman_schedule_fq(new_fq);
  298. if (ret) {
  299. dev_err(qidev, "Fail to sched new CAAM FQ, ecode = %d\n", ret);
  300. /*
  301. * We can kill new FQ and revert to old FQ.
  302. * Since the desc is already modified, it is success case
  303. */
  304. drv_ctx->req_fq = old_fq;
  305. if (kill_fq(qidev, new_fq))
  306. dev_warn(qidev, "New CAAM FQ: %u kill failed\n",
  307. new_fq->fqid);
  308. } else if (kill_fq(qidev, old_fq)) {
  309. dev_warn(qidev, "Old CAAM FQ: %u kill failed\n", old_fq->fqid);
  310. }
  311. return 0;
  312. }
  313. EXPORT_SYMBOL(caam_drv_ctx_update);
  314. struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev,
  315. int *cpu,
  316. u32 *sh_desc)
  317. {
  318. size_t size;
  319. u32 num_words;
  320. dma_addr_t hwdesc;
  321. struct caam_drv_ctx *drv_ctx;
  322. const cpumask_t *cpus = qman_affine_cpus();
  323. static DEFINE_PER_CPU(int, last_cpu);
  324. num_words = desc_len(sh_desc);
  325. if (num_words > MAX_SDLEN) {
  326. dev_err(qidev, "Invalid descriptor len: %d words\n",
  327. num_words);
  328. return ERR_PTR(-EINVAL);
  329. }
  330. drv_ctx = kzalloc(sizeof(*drv_ctx), GFP_ATOMIC);
  331. if (!drv_ctx)
  332. return ERR_PTR(-ENOMEM);
  333. /*
  334. * Initialise pre-header - set RSLS and SDLEN - and shared descriptor
  335. * and dma-map them.
  336. */
  337. drv_ctx->prehdr[0] = cpu_to_caam32((1 << PREHDR_RSLS_SHIFT) |
  338. num_words);
  339. memcpy(drv_ctx->sh_desc, sh_desc, desc_bytes(sh_desc));
  340. size = sizeof(drv_ctx->prehdr) + sizeof(drv_ctx->sh_desc);
  341. hwdesc = dma_map_single(qidev, drv_ctx->prehdr, size,
  342. DMA_BIDIRECTIONAL);
  343. if (dma_mapping_error(qidev, hwdesc)) {
  344. dev_err(qidev, "DMA map error for preheader + shdesc\n");
  345. kfree(drv_ctx);
  346. return ERR_PTR(-ENOMEM);
  347. }
  348. drv_ctx->context_a = hwdesc;
  349. /* If given CPU does not own the portal, choose another one that does */
  350. if (!cpumask_test_cpu(*cpu, cpus)) {
  351. int *pcpu = &get_cpu_var(last_cpu);
  352. *pcpu = cpumask_next(*pcpu, cpus);
  353. if (*pcpu >= nr_cpu_ids)
  354. *pcpu = cpumask_first(cpus);
  355. *cpu = *pcpu;
  356. put_cpu_var(last_cpu);
  357. }
  358. drv_ctx->cpu = *cpu;
  359. /* Find response FQ hooked with this CPU */
  360. drv_ctx->rsp_fq = per_cpu(pcpu_qipriv.rsp_fq, drv_ctx->cpu);
  361. /* Attach request FQ */
  362. drv_ctx->req_fq = create_caam_req_fq(qidev, drv_ctx->rsp_fq, hwdesc,
  363. QMAN_INITFQ_FLAG_SCHED);
  364. if (unlikely(IS_ERR_OR_NULL(drv_ctx->req_fq))) {
  365. dev_err(qidev, "create_caam_req_fq failed\n");
  366. dma_unmap_single(qidev, hwdesc, size, DMA_BIDIRECTIONAL);
  367. kfree(drv_ctx);
  368. return ERR_PTR(-ENOMEM);
  369. }
  370. drv_ctx->qidev = qidev;
  371. return drv_ctx;
  372. }
  373. EXPORT_SYMBOL(caam_drv_ctx_init);
  374. void *qi_cache_alloc(gfp_t flags)
  375. {
  376. return kmem_cache_alloc(qi_cache, flags);
  377. }
  378. EXPORT_SYMBOL(qi_cache_alloc);
  379. void qi_cache_free(void *obj)
  380. {
  381. kmem_cache_free(qi_cache, obj);
  382. }
  383. EXPORT_SYMBOL(qi_cache_free);
  384. static int caam_qi_poll(struct napi_struct *napi, int budget)
  385. {
  386. struct caam_napi *np = container_of(napi, struct caam_napi, irqtask);
  387. int cleaned = qman_p_poll_dqrr(np->p, budget);
  388. if (cleaned < budget) {
  389. napi_complete(napi);
  390. qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
  391. }
  392. return cleaned;
  393. }
  394. void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx)
  395. {
  396. if (IS_ERR_OR_NULL(drv_ctx))
  397. return;
  398. /* Remove request FQ */
  399. if (kill_fq(drv_ctx->qidev, drv_ctx->req_fq))
  400. dev_err(drv_ctx->qidev, "Crypto session req FQ kill failed\n");
  401. dma_unmap_single(drv_ctx->qidev, drv_ctx->context_a,
  402. sizeof(drv_ctx->sh_desc) + sizeof(drv_ctx->prehdr),
  403. DMA_BIDIRECTIONAL);
  404. kfree(drv_ctx);
  405. }
  406. EXPORT_SYMBOL(caam_drv_ctx_rel);
  407. int caam_qi_shutdown(struct device *qidev)
  408. {
  409. int i, ret;
  410. struct caam_qi_priv *priv = dev_get_drvdata(qidev);
  411. const cpumask_t *cpus = qman_affine_cpus();
  412. struct cpumask old_cpumask = current->cpus_allowed;
  413. for_each_cpu(i, cpus) {
  414. struct napi_struct *irqtask;
  415. irqtask = &per_cpu_ptr(&pcpu_qipriv.caam_napi, i)->irqtask;
  416. napi_disable(irqtask);
  417. netif_napi_del(irqtask);
  418. if (kill_fq(qidev, per_cpu(pcpu_qipriv.rsp_fq, i)))
  419. dev_err(qidev, "Rsp FQ kill failed, cpu: %d\n", i);
  420. kfree(per_cpu(pcpu_qipriv.rsp_fq, i));
  421. }
  422. /*
  423. * QMan driver requires CGRs to be deleted from same CPU from where they
  424. * were instantiated. Hence we get the module removal execute from the
  425. * same CPU from where it was originally inserted.
  426. */
  427. set_cpus_allowed_ptr(current, get_cpu_mask(mod_init_cpu));
  428. ret = qman_delete_cgr(&priv->cgr);
  429. if (ret)
  430. dev_err(qidev, "Deletion of CGR failed: %d\n", ret);
  431. else
  432. qman_release_cgrid(priv->cgr.cgrid);
  433. kmem_cache_destroy(qi_cache);
  434. /* Now that we're done with the CGRs, restore the cpus allowed mask */
  435. set_cpus_allowed_ptr(current, &old_cpumask);
  436. platform_device_unregister(priv->qi_pdev);
  437. return ret;
  438. }
  439. static void cgr_cb(struct qman_portal *qm, struct qman_cgr *cgr, int congested)
  440. {
  441. caam_congested = congested;
  442. if (congested) {
  443. #ifdef CONFIG_DEBUG_FS
  444. times_congested++;
  445. #endif
  446. pr_debug_ratelimited("CAAM entered congestion\n");
  447. } else {
  448. pr_debug_ratelimited("CAAM exited congestion\n");
  449. }
  450. }
  451. static int caam_qi_napi_schedule(struct qman_portal *p, struct caam_napi *np)
  452. {
  453. /*
  454. * In case of threaded ISR, for RT kernels in_irq() does not return
  455. * appropriate value, so use in_serving_softirq to distinguish between
  456. * softirq and irq contexts.
  457. */
  458. if (unlikely(in_irq() || !in_serving_softirq())) {
  459. /* Disable QMan IRQ source and invoke NAPI */
  460. qman_p_irqsource_remove(p, QM_PIRQ_DQRI);
  461. np->p = p;
  462. napi_schedule(&np->irqtask);
  463. return 1;
  464. }
  465. return 0;
  466. }
  467. static enum qman_cb_dqrr_result caam_rsp_fq_dqrr_cb(struct qman_portal *p,
  468. struct qman_fq *rsp_fq,
  469. const struct qm_dqrr_entry *dqrr)
  470. {
  471. struct caam_napi *caam_napi = raw_cpu_ptr(&pcpu_qipriv.caam_napi);
  472. struct caam_drv_req *drv_req;
  473. const struct qm_fd *fd;
  474. struct device *qidev = &(raw_cpu_ptr(&pcpu_qipriv)->net_dev.dev);
  475. u32 status;
  476. if (caam_qi_napi_schedule(p, caam_napi))
  477. return qman_cb_dqrr_stop;
  478. fd = &dqrr->fd;
  479. status = be32_to_cpu(fd->status);
  480. if (unlikely(status))
  481. dev_err(qidev, "Error: %#x in CAAM response FD\n", status);
  482. if (unlikely(qm_fd_get_format(fd) != qm_fd_compound)) {
  483. dev_err(qidev, "Non-compound FD from CAAM\n");
  484. return qman_cb_dqrr_consume;
  485. }
  486. drv_req = (struct caam_drv_req *)phys_to_virt(qm_fd_addr_get64(fd));
  487. if (unlikely(!drv_req)) {
  488. dev_err(qidev,
  489. "Can't find original request for caam response\n");
  490. return qman_cb_dqrr_consume;
  491. }
  492. dma_unmap_single(drv_req->drv_ctx->qidev, qm_fd_addr(fd),
  493. sizeof(drv_req->fd_sgt), DMA_BIDIRECTIONAL);
  494. drv_req->cbk(drv_req, status);
  495. return qman_cb_dqrr_consume;
  496. }
  497. static int alloc_rsp_fq_cpu(struct device *qidev, unsigned int cpu)
  498. {
  499. struct qm_mcc_initfq opts;
  500. struct qman_fq *fq;
  501. int ret;
  502. fq = kzalloc(sizeof(*fq), GFP_KERNEL | GFP_DMA);
  503. if (!fq)
  504. return -ENOMEM;
  505. fq->cb.dqrr = caam_rsp_fq_dqrr_cb;
  506. ret = qman_create_fq(0, QMAN_FQ_FLAG_NO_ENQUEUE |
  507. QMAN_FQ_FLAG_DYNAMIC_FQID, fq);
  508. if (ret) {
  509. dev_err(qidev, "Rsp FQ create failed\n");
  510. kfree(fq);
  511. return -ENODEV;
  512. }
  513. memset(&opts, 0, sizeof(opts));
  514. opts.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_DESTWQ |
  515. QM_INITFQ_WE_CONTEXTB |
  516. QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CGID);
  517. opts.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_CTXASTASHING |
  518. QM_FQCTRL_CPCSTASH | QM_FQCTRL_CGE);
  519. qm_fqd_set_destwq(&opts.fqd, qman_affine_channel(cpu), 3);
  520. opts.fqd.cgid = qipriv.cgr.cgrid;
  521. opts.fqd.context_a.stashing.exclusive = QM_STASHING_EXCL_CTX |
  522. QM_STASHING_EXCL_DATA;
  523. qm_fqd_set_stashing(&opts.fqd, 0, 1, 1);
  524. ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
  525. if (ret) {
  526. dev_err(qidev, "Rsp FQ init failed\n");
  527. kfree(fq);
  528. return -ENODEV;
  529. }
  530. per_cpu(pcpu_qipriv.rsp_fq, cpu) = fq;
  531. dev_info(qidev, "Allocated response FQ %u for CPU %u", fq->fqid, cpu);
  532. return 0;
  533. }
  534. static int init_cgr(struct device *qidev)
  535. {
  536. int ret;
  537. struct qm_mcc_initcgr opts;
  538. const u64 cpus = *(u64 *)qman_affine_cpus();
  539. const int num_cpus = hweight64(cpus);
  540. const u64 val = num_cpus * MAX_RSP_FQ_BACKLOG_PER_CPU;
  541. ret = qman_alloc_cgrid(&qipriv.cgr.cgrid);
  542. if (ret) {
  543. dev_err(qidev, "CGR alloc failed for rsp FQs: %d\n", ret);
  544. return ret;
  545. }
  546. qipriv.cgr.cb = cgr_cb;
  547. memset(&opts, 0, sizeof(opts));
  548. opts.we_mask = cpu_to_be16(QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES |
  549. QM_CGR_WE_MODE);
  550. opts.cgr.cscn_en = QM_CGR_EN;
  551. opts.cgr.mode = QMAN_CGR_MODE_FRAME;
  552. qm_cgr_cs_thres_set64(&opts.cgr.cs_thres, val, 1);
  553. ret = qman_create_cgr(&qipriv.cgr, QMAN_CGR_FLAG_USE_INIT, &opts);
  554. if (ret) {
  555. dev_err(qidev, "Error %d creating CAAM CGRID: %u\n", ret,
  556. qipriv.cgr.cgrid);
  557. return ret;
  558. }
  559. dev_info(qidev, "Congestion threshold set to %llu\n", val);
  560. return 0;
  561. }
  562. static int alloc_rsp_fqs(struct device *qidev)
  563. {
  564. int ret, i;
  565. const cpumask_t *cpus = qman_affine_cpus();
  566. /*Now create response FQs*/
  567. for_each_cpu(i, cpus) {
  568. ret = alloc_rsp_fq_cpu(qidev, i);
  569. if (ret) {
  570. dev_err(qidev, "CAAM rsp FQ alloc failed, cpu: %u", i);
  571. return ret;
  572. }
  573. }
  574. return 0;
  575. }
  576. static void free_rsp_fqs(void)
  577. {
  578. int i;
  579. const cpumask_t *cpus = qman_affine_cpus();
  580. for_each_cpu(i, cpus)
  581. kfree(per_cpu(pcpu_qipriv.rsp_fq, i));
  582. }
  583. int caam_qi_init(struct platform_device *caam_pdev)
  584. {
  585. int err, i;
  586. struct platform_device *qi_pdev;
  587. struct device *ctrldev = &caam_pdev->dev, *qidev;
  588. struct caam_drv_private *ctrlpriv;
  589. const cpumask_t *cpus = qman_affine_cpus();
  590. struct cpumask old_cpumask = current->cpus_allowed;
  591. static struct platform_device_info qi_pdev_info = {
  592. .name = "caam_qi",
  593. .id = PLATFORM_DEVID_NONE
  594. };
  595. /*
  596. * QMAN requires CGRs to be removed from same CPU+portal from where it
  597. * was originally allocated. Hence we need to note down the
  598. * initialisation CPU and use the same CPU for module exit.
  599. * We select the first CPU to from the list of portal owning CPUs.
  600. * Then we pin module init to this CPU.
  601. */
  602. mod_init_cpu = cpumask_first(cpus);
  603. set_cpus_allowed_ptr(current, get_cpu_mask(mod_init_cpu));
  604. qi_pdev_info.parent = ctrldev;
  605. qi_pdev_info.dma_mask = dma_get_mask(ctrldev);
  606. qi_pdev = platform_device_register_full(&qi_pdev_info);
  607. if (IS_ERR(qi_pdev))
  608. return PTR_ERR(qi_pdev);
  609. ctrlpriv = dev_get_drvdata(ctrldev);
  610. qidev = &qi_pdev->dev;
  611. qipriv.qi_pdev = qi_pdev;
  612. dev_set_drvdata(qidev, &qipriv);
  613. /* Initialize the congestion detection */
  614. err = init_cgr(qidev);
  615. if (err) {
  616. dev_err(qidev, "CGR initialization failed: %d\n", err);
  617. platform_device_unregister(qi_pdev);
  618. return err;
  619. }
  620. /* Initialise response FQs */
  621. err = alloc_rsp_fqs(qidev);
  622. if (err) {
  623. dev_err(qidev, "Can't allocate CAAM response FQs: %d\n", err);
  624. free_rsp_fqs();
  625. platform_device_unregister(qi_pdev);
  626. return err;
  627. }
  628. /*
  629. * Enable the NAPI contexts on each of the core which has an affine
  630. * portal.
  631. */
  632. for_each_cpu(i, cpus) {
  633. struct caam_qi_pcpu_priv *priv = per_cpu_ptr(&pcpu_qipriv, i);
  634. struct caam_napi *caam_napi = &priv->caam_napi;
  635. struct napi_struct *irqtask = &caam_napi->irqtask;
  636. struct net_device *net_dev = &priv->net_dev;
  637. net_dev->dev = *qidev;
  638. INIT_LIST_HEAD(&net_dev->napi_list);
  639. netif_napi_add(net_dev, irqtask, caam_qi_poll,
  640. CAAM_NAPI_WEIGHT);
  641. napi_enable(irqtask);
  642. }
  643. /* Hook up QI device to parent controlling caam device */
  644. ctrlpriv->qidev = qidev;
  645. qi_cache = kmem_cache_create("caamqicache", CAAM_QI_MEMCACHE_SIZE, 0,
  646. SLAB_CACHE_DMA, NULL);
  647. if (!qi_cache) {
  648. dev_err(qidev, "Can't allocate CAAM cache\n");
  649. free_rsp_fqs();
  650. platform_device_unregister(qi_pdev);
  651. return -ENOMEM;
  652. }
  653. /* Done with the CGRs; restore the cpus allowed mask */
  654. set_cpus_allowed_ptr(current, &old_cpumask);
  655. #ifdef CONFIG_DEBUG_FS
  656. ctrlpriv->qi_congested = debugfs_create_file("qi_congested", 0444,
  657. ctrlpriv->ctl,
  658. &times_congested,
  659. &caam_fops_u64_ro);
  660. #endif
  661. dev_info(qidev, "Linux CAAM Queue I/F driver initialised\n");
  662. return 0;
  663. }