Kconfig 19 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for s390 cryptographic adapters"
  52. depends on S390
  53. select HW_RANDOM
  54. help
  55. Select this option if you want to enable support for
  56. s390 cryptographic adapters like:
  57. + PCI-X Cryptographic Coprocessor (PCIXCC)
  58. + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
  59. + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
  60. + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
  61. config PKEY
  62. tristate "Kernel API for protected key handling"
  63. depends on S390
  64. depends on ZCRYPT
  65. help
  66. With this option enabled the pkey kernel module provides an API
  67. for creation and handling of protected keys. Other parts of the
  68. kernel or userspace applications may use these functions.
  69. Select this option if you want to enable the kernel and userspace
  70. API for proteced key handling.
  71. Please note that creation of protected keys from secure keys
  72. requires to have at least one CEX card in coprocessor mode
  73. available at runtime.
  74. config CRYPTO_SHA1_S390
  75. tristate "SHA1 digest algorithm"
  76. depends on S390
  77. select CRYPTO_HASH
  78. help
  79. This is the s390 hardware accelerated implementation of the
  80. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  81. It is available as of z990.
  82. config CRYPTO_SHA256_S390
  83. tristate "SHA256 digest algorithm"
  84. depends on S390
  85. select CRYPTO_HASH
  86. help
  87. This is the s390 hardware accelerated implementation of the
  88. SHA256 secure hash standard (DFIPS 180-2).
  89. It is available as of z9.
  90. config CRYPTO_SHA512_S390
  91. tristate "SHA384 and SHA512 digest algorithm"
  92. depends on S390
  93. select CRYPTO_HASH
  94. help
  95. This is the s390 hardware accelerated implementation of the
  96. SHA512 secure hash standard.
  97. It is available as of z10.
  98. config CRYPTO_DES_S390
  99. tristate "DES and Triple DES cipher algorithms"
  100. depends on S390
  101. select CRYPTO_ALGAPI
  102. select CRYPTO_BLKCIPHER
  103. select CRYPTO_DES
  104. help
  105. This is the s390 hardware accelerated implementation of the
  106. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  107. As of z990 the ECB and CBC mode are hardware accelerated.
  108. As of z196 the CTR mode is hardware accelerated.
  109. config CRYPTO_AES_S390
  110. tristate "AES cipher algorithms"
  111. depends on S390
  112. select CRYPTO_ALGAPI
  113. select CRYPTO_BLKCIPHER
  114. select PKEY
  115. help
  116. This is the s390 hardware accelerated implementation of the
  117. AES cipher algorithms (FIPS-197).
  118. As of z9 the ECB and CBC modes are hardware accelerated
  119. for 128 bit keys.
  120. As of z10 the ECB and CBC modes are hardware accelerated
  121. for all AES key sizes.
  122. As of z196 the CTR mode is hardware accelerated for all AES
  123. key sizes and XTS mode is hardware accelerated for 256 and
  124. 512 bit keys.
  125. config S390_PRNG
  126. tristate "Pseudo random number generator device driver"
  127. depends on S390
  128. default "m"
  129. help
  130. Select this option if you want to use the s390 pseudo random number
  131. generator. The PRNG is part of the cryptographic processor functions
  132. and uses triple-DES to generate secure random numbers like the
  133. ANSI X9.17 standard. User-space programs access the
  134. pseudo-random-number device through the char device /dev/prandom.
  135. It is available as of z9.
  136. config CRYPTO_GHASH_S390
  137. tristate "GHASH digest algorithm"
  138. depends on S390
  139. select CRYPTO_HASH
  140. help
  141. This is the s390 hardware accelerated implementation of the
  142. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  143. It is available as of z196.
  144. config CRYPTO_CRC32_S390
  145. tristate "CRC-32 algorithms"
  146. depends on S390
  147. select CRYPTO_HASH
  148. select CRC32
  149. help
  150. Select this option if you want to use hardware accelerated
  151. implementations of CRC algorithms. With this option, you
  152. can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
  153. and CRC-32C (Castagnoli).
  154. It is available with IBM z13 or later.
  155. config CRYPTO_DEV_MV_CESA
  156. tristate "Marvell's Cryptographic Engine"
  157. depends on PLAT_ORION
  158. select CRYPTO_AES
  159. select CRYPTO_BLKCIPHER
  160. select CRYPTO_HASH
  161. select SRAM
  162. help
  163. This driver allows you to utilize the Cryptographic Engines and
  164. Security Accelerator (CESA) which can be found on the Marvell Orion
  165. and Kirkwood SoCs, such as QNAP's TS-209.
  166. Currently the driver supports AES in ECB and CBC mode without DMA.
  167. config CRYPTO_DEV_MARVELL_CESA
  168. tristate "New Marvell's Cryptographic Engine driver"
  169. depends on PLAT_ORION || ARCH_MVEBU
  170. select CRYPTO_AES
  171. select CRYPTO_DES
  172. select CRYPTO_BLKCIPHER
  173. select CRYPTO_HASH
  174. select SRAM
  175. help
  176. This driver allows you to utilize the Cryptographic Engines and
  177. Security Accelerator (CESA) which can be found on the Armada 370.
  178. This driver supports CPU offload through DMA transfers.
  179. This driver is aimed at replacing the mv_cesa driver. This will only
  180. happen once it has received proper testing.
  181. config CRYPTO_DEV_NIAGARA2
  182. tristate "Niagara2 Stream Processing Unit driver"
  183. select CRYPTO_DES
  184. select CRYPTO_BLKCIPHER
  185. select CRYPTO_HASH
  186. select CRYPTO_MD5
  187. select CRYPTO_SHA1
  188. select CRYPTO_SHA256
  189. depends on SPARC64
  190. help
  191. Each core of a Niagara2 processor contains a Stream
  192. Processing Unit, which itself contains several cryptographic
  193. sub-units. One set provides the Modular Arithmetic Unit,
  194. used for SSL offload. The other set provides the Cipher
  195. Group, which can perform encryption, decryption, hashing,
  196. checksumming, and raw copies.
  197. config CRYPTO_DEV_HIFN_795X
  198. tristate "Driver HIFN 795x crypto accelerator chips"
  199. select CRYPTO_DES
  200. select CRYPTO_BLKCIPHER
  201. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  202. depends on PCI
  203. depends on !ARCH_DMA_ADDR_T_64BIT
  204. help
  205. This option allows you to have support for HIFN 795x crypto adapters.
  206. config CRYPTO_DEV_HIFN_795X_RNG
  207. bool "HIFN 795x random number generator"
  208. depends on CRYPTO_DEV_HIFN_795X
  209. help
  210. Select this option if you want to enable the random number generator
  211. on the HIFN 795x crypto adapters.
  212. source drivers/crypto/caam/Kconfig
  213. config CRYPTO_DEV_TALITOS
  214. tristate "Talitos Freescale Security Engine (SEC)"
  215. select CRYPTO_AEAD
  216. select CRYPTO_AUTHENC
  217. select CRYPTO_BLKCIPHER
  218. select CRYPTO_HASH
  219. select HW_RANDOM
  220. depends on FSL_SOC
  221. help
  222. Say 'Y' here to use the Freescale Security Engine (SEC)
  223. to offload cryptographic algorithm computation.
  224. The Freescale SEC is present on PowerQUICC 'E' processors, such
  225. as the MPC8349E and MPC8548E.
  226. To compile this driver as a module, choose M here: the module
  227. will be called talitos.
  228. config CRYPTO_DEV_TALITOS1
  229. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  230. depends on CRYPTO_DEV_TALITOS
  231. depends on PPC_8xx || PPC_82xx
  232. default y
  233. help
  234. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  235. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  236. version 1.2 found on MPC8xx
  237. config CRYPTO_DEV_TALITOS2
  238. bool "SEC2+ (SEC version 2.0 or upper)"
  239. depends on CRYPTO_DEV_TALITOS
  240. default y if !PPC_8xx
  241. help
  242. Say 'Y' here to use the Freescale Security Engine (SEC)
  243. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  244. config CRYPTO_DEV_IXP4XX
  245. tristate "Driver for IXP4xx crypto hardware acceleration"
  246. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  247. select CRYPTO_DES
  248. select CRYPTO_AEAD
  249. select CRYPTO_AUTHENC
  250. select CRYPTO_BLKCIPHER
  251. help
  252. Driver for the IXP4xx NPE crypto engine.
  253. config CRYPTO_DEV_PPC4XX
  254. tristate "Driver AMCC PPC4xx crypto accelerator"
  255. depends on PPC && 4xx
  256. select CRYPTO_HASH
  257. select CRYPTO_BLKCIPHER
  258. help
  259. This option allows you to have support for AMCC crypto acceleration.
  260. config HW_RANDOM_PPC4XX
  261. bool "PowerPC 4xx generic true random number generator support"
  262. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
  263. default y
  264. ---help---
  265. This option provides the kernel-side support for the TRNG hardware
  266. found in the security function of some PowerPC 4xx SoCs.
  267. config CRYPTO_DEV_OMAP_SHAM
  268. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  269. depends on ARCH_OMAP2PLUS
  270. select CRYPTO_SHA1
  271. select CRYPTO_MD5
  272. select CRYPTO_SHA256
  273. select CRYPTO_SHA512
  274. select CRYPTO_HMAC
  275. help
  276. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  277. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  278. config CRYPTO_DEV_OMAP_AES
  279. tristate "Support for OMAP AES hw engine"
  280. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  281. select CRYPTO_AES
  282. select CRYPTO_BLKCIPHER
  283. select CRYPTO_ENGINE
  284. select CRYPTO_CBC
  285. select CRYPTO_ECB
  286. select CRYPTO_CTR
  287. help
  288. OMAP processors have AES module accelerator. Select this if you
  289. want to use the OMAP module for AES algorithms.
  290. config CRYPTO_DEV_OMAP_DES
  291. tristate "Support for OMAP DES/3DES hw engine"
  292. depends on ARCH_OMAP2PLUS
  293. select CRYPTO_DES
  294. select CRYPTO_BLKCIPHER
  295. select CRYPTO_ENGINE
  296. help
  297. OMAP processors have DES/3DES module accelerator. Select this if you
  298. want to use the OMAP module for DES and 3DES algorithms. Currently
  299. the ECB and CBC modes of operation are supported by the driver. Also
  300. accesses made on unaligned boundaries are supported.
  301. config CRYPTO_DEV_PICOXCELL
  302. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  303. depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
  304. select CRYPTO_AEAD
  305. select CRYPTO_AES
  306. select CRYPTO_AUTHENC
  307. select CRYPTO_BLKCIPHER
  308. select CRYPTO_DES
  309. select CRYPTO_CBC
  310. select CRYPTO_ECB
  311. select CRYPTO_SEQIV
  312. help
  313. This option enables support for the hardware offload engines in the
  314. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  315. and for 3gpp Layer 2 ciphering support.
  316. Saying m here will build a module named pipcoxcell_crypto.
  317. config CRYPTO_DEV_SAHARA
  318. tristate "Support for SAHARA crypto accelerator"
  319. depends on ARCH_MXC && OF
  320. select CRYPTO_BLKCIPHER
  321. select CRYPTO_AES
  322. select CRYPTO_ECB
  323. help
  324. This option enables support for the SAHARA HW crypto accelerator
  325. found in some Freescale i.MX chips.
  326. config CRYPTO_DEV_MXC_SCC
  327. tristate "Support for Freescale Security Controller (SCC)"
  328. depends on ARCH_MXC && OF
  329. select CRYPTO_BLKCIPHER
  330. select CRYPTO_DES
  331. help
  332. This option enables support for the Security Controller (SCC)
  333. found in Freescale i.MX25 chips.
  334. config CRYPTO_DEV_EXYNOS_RNG
  335. tristate "EXYNOS HW pseudo random number generator support"
  336. depends on ARCH_EXYNOS || COMPILE_TEST
  337. depends on HAS_IOMEM
  338. select CRYPTO_RNG
  339. ---help---
  340. This driver provides kernel-side support through the
  341. cryptographic API for the pseudo random number generator hardware
  342. found on Exynos SoCs.
  343. To compile this driver as a module, choose M here: the
  344. module will be called exynos-rng.
  345. If unsure, say Y.
  346. config CRYPTO_DEV_S5P
  347. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  348. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  349. depends on HAS_IOMEM && HAS_DMA
  350. select CRYPTO_AES
  351. select CRYPTO_BLKCIPHER
  352. help
  353. This option allows you to have support for S5P crypto acceleration.
  354. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  355. algorithms execution.
  356. config CRYPTO_DEV_NX
  357. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  358. depends on PPC64
  359. help
  360. This enables support for the NX hardware cryptographic accelerator
  361. coprocessor that is in IBM PowerPC P7+ or later processors. This
  362. does not actually enable any drivers, it only allows you to select
  363. which acceleration type (encryption and/or compression) to enable.
  364. if CRYPTO_DEV_NX
  365. source "drivers/crypto/nx/Kconfig"
  366. endif
  367. config CRYPTO_DEV_UX500
  368. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  369. depends on ARCH_U8500
  370. help
  371. Driver for ST-Ericsson UX500 crypto engine.
  372. if CRYPTO_DEV_UX500
  373. source "drivers/crypto/ux500/Kconfig"
  374. endif # if CRYPTO_DEV_UX500
  375. config CRYPTO_DEV_BFIN_CRC
  376. tristate "Support for Blackfin CRC hardware"
  377. depends on BF60x
  378. help
  379. Newer Blackfin processors have CRC hardware. Select this if you
  380. want to use the Blackfin CRC module.
  381. config CRYPTO_DEV_ATMEL_AUTHENC
  382. tristate "Support for Atmel IPSEC/SSL hw accelerator"
  383. depends on HAS_DMA
  384. depends on ARCH_AT91 || COMPILE_TEST
  385. select CRYPTO_AUTHENC
  386. select CRYPTO_DEV_ATMEL_AES
  387. select CRYPTO_DEV_ATMEL_SHA
  388. help
  389. Some Atmel processors can combine the AES and SHA hw accelerators
  390. to enhance support of IPSEC/SSL.
  391. Select this if you want to use the Atmel modules for
  392. authenc(hmac(shaX),Y(cbc)) algorithms.
  393. config CRYPTO_DEV_ATMEL_AES
  394. tristate "Support for Atmel AES hw accelerator"
  395. depends on HAS_DMA
  396. depends on ARCH_AT91 || COMPILE_TEST
  397. select CRYPTO_AES
  398. select CRYPTO_AEAD
  399. select CRYPTO_BLKCIPHER
  400. help
  401. Some Atmel processors have AES hw accelerator.
  402. Select this if you want to use the Atmel module for
  403. AES algorithms.
  404. To compile this driver as a module, choose M here: the module
  405. will be called atmel-aes.
  406. config CRYPTO_DEV_ATMEL_TDES
  407. tristate "Support for Atmel DES/TDES hw accelerator"
  408. depends on HAS_DMA
  409. depends on ARCH_AT91 || COMPILE_TEST
  410. select CRYPTO_DES
  411. select CRYPTO_BLKCIPHER
  412. help
  413. Some Atmel processors have DES/TDES hw accelerator.
  414. Select this if you want to use the Atmel module for
  415. DES/TDES algorithms.
  416. To compile this driver as a module, choose M here: the module
  417. will be called atmel-tdes.
  418. config CRYPTO_DEV_ATMEL_SHA
  419. tristate "Support for Atmel SHA hw accelerator"
  420. depends on HAS_DMA
  421. depends on ARCH_AT91 || COMPILE_TEST
  422. select CRYPTO_HASH
  423. help
  424. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  425. hw accelerator.
  426. Select this if you want to use the Atmel module for
  427. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  428. To compile this driver as a module, choose M here: the module
  429. will be called atmel-sha.
  430. config CRYPTO_DEV_CCP
  431. bool "Support for AMD Cryptographic Coprocessor"
  432. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  433. help
  434. The AMD Cryptographic Coprocessor provides hardware offload support
  435. for encryption, hashing and related operations.
  436. if CRYPTO_DEV_CCP
  437. source "drivers/crypto/ccp/Kconfig"
  438. endif
  439. config CRYPTO_DEV_MXS_DCP
  440. tristate "Support for Freescale MXS DCP"
  441. depends on (ARCH_MXS || ARCH_MXC)
  442. select STMP_DEVICE
  443. select CRYPTO_CBC
  444. select CRYPTO_ECB
  445. select CRYPTO_AES
  446. select CRYPTO_BLKCIPHER
  447. select CRYPTO_HASH
  448. help
  449. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  450. co-processor on the die.
  451. To compile this driver as a module, choose M here: the module
  452. will be called mxs-dcp.
  453. source "drivers/crypto/qat/Kconfig"
  454. source "drivers/crypto/cavium/cpt/Kconfig"
  455. config CRYPTO_DEV_CAVIUM_ZIP
  456. tristate "Cavium ZIP driver"
  457. depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
  458. ---help---
  459. Select this option if you want to enable compression/decompression
  460. acceleration on Cavium's ARM based SoCs
  461. config CRYPTO_DEV_QCE
  462. tristate "Qualcomm crypto engine accelerator"
  463. depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
  464. select CRYPTO_AES
  465. select CRYPTO_DES
  466. select CRYPTO_ECB
  467. select CRYPTO_CBC
  468. select CRYPTO_XTS
  469. select CRYPTO_CTR
  470. select CRYPTO_BLKCIPHER
  471. help
  472. This driver supports Qualcomm crypto engine accelerator
  473. hardware. To compile this driver as a module, choose M here. The
  474. module will be called qcrypto.
  475. config CRYPTO_DEV_VMX
  476. bool "Support for VMX cryptographic acceleration instructions"
  477. depends on PPC64 && VSX
  478. help
  479. Support for VMX cryptographic acceleration instructions.
  480. source "drivers/crypto/vmx/Kconfig"
  481. config CRYPTO_DEV_IMGTEC_HASH
  482. tristate "Imagination Technologies hardware hash accelerator"
  483. depends on MIPS || COMPILE_TEST
  484. depends on HAS_DMA
  485. select CRYPTO_MD5
  486. select CRYPTO_SHA1
  487. select CRYPTO_SHA256
  488. select CRYPTO_HASH
  489. help
  490. This driver interfaces with the Imagination Technologies
  491. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  492. hashing algorithms.
  493. config CRYPTO_DEV_SUN4I_SS
  494. tristate "Support for Allwinner Security System cryptographic accelerator"
  495. depends on ARCH_SUNXI && !64BIT
  496. select CRYPTO_MD5
  497. select CRYPTO_SHA1
  498. select CRYPTO_AES
  499. select CRYPTO_DES
  500. select CRYPTO_BLKCIPHER
  501. help
  502. Some Allwinner SoC have a crypto accelerator named
  503. Security System. Select this if you want to use it.
  504. The Security System handle AES/DES/3DES ciphers in CBC mode
  505. and SHA1 and MD5 hash algorithms.
  506. To compile this driver as a module, choose M here: the module
  507. will be called sun4i-ss.
  508. config CRYPTO_DEV_ROCKCHIP
  509. tristate "Rockchip's Cryptographic Engine driver"
  510. depends on OF && ARCH_ROCKCHIP
  511. select CRYPTO_AES
  512. select CRYPTO_DES
  513. select CRYPTO_MD5
  514. select CRYPTO_SHA1
  515. select CRYPTO_SHA256
  516. select CRYPTO_HASH
  517. select CRYPTO_BLKCIPHER
  518. help
  519. This driver interfaces with the hardware crypto accelerator.
  520. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  521. config CRYPTO_DEV_MEDIATEK
  522. tristate "MediaTek's EIP97 Cryptographic Engine driver"
  523. depends on HAS_DMA
  524. depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
  525. select CRYPTO_AES
  526. select CRYPTO_AEAD
  527. select CRYPTO_BLKCIPHER
  528. select CRYPTO_CTR
  529. select CRYPTO_SHA1
  530. select CRYPTO_SHA256
  531. select CRYPTO_SHA512
  532. select CRYPTO_HMAC
  533. help
  534. This driver allows you to utilize the hardware crypto accelerator
  535. EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
  536. Select this if you want to use it for AES/SHA1/SHA2 algorithms.
  537. source "drivers/crypto/chelsio/Kconfig"
  538. source "drivers/crypto/virtio/Kconfig"
  539. config CRYPTO_DEV_BCM_SPU
  540. tristate "Broadcom symmetric crypto/hash acceleration support"
  541. depends on ARCH_BCM_IPROC
  542. depends on BCM_PDC_MBOX
  543. default m
  544. select CRYPTO_DES
  545. select CRYPTO_MD5
  546. select CRYPTO_SHA1
  547. select CRYPTO_SHA256
  548. select CRYPTO_SHA512
  549. help
  550. This driver provides support for Broadcom crypto acceleration using the
  551. Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
  552. ahash, and aead algorithms with the kernel cryptographic API.
  553. source "drivers/crypto/stm32/Kconfig"
  554. endif # CRYPTO_HW