bpf_jit_comp.c 31 KB

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  1. /* bpf_jit_comp.c : BPF JIT compiler
  2. *
  3. * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
  4. * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; version 2
  9. * of the License.
  10. */
  11. #include <linux/netdevice.h>
  12. #include <linux/filter.h>
  13. #include <linux/if_vlan.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/set_memory.h>
  16. #include <linux/bpf.h>
  17. int bpf_jit_enable __read_mostly;
  18. /*
  19. * assembly code in arch/x86/net/bpf_jit.S
  20. */
  21. extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  22. extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  23. extern u8 sk_load_byte_positive_offset[];
  24. extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  25. extern u8 sk_load_byte_negative_offset[];
  26. static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  27. {
  28. if (len == 1)
  29. *ptr = bytes;
  30. else if (len == 2)
  31. *(u16 *)ptr = bytes;
  32. else {
  33. *(u32 *)ptr = bytes;
  34. barrier();
  35. }
  36. return ptr + len;
  37. }
  38. #define EMIT(bytes, len) \
  39. do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  40. #define EMIT1(b1) EMIT(b1, 1)
  41. #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
  42. #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  43. #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  44. #define EMIT1_off32(b1, off) \
  45. do {EMIT1(b1); EMIT(off, 4); } while (0)
  46. #define EMIT2_off32(b1, b2, off) \
  47. do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  48. #define EMIT3_off32(b1, b2, b3, off) \
  49. do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  50. #define EMIT4_off32(b1, b2, b3, b4, off) \
  51. do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  52. static bool is_imm8(int value)
  53. {
  54. return value <= 127 && value >= -128;
  55. }
  56. static bool is_simm32(s64 value)
  57. {
  58. return value == (s64) (s32) value;
  59. }
  60. /* mov dst, src */
  61. #define EMIT_mov(DST, SRC) \
  62. do {if (DST != SRC) \
  63. EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  64. } while (0)
  65. static int bpf_size_to_x86_bytes(int bpf_size)
  66. {
  67. if (bpf_size == BPF_W)
  68. return 4;
  69. else if (bpf_size == BPF_H)
  70. return 2;
  71. else if (bpf_size == BPF_B)
  72. return 1;
  73. else if (bpf_size == BPF_DW)
  74. return 4; /* imm32 */
  75. else
  76. return 0;
  77. }
  78. /* list of x86 cond jumps opcodes (. + s8)
  79. * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  80. */
  81. #define X86_JB 0x72
  82. #define X86_JAE 0x73
  83. #define X86_JE 0x74
  84. #define X86_JNE 0x75
  85. #define X86_JBE 0x76
  86. #define X86_JA 0x77
  87. #define X86_JGE 0x7D
  88. #define X86_JG 0x7F
  89. static void bpf_flush_icache(void *start, void *end)
  90. {
  91. mm_segment_t old_fs = get_fs();
  92. set_fs(KERNEL_DS);
  93. smp_wmb();
  94. flush_icache_range((unsigned long)start, (unsigned long)end);
  95. set_fs(old_fs);
  96. }
  97. #define CHOOSE_LOAD_FUNC(K, func) \
  98. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  99. /* pick a register outside of BPF range for JIT internal work */
  100. #define AUX_REG (MAX_BPF_JIT_REG + 1)
  101. /* The following table maps BPF registers to x64 registers.
  102. *
  103. * x64 register r12 is unused, since if used as base address
  104. * register in load/store instructions, it always needs an
  105. * extra byte of encoding and is callee saved.
  106. *
  107. * r9 caches skb->len - skb->data_len
  108. * r10 caches skb->data, and used for blinding (if enabled)
  109. */
  110. static const int reg2hex[] = {
  111. [BPF_REG_0] = 0, /* rax */
  112. [BPF_REG_1] = 7, /* rdi */
  113. [BPF_REG_2] = 6, /* rsi */
  114. [BPF_REG_3] = 2, /* rdx */
  115. [BPF_REG_4] = 1, /* rcx */
  116. [BPF_REG_5] = 0, /* r8 */
  117. [BPF_REG_6] = 3, /* rbx callee saved */
  118. [BPF_REG_7] = 5, /* r13 callee saved */
  119. [BPF_REG_8] = 6, /* r14 callee saved */
  120. [BPF_REG_9] = 7, /* r15 callee saved */
  121. [BPF_REG_FP] = 5, /* rbp readonly */
  122. [BPF_REG_AX] = 2, /* r10 temp register */
  123. [AUX_REG] = 3, /* r11 temp register */
  124. };
  125. /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
  126. * which need extra byte of encoding.
  127. * rax,rcx,...,rbp have simpler encoding
  128. */
  129. static bool is_ereg(u32 reg)
  130. {
  131. return (1 << reg) & (BIT(BPF_REG_5) |
  132. BIT(AUX_REG) |
  133. BIT(BPF_REG_7) |
  134. BIT(BPF_REG_8) |
  135. BIT(BPF_REG_9) |
  136. BIT(BPF_REG_AX));
  137. }
  138. /* add modifiers if 'reg' maps to x64 registers r8..r15 */
  139. static u8 add_1mod(u8 byte, u32 reg)
  140. {
  141. if (is_ereg(reg))
  142. byte |= 1;
  143. return byte;
  144. }
  145. static u8 add_2mod(u8 byte, u32 r1, u32 r2)
  146. {
  147. if (is_ereg(r1))
  148. byte |= 1;
  149. if (is_ereg(r2))
  150. byte |= 4;
  151. return byte;
  152. }
  153. /* encode 'dst_reg' register into x64 opcode 'byte' */
  154. static u8 add_1reg(u8 byte, u32 dst_reg)
  155. {
  156. return byte + reg2hex[dst_reg];
  157. }
  158. /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
  159. static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
  160. {
  161. return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
  162. }
  163. static void jit_fill_hole(void *area, unsigned int size)
  164. {
  165. /* fill whole space with int3 instructions */
  166. memset(area, 0xcc, size);
  167. }
  168. struct jit_context {
  169. int cleanup_addr; /* epilogue code offset */
  170. bool seen_ld_abs;
  171. bool seen_ax_reg;
  172. };
  173. /* maximum number of bytes emitted while JITing one eBPF insn */
  174. #define BPF_MAX_INSN_SIZE 128
  175. #define BPF_INSN_SAFETY 64
  176. #define STACKSIZE \
  177. (MAX_BPF_STACK + \
  178. 32 /* space for rbx, r13, r14, r15 */ + \
  179. 8 /* space for skb_copy_bits() buffer */)
  180. #define PROLOGUE_SIZE 48
  181. /* emit x64 prologue code for BPF program and check it's size.
  182. * bpf_tail_call helper will skip it while jumping into another program
  183. */
  184. static void emit_prologue(u8 **pprog)
  185. {
  186. u8 *prog = *pprog;
  187. int cnt = 0;
  188. EMIT1(0x55); /* push rbp */
  189. EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
  190. /* sub rsp, STACKSIZE */
  191. EMIT3_off32(0x48, 0x81, 0xEC, STACKSIZE);
  192. /* all classic BPF filters use R6(rbx) save it */
  193. /* mov qword ptr [rbp-X],rbx */
  194. EMIT3_off32(0x48, 0x89, 0x9D, -STACKSIZE);
  195. /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
  196. * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
  197. * R8(r14). R9(r15) spill could be made conditional, but there is only
  198. * one 'bpf_error' return path out of helper functions inside bpf_jit.S
  199. * The overhead of extra spill is negligible for any filter other
  200. * than synthetic ones. Therefore not worth adding complexity.
  201. */
  202. /* mov qword ptr [rbp-X],r13 */
  203. EMIT3_off32(0x4C, 0x89, 0xAD, -STACKSIZE + 8);
  204. /* mov qword ptr [rbp-X],r14 */
  205. EMIT3_off32(0x4C, 0x89, 0xB5, -STACKSIZE + 16);
  206. /* mov qword ptr [rbp-X],r15 */
  207. EMIT3_off32(0x4C, 0x89, 0xBD, -STACKSIZE + 24);
  208. /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
  209. * we need to reset the counter to 0. It's done in two instructions,
  210. * resetting rax register to 0 (xor on eax gets 0 extended), and
  211. * moving it to the counter location.
  212. */
  213. /* xor eax, eax */
  214. EMIT2(0x31, 0xc0);
  215. /* mov qword ptr [rbp-X], rax */
  216. EMIT3_off32(0x48, 0x89, 0x85, -STACKSIZE + 32);
  217. BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
  218. *pprog = prog;
  219. }
  220. /* generate the following code:
  221. * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
  222. * if (index >= array->map.max_entries)
  223. * goto out;
  224. * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
  225. * goto out;
  226. * prog = array->ptrs[index];
  227. * if (prog == NULL)
  228. * goto out;
  229. * goto *(prog->bpf_func + prologue_size);
  230. * out:
  231. */
  232. static void emit_bpf_tail_call(u8 **pprog)
  233. {
  234. u8 *prog = *pprog;
  235. int label1, label2, label3;
  236. int cnt = 0;
  237. /* rdi - pointer to ctx
  238. * rsi - pointer to bpf_array
  239. * rdx - index in bpf_array
  240. */
  241. /* if (index >= array->map.max_entries)
  242. * goto out;
  243. */
  244. EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */
  245. offsetof(struct bpf_array, map.max_entries));
  246. EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */
  247. #define OFFSET1 47 /* number of bytes to jump */
  248. EMIT2(X86_JBE, OFFSET1); /* jbe out */
  249. label1 = cnt;
  250. /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
  251. * goto out;
  252. */
  253. EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */
  254. EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
  255. #define OFFSET2 36
  256. EMIT2(X86_JA, OFFSET2); /* ja out */
  257. label2 = cnt;
  258. EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
  259. EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */
  260. /* prog = array->ptrs[index]; */
  261. EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
  262. offsetof(struct bpf_array, ptrs));
  263. EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */
  264. /* if (prog == NULL)
  265. * goto out;
  266. */
  267. EMIT4(0x48, 0x83, 0xF8, 0x00); /* cmp rax, 0 */
  268. #define OFFSET3 10
  269. EMIT2(X86_JE, OFFSET3); /* je out */
  270. label3 = cnt;
  271. /* goto *(prog->bpf_func + prologue_size); */
  272. EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
  273. offsetof(struct bpf_prog, bpf_func));
  274. EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
  275. /* now we're ready to jump into next BPF program
  276. * rdi == ctx (1st arg)
  277. * rax == prog->bpf_func + prologue_size
  278. */
  279. EMIT2(0xFF, 0xE0); /* jmp rax */
  280. /* out: */
  281. BUILD_BUG_ON(cnt - label1 != OFFSET1);
  282. BUILD_BUG_ON(cnt - label2 != OFFSET2);
  283. BUILD_BUG_ON(cnt - label3 != OFFSET3);
  284. *pprog = prog;
  285. }
  286. static void emit_load_skb_data_hlen(u8 **pprog)
  287. {
  288. u8 *prog = *pprog;
  289. int cnt = 0;
  290. /* r9d = skb->len - skb->data_len (headlen)
  291. * r10 = skb->data
  292. */
  293. /* mov %r9d, off32(%rdi) */
  294. EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
  295. /* sub %r9d, off32(%rdi) */
  296. EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
  297. /* mov %r10, off32(%rdi) */
  298. EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
  299. *pprog = prog;
  300. }
  301. static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
  302. int oldproglen, struct jit_context *ctx)
  303. {
  304. struct bpf_insn *insn = bpf_prog->insnsi;
  305. int insn_cnt = bpf_prog->len;
  306. bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
  307. bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
  308. bool seen_exit = false;
  309. u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
  310. int i, cnt = 0;
  311. int proglen = 0;
  312. u8 *prog = temp;
  313. emit_prologue(&prog);
  314. if (seen_ld_abs)
  315. emit_load_skb_data_hlen(&prog);
  316. for (i = 0; i < insn_cnt; i++, insn++) {
  317. const s32 imm32 = insn->imm;
  318. u32 dst_reg = insn->dst_reg;
  319. u32 src_reg = insn->src_reg;
  320. u8 b1 = 0, b2 = 0, b3 = 0;
  321. s64 jmp_offset;
  322. u8 jmp_cond;
  323. bool reload_skb_data;
  324. int ilen;
  325. u8 *func;
  326. if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
  327. ctx->seen_ax_reg = seen_ax_reg = true;
  328. switch (insn->code) {
  329. /* ALU */
  330. case BPF_ALU | BPF_ADD | BPF_X:
  331. case BPF_ALU | BPF_SUB | BPF_X:
  332. case BPF_ALU | BPF_AND | BPF_X:
  333. case BPF_ALU | BPF_OR | BPF_X:
  334. case BPF_ALU | BPF_XOR | BPF_X:
  335. case BPF_ALU64 | BPF_ADD | BPF_X:
  336. case BPF_ALU64 | BPF_SUB | BPF_X:
  337. case BPF_ALU64 | BPF_AND | BPF_X:
  338. case BPF_ALU64 | BPF_OR | BPF_X:
  339. case BPF_ALU64 | BPF_XOR | BPF_X:
  340. switch (BPF_OP(insn->code)) {
  341. case BPF_ADD: b2 = 0x01; break;
  342. case BPF_SUB: b2 = 0x29; break;
  343. case BPF_AND: b2 = 0x21; break;
  344. case BPF_OR: b2 = 0x09; break;
  345. case BPF_XOR: b2 = 0x31; break;
  346. }
  347. if (BPF_CLASS(insn->code) == BPF_ALU64)
  348. EMIT1(add_2mod(0x48, dst_reg, src_reg));
  349. else if (is_ereg(dst_reg) || is_ereg(src_reg))
  350. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  351. EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
  352. break;
  353. /* mov dst, src */
  354. case BPF_ALU64 | BPF_MOV | BPF_X:
  355. EMIT_mov(dst_reg, src_reg);
  356. break;
  357. /* mov32 dst, src */
  358. case BPF_ALU | BPF_MOV | BPF_X:
  359. if (is_ereg(dst_reg) || is_ereg(src_reg))
  360. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  361. EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
  362. break;
  363. /* neg dst */
  364. case BPF_ALU | BPF_NEG:
  365. case BPF_ALU64 | BPF_NEG:
  366. if (BPF_CLASS(insn->code) == BPF_ALU64)
  367. EMIT1(add_1mod(0x48, dst_reg));
  368. else if (is_ereg(dst_reg))
  369. EMIT1(add_1mod(0x40, dst_reg));
  370. EMIT2(0xF7, add_1reg(0xD8, dst_reg));
  371. break;
  372. case BPF_ALU | BPF_ADD | BPF_K:
  373. case BPF_ALU | BPF_SUB | BPF_K:
  374. case BPF_ALU | BPF_AND | BPF_K:
  375. case BPF_ALU | BPF_OR | BPF_K:
  376. case BPF_ALU | BPF_XOR | BPF_K:
  377. case BPF_ALU64 | BPF_ADD | BPF_K:
  378. case BPF_ALU64 | BPF_SUB | BPF_K:
  379. case BPF_ALU64 | BPF_AND | BPF_K:
  380. case BPF_ALU64 | BPF_OR | BPF_K:
  381. case BPF_ALU64 | BPF_XOR | BPF_K:
  382. if (BPF_CLASS(insn->code) == BPF_ALU64)
  383. EMIT1(add_1mod(0x48, dst_reg));
  384. else if (is_ereg(dst_reg))
  385. EMIT1(add_1mod(0x40, dst_reg));
  386. switch (BPF_OP(insn->code)) {
  387. case BPF_ADD: b3 = 0xC0; break;
  388. case BPF_SUB: b3 = 0xE8; break;
  389. case BPF_AND: b3 = 0xE0; break;
  390. case BPF_OR: b3 = 0xC8; break;
  391. case BPF_XOR: b3 = 0xF0; break;
  392. }
  393. if (is_imm8(imm32))
  394. EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
  395. else
  396. EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
  397. break;
  398. case BPF_ALU64 | BPF_MOV | BPF_K:
  399. /* optimization: if imm32 is positive,
  400. * use 'mov eax, imm32' (which zero-extends imm32)
  401. * to save 2 bytes
  402. */
  403. if (imm32 < 0) {
  404. /* 'mov rax, imm32' sign extends imm32 */
  405. b1 = add_1mod(0x48, dst_reg);
  406. b2 = 0xC7;
  407. b3 = 0xC0;
  408. EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
  409. break;
  410. }
  411. case BPF_ALU | BPF_MOV | BPF_K:
  412. /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
  413. * to save 3 bytes.
  414. */
  415. if (imm32 == 0) {
  416. if (is_ereg(dst_reg))
  417. EMIT1(add_2mod(0x40, dst_reg, dst_reg));
  418. b2 = 0x31; /* xor */
  419. b3 = 0xC0;
  420. EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
  421. break;
  422. }
  423. /* mov %eax, imm32 */
  424. if (is_ereg(dst_reg))
  425. EMIT1(add_1mod(0x40, dst_reg));
  426. EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
  427. break;
  428. case BPF_LD | BPF_IMM | BPF_DW:
  429. /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
  430. * to save 7 bytes.
  431. */
  432. if (insn[0].imm == 0 && insn[1].imm == 0) {
  433. b1 = add_2mod(0x48, dst_reg, dst_reg);
  434. b2 = 0x31; /* xor */
  435. b3 = 0xC0;
  436. EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
  437. insn++;
  438. i++;
  439. break;
  440. }
  441. /* movabsq %rax, imm64 */
  442. EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
  443. EMIT(insn[0].imm, 4);
  444. EMIT(insn[1].imm, 4);
  445. insn++;
  446. i++;
  447. break;
  448. /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
  449. case BPF_ALU | BPF_MOD | BPF_X:
  450. case BPF_ALU | BPF_DIV | BPF_X:
  451. case BPF_ALU | BPF_MOD | BPF_K:
  452. case BPF_ALU | BPF_DIV | BPF_K:
  453. case BPF_ALU64 | BPF_MOD | BPF_X:
  454. case BPF_ALU64 | BPF_DIV | BPF_X:
  455. case BPF_ALU64 | BPF_MOD | BPF_K:
  456. case BPF_ALU64 | BPF_DIV | BPF_K:
  457. EMIT1(0x50); /* push rax */
  458. EMIT1(0x52); /* push rdx */
  459. if (BPF_SRC(insn->code) == BPF_X)
  460. /* mov r11, src_reg */
  461. EMIT_mov(AUX_REG, src_reg);
  462. else
  463. /* mov r11, imm32 */
  464. EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
  465. /* mov rax, dst_reg */
  466. EMIT_mov(BPF_REG_0, dst_reg);
  467. /* xor edx, edx
  468. * equivalent to 'xor rdx, rdx', but one byte less
  469. */
  470. EMIT2(0x31, 0xd2);
  471. if (BPF_SRC(insn->code) == BPF_X) {
  472. /* if (src_reg == 0) return 0 */
  473. /* cmp r11, 0 */
  474. EMIT4(0x49, 0x83, 0xFB, 0x00);
  475. /* jne .+9 (skip over pop, pop, xor and jmp) */
  476. EMIT2(X86_JNE, 1 + 1 + 2 + 5);
  477. EMIT1(0x5A); /* pop rdx */
  478. EMIT1(0x58); /* pop rax */
  479. EMIT2(0x31, 0xc0); /* xor eax, eax */
  480. /* jmp cleanup_addr
  481. * addrs[i] - 11, because there are 11 bytes
  482. * after this insn: div, mov, pop, pop, mov
  483. */
  484. jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
  485. EMIT1_off32(0xE9, jmp_offset);
  486. }
  487. if (BPF_CLASS(insn->code) == BPF_ALU64)
  488. /* div r11 */
  489. EMIT3(0x49, 0xF7, 0xF3);
  490. else
  491. /* div r11d */
  492. EMIT3(0x41, 0xF7, 0xF3);
  493. if (BPF_OP(insn->code) == BPF_MOD)
  494. /* mov r11, rdx */
  495. EMIT3(0x49, 0x89, 0xD3);
  496. else
  497. /* mov r11, rax */
  498. EMIT3(0x49, 0x89, 0xC3);
  499. EMIT1(0x5A); /* pop rdx */
  500. EMIT1(0x58); /* pop rax */
  501. /* mov dst_reg, r11 */
  502. EMIT_mov(dst_reg, AUX_REG);
  503. break;
  504. case BPF_ALU | BPF_MUL | BPF_K:
  505. case BPF_ALU | BPF_MUL | BPF_X:
  506. case BPF_ALU64 | BPF_MUL | BPF_K:
  507. case BPF_ALU64 | BPF_MUL | BPF_X:
  508. EMIT1(0x50); /* push rax */
  509. EMIT1(0x52); /* push rdx */
  510. /* mov r11, dst_reg */
  511. EMIT_mov(AUX_REG, dst_reg);
  512. if (BPF_SRC(insn->code) == BPF_X)
  513. /* mov rax, src_reg */
  514. EMIT_mov(BPF_REG_0, src_reg);
  515. else
  516. /* mov rax, imm32 */
  517. EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
  518. if (BPF_CLASS(insn->code) == BPF_ALU64)
  519. EMIT1(add_1mod(0x48, AUX_REG));
  520. else if (is_ereg(AUX_REG))
  521. EMIT1(add_1mod(0x40, AUX_REG));
  522. /* mul(q) r11 */
  523. EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
  524. /* mov r11, rax */
  525. EMIT_mov(AUX_REG, BPF_REG_0);
  526. EMIT1(0x5A); /* pop rdx */
  527. EMIT1(0x58); /* pop rax */
  528. /* mov dst_reg, r11 */
  529. EMIT_mov(dst_reg, AUX_REG);
  530. break;
  531. /* shifts */
  532. case BPF_ALU | BPF_LSH | BPF_K:
  533. case BPF_ALU | BPF_RSH | BPF_K:
  534. case BPF_ALU | BPF_ARSH | BPF_K:
  535. case BPF_ALU64 | BPF_LSH | BPF_K:
  536. case BPF_ALU64 | BPF_RSH | BPF_K:
  537. case BPF_ALU64 | BPF_ARSH | BPF_K:
  538. if (BPF_CLASS(insn->code) == BPF_ALU64)
  539. EMIT1(add_1mod(0x48, dst_reg));
  540. else if (is_ereg(dst_reg))
  541. EMIT1(add_1mod(0x40, dst_reg));
  542. switch (BPF_OP(insn->code)) {
  543. case BPF_LSH: b3 = 0xE0; break;
  544. case BPF_RSH: b3 = 0xE8; break;
  545. case BPF_ARSH: b3 = 0xF8; break;
  546. }
  547. EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
  548. break;
  549. case BPF_ALU | BPF_LSH | BPF_X:
  550. case BPF_ALU | BPF_RSH | BPF_X:
  551. case BPF_ALU | BPF_ARSH | BPF_X:
  552. case BPF_ALU64 | BPF_LSH | BPF_X:
  553. case BPF_ALU64 | BPF_RSH | BPF_X:
  554. case BPF_ALU64 | BPF_ARSH | BPF_X:
  555. /* check for bad case when dst_reg == rcx */
  556. if (dst_reg == BPF_REG_4) {
  557. /* mov r11, dst_reg */
  558. EMIT_mov(AUX_REG, dst_reg);
  559. dst_reg = AUX_REG;
  560. }
  561. if (src_reg != BPF_REG_4) { /* common case */
  562. EMIT1(0x51); /* push rcx */
  563. /* mov rcx, src_reg */
  564. EMIT_mov(BPF_REG_4, src_reg);
  565. }
  566. /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
  567. if (BPF_CLASS(insn->code) == BPF_ALU64)
  568. EMIT1(add_1mod(0x48, dst_reg));
  569. else if (is_ereg(dst_reg))
  570. EMIT1(add_1mod(0x40, dst_reg));
  571. switch (BPF_OP(insn->code)) {
  572. case BPF_LSH: b3 = 0xE0; break;
  573. case BPF_RSH: b3 = 0xE8; break;
  574. case BPF_ARSH: b3 = 0xF8; break;
  575. }
  576. EMIT2(0xD3, add_1reg(b3, dst_reg));
  577. if (src_reg != BPF_REG_4)
  578. EMIT1(0x59); /* pop rcx */
  579. if (insn->dst_reg == BPF_REG_4)
  580. /* mov dst_reg, r11 */
  581. EMIT_mov(insn->dst_reg, AUX_REG);
  582. break;
  583. case BPF_ALU | BPF_END | BPF_FROM_BE:
  584. switch (imm32) {
  585. case 16:
  586. /* emit 'ror %ax, 8' to swap lower 2 bytes */
  587. EMIT1(0x66);
  588. if (is_ereg(dst_reg))
  589. EMIT1(0x41);
  590. EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
  591. /* emit 'movzwl eax, ax' */
  592. if (is_ereg(dst_reg))
  593. EMIT3(0x45, 0x0F, 0xB7);
  594. else
  595. EMIT2(0x0F, 0xB7);
  596. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  597. break;
  598. case 32:
  599. /* emit 'bswap eax' to swap lower 4 bytes */
  600. if (is_ereg(dst_reg))
  601. EMIT2(0x41, 0x0F);
  602. else
  603. EMIT1(0x0F);
  604. EMIT1(add_1reg(0xC8, dst_reg));
  605. break;
  606. case 64:
  607. /* emit 'bswap rax' to swap 8 bytes */
  608. EMIT3(add_1mod(0x48, dst_reg), 0x0F,
  609. add_1reg(0xC8, dst_reg));
  610. break;
  611. }
  612. break;
  613. case BPF_ALU | BPF_END | BPF_FROM_LE:
  614. switch (imm32) {
  615. case 16:
  616. /* emit 'movzwl eax, ax' to zero extend 16-bit
  617. * into 64 bit
  618. */
  619. if (is_ereg(dst_reg))
  620. EMIT3(0x45, 0x0F, 0xB7);
  621. else
  622. EMIT2(0x0F, 0xB7);
  623. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  624. break;
  625. case 32:
  626. /* emit 'mov eax, eax' to clear upper 32-bits */
  627. if (is_ereg(dst_reg))
  628. EMIT1(0x45);
  629. EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
  630. break;
  631. case 64:
  632. /* nop */
  633. break;
  634. }
  635. break;
  636. /* ST: *(u8*)(dst_reg + off) = imm */
  637. case BPF_ST | BPF_MEM | BPF_B:
  638. if (is_ereg(dst_reg))
  639. EMIT2(0x41, 0xC6);
  640. else
  641. EMIT1(0xC6);
  642. goto st;
  643. case BPF_ST | BPF_MEM | BPF_H:
  644. if (is_ereg(dst_reg))
  645. EMIT3(0x66, 0x41, 0xC7);
  646. else
  647. EMIT2(0x66, 0xC7);
  648. goto st;
  649. case BPF_ST | BPF_MEM | BPF_W:
  650. if (is_ereg(dst_reg))
  651. EMIT2(0x41, 0xC7);
  652. else
  653. EMIT1(0xC7);
  654. goto st;
  655. case BPF_ST | BPF_MEM | BPF_DW:
  656. EMIT2(add_1mod(0x48, dst_reg), 0xC7);
  657. st: if (is_imm8(insn->off))
  658. EMIT2(add_1reg(0x40, dst_reg), insn->off);
  659. else
  660. EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
  661. EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
  662. break;
  663. /* STX: *(u8*)(dst_reg + off) = src_reg */
  664. case BPF_STX | BPF_MEM | BPF_B:
  665. /* emit 'mov byte ptr [rax + off], al' */
  666. if (is_ereg(dst_reg) || is_ereg(src_reg) ||
  667. /* have to add extra byte for x86 SIL, DIL regs */
  668. src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
  669. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
  670. else
  671. EMIT1(0x88);
  672. goto stx;
  673. case BPF_STX | BPF_MEM | BPF_H:
  674. if (is_ereg(dst_reg) || is_ereg(src_reg))
  675. EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
  676. else
  677. EMIT2(0x66, 0x89);
  678. goto stx;
  679. case BPF_STX | BPF_MEM | BPF_W:
  680. if (is_ereg(dst_reg) || is_ereg(src_reg))
  681. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
  682. else
  683. EMIT1(0x89);
  684. goto stx;
  685. case BPF_STX | BPF_MEM | BPF_DW:
  686. EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
  687. stx: if (is_imm8(insn->off))
  688. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  689. else
  690. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  691. insn->off);
  692. break;
  693. /* LDX: dst_reg = *(u8*)(src_reg + off) */
  694. case BPF_LDX | BPF_MEM | BPF_B:
  695. /* emit 'movzx rax, byte ptr [rax + off]' */
  696. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
  697. goto ldx;
  698. case BPF_LDX | BPF_MEM | BPF_H:
  699. /* emit 'movzx rax, word ptr [rax + off]' */
  700. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
  701. goto ldx;
  702. case BPF_LDX | BPF_MEM | BPF_W:
  703. /* emit 'mov eax, dword ptr [rax+0x14]' */
  704. if (is_ereg(dst_reg) || is_ereg(src_reg))
  705. EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
  706. else
  707. EMIT1(0x8B);
  708. goto ldx;
  709. case BPF_LDX | BPF_MEM | BPF_DW:
  710. /* emit 'mov rax, qword ptr [rax+0x14]' */
  711. EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
  712. ldx: /* if insn->off == 0 we can save one extra byte, but
  713. * special case of x86 r13 which always needs an offset
  714. * is not worth the hassle
  715. */
  716. if (is_imm8(insn->off))
  717. EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
  718. else
  719. EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
  720. insn->off);
  721. break;
  722. /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
  723. case BPF_STX | BPF_XADD | BPF_W:
  724. /* emit 'lock add dword ptr [rax + off], eax' */
  725. if (is_ereg(dst_reg) || is_ereg(src_reg))
  726. EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
  727. else
  728. EMIT2(0xF0, 0x01);
  729. goto xadd;
  730. case BPF_STX | BPF_XADD | BPF_DW:
  731. EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
  732. xadd: if (is_imm8(insn->off))
  733. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  734. else
  735. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  736. insn->off);
  737. break;
  738. /* call */
  739. case BPF_JMP | BPF_CALL:
  740. func = (u8 *) __bpf_call_base + imm32;
  741. jmp_offset = func - (image + addrs[i]);
  742. if (seen_ld_abs) {
  743. reload_skb_data = bpf_helper_changes_pkt_data(func);
  744. if (reload_skb_data) {
  745. EMIT1(0x57); /* push %rdi */
  746. jmp_offset += 22; /* pop, mov, sub, mov */
  747. } else {
  748. EMIT2(0x41, 0x52); /* push %r10 */
  749. EMIT2(0x41, 0x51); /* push %r9 */
  750. /* need to adjust jmp offset, since
  751. * pop %r9, pop %r10 take 4 bytes after call insn
  752. */
  753. jmp_offset += 4;
  754. }
  755. }
  756. if (!imm32 || !is_simm32(jmp_offset)) {
  757. pr_err("unsupported bpf func %d addr %p image %p\n",
  758. imm32, func, image);
  759. return -EINVAL;
  760. }
  761. EMIT1_off32(0xE8, jmp_offset);
  762. if (seen_ld_abs) {
  763. if (reload_skb_data) {
  764. EMIT1(0x5F); /* pop %rdi */
  765. emit_load_skb_data_hlen(&prog);
  766. } else {
  767. EMIT2(0x41, 0x59); /* pop %r9 */
  768. EMIT2(0x41, 0x5A); /* pop %r10 */
  769. }
  770. }
  771. break;
  772. case BPF_JMP | BPF_CALL | BPF_X:
  773. emit_bpf_tail_call(&prog);
  774. break;
  775. /* cond jump */
  776. case BPF_JMP | BPF_JEQ | BPF_X:
  777. case BPF_JMP | BPF_JNE | BPF_X:
  778. case BPF_JMP | BPF_JGT | BPF_X:
  779. case BPF_JMP | BPF_JGE | BPF_X:
  780. case BPF_JMP | BPF_JSGT | BPF_X:
  781. case BPF_JMP | BPF_JSGE | BPF_X:
  782. /* cmp dst_reg, src_reg */
  783. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
  784. add_2reg(0xC0, dst_reg, src_reg));
  785. goto emit_cond_jmp;
  786. case BPF_JMP | BPF_JSET | BPF_X:
  787. /* test dst_reg, src_reg */
  788. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
  789. add_2reg(0xC0, dst_reg, src_reg));
  790. goto emit_cond_jmp;
  791. case BPF_JMP | BPF_JSET | BPF_K:
  792. /* test dst_reg, imm32 */
  793. EMIT1(add_1mod(0x48, dst_reg));
  794. EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
  795. goto emit_cond_jmp;
  796. case BPF_JMP | BPF_JEQ | BPF_K:
  797. case BPF_JMP | BPF_JNE | BPF_K:
  798. case BPF_JMP | BPF_JGT | BPF_K:
  799. case BPF_JMP | BPF_JGE | BPF_K:
  800. case BPF_JMP | BPF_JSGT | BPF_K:
  801. case BPF_JMP | BPF_JSGE | BPF_K:
  802. /* cmp dst_reg, imm8/32 */
  803. EMIT1(add_1mod(0x48, dst_reg));
  804. if (is_imm8(imm32))
  805. EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
  806. else
  807. EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
  808. emit_cond_jmp: /* convert BPF opcode to x86 */
  809. switch (BPF_OP(insn->code)) {
  810. case BPF_JEQ:
  811. jmp_cond = X86_JE;
  812. break;
  813. case BPF_JSET:
  814. case BPF_JNE:
  815. jmp_cond = X86_JNE;
  816. break;
  817. case BPF_JGT:
  818. /* GT is unsigned '>', JA in x86 */
  819. jmp_cond = X86_JA;
  820. break;
  821. case BPF_JGE:
  822. /* GE is unsigned '>=', JAE in x86 */
  823. jmp_cond = X86_JAE;
  824. break;
  825. case BPF_JSGT:
  826. /* signed '>', GT in x86 */
  827. jmp_cond = X86_JG;
  828. break;
  829. case BPF_JSGE:
  830. /* signed '>=', GE in x86 */
  831. jmp_cond = X86_JGE;
  832. break;
  833. default: /* to silence gcc warning */
  834. return -EFAULT;
  835. }
  836. jmp_offset = addrs[i + insn->off] - addrs[i];
  837. if (is_imm8(jmp_offset)) {
  838. EMIT2(jmp_cond, jmp_offset);
  839. } else if (is_simm32(jmp_offset)) {
  840. EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
  841. } else {
  842. pr_err("cond_jmp gen bug %llx\n", jmp_offset);
  843. return -EFAULT;
  844. }
  845. break;
  846. case BPF_JMP | BPF_JA:
  847. jmp_offset = addrs[i + insn->off] - addrs[i];
  848. if (!jmp_offset)
  849. /* optimize out nop jumps */
  850. break;
  851. emit_jmp:
  852. if (is_imm8(jmp_offset)) {
  853. EMIT2(0xEB, jmp_offset);
  854. } else if (is_simm32(jmp_offset)) {
  855. EMIT1_off32(0xE9, jmp_offset);
  856. } else {
  857. pr_err("jmp gen bug %llx\n", jmp_offset);
  858. return -EFAULT;
  859. }
  860. break;
  861. case BPF_LD | BPF_IND | BPF_W:
  862. func = sk_load_word;
  863. goto common_load;
  864. case BPF_LD | BPF_ABS | BPF_W:
  865. func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
  866. common_load:
  867. ctx->seen_ld_abs = seen_ld_abs = true;
  868. jmp_offset = func - (image + addrs[i]);
  869. if (!func || !is_simm32(jmp_offset)) {
  870. pr_err("unsupported bpf func %d addr %p image %p\n",
  871. imm32, func, image);
  872. return -EINVAL;
  873. }
  874. if (BPF_MODE(insn->code) == BPF_ABS) {
  875. /* mov %esi, imm32 */
  876. EMIT1_off32(0xBE, imm32);
  877. } else {
  878. /* mov %rsi, src_reg */
  879. EMIT_mov(BPF_REG_2, src_reg);
  880. if (imm32) {
  881. if (is_imm8(imm32))
  882. /* add %esi, imm8 */
  883. EMIT3(0x83, 0xC6, imm32);
  884. else
  885. /* add %esi, imm32 */
  886. EMIT2_off32(0x81, 0xC6, imm32);
  887. }
  888. }
  889. /* skb pointer is in R6 (%rbx), it will be copied into
  890. * %rdi if skb_copy_bits() call is necessary.
  891. * sk_load_* helpers also use %r10 and %r9d.
  892. * See bpf_jit.S
  893. */
  894. if (seen_ax_reg)
  895. /* r10 = skb->data, mov %r10, off32(%rbx) */
  896. EMIT3_off32(0x4c, 0x8b, 0x93,
  897. offsetof(struct sk_buff, data));
  898. EMIT1_off32(0xE8, jmp_offset); /* call */
  899. break;
  900. case BPF_LD | BPF_IND | BPF_H:
  901. func = sk_load_half;
  902. goto common_load;
  903. case BPF_LD | BPF_ABS | BPF_H:
  904. func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
  905. goto common_load;
  906. case BPF_LD | BPF_IND | BPF_B:
  907. func = sk_load_byte;
  908. goto common_load;
  909. case BPF_LD | BPF_ABS | BPF_B:
  910. func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
  911. goto common_load;
  912. case BPF_JMP | BPF_EXIT:
  913. if (seen_exit) {
  914. jmp_offset = ctx->cleanup_addr - addrs[i];
  915. goto emit_jmp;
  916. }
  917. seen_exit = true;
  918. /* update cleanup_addr */
  919. ctx->cleanup_addr = proglen;
  920. /* mov rbx, qword ptr [rbp-X] */
  921. EMIT3_off32(0x48, 0x8B, 0x9D, -STACKSIZE);
  922. /* mov r13, qword ptr [rbp-X] */
  923. EMIT3_off32(0x4C, 0x8B, 0xAD, -STACKSIZE + 8);
  924. /* mov r14, qword ptr [rbp-X] */
  925. EMIT3_off32(0x4C, 0x8B, 0xB5, -STACKSIZE + 16);
  926. /* mov r15, qword ptr [rbp-X] */
  927. EMIT3_off32(0x4C, 0x8B, 0xBD, -STACKSIZE + 24);
  928. EMIT1(0xC9); /* leave */
  929. EMIT1(0xC3); /* ret */
  930. break;
  931. default:
  932. /* By design x64 JIT should support all BPF instructions
  933. * This error will be seen if new instruction was added
  934. * to interpreter, but not to JIT
  935. * or if there is junk in bpf_prog
  936. */
  937. pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
  938. return -EINVAL;
  939. }
  940. ilen = prog - temp;
  941. if (ilen > BPF_MAX_INSN_SIZE) {
  942. pr_err("bpf_jit: fatal insn size error\n");
  943. return -EFAULT;
  944. }
  945. if (image) {
  946. if (unlikely(proglen + ilen > oldproglen)) {
  947. pr_err("bpf_jit: fatal error\n");
  948. return -EFAULT;
  949. }
  950. memcpy(image + proglen, temp, ilen);
  951. }
  952. proglen += ilen;
  953. addrs[i] = proglen;
  954. prog = temp;
  955. }
  956. return proglen;
  957. }
  958. struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
  959. {
  960. struct bpf_binary_header *header = NULL;
  961. struct bpf_prog *tmp, *orig_prog = prog;
  962. int proglen, oldproglen = 0;
  963. struct jit_context ctx = {};
  964. bool tmp_blinded = false;
  965. u8 *image = NULL;
  966. int *addrs;
  967. int pass;
  968. int i;
  969. if (!bpf_jit_enable)
  970. return orig_prog;
  971. tmp = bpf_jit_blind_constants(prog);
  972. /* If blinding was requested and we failed during blinding,
  973. * we must fall back to the interpreter.
  974. */
  975. if (IS_ERR(tmp))
  976. return orig_prog;
  977. if (tmp != prog) {
  978. tmp_blinded = true;
  979. prog = tmp;
  980. }
  981. addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
  982. if (!addrs) {
  983. prog = orig_prog;
  984. goto out;
  985. }
  986. /* Before first pass, make a rough estimation of addrs[]
  987. * each bpf instruction is translated to less than 64 bytes
  988. */
  989. for (proglen = 0, i = 0; i < prog->len; i++) {
  990. proglen += 64;
  991. addrs[i] = proglen;
  992. }
  993. ctx.cleanup_addr = proglen;
  994. /* JITed image shrinks with every pass and the loop iterates
  995. * until the image stops shrinking. Very large bpf programs
  996. * may converge on the last pass. In such case do one more
  997. * pass to emit the final image
  998. */
  999. for (pass = 0; pass < 10 || image; pass++) {
  1000. proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
  1001. if (proglen <= 0) {
  1002. image = NULL;
  1003. if (header)
  1004. bpf_jit_binary_free(header);
  1005. prog = orig_prog;
  1006. goto out_addrs;
  1007. }
  1008. if (image) {
  1009. if (proglen != oldproglen) {
  1010. pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
  1011. proglen, oldproglen);
  1012. prog = orig_prog;
  1013. goto out_addrs;
  1014. }
  1015. break;
  1016. }
  1017. if (proglen == oldproglen) {
  1018. header = bpf_jit_binary_alloc(proglen, &image,
  1019. 1, jit_fill_hole);
  1020. if (!header) {
  1021. prog = orig_prog;
  1022. goto out_addrs;
  1023. }
  1024. }
  1025. oldproglen = proglen;
  1026. }
  1027. if (bpf_jit_enable > 1)
  1028. bpf_jit_dump(prog->len, proglen, pass + 1, image);
  1029. if (image) {
  1030. bpf_flush_icache(header, image + proglen);
  1031. bpf_jit_binary_lock_ro(header);
  1032. prog->bpf_func = (void *)image;
  1033. prog->jited = 1;
  1034. } else {
  1035. prog = orig_prog;
  1036. }
  1037. out_addrs:
  1038. kfree(addrs);
  1039. out:
  1040. if (tmp_blinded)
  1041. bpf_jit_prog_release_other(prog, prog == orig_prog ?
  1042. tmp : orig_prog);
  1043. return prog;
  1044. }