aesni-intel_glue.c 35 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <crypto/b128ops.h>
  30. #include <crypto/xts.h>
  31. #include <asm/cpu_device_id.h>
  32. #include <asm/fpu/api.h>
  33. #include <asm/crypto/aes.h>
  34. #include <crypto/scatterwalk.h>
  35. #include <crypto/internal/aead.h>
  36. #include <crypto/internal/simd.h>
  37. #include <crypto/internal/skcipher.h>
  38. #include <linux/workqueue.h>
  39. #include <linux/spinlock.h>
  40. #ifdef CONFIG_X86_64
  41. #include <asm/crypto/glue_helper.h>
  42. #endif
  43. #define AESNI_ALIGN 16
  44. #define AESNI_ALIGN_ATTR __attribute__ ((__aligned__(AESNI_ALIGN)))
  45. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE - 1))
  46. #define RFC4106_HASH_SUBKEY_SIZE 16
  47. #define AESNI_ALIGN_EXTRA ((AESNI_ALIGN - 1) & ~(CRYPTO_MINALIGN - 1))
  48. #define CRYPTO_AES_CTX_SIZE (sizeof(struct crypto_aes_ctx) + AESNI_ALIGN_EXTRA)
  49. #define XTS_AES_CTX_SIZE (sizeof(struct aesni_xts_ctx) + AESNI_ALIGN_EXTRA)
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  56. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  57. u8 nonce[4];
  58. };
  59. struct aesni_xts_ctx {
  60. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  61. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  62. };
  63. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  64. unsigned int key_len);
  65. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  66. const u8 *in);
  67. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  68. const u8 *in);
  69. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  70. const u8 *in, unsigned int len);
  71. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  72. const u8 *in, unsigned int len);
  73. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  74. const u8 *in, unsigned int len, u8 *iv);
  75. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  76. const u8 *in, unsigned int len, u8 *iv);
  77. int crypto_fpu_init(void);
  78. void crypto_fpu_exit(void);
  79. #define AVX_GEN2_OPTSIZE 640
  80. #define AVX_GEN4_OPTSIZE 4096
  81. #ifdef CONFIG_X86_64
  82. static void (*aesni_ctr_enc_tfm)(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, bool enc, u8 *iv);
  88. /* asmlinkage void aesni_gcm_enc()
  89. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  90. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  91. * const u8 *in, Plaintext input
  92. * unsigned long plaintext_len, Length of data in bytes for encryption.
  93. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  94. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  95. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  96. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  97. * const u8 *aad, Additional Authentication Data (AAD)
  98. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  99. * is going to be 8 or 12 bytes
  100. * u8 *auth_tag, Authenticated Tag output.
  101. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  102. * Valid values are 16 (most likely), 12 or 8.
  103. */
  104. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  105. const u8 *in, unsigned long plaintext_len, u8 *iv,
  106. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  107. u8 *auth_tag, unsigned long auth_tag_len);
  108. /* asmlinkage void aesni_gcm_dec()
  109. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  110. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  111. * const u8 *in, Ciphertext input
  112. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  113. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  114. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  115. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  116. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  117. * const u8 *aad, Additional Authentication Data (AAD)
  118. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  119. * to be 8 or 12 bytes
  120. * u8 *auth_tag, Authenticated Tag output.
  121. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  122. * Valid values are 16 (most likely), 12 or 8.
  123. */
  124. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  125. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  126. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  127. u8 *auth_tag, unsigned long auth_tag_len);
  128. #ifdef CONFIG_AS_AVX
  129. asmlinkage void aes_ctr_enc_128_avx_by8(const u8 *in, u8 *iv,
  130. void *keys, u8 *out, unsigned int num_bytes);
  131. asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
  132. void *keys, u8 *out, unsigned int num_bytes);
  133. asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
  134. void *keys, u8 *out, unsigned int num_bytes);
  135. /*
  136. * asmlinkage void aesni_gcm_precomp_avx_gen2()
  137. * gcm_data *my_ctx_data, context data
  138. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  139. */
  140. asmlinkage void aesni_gcm_precomp_avx_gen2(void *my_ctx_data, u8 *hash_subkey);
  141. asmlinkage void aesni_gcm_enc_avx_gen2(void *ctx, u8 *out,
  142. const u8 *in, unsigned long plaintext_len, u8 *iv,
  143. const u8 *aad, unsigned long aad_len,
  144. u8 *auth_tag, unsigned long auth_tag_len);
  145. asmlinkage void aesni_gcm_dec_avx_gen2(void *ctx, u8 *out,
  146. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  147. const u8 *aad, unsigned long aad_len,
  148. u8 *auth_tag, unsigned long auth_tag_len);
  149. static void aesni_gcm_enc_avx(void *ctx, u8 *out,
  150. const u8 *in, unsigned long plaintext_len, u8 *iv,
  151. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  152. u8 *auth_tag, unsigned long auth_tag_len)
  153. {
  154. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  155. if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)){
  156. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  157. aad_len, auth_tag, auth_tag_len);
  158. } else {
  159. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  160. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  161. aad_len, auth_tag, auth_tag_len);
  162. }
  163. }
  164. static void aesni_gcm_dec_avx(void *ctx, u8 *out,
  165. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  166. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  167. u8 *auth_tag, unsigned long auth_tag_len)
  168. {
  169. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  170. if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  171. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
  172. aad_len, auth_tag, auth_tag_len);
  173. } else {
  174. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  175. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  176. aad_len, auth_tag, auth_tag_len);
  177. }
  178. }
  179. #endif
  180. #ifdef CONFIG_AS_AVX2
  181. /*
  182. * asmlinkage void aesni_gcm_precomp_avx_gen4()
  183. * gcm_data *my_ctx_data, context data
  184. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  185. */
  186. asmlinkage void aesni_gcm_precomp_avx_gen4(void *my_ctx_data, u8 *hash_subkey);
  187. asmlinkage void aesni_gcm_enc_avx_gen4(void *ctx, u8 *out,
  188. const u8 *in, unsigned long plaintext_len, u8 *iv,
  189. const u8 *aad, unsigned long aad_len,
  190. u8 *auth_tag, unsigned long auth_tag_len);
  191. asmlinkage void aesni_gcm_dec_avx_gen4(void *ctx, u8 *out,
  192. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  193. const u8 *aad, unsigned long aad_len,
  194. u8 *auth_tag, unsigned long auth_tag_len);
  195. static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
  196. const u8 *in, unsigned long plaintext_len, u8 *iv,
  197. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  198. u8 *auth_tag, unsigned long auth_tag_len)
  199. {
  200. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  201. if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  202. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  203. aad_len, auth_tag, auth_tag_len);
  204. } else if (plaintext_len < AVX_GEN4_OPTSIZE) {
  205. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  206. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  207. aad_len, auth_tag, auth_tag_len);
  208. } else {
  209. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  210. aesni_gcm_enc_avx_gen4(ctx, out, in, plaintext_len, iv, aad,
  211. aad_len, auth_tag, auth_tag_len);
  212. }
  213. }
  214. static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
  215. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  216. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  217. u8 *auth_tag, unsigned long auth_tag_len)
  218. {
  219. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  220. if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  221. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
  222. aad, aad_len, auth_tag, auth_tag_len);
  223. } else if (ciphertext_len < AVX_GEN4_OPTSIZE) {
  224. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  225. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  226. aad_len, auth_tag, auth_tag_len);
  227. } else {
  228. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  229. aesni_gcm_dec_avx_gen4(ctx, out, in, ciphertext_len, iv, aad,
  230. aad_len, auth_tag, auth_tag_len);
  231. }
  232. }
  233. #endif
  234. static void (*aesni_gcm_enc_tfm)(void *ctx, u8 *out,
  235. const u8 *in, unsigned long plaintext_len, u8 *iv,
  236. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  237. u8 *auth_tag, unsigned long auth_tag_len);
  238. static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,
  239. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  240. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  241. u8 *auth_tag, unsigned long auth_tag_len);
  242. static inline struct
  243. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  244. {
  245. unsigned long align = AESNI_ALIGN;
  246. if (align <= crypto_tfm_ctx_alignment())
  247. align = 1;
  248. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  249. }
  250. #endif
  251. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  252. {
  253. unsigned long addr = (unsigned long)raw_ctx;
  254. unsigned long align = AESNI_ALIGN;
  255. if (align <= crypto_tfm_ctx_alignment())
  256. align = 1;
  257. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  258. }
  259. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  260. const u8 *in_key, unsigned int key_len)
  261. {
  262. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  263. u32 *flags = &tfm->crt_flags;
  264. int err;
  265. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  266. key_len != AES_KEYSIZE_256) {
  267. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  268. return -EINVAL;
  269. }
  270. if (!irq_fpu_usable())
  271. err = crypto_aes_expand_key(ctx, in_key, key_len);
  272. else {
  273. kernel_fpu_begin();
  274. err = aesni_set_key(ctx, in_key, key_len);
  275. kernel_fpu_end();
  276. }
  277. return err;
  278. }
  279. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  280. unsigned int key_len)
  281. {
  282. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  283. }
  284. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  285. {
  286. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  287. if (!irq_fpu_usable())
  288. crypto_aes_encrypt_x86(ctx, dst, src);
  289. else {
  290. kernel_fpu_begin();
  291. aesni_enc(ctx, dst, src);
  292. kernel_fpu_end();
  293. }
  294. }
  295. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  296. {
  297. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  298. if (!irq_fpu_usable())
  299. crypto_aes_decrypt_x86(ctx, dst, src);
  300. else {
  301. kernel_fpu_begin();
  302. aesni_dec(ctx, dst, src);
  303. kernel_fpu_end();
  304. }
  305. }
  306. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  307. {
  308. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  309. aesni_enc(ctx, dst, src);
  310. }
  311. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  312. {
  313. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  314. aesni_dec(ctx, dst, src);
  315. }
  316. static int aesni_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
  317. unsigned int len)
  318. {
  319. return aes_set_key_common(crypto_skcipher_tfm(tfm),
  320. crypto_skcipher_ctx(tfm), key, len);
  321. }
  322. static int ecb_encrypt(struct skcipher_request *req)
  323. {
  324. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  325. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  326. struct skcipher_walk walk;
  327. unsigned int nbytes;
  328. int err;
  329. err = skcipher_walk_virt(&walk, req, true);
  330. kernel_fpu_begin();
  331. while ((nbytes = walk.nbytes)) {
  332. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  333. nbytes & AES_BLOCK_MASK);
  334. nbytes &= AES_BLOCK_SIZE - 1;
  335. err = skcipher_walk_done(&walk, nbytes);
  336. }
  337. kernel_fpu_end();
  338. return err;
  339. }
  340. static int ecb_decrypt(struct skcipher_request *req)
  341. {
  342. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  343. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  344. struct skcipher_walk walk;
  345. unsigned int nbytes;
  346. int err;
  347. err = skcipher_walk_virt(&walk, req, true);
  348. kernel_fpu_begin();
  349. while ((nbytes = walk.nbytes)) {
  350. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  351. nbytes & AES_BLOCK_MASK);
  352. nbytes &= AES_BLOCK_SIZE - 1;
  353. err = skcipher_walk_done(&walk, nbytes);
  354. }
  355. kernel_fpu_end();
  356. return err;
  357. }
  358. static int cbc_encrypt(struct skcipher_request *req)
  359. {
  360. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  361. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  362. struct skcipher_walk walk;
  363. unsigned int nbytes;
  364. int err;
  365. err = skcipher_walk_virt(&walk, req, true);
  366. kernel_fpu_begin();
  367. while ((nbytes = walk.nbytes)) {
  368. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  369. nbytes & AES_BLOCK_MASK, walk.iv);
  370. nbytes &= AES_BLOCK_SIZE - 1;
  371. err = skcipher_walk_done(&walk, nbytes);
  372. }
  373. kernel_fpu_end();
  374. return err;
  375. }
  376. static int cbc_decrypt(struct skcipher_request *req)
  377. {
  378. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  379. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  380. struct skcipher_walk walk;
  381. unsigned int nbytes;
  382. int err;
  383. err = skcipher_walk_virt(&walk, req, true);
  384. kernel_fpu_begin();
  385. while ((nbytes = walk.nbytes)) {
  386. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  387. nbytes & AES_BLOCK_MASK, walk.iv);
  388. nbytes &= AES_BLOCK_SIZE - 1;
  389. err = skcipher_walk_done(&walk, nbytes);
  390. }
  391. kernel_fpu_end();
  392. return err;
  393. }
  394. #ifdef CONFIG_X86_64
  395. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  396. struct skcipher_walk *walk)
  397. {
  398. u8 *ctrblk = walk->iv;
  399. u8 keystream[AES_BLOCK_SIZE];
  400. u8 *src = walk->src.virt.addr;
  401. u8 *dst = walk->dst.virt.addr;
  402. unsigned int nbytes = walk->nbytes;
  403. aesni_enc(ctx, keystream, ctrblk);
  404. crypto_xor(keystream, src, nbytes);
  405. memcpy(dst, keystream, nbytes);
  406. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  407. }
  408. #ifdef CONFIG_AS_AVX
  409. static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  410. const u8 *in, unsigned int len, u8 *iv)
  411. {
  412. /*
  413. * based on key length, override with the by8 version
  414. * of ctr mode encryption/decryption for improved performance
  415. * aes_set_key_common() ensures that key length is one of
  416. * {128,192,256}
  417. */
  418. if (ctx->key_length == AES_KEYSIZE_128)
  419. aes_ctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len);
  420. else if (ctx->key_length == AES_KEYSIZE_192)
  421. aes_ctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len);
  422. else
  423. aes_ctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len);
  424. }
  425. #endif
  426. static int ctr_crypt(struct skcipher_request *req)
  427. {
  428. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  429. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  430. struct skcipher_walk walk;
  431. unsigned int nbytes;
  432. int err;
  433. err = skcipher_walk_virt(&walk, req, true);
  434. kernel_fpu_begin();
  435. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  436. aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  437. nbytes & AES_BLOCK_MASK, walk.iv);
  438. nbytes &= AES_BLOCK_SIZE - 1;
  439. err = skcipher_walk_done(&walk, nbytes);
  440. }
  441. if (walk.nbytes) {
  442. ctr_crypt_final(ctx, &walk);
  443. err = skcipher_walk_done(&walk, 0);
  444. }
  445. kernel_fpu_end();
  446. return err;
  447. }
  448. static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key,
  449. unsigned int keylen)
  450. {
  451. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  452. int err;
  453. err = xts_verify_key(tfm, key, keylen);
  454. if (err)
  455. return err;
  456. keylen /= 2;
  457. /* first half of xts-key is for crypt */
  458. err = aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_crypt_ctx,
  459. key, keylen);
  460. if (err)
  461. return err;
  462. /* second half of xts-key is for tweak */
  463. return aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_tweak_ctx,
  464. key + keylen, keylen);
  465. }
  466. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  467. {
  468. aesni_enc(ctx, out, in);
  469. }
  470. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  471. {
  472. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  473. }
  474. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  475. {
  476. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  477. }
  478. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  479. {
  480. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  481. }
  482. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  483. {
  484. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  485. }
  486. static const struct common_glue_ctx aesni_enc_xts = {
  487. .num_funcs = 2,
  488. .fpu_blocks_limit = 1,
  489. .funcs = { {
  490. .num_blocks = 8,
  491. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  492. }, {
  493. .num_blocks = 1,
  494. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  495. } }
  496. };
  497. static const struct common_glue_ctx aesni_dec_xts = {
  498. .num_funcs = 2,
  499. .fpu_blocks_limit = 1,
  500. .funcs = { {
  501. .num_blocks = 8,
  502. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  503. }, {
  504. .num_blocks = 1,
  505. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  506. } }
  507. };
  508. static int xts_encrypt(struct skcipher_request *req)
  509. {
  510. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  511. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  512. return glue_xts_req_128bit(&aesni_enc_xts, req,
  513. XTS_TWEAK_CAST(aesni_xts_tweak),
  514. aes_ctx(ctx->raw_tweak_ctx),
  515. aes_ctx(ctx->raw_crypt_ctx));
  516. }
  517. static int xts_decrypt(struct skcipher_request *req)
  518. {
  519. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  520. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  521. return glue_xts_req_128bit(&aesni_dec_xts, req,
  522. XTS_TWEAK_CAST(aesni_xts_tweak),
  523. aes_ctx(ctx->raw_tweak_ctx),
  524. aes_ctx(ctx->raw_crypt_ctx));
  525. }
  526. static int rfc4106_init(struct crypto_aead *aead)
  527. {
  528. struct cryptd_aead *cryptd_tfm;
  529. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  530. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni",
  531. CRYPTO_ALG_INTERNAL,
  532. CRYPTO_ALG_INTERNAL);
  533. if (IS_ERR(cryptd_tfm))
  534. return PTR_ERR(cryptd_tfm);
  535. *ctx = cryptd_tfm;
  536. crypto_aead_set_reqsize(aead, crypto_aead_reqsize(&cryptd_tfm->base));
  537. return 0;
  538. }
  539. static void rfc4106_exit(struct crypto_aead *aead)
  540. {
  541. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  542. cryptd_free_aead(*ctx);
  543. }
  544. static int
  545. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  546. {
  547. struct crypto_cipher *tfm;
  548. int ret;
  549. tfm = crypto_alloc_cipher("aes", 0, 0);
  550. if (IS_ERR(tfm))
  551. return PTR_ERR(tfm);
  552. ret = crypto_cipher_setkey(tfm, key, key_len);
  553. if (ret)
  554. goto out_free_cipher;
  555. /* Clear the data in the hash sub key container to zero.*/
  556. /* We want to cipher all zeros to create the hash sub key. */
  557. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  558. crypto_cipher_encrypt_one(tfm, hash_subkey, hash_subkey);
  559. out_free_cipher:
  560. crypto_free_cipher(tfm);
  561. return ret;
  562. }
  563. static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key,
  564. unsigned int key_len)
  565. {
  566. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(aead);
  567. if (key_len < 4) {
  568. crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  569. return -EINVAL;
  570. }
  571. /*Account for 4 byte nonce at the end.*/
  572. key_len -= 4;
  573. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  574. return aes_set_key_common(crypto_aead_tfm(aead),
  575. &ctx->aes_key_expanded, key, key_len) ?:
  576. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  577. }
  578. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  579. unsigned int key_len)
  580. {
  581. struct cryptd_aead **ctx = crypto_aead_ctx(parent);
  582. struct cryptd_aead *cryptd_tfm = *ctx;
  583. return crypto_aead_setkey(&cryptd_tfm->base, key, key_len);
  584. }
  585. static int common_rfc4106_set_authsize(struct crypto_aead *aead,
  586. unsigned int authsize)
  587. {
  588. switch (authsize) {
  589. case 8:
  590. case 12:
  591. case 16:
  592. break;
  593. default:
  594. return -EINVAL;
  595. }
  596. return 0;
  597. }
  598. /* This is the Integrity Check Value (aka the authentication tag length and can
  599. * be 8, 12 or 16 bytes long. */
  600. static int rfc4106_set_authsize(struct crypto_aead *parent,
  601. unsigned int authsize)
  602. {
  603. struct cryptd_aead **ctx = crypto_aead_ctx(parent);
  604. struct cryptd_aead *cryptd_tfm = *ctx;
  605. return crypto_aead_setauthsize(&cryptd_tfm->base, authsize);
  606. }
  607. static int helper_rfc4106_encrypt(struct aead_request *req)
  608. {
  609. u8 one_entry_in_sg = 0;
  610. u8 *src, *dst, *assoc;
  611. __be32 counter = cpu_to_be32(1);
  612. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  613. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  614. void *aes_ctx = &(ctx->aes_key_expanded);
  615. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  616. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  617. struct scatter_walk src_sg_walk;
  618. struct scatter_walk dst_sg_walk = {};
  619. unsigned int i;
  620. /* Assuming we are supporting rfc4106 64-bit extended */
  621. /* sequence numbers We need to have the AAD length equal */
  622. /* to 16 or 20 bytes */
  623. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  624. return -EINVAL;
  625. /* IV below built */
  626. for (i = 0; i < 4; i++)
  627. *(iv+i) = ctx->nonce[i];
  628. for (i = 0; i < 8; i++)
  629. *(iv+4+i) = req->iv[i];
  630. *((__be32 *)(iv+12)) = counter;
  631. if (sg_is_last(req->src) &&
  632. (!PageHighMem(sg_page(req->src)) ||
  633. req->src->offset + req->src->length <= PAGE_SIZE) &&
  634. sg_is_last(req->dst) &&
  635. (!PageHighMem(sg_page(req->dst)) ||
  636. req->dst->offset + req->dst->length <= PAGE_SIZE)) {
  637. one_entry_in_sg = 1;
  638. scatterwalk_start(&src_sg_walk, req->src);
  639. assoc = scatterwalk_map(&src_sg_walk);
  640. src = assoc + req->assoclen;
  641. dst = src;
  642. if (unlikely(req->src != req->dst)) {
  643. scatterwalk_start(&dst_sg_walk, req->dst);
  644. dst = scatterwalk_map(&dst_sg_walk) + req->assoclen;
  645. }
  646. } else {
  647. /* Allocate memory for src, dst, assoc */
  648. assoc = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  649. GFP_ATOMIC);
  650. if (unlikely(!assoc))
  651. return -ENOMEM;
  652. scatterwalk_map_and_copy(assoc, req->src, 0,
  653. req->assoclen + req->cryptlen, 0);
  654. src = assoc + req->assoclen;
  655. dst = src;
  656. }
  657. kernel_fpu_begin();
  658. aesni_gcm_enc_tfm(aes_ctx, dst, src, req->cryptlen, iv,
  659. ctx->hash_subkey, assoc, req->assoclen - 8,
  660. dst + req->cryptlen, auth_tag_len);
  661. kernel_fpu_end();
  662. /* The authTag (aka the Integrity Check Value) needs to be written
  663. * back to the packet. */
  664. if (one_entry_in_sg) {
  665. if (unlikely(req->src != req->dst)) {
  666. scatterwalk_unmap(dst - req->assoclen);
  667. scatterwalk_advance(&dst_sg_walk, req->dst->length);
  668. scatterwalk_done(&dst_sg_walk, 1, 0);
  669. }
  670. scatterwalk_unmap(assoc);
  671. scatterwalk_advance(&src_sg_walk, req->src->length);
  672. scatterwalk_done(&src_sg_walk, req->src == req->dst, 0);
  673. } else {
  674. scatterwalk_map_and_copy(dst, req->dst, req->assoclen,
  675. req->cryptlen + auth_tag_len, 1);
  676. kfree(assoc);
  677. }
  678. return 0;
  679. }
  680. static int helper_rfc4106_decrypt(struct aead_request *req)
  681. {
  682. u8 one_entry_in_sg = 0;
  683. u8 *src, *dst, *assoc;
  684. unsigned long tempCipherLen = 0;
  685. __be32 counter = cpu_to_be32(1);
  686. int retval = 0;
  687. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  688. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  689. void *aes_ctx = &(ctx->aes_key_expanded);
  690. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  691. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  692. u8 authTag[16];
  693. struct scatter_walk src_sg_walk;
  694. struct scatter_walk dst_sg_walk = {};
  695. unsigned int i;
  696. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  697. return -EINVAL;
  698. /* Assuming we are supporting rfc4106 64-bit extended */
  699. /* sequence numbers We need to have the AAD length */
  700. /* equal to 16 or 20 bytes */
  701. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  702. /* IV below built */
  703. for (i = 0; i < 4; i++)
  704. *(iv+i) = ctx->nonce[i];
  705. for (i = 0; i < 8; i++)
  706. *(iv+4+i) = req->iv[i];
  707. *((__be32 *)(iv+12)) = counter;
  708. if (sg_is_last(req->src) &&
  709. (!PageHighMem(sg_page(req->src)) ||
  710. req->src->offset + req->src->length <= PAGE_SIZE) &&
  711. sg_is_last(req->dst) &&
  712. (!PageHighMem(sg_page(req->dst)) ||
  713. req->dst->offset + req->dst->length <= PAGE_SIZE)) {
  714. one_entry_in_sg = 1;
  715. scatterwalk_start(&src_sg_walk, req->src);
  716. assoc = scatterwalk_map(&src_sg_walk);
  717. src = assoc + req->assoclen;
  718. dst = src;
  719. if (unlikely(req->src != req->dst)) {
  720. scatterwalk_start(&dst_sg_walk, req->dst);
  721. dst = scatterwalk_map(&dst_sg_walk) + req->assoclen;
  722. }
  723. } else {
  724. /* Allocate memory for src, dst, assoc */
  725. assoc = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  726. if (!assoc)
  727. return -ENOMEM;
  728. scatterwalk_map_and_copy(assoc, req->src, 0,
  729. req->assoclen + req->cryptlen, 0);
  730. src = assoc + req->assoclen;
  731. dst = src;
  732. }
  733. kernel_fpu_begin();
  734. aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,
  735. ctx->hash_subkey, assoc, req->assoclen - 8,
  736. authTag, auth_tag_len);
  737. kernel_fpu_end();
  738. /* Compare generated tag with passed in tag. */
  739. retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?
  740. -EBADMSG : 0;
  741. if (one_entry_in_sg) {
  742. if (unlikely(req->src != req->dst)) {
  743. scatterwalk_unmap(dst - req->assoclen);
  744. scatterwalk_advance(&dst_sg_walk, req->dst->length);
  745. scatterwalk_done(&dst_sg_walk, 1, 0);
  746. }
  747. scatterwalk_unmap(assoc);
  748. scatterwalk_advance(&src_sg_walk, req->src->length);
  749. scatterwalk_done(&src_sg_walk, req->src == req->dst, 0);
  750. } else {
  751. scatterwalk_map_and_copy(dst, req->dst, req->assoclen,
  752. tempCipherLen, 1);
  753. kfree(assoc);
  754. }
  755. return retval;
  756. }
  757. static int rfc4106_encrypt(struct aead_request *req)
  758. {
  759. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  760. struct cryptd_aead **ctx = crypto_aead_ctx(tfm);
  761. struct cryptd_aead *cryptd_tfm = *ctx;
  762. tfm = &cryptd_tfm->base;
  763. if (irq_fpu_usable() && (!in_atomic() ||
  764. !cryptd_aead_queued(cryptd_tfm)))
  765. tfm = cryptd_aead_child(cryptd_tfm);
  766. aead_request_set_tfm(req, tfm);
  767. return crypto_aead_encrypt(req);
  768. }
  769. static int rfc4106_decrypt(struct aead_request *req)
  770. {
  771. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  772. struct cryptd_aead **ctx = crypto_aead_ctx(tfm);
  773. struct cryptd_aead *cryptd_tfm = *ctx;
  774. tfm = &cryptd_tfm->base;
  775. if (irq_fpu_usable() && (!in_atomic() ||
  776. !cryptd_aead_queued(cryptd_tfm)))
  777. tfm = cryptd_aead_child(cryptd_tfm);
  778. aead_request_set_tfm(req, tfm);
  779. return crypto_aead_decrypt(req);
  780. }
  781. #endif
  782. static struct crypto_alg aesni_algs[] = { {
  783. .cra_name = "aes",
  784. .cra_driver_name = "aes-aesni",
  785. .cra_priority = 300,
  786. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  787. .cra_blocksize = AES_BLOCK_SIZE,
  788. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  789. .cra_module = THIS_MODULE,
  790. .cra_u = {
  791. .cipher = {
  792. .cia_min_keysize = AES_MIN_KEY_SIZE,
  793. .cia_max_keysize = AES_MAX_KEY_SIZE,
  794. .cia_setkey = aes_set_key,
  795. .cia_encrypt = aes_encrypt,
  796. .cia_decrypt = aes_decrypt
  797. }
  798. }
  799. }, {
  800. .cra_name = "__aes",
  801. .cra_driver_name = "__aes-aesni",
  802. .cra_priority = 300,
  803. .cra_flags = CRYPTO_ALG_TYPE_CIPHER | CRYPTO_ALG_INTERNAL,
  804. .cra_blocksize = AES_BLOCK_SIZE,
  805. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  806. .cra_module = THIS_MODULE,
  807. .cra_u = {
  808. .cipher = {
  809. .cia_min_keysize = AES_MIN_KEY_SIZE,
  810. .cia_max_keysize = AES_MAX_KEY_SIZE,
  811. .cia_setkey = aes_set_key,
  812. .cia_encrypt = __aes_encrypt,
  813. .cia_decrypt = __aes_decrypt
  814. }
  815. }
  816. } };
  817. static struct skcipher_alg aesni_skciphers[] = {
  818. {
  819. .base = {
  820. .cra_name = "__ecb(aes)",
  821. .cra_driver_name = "__ecb-aes-aesni",
  822. .cra_priority = 400,
  823. .cra_flags = CRYPTO_ALG_INTERNAL,
  824. .cra_blocksize = AES_BLOCK_SIZE,
  825. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  826. .cra_module = THIS_MODULE,
  827. },
  828. .min_keysize = AES_MIN_KEY_SIZE,
  829. .max_keysize = AES_MAX_KEY_SIZE,
  830. .setkey = aesni_skcipher_setkey,
  831. .encrypt = ecb_encrypt,
  832. .decrypt = ecb_decrypt,
  833. }, {
  834. .base = {
  835. .cra_name = "__cbc(aes)",
  836. .cra_driver_name = "__cbc-aes-aesni",
  837. .cra_priority = 400,
  838. .cra_flags = CRYPTO_ALG_INTERNAL,
  839. .cra_blocksize = AES_BLOCK_SIZE,
  840. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  841. .cra_module = THIS_MODULE,
  842. },
  843. .min_keysize = AES_MIN_KEY_SIZE,
  844. .max_keysize = AES_MAX_KEY_SIZE,
  845. .ivsize = AES_BLOCK_SIZE,
  846. .setkey = aesni_skcipher_setkey,
  847. .encrypt = cbc_encrypt,
  848. .decrypt = cbc_decrypt,
  849. #ifdef CONFIG_X86_64
  850. }, {
  851. .base = {
  852. .cra_name = "__ctr(aes)",
  853. .cra_driver_name = "__ctr-aes-aesni",
  854. .cra_priority = 400,
  855. .cra_flags = CRYPTO_ALG_INTERNAL,
  856. .cra_blocksize = 1,
  857. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  858. .cra_module = THIS_MODULE,
  859. },
  860. .min_keysize = AES_MIN_KEY_SIZE,
  861. .max_keysize = AES_MAX_KEY_SIZE,
  862. .ivsize = AES_BLOCK_SIZE,
  863. .chunksize = AES_BLOCK_SIZE,
  864. .setkey = aesni_skcipher_setkey,
  865. .encrypt = ctr_crypt,
  866. .decrypt = ctr_crypt,
  867. }, {
  868. .base = {
  869. .cra_name = "__xts(aes)",
  870. .cra_driver_name = "__xts-aes-aesni",
  871. .cra_priority = 401,
  872. .cra_flags = CRYPTO_ALG_INTERNAL,
  873. .cra_blocksize = AES_BLOCK_SIZE,
  874. .cra_ctxsize = XTS_AES_CTX_SIZE,
  875. .cra_module = THIS_MODULE,
  876. },
  877. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  878. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  879. .ivsize = AES_BLOCK_SIZE,
  880. .setkey = xts_aesni_setkey,
  881. .encrypt = xts_encrypt,
  882. .decrypt = xts_decrypt,
  883. #endif
  884. }
  885. };
  886. struct simd_skcipher_alg *aesni_simd_skciphers[ARRAY_SIZE(aesni_skciphers)];
  887. struct {
  888. const char *algname;
  889. const char *drvname;
  890. const char *basename;
  891. struct simd_skcipher_alg *simd;
  892. } aesni_simd_skciphers2[] = {
  893. #if (defined(MODULE) && IS_ENABLED(CONFIG_CRYPTO_PCBC)) || \
  894. IS_BUILTIN(CONFIG_CRYPTO_PCBC)
  895. {
  896. .algname = "pcbc(aes)",
  897. .drvname = "pcbc-aes-aesni",
  898. .basename = "fpu(pcbc(__aes-aesni))",
  899. },
  900. #endif
  901. };
  902. #ifdef CONFIG_X86_64
  903. static struct aead_alg aesni_aead_algs[] = { {
  904. .setkey = common_rfc4106_set_key,
  905. .setauthsize = common_rfc4106_set_authsize,
  906. .encrypt = helper_rfc4106_encrypt,
  907. .decrypt = helper_rfc4106_decrypt,
  908. .ivsize = 8,
  909. .maxauthsize = 16,
  910. .base = {
  911. .cra_name = "__gcm-aes-aesni",
  912. .cra_driver_name = "__driver-gcm-aes-aesni",
  913. .cra_flags = CRYPTO_ALG_INTERNAL,
  914. .cra_blocksize = 1,
  915. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx),
  916. .cra_alignmask = AESNI_ALIGN - 1,
  917. .cra_module = THIS_MODULE,
  918. },
  919. }, {
  920. .init = rfc4106_init,
  921. .exit = rfc4106_exit,
  922. .setkey = rfc4106_set_key,
  923. .setauthsize = rfc4106_set_authsize,
  924. .encrypt = rfc4106_encrypt,
  925. .decrypt = rfc4106_decrypt,
  926. .ivsize = 8,
  927. .maxauthsize = 16,
  928. .base = {
  929. .cra_name = "rfc4106(gcm(aes))",
  930. .cra_driver_name = "rfc4106-gcm-aesni",
  931. .cra_priority = 400,
  932. .cra_flags = CRYPTO_ALG_ASYNC,
  933. .cra_blocksize = 1,
  934. .cra_ctxsize = sizeof(struct cryptd_aead *),
  935. .cra_module = THIS_MODULE,
  936. },
  937. } };
  938. #else
  939. static struct aead_alg aesni_aead_algs[0];
  940. #endif
  941. static const struct x86_cpu_id aesni_cpu_id[] = {
  942. X86_FEATURE_MATCH(X86_FEATURE_AES),
  943. {}
  944. };
  945. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  946. static void aesni_free_simds(void)
  947. {
  948. int i;
  949. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers) &&
  950. aesni_simd_skciphers[i]; i++)
  951. simd_skcipher_free(aesni_simd_skciphers[i]);
  952. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++)
  953. if (aesni_simd_skciphers2[i].simd)
  954. simd_skcipher_free(aesni_simd_skciphers2[i].simd);
  955. }
  956. static int __init aesni_init(void)
  957. {
  958. struct simd_skcipher_alg *simd;
  959. const char *basename;
  960. const char *algname;
  961. const char *drvname;
  962. int err;
  963. int i;
  964. if (!x86_match_cpu(aesni_cpu_id))
  965. return -ENODEV;
  966. #ifdef CONFIG_X86_64
  967. #ifdef CONFIG_AS_AVX2
  968. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  969. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  970. aesni_gcm_enc_tfm = aesni_gcm_enc_avx2;
  971. aesni_gcm_dec_tfm = aesni_gcm_dec_avx2;
  972. } else
  973. #endif
  974. #ifdef CONFIG_AS_AVX
  975. if (boot_cpu_has(X86_FEATURE_AVX)) {
  976. pr_info("AVX version of gcm_enc/dec engaged.\n");
  977. aesni_gcm_enc_tfm = aesni_gcm_enc_avx;
  978. aesni_gcm_dec_tfm = aesni_gcm_dec_avx;
  979. } else
  980. #endif
  981. {
  982. pr_info("SSE version of gcm_enc/dec engaged.\n");
  983. aesni_gcm_enc_tfm = aesni_gcm_enc;
  984. aesni_gcm_dec_tfm = aesni_gcm_dec;
  985. }
  986. aesni_ctr_enc_tfm = aesni_ctr_enc;
  987. #ifdef CONFIG_AS_AVX
  988. if (boot_cpu_has(X86_FEATURE_AVX)) {
  989. /* optimize performance of ctr mode encryption transform */
  990. aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
  991. pr_info("AES CTR mode by8 optimization enabled\n");
  992. }
  993. #endif
  994. #endif
  995. err = crypto_fpu_init();
  996. if (err)
  997. return err;
  998. err = crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  999. if (err)
  1000. goto fpu_exit;
  1001. err = crypto_register_skciphers(aesni_skciphers,
  1002. ARRAY_SIZE(aesni_skciphers));
  1003. if (err)
  1004. goto unregister_algs;
  1005. err = crypto_register_aeads(aesni_aead_algs,
  1006. ARRAY_SIZE(aesni_aead_algs));
  1007. if (err)
  1008. goto unregister_skciphers;
  1009. for (i = 0; i < ARRAY_SIZE(aesni_skciphers); i++) {
  1010. algname = aesni_skciphers[i].base.cra_name + 2;
  1011. drvname = aesni_skciphers[i].base.cra_driver_name + 2;
  1012. basename = aesni_skciphers[i].base.cra_driver_name;
  1013. simd = simd_skcipher_create_compat(algname, drvname, basename);
  1014. err = PTR_ERR(simd);
  1015. if (IS_ERR(simd))
  1016. goto unregister_simds;
  1017. aesni_simd_skciphers[i] = simd;
  1018. }
  1019. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++) {
  1020. algname = aesni_simd_skciphers2[i].algname;
  1021. drvname = aesni_simd_skciphers2[i].drvname;
  1022. basename = aesni_simd_skciphers2[i].basename;
  1023. simd = simd_skcipher_create_compat(algname, drvname, basename);
  1024. err = PTR_ERR(simd);
  1025. if (IS_ERR(simd))
  1026. continue;
  1027. aesni_simd_skciphers2[i].simd = simd;
  1028. }
  1029. return 0;
  1030. unregister_simds:
  1031. aesni_free_simds();
  1032. crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));
  1033. unregister_skciphers:
  1034. crypto_unregister_skciphers(aesni_skciphers,
  1035. ARRAY_SIZE(aesni_skciphers));
  1036. unregister_algs:
  1037. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1038. fpu_exit:
  1039. crypto_fpu_exit();
  1040. return err;
  1041. }
  1042. static void __exit aesni_exit(void)
  1043. {
  1044. aesni_free_simds();
  1045. crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));
  1046. crypto_unregister_skciphers(aesni_skciphers,
  1047. ARRAY_SIZE(aesni_skciphers));
  1048. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1049. crypto_fpu_exit();
  1050. }
  1051. late_initcall(aesni_init);
  1052. module_exit(aesni_exit);
  1053. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1054. MODULE_LICENSE("GPL");
  1055. MODULE_ALIAS_CRYPTO("aes");