pci.c 21 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define KMSG_COMPONENT "zpci"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  40. /* list of all detected zpci devices */
  41. static LIST_HEAD(zpci_list);
  42. static DEFINE_SPINLOCK(zpci_list_lock);
  43. static struct irq_chip zpci_irq_chip = {
  44. .name = "zPCI",
  45. .irq_unmask = pci_msi_unmask_irq,
  46. .irq_mask = pci_msi_mask_irq,
  47. };
  48. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  49. static DEFINE_SPINLOCK(zpci_domain_lock);
  50. static struct airq_iv *zpci_aisb_iv;
  51. static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
  52. #define ZPCI_IOMAP_ENTRIES \
  53. min(((unsigned long) ZPCI_NR_DEVICES * PCI_BAR_COUNT / 2), \
  54. ZPCI_IOMAP_MAX_ENTRIES)
  55. static DEFINE_SPINLOCK(zpci_iomap_lock);
  56. static unsigned long *zpci_iomap_bitmap;
  57. struct zpci_iomap_entry *zpci_iomap_start;
  58. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  59. static struct kmem_cache *zdev_fmb_cache;
  60. struct zpci_dev *get_zdev_by_fid(u32 fid)
  61. {
  62. struct zpci_dev *tmp, *zdev = NULL;
  63. spin_lock(&zpci_list_lock);
  64. list_for_each_entry(tmp, &zpci_list, entry) {
  65. if (tmp->fid == fid) {
  66. zdev = tmp;
  67. break;
  68. }
  69. }
  70. spin_unlock(&zpci_list_lock);
  71. return zdev;
  72. }
  73. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  74. {
  75. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  76. }
  77. int pci_domain_nr(struct pci_bus *bus)
  78. {
  79. return ((struct zpci_dev *) bus->sysdata)->domain;
  80. }
  81. EXPORT_SYMBOL_GPL(pci_domain_nr);
  82. int pci_proc_domain(struct pci_bus *bus)
  83. {
  84. return pci_domain_nr(bus);
  85. }
  86. EXPORT_SYMBOL_GPL(pci_proc_domain);
  87. /* Modify PCI: Register adapter interruptions */
  88. static int zpci_set_airq(struct zpci_dev *zdev)
  89. {
  90. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  91. struct zpci_fib fib = {0};
  92. fib.isc = PCI_ISC;
  93. fib.sum = 1; /* enable summary notifications */
  94. fib.noi = airq_iv_end(zdev->aibv);
  95. fib.aibv = (unsigned long) zdev->aibv->vector;
  96. fib.aibvo = 0; /* each zdev has its own interrupt vector */
  97. fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
  98. fib.aisbo = zdev->aisb & 63;
  99. return zpci_mod_fc(req, &fib);
  100. }
  101. struct mod_pci_args {
  102. u64 base;
  103. u64 limit;
  104. u64 iota;
  105. u64 fmb_addr;
  106. };
  107. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  108. {
  109. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  110. struct zpci_fib fib = {0};
  111. fib.pba = args->base;
  112. fib.pal = args->limit;
  113. fib.iota = args->iota;
  114. fib.fmb_addr = args->fmb_addr;
  115. return zpci_mod_fc(req, &fib);
  116. }
  117. /* Modify PCI: Register I/O address translation parameters */
  118. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  119. u64 base, u64 limit, u64 iota)
  120. {
  121. struct mod_pci_args args = { base, limit, iota, 0 };
  122. WARN_ON_ONCE(iota & 0x3fff);
  123. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  124. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  125. }
  126. /* Modify PCI: Unregister I/O address translation parameters */
  127. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  128. {
  129. struct mod_pci_args args = { 0, 0, 0, 0 };
  130. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  131. }
  132. /* Modify PCI: Unregister adapter interruptions */
  133. static int zpci_clear_airq(struct zpci_dev *zdev)
  134. {
  135. struct mod_pci_args args = { 0, 0, 0, 0 };
  136. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  137. }
  138. /* Modify PCI: Set PCI function measurement parameters */
  139. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  140. {
  141. struct mod_pci_args args = { 0, 0, 0, 0 };
  142. if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length)
  143. return -EINVAL;
  144. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  145. if (!zdev->fmb)
  146. return -ENOMEM;
  147. WARN_ON((u64) zdev->fmb & 0xf);
  148. /* reset software counters */
  149. atomic64_set(&zdev->allocated_pages, 0);
  150. atomic64_set(&zdev->mapped_pages, 0);
  151. atomic64_set(&zdev->unmapped_pages, 0);
  152. args.fmb_addr = virt_to_phys(zdev->fmb);
  153. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  154. }
  155. /* Modify PCI: Disable PCI function measurement */
  156. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  157. {
  158. struct mod_pci_args args = { 0, 0, 0, 0 };
  159. int rc;
  160. if (!zdev->fmb)
  161. return -EINVAL;
  162. /* Function measurement is disabled if fmb address is zero */
  163. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  164. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  165. zdev->fmb = NULL;
  166. return rc;
  167. }
  168. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  169. {
  170. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  171. u64 data;
  172. int rc;
  173. rc = zpci_load(&data, req, offset);
  174. if (!rc) {
  175. data = le64_to_cpu((__force __le64) data);
  176. data >>= (8 - len) * 8;
  177. *val = (u32) data;
  178. } else
  179. *val = 0xffffffff;
  180. return rc;
  181. }
  182. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  183. {
  184. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  185. u64 data = val;
  186. int rc;
  187. data <<= (8 - len) * 8;
  188. data = (__force u64) cpu_to_le64(data);
  189. rc = zpci_store(data, req, offset);
  190. return rc;
  191. }
  192. void pcibios_fixup_bus(struct pci_bus *bus)
  193. {
  194. }
  195. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  196. resource_size_t size,
  197. resource_size_t align)
  198. {
  199. return 0;
  200. }
  201. /* combine single writes by using store-block insn */
  202. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  203. {
  204. zpci_memcpy_toio(to, from, count);
  205. }
  206. /* Create a virtual mapping cookie for a PCI BAR */
  207. void __iomem *pci_iomap_range(struct pci_dev *pdev,
  208. int bar,
  209. unsigned long offset,
  210. unsigned long max)
  211. {
  212. struct zpci_dev *zdev = to_zpci(pdev);
  213. int idx;
  214. if (!pci_resource_len(pdev, bar))
  215. return NULL;
  216. idx = zdev->bars[bar].map_idx;
  217. spin_lock(&zpci_iomap_lock);
  218. /* Detect overrun */
  219. WARN_ON(!++zpci_iomap_start[idx].count);
  220. zpci_iomap_start[idx].fh = zdev->fh;
  221. zpci_iomap_start[idx].bar = bar;
  222. spin_unlock(&zpci_iomap_lock);
  223. return (void __iomem *) ZPCI_ADDR(idx) + offset;
  224. }
  225. EXPORT_SYMBOL(pci_iomap_range);
  226. void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
  227. {
  228. return pci_iomap_range(dev, bar, 0, maxlen);
  229. }
  230. EXPORT_SYMBOL(pci_iomap);
  231. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  232. {
  233. unsigned int idx = ZPCI_IDX(addr);
  234. spin_lock(&zpci_iomap_lock);
  235. /* Detect underrun */
  236. WARN_ON(!zpci_iomap_start[idx].count);
  237. if (!--zpci_iomap_start[idx].count) {
  238. zpci_iomap_start[idx].fh = 0;
  239. zpci_iomap_start[idx].bar = 0;
  240. }
  241. spin_unlock(&zpci_iomap_lock);
  242. }
  243. EXPORT_SYMBOL(pci_iounmap);
  244. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  245. int size, u32 *val)
  246. {
  247. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  248. int ret;
  249. if (!zdev || devfn != ZPCI_DEVFN)
  250. ret = -ENODEV;
  251. else
  252. ret = zpci_cfg_load(zdev, where, val, size);
  253. return ret;
  254. }
  255. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  256. int size, u32 val)
  257. {
  258. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  259. int ret;
  260. if (!zdev || devfn != ZPCI_DEVFN)
  261. ret = -ENODEV;
  262. else
  263. ret = zpci_cfg_store(zdev, where, val, size);
  264. return ret;
  265. }
  266. static struct pci_ops pci_root_ops = {
  267. .read = pci_read,
  268. .write = pci_write,
  269. };
  270. static void zpci_irq_handler(struct airq_struct *airq)
  271. {
  272. unsigned long si, ai;
  273. struct airq_iv *aibv;
  274. int irqs_on = 0;
  275. inc_irq_stat(IRQIO_PCI);
  276. for (si = 0;;) {
  277. /* Scan adapter summary indicator bit vector */
  278. si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
  279. if (si == -1UL) {
  280. if (irqs_on++)
  281. /* End of second scan with interrupts on. */
  282. break;
  283. /* First scan complete, reenable interrupts. */
  284. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  285. si = 0;
  286. continue;
  287. }
  288. /* Scan the adapter interrupt vector for this device. */
  289. aibv = zpci_aibv[si];
  290. for (ai = 0;;) {
  291. ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
  292. if (ai == -1UL)
  293. break;
  294. inc_irq_stat(IRQIO_MSI);
  295. airq_iv_lock(aibv, ai);
  296. generic_handle_irq(airq_iv_get_data(aibv, ai));
  297. airq_iv_unlock(aibv, ai);
  298. }
  299. }
  300. }
  301. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  302. {
  303. struct zpci_dev *zdev = to_zpci(pdev);
  304. unsigned int hwirq, msi_vecs;
  305. unsigned long aisb;
  306. struct msi_desc *msi;
  307. struct msi_msg msg;
  308. int rc, irq;
  309. if (type == PCI_CAP_ID_MSI && nvec > 1)
  310. return 1;
  311. msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
  312. /* Allocate adapter summary indicator bit */
  313. rc = -EIO;
  314. aisb = airq_iv_alloc_bit(zpci_aisb_iv);
  315. if (aisb == -1UL)
  316. goto out;
  317. zdev->aisb = aisb;
  318. /* Create adapter interrupt vector */
  319. rc = -ENOMEM;
  320. zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
  321. if (!zdev->aibv)
  322. goto out_si;
  323. /* Wire up shortcut pointer */
  324. zpci_aibv[aisb] = zdev->aibv;
  325. /* Request MSI interrupts */
  326. hwirq = 0;
  327. for_each_pci_msi_entry(msi, pdev) {
  328. rc = -EIO;
  329. irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
  330. if (irq < 0)
  331. goto out_msi;
  332. rc = irq_set_msi_desc(irq, msi);
  333. if (rc)
  334. goto out_msi;
  335. irq_set_chip_and_handler(irq, &zpci_irq_chip,
  336. handle_simple_irq);
  337. msg.data = hwirq;
  338. msg.address_lo = zdev->msi_addr & 0xffffffff;
  339. msg.address_hi = zdev->msi_addr >> 32;
  340. pci_write_msi_msg(irq, &msg);
  341. airq_iv_set_data(zdev->aibv, hwirq, irq);
  342. hwirq++;
  343. }
  344. /* Enable adapter interrupts */
  345. rc = zpci_set_airq(zdev);
  346. if (rc)
  347. goto out_msi;
  348. return (msi_vecs == nvec) ? 0 : msi_vecs;
  349. out_msi:
  350. for_each_pci_msi_entry(msi, pdev) {
  351. if (hwirq-- == 0)
  352. break;
  353. irq_set_msi_desc(msi->irq, NULL);
  354. irq_free_desc(msi->irq);
  355. msi->msg.address_lo = 0;
  356. msi->msg.address_hi = 0;
  357. msi->msg.data = 0;
  358. msi->irq = 0;
  359. }
  360. zpci_aibv[aisb] = NULL;
  361. airq_iv_release(zdev->aibv);
  362. out_si:
  363. airq_iv_free_bit(zpci_aisb_iv, aisb);
  364. out:
  365. return rc;
  366. }
  367. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  368. {
  369. struct zpci_dev *zdev = to_zpci(pdev);
  370. struct msi_desc *msi;
  371. int rc;
  372. /* Disable adapter interrupts */
  373. rc = zpci_clear_airq(zdev);
  374. if (rc)
  375. return;
  376. /* Release MSI interrupts */
  377. for_each_pci_msi_entry(msi, pdev) {
  378. if (msi->msi_attrib.is_msix)
  379. __pci_msix_desc_mask_irq(msi, 1);
  380. else
  381. __pci_msi_desc_mask_irq(msi, 1, 1);
  382. irq_set_msi_desc(msi->irq, NULL);
  383. irq_free_desc(msi->irq);
  384. msi->msg.address_lo = 0;
  385. msi->msg.address_hi = 0;
  386. msi->msg.data = 0;
  387. msi->irq = 0;
  388. }
  389. zpci_aibv[zdev->aisb] = NULL;
  390. airq_iv_release(zdev->aibv);
  391. airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
  392. }
  393. static void zpci_map_resources(struct pci_dev *pdev)
  394. {
  395. resource_size_t len;
  396. int i;
  397. for (i = 0; i < PCI_BAR_COUNT; i++) {
  398. len = pci_resource_len(pdev, i);
  399. if (!len)
  400. continue;
  401. pdev->resource[i].start =
  402. (resource_size_t __force) pci_iomap(pdev, i, 0);
  403. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  404. }
  405. }
  406. static void zpci_unmap_resources(struct pci_dev *pdev)
  407. {
  408. resource_size_t len;
  409. int i;
  410. for (i = 0; i < PCI_BAR_COUNT; i++) {
  411. len = pci_resource_len(pdev, i);
  412. if (!len)
  413. continue;
  414. pci_iounmap(pdev, (void __iomem __force *)
  415. pdev->resource[i].start);
  416. }
  417. }
  418. static struct airq_struct zpci_airq = {
  419. .handler = zpci_irq_handler,
  420. .isc = PCI_ISC,
  421. };
  422. static int __init zpci_irq_init(void)
  423. {
  424. int rc;
  425. rc = register_adapter_interrupt(&zpci_airq);
  426. if (rc)
  427. goto out;
  428. /* Set summary to 1 to be called every time for the ISC. */
  429. *zpci_airq.lsi_ptr = 1;
  430. rc = -ENOMEM;
  431. zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
  432. if (!zpci_aisb_iv)
  433. goto out_airq;
  434. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  435. return 0;
  436. out_airq:
  437. unregister_adapter_interrupt(&zpci_airq);
  438. out:
  439. return rc;
  440. }
  441. static void zpci_irq_exit(void)
  442. {
  443. airq_iv_release(zpci_aisb_iv);
  444. unregister_adapter_interrupt(&zpci_airq);
  445. }
  446. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  447. {
  448. unsigned long entry;
  449. spin_lock(&zpci_iomap_lock);
  450. entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
  451. if (entry == ZPCI_IOMAP_ENTRIES) {
  452. spin_unlock(&zpci_iomap_lock);
  453. return -ENOSPC;
  454. }
  455. set_bit(entry, zpci_iomap_bitmap);
  456. spin_unlock(&zpci_iomap_lock);
  457. return entry;
  458. }
  459. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  460. {
  461. spin_lock(&zpci_iomap_lock);
  462. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  463. clear_bit(entry, zpci_iomap_bitmap);
  464. spin_unlock(&zpci_iomap_lock);
  465. }
  466. static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
  467. unsigned long size, unsigned long flags)
  468. {
  469. struct resource *r;
  470. r = kzalloc(sizeof(*r), GFP_KERNEL);
  471. if (!r)
  472. return NULL;
  473. r->start = start;
  474. r->end = r->start + size - 1;
  475. r->flags = flags;
  476. r->name = zdev->res_name;
  477. if (request_resource(&iomem_resource, r)) {
  478. kfree(r);
  479. return NULL;
  480. }
  481. return r;
  482. }
  483. static int zpci_setup_bus_resources(struct zpci_dev *zdev,
  484. struct list_head *resources)
  485. {
  486. unsigned long addr, size, flags;
  487. struct resource *res;
  488. int i, entry;
  489. snprintf(zdev->res_name, sizeof(zdev->res_name),
  490. "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
  491. for (i = 0; i < PCI_BAR_COUNT; i++) {
  492. if (!zdev->bars[i].size)
  493. continue;
  494. entry = zpci_alloc_iomap(zdev);
  495. if (entry < 0)
  496. return entry;
  497. zdev->bars[i].map_idx = entry;
  498. /* only MMIO is supported */
  499. flags = IORESOURCE_MEM;
  500. if (zdev->bars[i].val & 8)
  501. flags |= IORESOURCE_PREFETCH;
  502. if (zdev->bars[i].val & 4)
  503. flags |= IORESOURCE_MEM_64;
  504. addr = ZPCI_ADDR(entry);
  505. size = 1UL << zdev->bars[i].size;
  506. res = __alloc_res(zdev, addr, size, flags);
  507. if (!res) {
  508. zpci_free_iomap(zdev, entry);
  509. return -ENOMEM;
  510. }
  511. zdev->bars[i].res = res;
  512. pci_add_resource(resources, res);
  513. }
  514. return 0;
  515. }
  516. static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
  517. {
  518. int i;
  519. for (i = 0; i < PCI_BAR_COUNT; i++) {
  520. if (!zdev->bars[i].size || !zdev->bars[i].res)
  521. continue;
  522. zpci_free_iomap(zdev, zdev->bars[i].map_idx);
  523. release_resource(zdev->bars[i].res);
  524. kfree(zdev->bars[i].res);
  525. }
  526. }
  527. int pcibios_add_device(struct pci_dev *pdev)
  528. {
  529. struct resource *res;
  530. int i;
  531. pdev->dev.groups = zpci_attr_groups;
  532. pdev->dev.dma_ops = &s390_pci_dma_ops;
  533. zpci_map_resources(pdev);
  534. for (i = 0; i < PCI_BAR_COUNT; i++) {
  535. res = &pdev->resource[i];
  536. if (res->parent || !res->flags)
  537. continue;
  538. pci_claim_resource(pdev, i);
  539. }
  540. return 0;
  541. }
  542. void pcibios_release_device(struct pci_dev *pdev)
  543. {
  544. zpci_unmap_resources(pdev);
  545. }
  546. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  547. {
  548. struct zpci_dev *zdev = to_zpci(pdev);
  549. zpci_debug_init_device(zdev, dev_name(&pdev->dev));
  550. zpci_fmb_enable_device(zdev);
  551. return pci_enable_resources(pdev, mask);
  552. }
  553. void pcibios_disable_device(struct pci_dev *pdev)
  554. {
  555. struct zpci_dev *zdev = to_zpci(pdev);
  556. zpci_fmb_disable_device(zdev);
  557. zpci_debug_exit_device(zdev);
  558. }
  559. #ifdef CONFIG_HIBERNATE_CALLBACKS
  560. static int zpci_restore(struct device *dev)
  561. {
  562. struct pci_dev *pdev = to_pci_dev(dev);
  563. struct zpci_dev *zdev = to_zpci(pdev);
  564. int ret = 0;
  565. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  566. goto out;
  567. ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  568. if (ret)
  569. goto out;
  570. zpci_map_resources(pdev);
  571. zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
  572. (u64) zdev->dma_table);
  573. out:
  574. return ret;
  575. }
  576. static int zpci_freeze(struct device *dev)
  577. {
  578. struct pci_dev *pdev = to_pci_dev(dev);
  579. struct zpci_dev *zdev = to_zpci(pdev);
  580. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  581. return 0;
  582. zpci_unregister_ioat(zdev, 0);
  583. zpci_unmap_resources(pdev);
  584. return clp_disable_fh(zdev);
  585. }
  586. struct dev_pm_ops pcibios_pm_ops = {
  587. .thaw_noirq = zpci_restore,
  588. .freeze_noirq = zpci_freeze,
  589. .restore_noirq = zpci_restore,
  590. .poweroff_noirq = zpci_freeze,
  591. };
  592. #endif /* CONFIG_HIBERNATE_CALLBACKS */
  593. static int zpci_alloc_domain(struct zpci_dev *zdev)
  594. {
  595. if (zpci_unique_uid) {
  596. zdev->domain = (u16) zdev->uid;
  597. return 0;
  598. }
  599. spin_lock(&zpci_domain_lock);
  600. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  601. if (zdev->domain == ZPCI_NR_DEVICES) {
  602. spin_unlock(&zpci_domain_lock);
  603. return -ENOSPC;
  604. }
  605. set_bit(zdev->domain, zpci_domain);
  606. spin_unlock(&zpci_domain_lock);
  607. return 0;
  608. }
  609. static void zpci_free_domain(struct zpci_dev *zdev)
  610. {
  611. if (zpci_unique_uid)
  612. return;
  613. spin_lock(&zpci_domain_lock);
  614. clear_bit(zdev->domain, zpci_domain);
  615. spin_unlock(&zpci_domain_lock);
  616. }
  617. void pcibios_remove_bus(struct pci_bus *bus)
  618. {
  619. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  620. zpci_exit_slot(zdev);
  621. zpci_cleanup_bus_resources(zdev);
  622. zpci_free_domain(zdev);
  623. spin_lock(&zpci_list_lock);
  624. list_del(&zdev->entry);
  625. spin_unlock(&zpci_list_lock);
  626. kfree(zdev);
  627. }
  628. static int zpci_scan_bus(struct zpci_dev *zdev)
  629. {
  630. LIST_HEAD(resources);
  631. int ret;
  632. ret = zpci_setup_bus_resources(zdev, &resources);
  633. if (ret)
  634. goto error;
  635. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  636. zdev, &resources);
  637. if (!zdev->bus) {
  638. ret = -EIO;
  639. goto error;
  640. }
  641. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  642. pci_bus_add_devices(zdev->bus);
  643. return 0;
  644. error:
  645. zpci_cleanup_bus_resources(zdev);
  646. pci_free_resource_list(&resources);
  647. return ret;
  648. }
  649. int zpci_enable_device(struct zpci_dev *zdev)
  650. {
  651. int rc;
  652. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  653. if (rc)
  654. goto out;
  655. rc = zpci_dma_init_device(zdev);
  656. if (rc)
  657. goto out_dma;
  658. zdev->state = ZPCI_FN_STATE_ONLINE;
  659. return 0;
  660. out_dma:
  661. clp_disable_fh(zdev);
  662. out:
  663. return rc;
  664. }
  665. EXPORT_SYMBOL_GPL(zpci_enable_device);
  666. int zpci_disable_device(struct zpci_dev *zdev)
  667. {
  668. zpci_dma_exit_device(zdev);
  669. return clp_disable_fh(zdev);
  670. }
  671. EXPORT_SYMBOL_GPL(zpci_disable_device);
  672. int zpci_create_device(struct zpci_dev *zdev)
  673. {
  674. int rc;
  675. rc = zpci_alloc_domain(zdev);
  676. if (rc)
  677. goto out;
  678. mutex_init(&zdev->lock);
  679. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  680. rc = zpci_enable_device(zdev);
  681. if (rc)
  682. goto out_free;
  683. }
  684. rc = zpci_scan_bus(zdev);
  685. if (rc)
  686. goto out_disable;
  687. spin_lock(&zpci_list_lock);
  688. list_add_tail(&zdev->entry, &zpci_list);
  689. spin_unlock(&zpci_list_lock);
  690. zpci_init_slot(zdev);
  691. return 0;
  692. out_disable:
  693. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  694. zpci_disable_device(zdev);
  695. out_free:
  696. zpci_free_domain(zdev);
  697. out:
  698. return rc;
  699. }
  700. void zpci_stop_device(struct zpci_dev *zdev)
  701. {
  702. zpci_dma_exit_device(zdev);
  703. /*
  704. * Note: SCLP disables fh via set-pci-fn so don't
  705. * do that here.
  706. */
  707. }
  708. EXPORT_SYMBOL_GPL(zpci_stop_device);
  709. int zpci_report_error(struct pci_dev *pdev,
  710. struct zpci_report_error_header *report)
  711. {
  712. struct zpci_dev *zdev = to_zpci(pdev);
  713. return sclp_pci_report(report, zdev->fh, zdev->fid);
  714. }
  715. EXPORT_SYMBOL(zpci_report_error);
  716. static int zpci_mem_init(void)
  717. {
  718. BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
  719. __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
  720. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  721. __alignof__(struct zpci_fmb), 0, NULL);
  722. if (!zdev_fmb_cache)
  723. goto error_fmb;
  724. zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
  725. sizeof(*zpci_iomap_start), GFP_KERNEL);
  726. if (!zpci_iomap_start)
  727. goto error_iomap;
  728. zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
  729. sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
  730. if (!zpci_iomap_bitmap)
  731. goto error_iomap_bitmap;
  732. return 0;
  733. error_iomap_bitmap:
  734. kfree(zpci_iomap_start);
  735. error_iomap:
  736. kmem_cache_destroy(zdev_fmb_cache);
  737. error_fmb:
  738. return -ENOMEM;
  739. }
  740. static void zpci_mem_exit(void)
  741. {
  742. kfree(zpci_iomap_bitmap);
  743. kfree(zpci_iomap_start);
  744. kmem_cache_destroy(zdev_fmb_cache);
  745. }
  746. static unsigned int s390_pci_probe = 1;
  747. static unsigned int s390_pci_initialized;
  748. char * __init pcibios_setup(char *str)
  749. {
  750. if (!strcmp(str, "off")) {
  751. s390_pci_probe = 0;
  752. return NULL;
  753. }
  754. return str;
  755. }
  756. bool zpci_is_enabled(void)
  757. {
  758. return s390_pci_initialized;
  759. }
  760. static int __init pci_base_init(void)
  761. {
  762. int rc;
  763. if (!s390_pci_probe)
  764. return 0;
  765. if (!test_facility(69) || !test_facility(71) || !test_facility(72))
  766. return 0;
  767. rc = zpci_debug_init();
  768. if (rc)
  769. goto out;
  770. rc = zpci_mem_init();
  771. if (rc)
  772. goto out_mem;
  773. rc = zpci_irq_init();
  774. if (rc)
  775. goto out_irq;
  776. rc = zpci_dma_init();
  777. if (rc)
  778. goto out_dma;
  779. rc = clp_scan_pci_devices();
  780. if (rc)
  781. goto out_find;
  782. s390_pci_initialized = 1;
  783. return 0;
  784. out_find:
  785. zpci_dma_exit();
  786. out_dma:
  787. zpci_irq_exit();
  788. out_irq:
  789. zpci_mem_exit();
  790. out_mem:
  791. zpci_debug_exit();
  792. out:
  793. return rc;
  794. }
  795. subsys_initcall_sync(pci_base_init);
  796. void zpci_rescan(void)
  797. {
  798. if (zpci_is_enabled())
  799. clp_rescan_pci_devices_simple();
  800. }