processor.h 10 KB

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  1. /*
  2. * S390 version
  3. * Copyright IBM Corp. 1999
  4. * Author(s): Hartmut Penner (hp@de.ibm.com),
  5. * Martin Schwidefsky (schwidefsky@de.ibm.com)
  6. *
  7. * Derived from "include/asm-i386/processor.h"
  8. * Copyright (C) 1994, Linus Torvalds
  9. */
  10. #ifndef __ASM_S390_PROCESSOR_H
  11. #define __ASM_S390_PROCESSOR_H
  12. #include <linux/const.h>
  13. #define CIF_MCCK_PENDING 0 /* machine check handling is pending */
  14. #define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */
  15. #define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */
  16. #define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */
  17. #define CIF_FPU 4 /* restore FPU registers */
  18. #define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */
  19. #define CIF_ENABLED_WAIT 6 /* in enabled wait state */
  20. #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
  21. #define _CIF_ASCE_PRIMARY _BITUL(CIF_ASCE_PRIMARY)
  22. #define _CIF_ASCE_SECONDARY _BITUL(CIF_ASCE_SECONDARY)
  23. #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
  24. #define _CIF_FPU _BITUL(CIF_FPU)
  25. #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
  26. #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT)
  27. #ifndef __ASSEMBLY__
  28. #include <linux/linkage.h>
  29. #include <linux/irqflags.h>
  30. #include <asm/cpu.h>
  31. #include <asm/page.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/setup.h>
  34. #include <asm/runtime_instr.h>
  35. #include <asm/fpu/types.h>
  36. #include <asm/fpu/internal.h>
  37. static inline void set_cpu_flag(int flag)
  38. {
  39. S390_lowcore.cpu_flags |= (1UL << flag);
  40. }
  41. static inline void clear_cpu_flag(int flag)
  42. {
  43. S390_lowcore.cpu_flags &= ~(1UL << flag);
  44. }
  45. static inline int test_cpu_flag(int flag)
  46. {
  47. return !!(S390_lowcore.cpu_flags & (1UL << flag));
  48. }
  49. /*
  50. * Test CIF flag of another CPU. The caller needs to ensure that
  51. * CPU hotplug can not happen, e.g. by disabling preemption.
  52. */
  53. static inline int test_cpu_flag_of(int flag, int cpu)
  54. {
  55. struct lowcore *lc = lowcore_ptr[cpu];
  56. return !!(lc->cpu_flags & (1UL << flag));
  57. }
  58. #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
  59. /*
  60. * Default implementation of macro that returns current
  61. * instruction pointer ("program counter").
  62. */
  63. #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
  64. static inline void get_cpu_id(struct cpuid *ptr)
  65. {
  66. asm volatile("stidp %0" : "=Q" (*ptr));
  67. }
  68. void s390_adjust_jiffies(void);
  69. void s390_update_cpu_mhz(void);
  70. void cpu_detect_mhz_feature(void);
  71. extern const struct seq_operations cpuinfo_op;
  72. extern int sysctl_ieee_emulation_warnings;
  73. extern void execve_tail(void);
  74. /*
  75. * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
  76. */
  77. #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \
  78. (1UL << 31) : (1UL << 53))
  79. #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
  80. (1UL << 30) : (1UL << 41))
  81. #define TASK_SIZE TASK_SIZE_OF(current)
  82. #define TASK_SIZE_MAX (1UL << 53)
  83. #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \
  84. (1UL << 31) : (1UL << 42))
  85. #define STACK_TOP_MAX (1UL << 42)
  86. #define HAVE_ARCH_PICK_MMAP_LAYOUT
  87. typedef struct {
  88. __u32 ar4;
  89. } mm_segment_t;
  90. /*
  91. * Thread structure
  92. */
  93. struct thread_struct {
  94. unsigned int acrs[NUM_ACRS];
  95. unsigned long ksp; /* kernel stack pointer */
  96. unsigned long user_timer; /* task cputime in user space */
  97. unsigned long guest_timer; /* task cputime in kvm guest */
  98. unsigned long system_timer; /* task cputime in kernel space */
  99. unsigned long hardirq_timer; /* task cputime in hardirq context */
  100. unsigned long softirq_timer; /* task cputime in softirq context */
  101. unsigned long sys_call_table; /* system call table address */
  102. mm_segment_t mm_segment;
  103. unsigned long gmap_addr; /* address of last gmap fault. */
  104. unsigned int gmap_write_flag; /* gmap fault write indication */
  105. unsigned int gmap_int_code; /* int code of last gmap fault */
  106. unsigned int gmap_pfault; /* signal of a pending guest pfault */
  107. /* Per-thread information related to debugging */
  108. struct per_regs per_user; /* User specified PER registers */
  109. struct per_event per_event; /* Cause of the last PER trap */
  110. unsigned long per_flags; /* Flags to control debug behavior */
  111. unsigned int system_call; /* system call number in signal */
  112. unsigned long last_break; /* last breaking-event-address. */
  113. /* pfault_wait is used to block the process on a pfault event */
  114. unsigned long pfault_wait;
  115. struct list_head list;
  116. /* cpu runtime instrumentation */
  117. struct runtime_instr_cb *ri_cb;
  118. struct gs_cb *gs_cb; /* Current guarded storage cb */
  119. struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */
  120. unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
  121. /*
  122. * Warning: 'fpu' is dynamically-sized. It *MUST* be at
  123. * the end.
  124. */
  125. struct fpu fpu; /* FP and VX register save area */
  126. };
  127. /* Flag to disable transactions. */
  128. #define PER_FLAG_NO_TE 1UL
  129. /* Flag to enable random transaction aborts. */
  130. #define PER_FLAG_TE_ABORT_RAND 2UL
  131. /* Flag to specify random transaction abort mode:
  132. * - abort each transaction at a random instruction before TEND if set.
  133. * - abort random transactions at a random instruction if cleared.
  134. */
  135. #define PER_FLAG_TE_ABORT_RAND_TEND 4UL
  136. typedef struct thread_struct thread_struct;
  137. /*
  138. * Stack layout of a C stack frame.
  139. */
  140. #ifndef __PACK_STACK
  141. struct stack_frame {
  142. unsigned long back_chain;
  143. unsigned long empty1[5];
  144. unsigned long gprs[10];
  145. unsigned int empty2[8];
  146. };
  147. #else
  148. struct stack_frame {
  149. unsigned long empty1[5];
  150. unsigned int empty2[8];
  151. unsigned long gprs[10];
  152. unsigned long back_chain;
  153. };
  154. #endif
  155. #define ARCH_MIN_TASKALIGN 8
  156. #define INIT_THREAD { \
  157. .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
  158. .fpu.regs = (void *) init_task.thread.fpu.fprs, \
  159. }
  160. /*
  161. * Do necessary setup to start up a new thread.
  162. */
  163. #define start_thread(regs, new_psw, new_stackp) do { \
  164. regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
  165. regs->psw.addr = new_psw; \
  166. regs->gprs[15] = new_stackp; \
  167. execve_tail(); \
  168. } while (0)
  169. #define start_thread31(regs, new_psw, new_stackp) do { \
  170. regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
  171. regs->psw.addr = new_psw; \
  172. regs->gprs[15] = new_stackp; \
  173. crst_table_downgrade(current->mm); \
  174. execve_tail(); \
  175. } while (0)
  176. /* Forward declaration, a strange C thing */
  177. struct task_struct;
  178. struct mm_struct;
  179. struct seq_file;
  180. struct pt_regs;
  181. typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable);
  182. void dump_trace(dump_trace_func_t func, void *data,
  183. struct task_struct *task, unsigned long sp);
  184. void show_registers(struct pt_regs *regs);
  185. void show_cacheinfo(struct seq_file *m);
  186. /* Free all resources held by a thread. */
  187. extern void release_thread(struct task_struct *);
  188. /* Free guarded storage control block for current */
  189. void exit_thread_gs(void);
  190. /*
  191. * Return saved PC of a blocked thread.
  192. */
  193. extern unsigned long thread_saved_pc(struct task_struct *t);
  194. unsigned long get_wchan(struct task_struct *p);
  195. #define task_pt_regs(tsk) ((struct pt_regs *) \
  196. (task_stack_page(tsk) + THREAD_SIZE) - 1)
  197. #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
  198. #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
  199. /* Has task runtime instrumentation enabled ? */
  200. #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
  201. static inline unsigned long current_stack_pointer(void)
  202. {
  203. unsigned long sp;
  204. asm volatile("la %0,0(15)" : "=a" (sp));
  205. return sp;
  206. }
  207. static inline unsigned short stap(void)
  208. {
  209. unsigned short cpu_address;
  210. asm volatile("stap %0" : "=m" (cpu_address));
  211. return cpu_address;
  212. }
  213. /*
  214. * Give up the time slice of the virtual PU.
  215. */
  216. #define cpu_relax_yield cpu_relax_yield
  217. void cpu_relax_yield(void);
  218. #define cpu_relax() barrier()
  219. #define ECAG_CACHE_ATTRIBUTE 0
  220. #define ECAG_CPU_ATTRIBUTE 1
  221. static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
  222. {
  223. unsigned long val;
  224. asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
  225. : "=d" (val) : "a" (asi << 8 | parm));
  226. return val;
  227. }
  228. static inline void psw_set_key(unsigned int key)
  229. {
  230. asm volatile("spka 0(%0)" : : "d" (key));
  231. }
  232. /*
  233. * Set PSW to specified value.
  234. */
  235. static inline void __load_psw(psw_t psw)
  236. {
  237. asm volatile("lpswe %0" : : "Q" (psw) : "cc");
  238. }
  239. /*
  240. * Set PSW mask to specified value, while leaving the
  241. * PSW addr pointing to the next instruction.
  242. */
  243. static inline void __load_psw_mask(unsigned long mask)
  244. {
  245. unsigned long addr;
  246. psw_t psw;
  247. psw.mask = mask;
  248. asm volatile(
  249. " larl %0,1f\n"
  250. " stg %0,%O1+8(%R1)\n"
  251. " lpswe %1\n"
  252. "1:"
  253. : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
  254. }
  255. /*
  256. * Extract current PSW mask
  257. */
  258. static inline unsigned long __extract_psw(void)
  259. {
  260. unsigned int reg1, reg2;
  261. asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
  262. return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
  263. }
  264. static inline void local_mcck_enable(void)
  265. {
  266. __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
  267. }
  268. static inline void local_mcck_disable(void)
  269. {
  270. __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
  271. }
  272. /*
  273. * Rewind PSW instruction address by specified number of bytes.
  274. */
  275. static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
  276. {
  277. unsigned long mask;
  278. mask = (psw.mask & PSW_MASK_EA) ? -1UL :
  279. (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
  280. (1UL << 24) - 1;
  281. return (psw.addr - ilc) & mask;
  282. }
  283. /*
  284. * Function to stop a processor until the next interrupt occurs
  285. */
  286. void enabled_wait(void);
  287. /*
  288. * Function to drop a processor into disabled wait state
  289. */
  290. static inline void __noreturn disabled_wait(unsigned long code)
  291. {
  292. psw_t psw;
  293. psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
  294. psw.addr = code;
  295. __load_psw(psw);
  296. while (1);
  297. }
  298. /*
  299. * Basic Machine Check/Program Check Handler.
  300. */
  301. extern void s390_base_mcck_handler(void);
  302. extern void s390_base_pgm_handler(void);
  303. extern void s390_base_ext_handler(void);
  304. extern void (*s390_base_mcck_handler_fn)(void);
  305. extern void (*s390_base_pgm_handler_fn)(void);
  306. extern void (*s390_base_ext_handler_fn)(void);
  307. #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
  308. extern int memcpy_real(void *, void *, size_t);
  309. extern void memcpy_absolute(void *, void *, size_t);
  310. #define mem_assign_absolute(dest, val) do { \
  311. __typeof__(dest) __tmp = (val); \
  312. \
  313. BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
  314. memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
  315. } while (0)
  316. #endif /* __ASSEMBLY__ */
  317. #endif /* __ASM_S390_PROCESSOR_H */