pm-core.h 2.6 KB

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  1. /* linux/arch/arm/mach-s3c2410/include/pm-core.h
  2. *
  3. * Copyright 2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/delay.h>
  14. #include <linux/io.h>
  15. #include "regs-clock.h"
  16. #include "regs-irq.h"
  17. static inline void s3c_pm_debug_init_uart(void)
  18. {
  19. unsigned long tmp = __raw_readl(S3C2410_CLKCON);
  20. /* re-start uart clocks */
  21. tmp |= S3C2410_CLKCON_UART0;
  22. tmp |= S3C2410_CLKCON_UART1;
  23. tmp |= S3C2410_CLKCON_UART2;
  24. __raw_writel(tmp, S3C2410_CLKCON);
  25. udelay(10);
  26. }
  27. static inline void s3c_pm_arch_prepare_irqs(void)
  28. {
  29. __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
  30. __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
  31. /* ack any outstanding external interrupts before we go to sleep */
  32. __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
  33. __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
  34. __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
  35. }
  36. static inline void s3c_pm_arch_stop_clocks(void)
  37. {
  38. __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
  39. }
  40. /* s3c2410_pm_show_resume_irqs
  41. *
  42. * print any IRQs asserted at resume time (ie, we woke from)
  43. */
  44. static inline void s3c_pm_show_resume_irqs(int start, unsigned long which,
  45. unsigned long mask)
  46. {
  47. int i;
  48. which &= ~mask;
  49. for (i = 0; i <= 31; i++) {
  50. if (which & (1L<<i)) {
  51. S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  52. }
  53. }
  54. }
  55. static inline void s3c_pm_arch_show_resume_irqs(void)
  56. {
  57. S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n",
  58. __raw_readl(S3C2410_SRCPND),
  59. __raw_readl(S3C2410_EINTPEND));
  60. s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
  61. s3c_irqwake_intmask);
  62. s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
  63. s3c_irqwake_eintmask);
  64. }
  65. static inline void s3c_pm_arch_update_uart(void __iomem *regs,
  66. struct pm_uart_save *save)
  67. {
  68. }
  69. static inline void s3c_pm_restored_gpios(void) { }
  70. static inline void samsung_pm_saved_gpios(void) { }
  71. /* state for IRQs over sleep */
  72. /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
  73. *
  74. * set bit to 1 in allow bitfield to enable the wakeup settings on it
  75. */
  76. #ifdef CONFIG_PM_SLEEP
  77. #define s3c_irqwake_intallow (1L << 30 | 0xfL)
  78. #define s3c_irqwake_eintallow (0x0000fff0L)
  79. #else
  80. #define s3c_irqwake_eintallow 0
  81. #define s3c_irqwake_intallow 0
  82. #endif