uncompress.h 2.3 KB

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  1. /*
  2. * arch/arm/mach-ep93xx/include/mach/uncompress.h
  3. *
  4. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or (at
  9. * your option) any later version.
  10. */
  11. #include <mach/ep93xx-regs.h>
  12. #include <asm/mach-types.h>
  13. static unsigned char __raw_readb(unsigned int ptr)
  14. {
  15. return *((volatile unsigned char *)ptr);
  16. }
  17. static unsigned int __raw_readl(unsigned int ptr)
  18. {
  19. return *((volatile unsigned int *)ptr);
  20. }
  21. static void __raw_writeb(unsigned char value, unsigned int ptr)
  22. {
  23. *((volatile unsigned char *)ptr) = value;
  24. }
  25. static void __raw_writel(unsigned int value, unsigned int ptr)
  26. {
  27. *((volatile unsigned int *)ptr) = value;
  28. }
  29. #define PHYS_UART_DATA (CONFIG_DEBUG_UART_PHYS + 0x00)
  30. #define PHYS_UART_FLAG (CONFIG_DEBUG_UART_PHYS + 0x18)
  31. #define UART_FLAG_TXFF 0x20
  32. static inline void putc(int c)
  33. {
  34. int i;
  35. for (i = 0; i < 10000; i++) {
  36. /* Transmit fifo not full? */
  37. if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
  38. break;
  39. }
  40. __raw_writeb(c, PHYS_UART_DATA);
  41. }
  42. static inline void flush(void)
  43. {
  44. }
  45. /*
  46. * Some bootloaders don't turn off DMA from the ethernet MAC before
  47. * jumping to linux, which means that we might end up with bits of RX
  48. * status and packet data scribbled over the uncompressed kernel image.
  49. * Work around this by resetting the ethernet MAC before we uncompress.
  50. */
  51. #define PHYS_ETH_SELF_CTL 0x80010020
  52. #define ETH_SELF_CTL_RESET 0x00000001
  53. static void ethernet_reset(void)
  54. {
  55. unsigned int v;
  56. /* Reset the ethernet MAC. */
  57. v = __raw_readl(PHYS_ETH_SELF_CTL);
  58. __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
  59. /* Wait for reset to finish. */
  60. while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
  61. ;
  62. }
  63. #define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000
  64. #define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000
  65. #define TS72XX_WDT_FEED_VAL 0x05
  66. static void __maybe_unused ts72xx_watchdog_disable(void)
  67. {
  68. __raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE);
  69. __raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE);
  70. }
  71. static void arch_decomp_setup(void)
  72. {
  73. if (machine_is_ts72xx())
  74. ts72xx_watchdog_disable();
  75. ethernet_reset();
  76. }