smp.c 17 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched/mm.h>
  15. #include <linux/sched/hotplug.h>
  16. #include <linux/sched/task_stack.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/cache.h>
  19. #include <linux/profile.h>
  20. #include <linux/errno.h>
  21. #include <linux/mm.h>
  22. #include <linux/err.h>
  23. #include <linux/cpu.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/irq.h>
  26. #include <linux/nmi.h>
  27. #include <linux/percpu.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/completion.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/irq_work.h>
  32. #include <linux/atomic.h>
  33. #include <asm/smp.h>
  34. #include <asm/cacheflush.h>
  35. #include <asm/cpu.h>
  36. #include <asm/cputype.h>
  37. #include <asm/exception.h>
  38. #include <asm/idmap.h>
  39. #include <asm/topology.h>
  40. #include <asm/mmu_context.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/pgalloc.h>
  43. #include <asm/processor.h>
  44. #include <asm/sections.h>
  45. #include <asm/tlbflush.h>
  46. #include <asm/ptrace.h>
  47. #include <asm/smp_plat.h>
  48. #include <asm/virt.h>
  49. #include <asm/mach/arch.h>
  50. #include <asm/mpu.h>
  51. #define CREATE_TRACE_POINTS
  52. #include <trace/events/ipi.h>
  53. /*
  54. * as from 2.5, kernels no longer have an init_tasks structure
  55. * so we need some other way of telling a new secondary core
  56. * where to place its SVC stack
  57. */
  58. struct secondary_data secondary_data;
  59. /*
  60. * control for which core is the next to come out of the secondary
  61. * boot "holding pen"
  62. */
  63. volatile int pen_release = -1;
  64. enum ipi_msg_type {
  65. IPI_WAKEUP,
  66. IPI_TIMER,
  67. IPI_RESCHEDULE,
  68. IPI_CALL_FUNC,
  69. IPI_CPU_STOP,
  70. IPI_IRQ_WORK,
  71. IPI_COMPLETION,
  72. IPI_CPU_BACKTRACE,
  73. /*
  74. * SGI8-15 can be reserved by secure firmware, and thus may
  75. * not be usable by the kernel. Please keep the above limited
  76. * to at most 8 entries.
  77. */
  78. };
  79. static DECLARE_COMPLETION(cpu_running);
  80. static struct smp_operations smp_ops __ro_after_init;
  81. void __init smp_set_ops(const struct smp_operations *ops)
  82. {
  83. if (ops)
  84. smp_ops = *ops;
  85. };
  86. static unsigned long get_arch_pgd(pgd_t *pgd)
  87. {
  88. #ifdef CONFIG_ARM_LPAE
  89. return __phys_to_pfn(virt_to_phys(pgd));
  90. #else
  91. return virt_to_phys(pgd);
  92. #endif
  93. }
  94. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  95. {
  96. int ret;
  97. if (!smp_ops.smp_boot_secondary)
  98. return -ENOSYS;
  99. /*
  100. * We need to tell the secondary core where to find
  101. * its stack and the page tables.
  102. */
  103. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  104. #ifdef CONFIG_ARM_MPU
  105. secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
  106. #endif
  107. #ifdef CONFIG_MMU
  108. secondary_data.pgdir = virt_to_phys(idmap_pgd);
  109. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  110. #endif
  111. sync_cache_w(&secondary_data);
  112. /*
  113. * Now bring the CPU into our world.
  114. */
  115. ret = smp_ops.smp_boot_secondary(cpu, idle);
  116. if (ret == 0) {
  117. /*
  118. * CPU was successfully started, wait for it
  119. * to come online or time out.
  120. */
  121. wait_for_completion_timeout(&cpu_running,
  122. msecs_to_jiffies(1000));
  123. if (!cpu_online(cpu)) {
  124. pr_crit("CPU%u: failed to come online\n", cpu);
  125. ret = -EIO;
  126. }
  127. } else {
  128. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  129. }
  130. memset(&secondary_data, 0, sizeof(secondary_data));
  131. return ret;
  132. }
  133. /* platform specific SMP operations */
  134. void __init smp_init_cpus(void)
  135. {
  136. if (smp_ops.smp_init_cpus)
  137. smp_ops.smp_init_cpus();
  138. }
  139. int platform_can_secondary_boot(void)
  140. {
  141. return !!smp_ops.smp_boot_secondary;
  142. }
  143. int platform_can_cpu_hotplug(void)
  144. {
  145. #ifdef CONFIG_HOTPLUG_CPU
  146. if (smp_ops.cpu_kill)
  147. return 1;
  148. #endif
  149. return 0;
  150. }
  151. #ifdef CONFIG_HOTPLUG_CPU
  152. static int platform_cpu_kill(unsigned int cpu)
  153. {
  154. if (smp_ops.cpu_kill)
  155. return smp_ops.cpu_kill(cpu);
  156. return 1;
  157. }
  158. static int platform_cpu_disable(unsigned int cpu)
  159. {
  160. if (smp_ops.cpu_disable)
  161. return smp_ops.cpu_disable(cpu);
  162. return 0;
  163. }
  164. int platform_can_hotplug_cpu(unsigned int cpu)
  165. {
  166. /* cpu_die must be specified to support hotplug */
  167. if (!smp_ops.cpu_die)
  168. return 0;
  169. if (smp_ops.cpu_can_disable)
  170. return smp_ops.cpu_can_disable(cpu);
  171. /*
  172. * By default, allow disabling all CPUs except the first one,
  173. * since this is special on a lot of platforms, e.g. because
  174. * of clock tick interrupts.
  175. */
  176. return cpu != 0;
  177. }
  178. /*
  179. * __cpu_disable runs on the processor to be shutdown.
  180. */
  181. int __cpu_disable(void)
  182. {
  183. unsigned int cpu = smp_processor_id();
  184. int ret;
  185. ret = platform_cpu_disable(cpu);
  186. if (ret)
  187. return ret;
  188. /*
  189. * Take this CPU offline. Once we clear this, we can't return,
  190. * and we must not schedule until we're ready to give up the cpu.
  191. */
  192. set_cpu_online(cpu, false);
  193. /*
  194. * OK - migrate IRQs away from this CPU
  195. */
  196. migrate_irqs();
  197. /*
  198. * Flush user cache and TLB mappings, and then remove this CPU
  199. * from the vm mask set of all processes.
  200. *
  201. * Caches are flushed to the Level of Unification Inner Shareable
  202. * to write-back dirty lines to unified caches shared by all CPUs.
  203. */
  204. flush_cache_louis();
  205. local_flush_tlb_all();
  206. clear_tasks_mm_cpumask(cpu);
  207. return 0;
  208. }
  209. static DECLARE_COMPLETION(cpu_died);
  210. /*
  211. * called on the thread which is asking for a CPU to be shutdown -
  212. * waits until shutdown has completed, or it is timed out.
  213. */
  214. void __cpu_die(unsigned int cpu)
  215. {
  216. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  217. pr_err("CPU%u: cpu didn't die\n", cpu);
  218. return;
  219. }
  220. pr_debug("CPU%u: shutdown\n", cpu);
  221. /*
  222. * platform_cpu_kill() is generally expected to do the powering off
  223. * and/or cutting of clocks to the dying CPU. Optionally, this may
  224. * be done by the CPU which is dying in preference to supporting
  225. * this call, but that means there is _no_ synchronisation between
  226. * the requesting CPU and the dying CPU actually losing power.
  227. */
  228. if (!platform_cpu_kill(cpu))
  229. pr_err("CPU%u: unable to kill\n", cpu);
  230. }
  231. /*
  232. * Called from the idle thread for the CPU which has been shutdown.
  233. *
  234. * Note that we disable IRQs here, but do not re-enable them
  235. * before returning to the caller. This is also the behaviour
  236. * of the other hotplug-cpu capable cores, so presumably coming
  237. * out of idle fixes this.
  238. */
  239. void arch_cpu_idle_dead(void)
  240. {
  241. unsigned int cpu = smp_processor_id();
  242. idle_task_exit();
  243. local_irq_disable();
  244. /*
  245. * Flush the data out of the L1 cache for this CPU. This must be
  246. * before the completion to ensure that data is safely written out
  247. * before platform_cpu_kill() gets called - which may disable
  248. * *this* CPU and power down its cache.
  249. */
  250. flush_cache_louis();
  251. /*
  252. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  253. * this returns, power and/or clocks can be removed at any point
  254. * from this CPU and its cache by platform_cpu_kill().
  255. */
  256. complete(&cpu_died);
  257. /*
  258. * Ensure that the cache lines associated with that completion are
  259. * written out. This covers the case where _this_ CPU is doing the
  260. * powering down, to ensure that the completion is visible to the
  261. * CPU waiting for this one.
  262. */
  263. flush_cache_louis();
  264. /*
  265. * The actual CPU shutdown procedure is at least platform (if not
  266. * CPU) specific. This may remove power, or it may simply spin.
  267. *
  268. * Platforms are generally expected *NOT* to return from this call,
  269. * although there are some which do because they have no way to
  270. * power down the CPU. These platforms are the _only_ reason we
  271. * have a return path which uses the fragment of assembly below.
  272. *
  273. * The return path should not be used for platforms which can
  274. * power off the CPU.
  275. */
  276. if (smp_ops.cpu_die)
  277. smp_ops.cpu_die(cpu);
  278. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  279. cpu);
  280. /*
  281. * Do not return to the idle loop - jump back to the secondary
  282. * cpu initialisation. There's some initialisation which needs
  283. * to be repeated to undo the effects of taking the CPU offline.
  284. */
  285. __asm__("mov sp, %0\n"
  286. " mov fp, #0\n"
  287. " b secondary_start_kernel"
  288. :
  289. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  290. }
  291. #endif /* CONFIG_HOTPLUG_CPU */
  292. /*
  293. * Called by both boot and secondaries to move global data into
  294. * per-processor storage.
  295. */
  296. static void smp_store_cpu_info(unsigned int cpuid)
  297. {
  298. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  299. cpu_info->loops_per_jiffy = loops_per_jiffy;
  300. cpu_info->cpuid = read_cpuid_id();
  301. store_cpu_topology(cpuid);
  302. }
  303. /*
  304. * This is the secondary CPU boot entry. We're using this CPUs
  305. * idle thread stack, but a set of temporary page tables.
  306. */
  307. asmlinkage void secondary_start_kernel(void)
  308. {
  309. struct mm_struct *mm = &init_mm;
  310. unsigned int cpu;
  311. /*
  312. * The identity mapping is uncached (strongly ordered), so
  313. * switch away from it before attempting any exclusive accesses.
  314. */
  315. cpu_switch_mm(mm->pgd, mm);
  316. local_flush_bp_all();
  317. enter_lazy_tlb(mm, current);
  318. local_flush_tlb_all();
  319. /*
  320. * All kernel threads share the same mm context; grab a
  321. * reference and switch to it.
  322. */
  323. cpu = smp_processor_id();
  324. mmgrab(mm);
  325. current->active_mm = mm;
  326. cpumask_set_cpu(cpu, mm_cpumask(mm));
  327. cpu_init();
  328. pr_debug("CPU%u: Booted secondary processor\n", cpu);
  329. preempt_disable();
  330. trace_hardirqs_off();
  331. /*
  332. * Give the platform a chance to do its own initialisation.
  333. */
  334. if (smp_ops.smp_secondary_init)
  335. smp_ops.smp_secondary_init(cpu);
  336. notify_cpu_starting(cpu);
  337. calibrate_delay();
  338. smp_store_cpu_info(cpu);
  339. /*
  340. * OK, now it's safe to let the boot CPU continue. Wait for
  341. * the CPU migration code to notice that the CPU is online
  342. * before we continue - which happens after __cpu_up returns.
  343. */
  344. set_cpu_online(cpu, true);
  345. complete(&cpu_running);
  346. local_irq_enable();
  347. local_fiq_enable();
  348. local_abt_enable();
  349. /*
  350. * OK, it's off to the idle thread for us
  351. */
  352. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  353. }
  354. void __init smp_cpus_done(unsigned int max_cpus)
  355. {
  356. int cpu;
  357. unsigned long bogosum = 0;
  358. for_each_online_cpu(cpu)
  359. bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
  360. printk(KERN_INFO "SMP: Total of %d processors activated "
  361. "(%lu.%02lu BogoMIPS).\n",
  362. num_online_cpus(),
  363. bogosum / (500000/HZ),
  364. (bogosum / (5000/HZ)) % 100);
  365. hyp_mode_check();
  366. }
  367. void __init smp_prepare_boot_cpu(void)
  368. {
  369. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  370. }
  371. void __init smp_prepare_cpus(unsigned int max_cpus)
  372. {
  373. unsigned int ncores = num_possible_cpus();
  374. init_cpu_topology();
  375. smp_store_cpu_info(smp_processor_id());
  376. /*
  377. * are we trying to boot more cores than exist?
  378. */
  379. if (max_cpus > ncores)
  380. max_cpus = ncores;
  381. if (ncores > 1 && max_cpus) {
  382. /*
  383. * Initialise the present map, which describes the set of CPUs
  384. * actually populated at the present time. A platform should
  385. * re-initialize the map in the platforms smp_prepare_cpus()
  386. * if present != possible (e.g. physical hotplug).
  387. */
  388. init_cpu_present(cpu_possible_mask);
  389. /*
  390. * Initialise the SCU if there are more than one CPU
  391. * and let them know where to start.
  392. */
  393. if (smp_ops.smp_prepare_cpus)
  394. smp_ops.smp_prepare_cpus(max_cpus);
  395. }
  396. }
  397. static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  398. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  399. {
  400. if (!__smp_cross_call)
  401. __smp_cross_call = fn;
  402. }
  403. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  404. #define S(x,s) [x] = s
  405. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  406. S(IPI_TIMER, "Timer broadcast interrupts"),
  407. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  408. S(IPI_CALL_FUNC, "Function call interrupts"),
  409. S(IPI_CPU_STOP, "CPU stop interrupts"),
  410. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  411. S(IPI_COMPLETION, "completion interrupts"),
  412. };
  413. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  414. {
  415. trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
  416. __smp_cross_call(target, ipinr);
  417. }
  418. void show_ipi_list(struct seq_file *p, int prec)
  419. {
  420. unsigned int cpu, i;
  421. for (i = 0; i < NR_IPI; i++) {
  422. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  423. for_each_online_cpu(cpu)
  424. seq_printf(p, "%10u ",
  425. __get_irq_stat(cpu, ipi_irqs[i]));
  426. seq_printf(p, " %s\n", ipi_types[i]);
  427. }
  428. }
  429. u64 smp_irq_stat_cpu(unsigned int cpu)
  430. {
  431. u64 sum = 0;
  432. int i;
  433. for (i = 0; i < NR_IPI; i++)
  434. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  435. return sum;
  436. }
  437. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  438. {
  439. smp_cross_call(mask, IPI_CALL_FUNC);
  440. }
  441. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  442. {
  443. smp_cross_call(mask, IPI_WAKEUP);
  444. }
  445. void arch_send_call_function_single_ipi(int cpu)
  446. {
  447. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
  448. }
  449. #ifdef CONFIG_IRQ_WORK
  450. void arch_irq_work_raise(void)
  451. {
  452. if (arch_irq_work_has_interrupt())
  453. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  454. }
  455. #endif
  456. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  457. void tick_broadcast(const struct cpumask *mask)
  458. {
  459. smp_cross_call(mask, IPI_TIMER);
  460. }
  461. #endif
  462. static DEFINE_RAW_SPINLOCK(stop_lock);
  463. /*
  464. * ipi_cpu_stop - handle IPI from smp_send_stop()
  465. */
  466. static void ipi_cpu_stop(unsigned int cpu)
  467. {
  468. if (system_state == SYSTEM_BOOTING ||
  469. system_state == SYSTEM_RUNNING) {
  470. raw_spin_lock(&stop_lock);
  471. pr_crit("CPU%u: stopping\n", cpu);
  472. dump_stack();
  473. raw_spin_unlock(&stop_lock);
  474. }
  475. set_cpu_online(cpu, false);
  476. local_fiq_disable();
  477. local_irq_disable();
  478. while (1)
  479. cpu_relax();
  480. }
  481. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  482. int register_ipi_completion(struct completion *completion, int cpu)
  483. {
  484. per_cpu(cpu_completion, cpu) = completion;
  485. return IPI_COMPLETION;
  486. }
  487. static void ipi_complete(unsigned int cpu)
  488. {
  489. complete(per_cpu(cpu_completion, cpu));
  490. }
  491. /*
  492. * Main handler for inter-processor interrupts
  493. */
  494. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  495. {
  496. handle_IPI(ipinr, regs);
  497. }
  498. void handle_IPI(int ipinr, struct pt_regs *regs)
  499. {
  500. unsigned int cpu = smp_processor_id();
  501. struct pt_regs *old_regs = set_irq_regs(regs);
  502. if ((unsigned)ipinr < NR_IPI) {
  503. trace_ipi_entry_rcuidle(ipi_types[ipinr]);
  504. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  505. }
  506. switch (ipinr) {
  507. case IPI_WAKEUP:
  508. break;
  509. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  510. case IPI_TIMER:
  511. irq_enter();
  512. tick_receive_broadcast();
  513. irq_exit();
  514. break;
  515. #endif
  516. case IPI_RESCHEDULE:
  517. scheduler_ipi();
  518. break;
  519. case IPI_CALL_FUNC:
  520. irq_enter();
  521. generic_smp_call_function_interrupt();
  522. irq_exit();
  523. break;
  524. case IPI_CPU_STOP:
  525. irq_enter();
  526. ipi_cpu_stop(cpu);
  527. irq_exit();
  528. break;
  529. #ifdef CONFIG_IRQ_WORK
  530. case IPI_IRQ_WORK:
  531. irq_enter();
  532. irq_work_run();
  533. irq_exit();
  534. break;
  535. #endif
  536. case IPI_COMPLETION:
  537. irq_enter();
  538. ipi_complete(cpu);
  539. irq_exit();
  540. break;
  541. case IPI_CPU_BACKTRACE:
  542. printk_nmi_enter();
  543. irq_enter();
  544. nmi_cpu_backtrace(regs);
  545. irq_exit();
  546. printk_nmi_exit();
  547. break;
  548. default:
  549. pr_crit("CPU%u: Unknown IPI message 0x%x\n",
  550. cpu, ipinr);
  551. break;
  552. }
  553. if ((unsigned)ipinr < NR_IPI)
  554. trace_ipi_exit_rcuidle(ipi_types[ipinr]);
  555. set_irq_regs(old_regs);
  556. }
  557. void smp_send_reschedule(int cpu)
  558. {
  559. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  560. }
  561. void smp_send_stop(void)
  562. {
  563. unsigned long timeout;
  564. struct cpumask mask;
  565. cpumask_copy(&mask, cpu_online_mask);
  566. cpumask_clear_cpu(smp_processor_id(), &mask);
  567. if (!cpumask_empty(&mask))
  568. smp_cross_call(&mask, IPI_CPU_STOP);
  569. /* Wait up to one second for other CPUs to stop */
  570. timeout = USEC_PER_SEC;
  571. while (num_online_cpus() > 1 && timeout--)
  572. udelay(1);
  573. if (num_online_cpus() > 1)
  574. pr_warn("SMP: failed to stop secondary CPUs\n");
  575. }
  576. /*
  577. * not supported here
  578. */
  579. int setup_profiling_timer(unsigned int multiplier)
  580. {
  581. return -EINVAL;
  582. }
  583. #ifdef CONFIG_CPU_FREQ
  584. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  585. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  586. static unsigned long global_l_p_j_ref;
  587. static unsigned long global_l_p_j_ref_freq;
  588. static int cpufreq_callback(struct notifier_block *nb,
  589. unsigned long val, void *data)
  590. {
  591. struct cpufreq_freqs *freq = data;
  592. int cpu = freq->cpu;
  593. if (freq->flags & CPUFREQ_CONST_LOOPS)
  594. return NOTIFY_OK;
  595. if (!per_cpu(l_p_j_ref, cpu)) {
  596. per_cpu(l_p_j_ref, cpu) =
  597. per_cpu(cpu_data, cpu).loops_per_jiffy;
  598. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  599. if (!global_l_p_j_ref) {
  600. global_l_p_j_ref = loops_per_jiffy;
  601. global_l_p_j_ref_freq = freq->old;
  602. }
  603. }
  604. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  605. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  606. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  607. global_l_p_j_ref_freq,
  608. freq->new);
  609. per_cpu(cpu_data, cpu).loops_per_jiffy =
  610. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  611. per_cpu(l_p_j_ref_freq, cpu),
  612. freq->new);
  613. }
  614. return NOTIFY_OK;
  615. }
  616. static struct notifier_block cpufreq_notifier = {
  617. .notifier_call = cpufreq_callback,
  618. };
  619. static int __init register_cpufreq_notifier(void)
  620. {
  621. return cpufreq_register_notifier(&cpufreq_notifier,
  622. CPUFREQ_TRANSITION_NOTIFIER);
  623. }
  624. core_initcall(register_cpufreq_notifier);
  625. #endif
  626. static void raise_nmi(cpumask_t *mask)
  627. {
  628. smp_cross_call(mask, IPI_CPU_BACKTRACE);
  629. }
  630. void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
  631. {
  632. nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
  633. }