fiji_dpm.c 4.4 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include <linux/firmware.h>
  24. #include "drmP.h"
  25. #include "amdgpu.h"
  26. #include "fiji_smum.h"
  27. MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  28. static void fiji_dpm_set_funcs(struct amdgpu_device *adev);
  29. static int fiji_dpm_early_init(void *handle)
  30. {
  31. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  32. fiji_dpm_set_funcs(adev);
  33. return 0;
  34. }
  35. static int fiji_dpm_init_microcode(struct amdgpu_device *adev)
  36. {
  37. char fw_name[30] = "amdgpu/fiji_smc.bin";
  38. int err;
  39. err = request_firmware(&adev->pm.fw, fw_name, adev->dev);
  40. if (err)
  41. goto out;
  42. err = amdgpu_ucode_validate(adev->pm.fw);
  43. out:
  44. if (err) {
  45. DRM_ERROR("Failed to load firmware \"%s\"", fw_name);
  46. release_firmware(adev->pm.fw);
  47. adev->pm.fw = NULL;
  48. }
  49. return err;
  50. }
  51. static int fiji_dpm_sw_init(void *handle)
  52. {
  53. int ret;
  54. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  55. ret = fiji_dpm_init_microcode(adev);
  56. if (ret)
  57. return ret;
  58. return 0;
  59. }
  60. static int fiji_dpm_sw_fini(void *handle)
  61. {
  62. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  63. release_firmware(adev->pm.fw);
  64. adev->pm.fw = NULL;
  65. return 0;
  66. }
  67. static int fiji_dpm_hw_init(void *handle)
  68. {
  69. int ret;
  70. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  71. mutex_lock(&adev->pm.mutex);
  72. ret = fiji_smu_init(adev);
  73. if (ret) {
  74. DRM_ERROR("SMU initialization failed\n");
  75. goto fail;
  76. }
  77. ret = fiji_smu_start(adev);
  78. if (ret) {
  79. DRM_ERROR("SMU start failed\n");
  80. goto fail;
  81. }
  82. mutex_unlock(&adev->pm.mutex);
  83. return 0;
  84. fail:
  85. adev->firmware.smu_load = false;
  86. mutex_unlock(&adev->pm.mutex);
  87. return -EINVAL;
  88. }
  89. static int fiji_dpm_hw_fini(void *handle)
  90. {
  91. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  92. mutex_lock(&adev->pm.mutex);
  93. fiji_smu_fini(adev);
  94. mutex_unlock(&adev->pm.mutex);
  95. return 0;
  96. }
  97. static int fiji_dpm_suspend(void *handle)
  98. {
  99. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  100. fiji_dpm_hw_fini(adev);
  101. return 0;
  102. }
  103. static int fiji_dpm_resume(void *handle)
  104. {
  105. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  106. fiji_dpm_hw_init(adev);
  107. return 0;
  108. }
  109. static int fiji_dpm_set_clockgating_state(void *handle,
  110. enum amd_clockgating_state state)
  111. {
  112. return 0;
  113. }
  114. static int fiji_dpm_set_powergating_state(void *handle,
  115. enum amd_powergating_state state)
  116. {
  117. return 0;
  118. }
  119. const struct amd_ip_funcs fiji_dpm_ip_funcs = {
  120. .name = "fiji_dpm",
  121. .early_init = fiji_dpm_early_init,
  122. .late_init = NULL,
  123. .sw_init = fiji_dpm_sw_init,
  124. .sw_fini = fiji_dpm_sw_fini,
  125. .hw_init = fiji_dpm_hw_init,
  126. .hw_fini = fiji_dpm_hw_fini,
  127. .suspend = fiji_dpm_suspend,
  128. .resume = fiji_dpm_resume,
  129. .is_idle = NULL,
  130. .wait_for_idle = NULL,
  131. .soft_reset = NULL,
  132. .set_clockgating_state = fiji_dpm_set_clockgating_state,
  133. .set_powergating_state = fiji_dpm_set_powergating_state,
  134. };
  135. static const struct amdgpu_dpm_funcs fiji_dpm_funcs = {
  136. .get_temperature = NULL,
  137. .pre_set_power_state = NULL,
  138. .set_power_state = NULL,
  139. .post_set_power_state = NULL,
  140. .display_configuration_changed = NULL,
  141. .get_sclk = NULL,
  142. .get_mclk = NULL,
  143. .print_power_state = NULL,
  144. .debugfs_print_current_performance_level = NULL,
  145. .force_performance_level = NULL,
  146. .vblank_too_short = NULL,
  147. .powergate_uvd = NULL,
  148. };
  149. static void fiji_dpm_set_funcs(struct amdgpu_device *adev)
  150. {
  151. if (NULL == adev->pm.funcs)
  152. adev->pm.funcs = &fiji_dpm_funcs;
  153. }