amdgpu_sync.c 8.6 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <drm/drmP.h>
  31. #include "amdgpu.h"
  32. #include "amdgpu_trace.h"
  33. struct amdgpu_sync_entry {
  34. struct hlist_node node;
  35. struct dma_fence *fence;
  36. bool explicit;
  37. };
  38. static struct kmem_cache *amdgpu_sync_slab;
  39. /**
  40. * amdgpu_sync_create - zero init sync object
  41. *
  42. * @sync: sync object to initialize
  43. *
  44. * Just clear the sync object for now.
  45. */
  46. void amdgpu_sync_create(struct amdgpu_sync *sync)
  47. {
  48. hash_init(sync->fences);
  49. sync->last_vm_update = NULL;
  50. }
  51. /**
  52. * amdgpu_sync_same_dev - test if fence belong to us
  53. *
  54. * @adev: amdgpu device to use for the test
  55. * @f: fence to test
  56. *
  57. * Test if the fence was issued by us.
  58. */
  59. static bool amdgpu_sync_same_dev(struct amdgpu_device *adev,
  60. struct dma_fence *f)
  61. {
  62. struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
  63. if (s_fence) {
  64. struct amdgpu_ring *ring;
  65. ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
  66. return ring->adev == adev;
  67. }
  68. return false;
  69. }
  70. /**
  71. * amdgpu_sync_get_owner - extract the owner of a fence
  72. *
  73. * @fence: fence get the owner from
  74. *
  75. * Extract who originally created the fence.
  76. */
  77. static void *amdgpu_sync_get_owner(struct dma_fence *f)
  78. {
  79. struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
  80. if (s_fence)
  81. return s_fence->owner;
  82. return AMDGPU_FENCE_OWNER_UNDEFINED;
  83. }
  84. /**
  85. * amdgpu_sync_keep_later - Keep the later fence
  86. *
  87. * @keep: existing fence to test
  88. * @fence: new fence
  89. *
  90. * Either keep the existing fence or the new one, depending which one is later.
  91. */
  92. static void amdgpu_sync_keep_later(struct dma_fence **keep,
  93. struct dma_fence *fence)
  94. {
  95. if (*keep && dma_fence_is_later(*keep, fence))
  96. return;
  97. dma_fence_put(*keep);
  98. *keep = dma_fence_get(fence);
  99. }
  100. /**
  101. * amdgpu_sync_add_later - add the fence to the hash
  102. *
  103. * @sync: sync object to add the fence to
  104. * @f: fence to add
  105. *
  106. * Tries to add the fence to an existing hash entry. Returns true when an entry
  107. * was found, false otherwise.
  108. */
  109. static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f, bool explicit)
  110. {
  111. struct amdgpu_sync_entry *e;
  112. hash_for_each_possible(sync->fences, e, node, f->context) {
  113. if (unlikely(e->fence->context != f->context))
  114. continue;
  115. amdgpu_sync_keep_later(&e->fence, f);
  116. /* Preserve eplicit flag to not loose pipe line sync */
  117. e->explicit |= explicit;
  118. return true;
  119. }
  120. return false;
  121. }
  122. /**
  123. * amdgpu_sync_fence - remember to sync to this fence
  124. *
  125. * @sync: sync object to add fence to
  126. * @fence: fence to sync to
  127. *
  128. */
  129. int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
  130. struct dma_fence *f, bool explicit)
  131. {
  132. struct amdgpu_sync_entry *e;
  133. if (!f)
  134. return 0;
  135. if (amdgpu_sync_same_dev(adev, f) &&
  136. amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
  137. amdgpu_sync_keep_later(&sync->last_vm_update, f);
  138. if (amdgpu_sync_add_later(sync, f, explicit))
  139. return 0;
  140. e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
  141. if (!e)
  142. return -ENOMEM;
  143. e->explicit = explicit;
  144. hash_add(sync->fences, &e->node, f->context);
  145. e->fence = dma_fence_get(f);
  146. return 0;
  147. }
  148. /**
  149. * amdgpu_sync_resv - sync to a reservation object
  150. *
  151. * @sync: sync object to add fences from reservation object to
  152. * @resv: reservation object with embedded fence
  153. * @explicit_sync: true if we should only sync to the exclusive fence
  154. *
  155. * Sync to the fence
  156. */
  157. int amdgpu_sync_resv(struct amdgpu_device *adev,
  158. struct amdgpu_sync *sync,
  159. struct reservation_object *resv,
  160. void *owner, bool explicit_sync)
  161. {
  162. struct reservation_object_list *flist;
  163. struct dma_fence *f;
  164. void *fence_owner;
  165. unsigned i;
  166. int r = 0;
  167. if (resv == NULL)
  168. return -EINVAL;
  169. /* always sync to the exclusive fence */
  170. f = reservation_object_get_excl(resv);
  171. r = amdgpu_sync_fence(adev, sync, f, false);
  172. flist = reservation_object_get_list(resv);
  173. if (!flist || r)
  174. return r;
  175. for (i = 0; i < flist->shared_count; ++i) {
  176. f = rcu_dereference_protected(flist->shared[i],
  177. reservation_object_held(resv));
  178. if (amdgpu_sync_same_dev(adev, f)) {
  179. /* VM updates are only interesting
  180. * for other VM updates and moves.
  181. */
  182. fence_owner = amdgpu_sync_get_owner(f);
  183. if ((owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
  184. (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
  185. ((owner == AMDGPU_FENCE_OWNER_VM) !=
  186. (fence_owner == AMDGPU_FENCE_OWNER_VM)))
  187. continue;
  188. /* Ignore fence from the same owner and explicit one as
  189. * long as it isn't undefined.
  190. */
  191. if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
  192. (fence_owner == owner || explicit_sync))
  193. continue;
  194. }
  195. r = amdgpu_sync_fence(adev, sync, f, false);
  196. if (r)
  197. break;
  198. }
  199. return r;
  200. }
  201. /**
  202. * amdgpu_sync_peek_fence - get the next fence not signaled yet
  203. *
  204. * @sync: the sync object
  205. * @ring: optional ring to use for test
  206. *
  207. * Returns the next fence not signaled yet without removing it from the sync
  208. * object.
  209. */
  210. struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
  211. struct amdgpu_ring *ring)
  212. {
  213. struct amdgpu_sync_entry *e;
  214. struct hlist_node *tmp;
  215. int i;
  216. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  217. struct dma_fence *f = e->fence;
  218. struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
  219. if (dma_fence_is_signaled(f)) {
  220. hash_del(&e->node);
  221. dma_fence_put(f);
  222. kmem_cache_free(amdgpu_sync_slab, e);
  223. continue;
  224. }
  225. if (ring && s_fence) {
  226. /* For fences from the same ring it is sufficient
  227. * when they are scheduled.
  228. */
  229. if (s_fence->sched == &ring->sched) {
  230. if (dma_fence_is_signaled(&s_fence->scheduled))
  231. continue;
  232. return &s_fence->scheduled;
  233. }
  234. }
  235. return f;
  236. }
  237. return NULL;
  238. }
  239. /**
  240. * amdgpu_sync_get_fence - get the next fence from the sync object
  241. *
  242. * @sync: sync object to use
  243. * @explicit: true if the next fence is explicit
  244. *
  245. * Get and removes the next fence from the sync object not signaled yet.
  246. */
  247. struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool *explicit)
  248. {
  249. struct amdgpu_sync_entry *e;
  250. struct hlist_node *tmp;
  251. struct dma_fence *f;
  252. int i;
  253. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  254. f = e->fence;
  255. if (explicit)
  256. *explicit = e->explicit;
  257. hash_del(&e->node);
  258. kmem_cache_free(amdgpu_sync_slab, e);
  259. if (!dma_fence_is_signaled(f))
  260. return f;
  261. dma_fence_put(f);
  262. }
  263. return NULL;
  264. }
  265. int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
  266. {
  267. struct amdgpu_sync_entry *e;
  268. struct hlist_node *tmp;
  269. int i, r;
  270. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  271. r = dma_fence_wait(e->fence, intr);
  272. if (r)
  273. return r;
  274. hash_del(&e->node);
  275. dma_fence_put(e->fence);
  276. kmem_cache_free(amdgpu_sync_slab, e);
  277. }
  278. return 0;
  279. }
  280. /**
  281. * amdgpu_sync_free - free the sync object
  282. *
  283. * @sync: sync object to use
  284. *
  285. * Free the sync object.
  286. */
  287. void amdgpu_sync_free(struct amdgpu_sync *sync)
  288. {
  289. struct amdgpu_sync_entry *e;
  290. struct hlist_node *tmp;
  291. unsigned i;
  292. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  293. hash_del(&e->node);
  294. dma_fence_put(e->fence);
  295. kmem_cache_free(amdgpu_sync_slab, e);
  296. }
  297. dma_fence_put(sync->last_vm_update);
  298. }
  299. /**
  300. * amdgpu_sync_init - init sync object subsystem
  301. *
  302. * Allocate the slab allocator.
  303. */
  304. int amdgpu_sync_init(void)
  305. {
  306. amdgpu_sync_slab = kmem_cache_create(
  307. "amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
  308. SLAB_HWCACHE_ALIGN, NULL);
  309. if (!amdgpu_sync_slab)
  310. return -ENOMEM;
  311. return 0;
  312. }
  313. /**
  314. * amdgpu_sync_fini - fini sync object subsystem
  315. *
  316. * Free the slab allocator.
  317. */
  318. void amdgpu_sync_fini(void)
  319. {
  320. kmem_cache_destroy(amdgpu_sync_slab);
  321. }