f81534.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * F81532/F81534 USB to Serial Ports Bridge
  4. *
  5. * F81532 => 2 Serial Ports
  6. * F81534 => 4 Serial Ports
  7. *
  8. * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
  9. * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
  10. * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
  11. *
  12. * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
  13. * for all serial port TX and 1 endpoint bulk-in for all serial port read in
  14. * (Read Data/MSR/LSR).
  15. *
  16. * Write URB is fixed with 512bytes, per serial port used 128Bytes.
  17. * It can be described by f81534_prepare_write_buffer()
  18. *
  19. * Read URB is 512Bytes max, per serial port used 128Bytes.
  20. * It can be described by f81534_process_read_urb() and maybe received with
  21. * 128x1,2,3,4 bytes.
  22. *
  23. */
  24. #include <linux/slab.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/usb.h>
  28. #include <linux/usb/serial.h>
  29. #include <linux/serial_reg.h>
  30. #include <linux/module.h>
  31. #include <linux/uaccess.h>
  32. /* Serial Port register Address */
  33. #define F81534_UART_BASE_ADDRESS 0x1200
  34. #define F81534_UART_OFFSET 0x10
  35. #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
  36. #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
  37. #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
  38. #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
  39. #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
  40. #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
  41. #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
  42. #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
  43. #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
  44. #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
  45. #define F81534_DEF_CONF_ADDRESS_START 0x3000
  46. #define F81534_DEF_CONF_SIZE 8
  47. #define F81534_CUSTOM_ADDRESS_START 0x2f00
  48. #define F81534_CUSTOM_DATA_SIZE 0x10
  49. #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
  50. #define F81534_CUSTOM_VALID_TOKEN 0xf0
  51. #define F81534_CONF_OFFSET 1
  52. #define F81534_CONF_GPIO_OFFSET 4
  53. #define F81534_MAX_DATA_BLOCK 64
  54. #define F81534_MAX_BUS_RETRY 20
  55. /* Default URB timeout for USB operations */
  56. #define F81534_USB_MAX_RETRY 10
  57. #define F81534_USB_TIMEOUT 2000
  58. #define F81534_SET_GET_REGISTER 0xA0
  59. #define F81534_NUM_PORT 4
  60. #define F81534_UNUSED_PORT 0xff
  61. #define F81534_WRITE_BUFFER_SIZE 512
  62. #define DRIVER_DESC "Fintek F81532/F81534"
  63. #define FINTEK_VENDOR_ID_1 0x1934
  64. #define FINTEK_VENDOR_ID_2 0x2C42
  65. #define FINTEK_DEVICE_ID 0x1202
  66. #define F81534_MAX_TX_SIZE 124
  67. #define F81534_MAX_RX_SIZE 124
  68. #define F81534_RECEIVE_BLOCK_SIZE 128
  69. #define F81534_MAX_RECEIVE_BLOCK_SIZE 512
  70. #define F81534_TOKEN_RECEIVE 0x01
  71. #define F81534_TOKEN_WRITE 0x02
  72. #define F81534_TOKEN_TX_EMPTY 0x03
  73. #define F81534_TOKEN_MSR_CHANGE 0x04
  74. /*
  75. * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
  76. * idle if we performed any command.
  77. *
  78. * SPI Bus status register: F81534_BUS_REG_STATUS
  79. * Bit 0/1 : BUSY
  80. * Bit 2 : IDLE
  81. */
  82. #define F81534_BUS_BUSY (BIT(0) | BIT(1))
  83. #define F81534_BUS_IDLE BIT(2)
  84. #define F81534_BUS_READ_DATA 0x1004
  85. #define F81534_BUS_REG_STATUS 0x1003
  86. #define F81534_BUS_REG_START 0x1002
  87. #define F81534_BUS_REG_END 0x1001
  88. #define F81534_CMD_READ 0x03
  89. #define F81534_DEFAULT_BAUD_RATE 9600
  90. #define F81534_PORT_CONF_RS232 0
  91. #define F81534_PORT_CONF_RS485 BIT(0)
  92. #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
  93. #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
  94. #define F81534_PORT_CONF_DISABLE_PORT BIT(3)
  95. #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
  96. #define F81534_PORT_UNAVAILABLE \
  97. (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
  98. #define F81534_1X_RXTRIGGER 0xc3
  99. #define F81534_8X_RXTRIGGER 0xcf
  100. /*
  101. * F81532/534 Clock registers (offset +08h)
  102. *
  103. * Bit0: UART Enable (always on)
  104. * Bit2-1: Clock source selector
  105. * 00: 1.846MHz.
  106. * 01: 18.46MHz.
  107. * 10: 24MHz.
  108. * 11: 14.77MHz.
  109. * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
  110. * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
  111. */
  112. #define F81534_UART_EN BIT(0)
  113. #define F81534_CLK_1_846_MHZ 0
  114. #define F81534_CLK_18_46_MHZ BIT(1)
  115. #define F81534_CLK_24_MHZ BIT(2)
  116. #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
  117. #define F81534_CLK_MASK GENMASK(2, 1)
  118. #define F81534_CLK_TX_DELAY_1BIT BIT(3)
  119. #define F81534_CLK_RS485_MODE BIT(4)
  120. #define F81534_CLK_RS485_INVERT BIT(5)
  121. static const struct usb_device_id f81534_id_table[] = {
  122. { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
  123. { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
  124. {} /* Terminating entry */
  125. };
  126. #define F81534_TX_EMPTY_BIT 0
  127. struct f81534_serial_private {
  128. u8 conf_data[F81534_DEF_CONF_SIZE];
  129. int tty_idx[F81534_NUM_PORT];
  130. u8 setting_idx;
  131. int opened_port;
  132. struct mutex urb_mutex;
  133. };
  134. struct f81534_port_private {
  135. struct mutex mcr_mutex;
  136. struct mutex lcr_mutex;
  137. struct work_struct lsr_work;
  138. struct usb_serial_port *port;
  139. unsigned long tx_empty;
  140. spinlock_t msr_lock;
  141. u32 baud_base;
  142. u8 shadow_mcr;
  143. u8 shadow_lcr;
  144. u8 shadow_msr;
  145. u8 shadow_clk;
  146. u8 phy_num;
  147. };
  148. struct f81534_pin_data {
  149. const u16 reg_addr;
  150. const u8 reg_mask;
  151. };
  152. struct f81534_port_out_pin {
  153. struct f81534_pin_data pin[3];
  154. };
  155. /* Pin output value for M2/M1/M0(SD) */
  156. static const struct f81534_port_out_pin f81534_port_out_pins[] = {
  157. { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
  158. { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
  159. { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
  160. { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
  161. };
  162. static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
  163. static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
  164. F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
  165. static int f81534_logic_to_phy_port(struct usb_serial *serial,
  166. struct usb_serial_port *port)
  167. {
  168. struct f81534_serial_private *serial_priv =
  169. usb_get_serial_data(port->serial);
  170. int count = 0;
  171. int i;
  172. for (i = 0; i < F81534_NUM_PORT; ++i) {
  173. if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
  174. continue;
  175. if (port->port_number == count)
  176. return i;
  177. ++count;
  178. }
  179. return -ENODEV;
  180. }
  181. static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
  182. {
  183. struct usb_interface *interface = serial->interface;
  184. struct usb_device *dev = serial->dev;
  185. size_t count = F81534_USB_MAX_RETRY;
  186. int status;
  187. u8 *tmp;
  188. tmp = kmalloc(sizeof(u8), GFP_KERNEL);
  189. if (!tmp)
  190. return -ENOMEM;
  191. *tmp = data;
  192. /*
  193. * Our device maybe not reply when heavily loading, We'll retry for
  194. * F81534_USB_MAX_RETRY times.
  195. */
  196. while (count--) {
  197. status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
  198. F81534_SET_GET_REGISTER,
  199. USB_TYPE_VENDOR | USB_DIR_OUT,
  200. reg, 0, tmp, sizeof(u8),
  201. F81534_USB_TIMEOUT);
  202. if (status > 0) {
  203. status = 0;
  204. break;
  205. } else if (status == 0) {
  206. status = -EIO;
  207. }
  208. }
  209. if (status < 0) {
  210. dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
  211. __func__, reg, data, status);
  212. }
  213. kfree(tmp);
  214. return status;
  215. }
  216. static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
  217. {
  218. struct usb_interface *interface = serial->interface;
  219. struct usb_device *dev = serial->dev;
  220. size_t count = F81534_USB_MAX_RETRY;
  221. int status;
  222. u8 *tmp;
  223. tmp = kmalloc(sizeof(u8), GFP_KERNEL);
  224. if (!tmp)
  225. return -ENOMEM;
  226. /*
  227. * Our device maybe not reply when heavily loading, We'll retry for
  228. * F81534_USB_MAX_RETRY times.
  229. */
  230. while (count--) {
  231. status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
  232. F81534_SET_GET_REGISTER,
  233. USB_TYPE_VENDOR | USB_DIR_IN,
  234. reg, 0, tmp, sizeof(u8),
  235. F81534_USB_TIMEOUT);
  236. if (status > 0) {
  237. status = 0;
  238. break;
  239. } else if (status == 0) {
  240. status = -EIO;
  241. }
  242. }
  243. if (status < 0) {
  244. dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
  245. reg, status);
  246. goto end;
  247. }
  248. *data = *tmp;
  249. end:
  250. kfree(tmp);
  251. return status;
  252. }
  253. static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
  254. u8 mask, u8 data)
  255. {
  256. int status;
  257. u8 tmp;
  258. status = f81534_get_register(serial, reg, &tmp);
  259. if (status)
  260. return status;
  261. tmp &= ~mask;
  262. tmp |= (mask & data);
  263. return f81534_set_register(serial, reg, tmp);
  264. }
  265. static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
  266. u16 reg, u8 data)
  267. {
  268. return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
  269. data);
  270. }
  271. static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
  272. u16 reg, u8 *data)
  273. {
  274. return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
  275. data);
  276. }
  277. static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
  278. u8 data)
  279. {
  280. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  281. return f81534_set_register(port->serial,
  282. reg + port_priv->phy_num * F81534_UART_OFFSET, data);
  283. }
  284. static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
  285. u8 *data)
  286. {
  287. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  288. return f81534_get_register(port->serial,
  289. reg + port_priv->phy_num * F81534_UART_OFFSET, data);
  290. }
  291. /*
  292. * If we try to access the internal flash via SPI bus, we should check the bus
  293. * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
  294. */
  295. static int f81534_wait_for_spi_idle(struct usb_serial *serial)
  296. {
  297. size_t count = F81534_MAX_BUS_RETRY;
  298. u8 tmp;
  299. int status;
  300. do {
  301. status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
  302. &tmp);
  303. if (status)
  304. return status;
  305. if (tmp & F81534_BUS_BUSY)
  306. continue;
  307. if (tmp & F81534_BUS_IDLE)
  308. break;
  309. } while (--count);
  310. if (!count) {
  311. dev_err(&serial->interface->dev,
  312. "%s: timed out waiting for idle SPI bus\n",
  313. __func__);
  314. return -EIO;
  315. }
  316. return f81534_set_register(serial, F81534_BUS_REG_STATUS,
  317. tmp & ~F81534_BUS_IDLE);
  318. }
  319. static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
  320. u8 *data)
  321. {
  322. int status;
  323. status = f81534_get_register(serial, reg, data);
  324. if (status)
  325. return status;
  326. return f81534_wait_for_spi_idle(serial);
  327. }
  328. static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
  329. {
  330. int status;
  331. status = f81534_set_register(serial, reg, data);
  332. if (status)
  333. return status;
  334. return f81534_wait_for_spi_idle(serial);
  335. }
  336. static int f81534_read_flash(struct usb_serial *serial, u32 address,
  337. size_t size, u8 *buf)
  338. {
  339. u8 tmp_buf[F81534_MAX_DATA_BLOCK];
  340. size_t block = 0;
  341. size_t read_size;
  342. size_t count;
  343. int status;
  344. int offset;
  345. u16 reg_tmp;
  346. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  347. F81534_CMD_READ);
  348. if (status)
  349. return status;
  350. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  351. (address >> 16) & 0xff);
  352. if (status)
  353. return status;
  354. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  355. (address >> 8) & 0xff);
  356. if (status)
  357. return status;
  358. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  359. (address >> 0) & 0xff);
  360. if (status)
  361. return status;
  362. /* Continuous read mode */
  363. do {
  364. read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
  365. for (count = 0; count < read_size; ++count) {
  366. /* To write F81534_BUS_REG_END when final byte */
  367. if (size <= F81534_MAX_DATA_BLOCK &&
  368. read_size == count + 1)
  369. reg_tmp = F81534_BUS_REG_END;
  370. else
  371. reg_tmp = F81534_BUS_REG_START;
  372. /*
  373. * Dummy code, force IC to generate a read pulse, the
  374. * set of value 0xf1 is dont care (any value is ok)
  375. */
  376. status = f81534_set_spi_register(serial, reg_tmp,
  377. 0xf1);
  378. if (status)
  379. return status;
  380. status = f81534_get_spi_register(serial,
  381. F81534_BUS_READ_DATA,
  382. &tmp_buf[count]);
  383. if (status)
  384. return status;
  385. offset = count + block * F81534_MAX_DATA_BLOCK;
  386. buf[offset] = tmp_buf[count];
  387. }
  388. size -= read_size;
  389. ++block;
  390. } while (size);
  391. return 0;
  392. }
  393. static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
  394. {
  395. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  396. int phy_num = port_priv->phy_num;
  397. u8 tx_len;
  398. int i;
  399. /*
  400. * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
  401. * index 0: port phy idx (e.g., 0,1,2,3)
  402. * index 1: only F81534_TOKEN_WRITE
  403. * index 2: serial TX out length
  404. * index 3: fix to 0
  405. * index 4~127: serial out data block
  406. */
  407. for (i = 0; i < F81534_NUM_PORT; ++i) {
  408. buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
  409. buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
  410. buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
  411. buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
  412. }
  413. tx_len = kfifo_out_locked(&port->write_fifo,
  414. &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
  415. F81534_MAX_TX_SIZE, &port->lock);
  416. buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
  417. }
  418. static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
  419. {
  420. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  421. struct urb *urb;
  422. unsigned long flags;
  423. int result;
  424. /* Check is any data in write_fifo */
  425. spin_lock_irqsave(&port->lock, flags);
  426. if (kfifo_is_empty(&port->write_fifo)) {
  427. spin_unlock_irqrestore(&port->lock, flags);
  428. return 0;
  429. }
  430. spin_unlock_irqrestore(&port->lock, flags);
  431. /* Check H/W is TXEMPTY */
  432. if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
  433. return 0;
  434. urb = port->write_urbs[0];
  435. f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
  436. urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
  437. result = usb_submit_urb(urb, mem_flags);
  438. if (result) {
  439. set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  440. dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
  441. result);
  442. return result;
  443. }
  444. usb_serial_port_softint(port);
  445. return 0;
  446. }
  447. static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
  448. {
  449. if (!baudrate)
  450. return 0;
  451. /* Round to nearest divisor */
  452. return DIV_ROUND_CLOSEST(clockrate, baudrate);
  453. }
  454. static int f81534_find_clk(u32 baudrate)
  455. {
  456. int idx;
  457. for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
  458. if (baudrate <= baudrate_table[idx] &&
  459. baudrate_table[idx] % baudrate == 0)
  460. return idx;
  461. }
  462. return -EINVAL;
  463. }
  464. static int f81534_set_port_config(struct usb_serial_port *port,
  465. struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
  466. {
  467. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  468. u32 divisor;
  469. int status;
  470. int i;
  471. int idx;
  472. u8 value;
  473. u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
  474. for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
  475. idx = f81534_find_clk(baud_list[i]);
  476. if (idx >= 0) {
  477. baudrate = baud_list[i];
  478. tty_encode_baud_rate(tty, baudrate, baudrate);
  479. break;
  480. }
  481. }
  482. if (idx < 0)
  483. return -EINVAL;
  484. port_priv->baud_base = baudrate_table[idx];
  485. port_priv->shadow_clk &= ~F81534_CLK_MASK;
  486. port_priv->shadow_clk |= clock_table[idx];
  487. status = f81534_set_port_register(port, F81534_CLOCK_REG,
  488. port_priv->shadow_clk);
  489. if (status) {
  490. dev_err(&port->dev, "CLOCK_REG setting failed\n");
  491. return status;
  492. }
  493. if (baudrate <= 1200)
  494. value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
  495. else
  496. value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
  497. status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
  498. if (status) {
  499. dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
  500. return status;
  501. }
  502. if (baudrate <= 1200)
  503. value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
  504. else
  505. value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
  506. status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
  507. value);
  508. if (status) {
  509. dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
  510. return status;
  511. }
  512. divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
  513. mutex_lock(&port_priv->lcr_mutex);
  514. value = UART_LCR_DLAB;
  515. status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
  516. value);
  517. if (status) {
  518. dev_err(&port->dev, "%s: set LCR failed\n", __func__);
  519. goto out_unlock;
  520. }
  521. value = divisor & 0xff;
  522. status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
  523. if (status) {
  524. dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
  525. goto out_unlock;
  526. }
  527. value = (divisor >> 8) & 0xff;
  528. status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
  529. if (status) {
  530. dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
  531. goto out_unlock;
  532. }
  533. value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
  534. status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
  535. value);
  536. if (status) {
  537. dev_err(&port->dev, "%s: set LCR failed\n", __func__);
  538. goto out_unlock;
  539. }
  540. port_priv->shadow_lcr = value;
  541. out_unlock:
  542. mutex_unlock(&port_priv->lcr_mutex);
  543. return status;
  544. }
  545. static void f81534_break_ctl(struct tty_struct *tty, int break_state)
  546. {
  547. struct usb_serial_port *port = tty->driver_data;
  548. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  549. int status;
  550. mutex_lock(&port_priv->lcr_mutex);
  551. if (break_state)
  552. port_priv->shadow_lcr |= UART_LCR_SBC;
  553. else
  554. port_priv->shadow_lcr &= ~UART_LCR_SBC;
  555. status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
  556. port_priv->shadow_lcr);
  557. if (status)
  558. dev_err(&port->dev, "set break failed: %d\n", status);
  559. mutex_unlock(&port_priv->lcr_mutex);
  560. }
  561. static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
  562. unsigned int clear)
  563. {
  564. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  565. int status;
  566. u8 tmp;
  567. if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
  568. return 0; /* no change */
  569. mutex_lock(&port_priv->mcr_mutex);
  570. /* 'Set' takes precedence over 'Clear' */
  571. clear &= ~set;
  572. /* Always enable UART_MCR_OUT2 */
  573. tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
  574. if (clear & TIOCM_DTR)
  575. tmp &= ~UART_MCR_DTR;
  576. if (clear & TIOCM_RTS)
  577. tmp &= ~UART_MCR_RTS;
  578. if (set & TIOCM_DTR)
  579. tmp |= UART_MCR_DTR;
  580. if (set & TIOCM_RTS)
  581. tmp |= UART_MCR_RTS;
  582. status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
  583. if (status < 0) {
  584. dev_err(&port->dev, "%s: MCR write failed\n", __func__);
  585. mutex_unlock(&port_priv->mcr_mutex);
  586. return status;
  587. }
  588. port_priv->shadow_mcr = tmp;
  589. mutex_unlock(&port_priv->mcr_mutex);
  590. return 0;
  591. }
  592. /*
  593. * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
  594. * for latest configuration index. If nothing found
  595. * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
  596. * F81534_DEF_CONF_ADDRESS_START section.
  597. *
  598. * Due to we only use block0 to save data, so *index should be 0 or
  599. * F81534_CUSTOM_NO_CUSTOM_DATA.
  600. */
  601. static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
  602. {
  603. u8 tmp;
  604. int status;
  605. status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
  606. &tmp);
  607. if (status) {
  608. dev_err(&serial->interface->dev, "%s: read failed: %d\n",
  609. __func__, status);
  610. return status;
  611. }
  612. /* We'll use the custom data when the data is valid. */
  613. if (tmp == F81534_CUSTOM_VALID_TOKEN)
  614. *index = 0;
  615. else
  616. *index = F81534_CUSTOM_NO_CUSTOM_DATA;
  617. return 0;
  618. }
  619. /*
  620. * The F81532/534 will not report serial port to USB serial subsystem when
  621. * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
  622. *
  623. * To detect RX pin status, we'll enable MCR interal loopback, disable it and
  624. * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
  625. */
  626. static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
  627. {
  628. int status;
  629. u8 old_mcr;
  630. u8 msr;
  631. u8 lsr;
  632. u8 msr_mask;
  633. msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
  634. status = f81534_get_phy_port_register(serial, phy,
  635. F81534_MODEM_STATUS_REG, &msr);
  636. if (status)
  637. return false;
  638. if ((msr & msr_mask) != msr_mask)
  639. return false;
  640. status = f81534_set_phy_port_register(serial, phy,
  641. F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
  642. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  643. if (status)
  644. return false;
  645. status = f81534_get_phy_port_register(serial, phy,
  646. F81534_MODEM_CONTROL_REG, &old_mcr);
  647. if (status)
  648. return false;
  649. status = f81534_set_phy_port_register(serial, phy,
  650. F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
  651. if (status)
  652. return false;
  653. status = f81534_set_phy_port_register(serial, phy,
  654. F81534_MODEM_CONTROL_REG, 0x0);
  655. if (status)
  656. return false;
  657. msleep(60);
  658. status = f81534_get_phy_port_register(serial, phy,
  659. F81534_LINE_STATUS_REG, &lsr);
  660. if (status)
  661. return false;
  662. status = f81534_set_phy_port_register(serial, phy,
  663. F81534_MODEM_CONTROL_REG, old_mcr);
  664. if (status)
  665. return false;
  666. if ((lsr & UART_LSR_BI) == UART_LSR_BI)
  667. return true;
  668. return false;
  669. }
  670. /*
  671. * We had 2 generation of F81532/534 IC. All has an internal storage.
  672. *
  673. * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
  674. * internal data will used. All mode and gpio control should manually set
  675. * by AP or Driver and all storage space value are 0xff. The
  676. * f81534_calc_num_ports() will run to final we marked as "oldest version"
  677. * for this IC.
  678. *
  679. * 2rd is designed to more generic to use any transceiver and this is our
  680. * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
  681. * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
  682. * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
  683. * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
  684. * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
  685. * The f81534_calc_num_ports() will run to "new style" with checking
  686. * F81534_PORT_UNAVAILABLE section.
  687. */
  688. static int f81534_calc_num_ports(struct usb_serial *serial,
  689. struct usb_serial_endpoints *epds)
  690. {
  691. struct f81534_serial_private *serial_priv;
  692. struct device *dev = &serial->interface->dev;
  693. int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
  694. int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
  695. u8 num_port = 0;
  696. int index = 0;
  697. int status;
  698. int i;
  699. if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
  700. size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
  701. dev_err(dev, "unsupported endpoint max packet size\n");
  702. return -ENODEV;
  703. }
  704. serial_priv = devm_kzalloc(&serial->interface->dev,
  705. sizeof(*serial_priv), GFP_KERNEL);
  706. if (!serial_priv)
  707. return -ENOMEM;
  708. usb_set_serial_data(serial, serial_priv);
  709. mutex_init(&serial_priv->urb_mutex);
  710. /* Check had custom setting */
  711. status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
  712. if (status) {
  713. dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
  714. __func__, status);
  715. return status;
  716. }
  717. /*
  718. * We'll read custom data only when data available, otherwise we'll
  719. * read default value instead.
  720. */
  721. if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
  722. status = f81534_read_flash(serial,
  723. F81534_CUSTOM_ADDRESS_START +
  724. F81534_CONF_OFFSET,
  725. sizeof(serial_priv->conf_data),
  726. serial_priv->conf_data);
  727. if (status) {
  728. dev_err(&serial->interface->dev,
  729. "%s: get custom data failed: %d\n",
  730. __func__, status);
  731. return status;
  732. }
  733. dev_dbg(&serial->interface->dev,
  734. "%s: read config from block: %d\n", __func__,
  735. serial_priv->setting_idx);
  736. } else {
  737. /* Read default board setting */
  738. status = f81534_read_flash(serial,
  739. F81534_DEF_CONF_ADDRESS_START,
  740. sizeof(serial_priv->conf_data),
  741. serial_priv->conf_data);
  742. if (status) {
  743. dev_err(&serial->interface->dev,
  744. "%s: read failed: %d\n", __func__,
  745. status);
  746. return status;
  747. }
  748. dev_dbg(&serial->interface->dev, "%s: read default config\n",
  749. __func__);
  750. }
  751. /* New style, find all possible ports */
  752. for (i = 0; i < F81534_NUM_PORT; ++i) {
  753. if (f81534_check_port_hw_disabled(serial, i))
  754. serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
  755. if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
  756. continue;
  757. ++num_port;
  758. }
  759. if (!num_port) {
  760. dev_warn(&serial->interface->dev,
  761. "no config found, assuming 4 ports\n");
  762. num_port = 4; /* Nothing found, oldest version IC */
  763. }
  764. /* Assign phy-to-logic mapping */
  765. for (i = 0; i < F81534_NUM_PORT; ++i) {
  766. if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
  767. continue;
  768. serial_priv->tty_idx[i] = index++;
  769. dev_dbg(&serial->interface->dev,
  770. "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
  771. serial_priv->tty_idx[i]);
  772. }
  773. /*
  774. * Setup bulk-out endpoint multiplexing. All ports share the same
  775. * bulk-out endpoint.
  776. */
  777. BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
  778. for (i = 1; i < num_port; ++i)
  779. epds->bulk_out[i] = epds->bulk_out[0];
  780. epds->num_bulk_out = num_port;
  781. return num_port;
  782. }
  783. static void f81534_set_termios(struct tty_struct *tty,
  784. struct usb_serial_port *port,
  785. struct ktermios *old_termios)
  786. {
  787. u8 new_lcr = 0;
  788. int status;
  789. u32 baud;
  790. u32 old_baud;
  791. if (C_BAUD(tty) == B0)
  792. f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
  793. else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
  794. f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
  795. if (C_PARENB(tty)) {
  796. new_lcr |= UART_LCR_PARITY;
  797. if (!C_PARODD(tty))
  798. new_lcr |= UART_LCR_EPAR;
  799. if (C_CMSPAR(tty))
  800. new_lcr |= UART_LCR_SPAR;
  801. }
  802. if (C_CSTOPB(tty))
  803. new_lcr |= UART_LCR_STOP;
  804. switch (C_CSIZE(tty)) {
  805. case CS5:
  806. new_lcr |= UART_LCR_WLEN5;
  807. break;
  808. case CS6:
  809. new_lcr |= UART_LCR_WLEN6;
  810. break;
  811. case CS7:
  812. new_lcr |= UART_LCR_WLEN7;
  813. break;
  814. default:
  815. case CS8:
  816. new_lcr |= UART_LCR_WLEN8;
  817. break;
  818. }
  819. baud = tty_get_baud_rate(tty);
  820. if (!baud)
  821. return;
  822. if (old_termios)
  823. old_baud = tty_termios_baud_rate(old_termios);
  824. else
  825. old_baud = F81534_DEFAULT_BAUD_RATE;
  826. dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
  827. status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
  828. if (status < 0) {
  829. dev_err(&port->dev, "%s: set port config failed: %d\n",
  830. __func__, status);
  831. }
  832. }
  833. static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
  834. {
  835. return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
  836. }
  837. static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
  838. {
  839. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  840. struct tty_struct *tty;
  841. unsigned long flags;
  842. u8 old_msr;
  843. if (!(msr & UART_MSR_ANY_DELTA))
  844. return;
  845. spin_lock_irqsave(&port_priv->msr_lock, flags);
  846. old_msr = port_priv->shadow_msr;
  847. port_priv->shadow_msr = msr;
  848. spin_unlock_irqrestore(&port_priv->msr_lock, flags);
  849. dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
  850. msr);
  851. /* Update input line counters */
  852. if (msr & UART_MSR_DCTS)
  853. port->icount.cts++;
  854. if (msr & UART_MSR_DDSR)
  855. port->icount.dsr++;
  856. if (msr & UART_MSR_DDCD)
  857. port->icount.dcd++;
  858. if (msr & UART_MSR_TERI)
  859. port->icount.rng++;
  860. wake_up_interruptible(&port->port.delta_msr_wait);
  861. if (!(msr & UART_MSR_DDCD))
  862. return;
  863. dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
  864. __func__, port_priv->phy_num, old_msr, msr);
  865. tty = tty_port_tty_get(&port->port);
  866. if (!tty)
  867. return;
  868. usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
  869. tty_kref_put(tty);
  870. }
  871. static int f81534_read_msr(struct usb_serial_port *port)
  872. {
  873. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  874. unsigned long flags;
  875. int status;
  876. u8 msr;
  877. /* Get MSR initial value */
  878. status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
  879. if (status)
  880. return status;
  881. /* Force update current state */
  882. spin_lock_irqsave(&port_priv->msr_lock, flags);
  883. port_priv->shadow_msr = msr;
  884. spin_unlock_irqrestore(&port_priv->msr_lock, flags);
  885. return 0;
  886. }
  887. static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
  888. {
  889. struct f81534_serial_private *serial_priv =
  890. usb_get_serial_data(port->serial);
  891. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  892. int status;
  893. status = f81534_set_port_register(port,
  894. F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
  895. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  896. if (status) {
  897. dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
  898. status);
  899. return status;
  900. }
  901. if (tty)
  902. f81534_set_termios(tty, port, NULL);
  903. status = f81534_read_msr(port);
  904. if (status)
  905. return status;
  906. mutex_lock(&serial_priv->urb_mutex);
  907. /* Submit Read URBs for first port opened */
  908. if (!serial_priv->opened_port) {
  909. status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
  910. if (status)
  911. goto exit;
  912. }
  913. serial_priv->opened_port++;
  914. exit:
  915. mutex_unlock(&serial_priv->urb_mutex);
  916. set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  917. return status;
  918. }
  919. static void f81534_close(struct usb_serial_port *port)
  920. {
  921. struct f81534_serial_private *serial_priv =
  922. usb_get_serial_data(port->serial);
  923. struct usb_serial_port *port0 = port->serial->port[0];
  924. unsigned long flags;
  925. size_t i;
  926. usb_kill_urb(port->write_urbs[0]);
  927. spin_lock_irqsave(&port->lock, flags);
  928. kfifo_reset_out(&port->write_fifo);
  929. spin_unlock_irqrestore(&port->lock, flags);
  930. /* Kill Read URBs when final port closed */
  931. mutex_lock(&serial_priv->urb_mutex);
  932. serial_priv->opened_port--;
  933. if (!serial_priv->opened_port) {
  934. for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
  935. usb_kill_urb(port0->read_urbs[i]);
  936. }
  937. mutex_unlock(&serial_priv->urb_mutex);
  938. }
  939. static int f81534_get_serial_info(struct tty_struct *tty,
  940. struct serial_struct *ss)
  941. {
  942. struct usb_serial_port *port = tty->driver_data;
  943. struct f81534_port_private *port_priv;
  944. port_priv = usb_get_serial_port_data(port);
  945. ss->type = PORT_16550A;
  946. ss->port = port->port_number;
  947. ss->line = port->minor;
  948. ss->baud_base = port_priv->baud_base;
  949. return 0;
  950. }
  951. static void f81534_process_per_serial_block(struct usb_serial_port *port,
  952. u8 *data)
  953. {
  954. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  955. int phy_num = data[0];
  956. size_t read_size = 0;
  957. size_t i;
  958. char tty_flag;
  959. int status;
  960. u8 lsr;
  961. /*
  962. * The block layout is 128 Bytes
  963. * index 0: port phy idx (e.g., 0,1,2,3),
  964. * index 1: It's could be
  965. * F81534_TOKEN_RECEIVE
  966. * F81534_TOKEN_TX_EMPTY
  967. * F81534_TOKEN_MSR_CHANGE
  968. * index 2: serial in size (data+lsr, must be even)
  969. * meaningful for F81534_TOKEN_RECEIVE only
  970. * index 3: current MSR with this device
  971. * index 4~127: serial in data block (data+lsr, must be even)
  972. */
  973. switch (data[1]) {
  974. case F81534_TOKEN_TX_EMPTY:
  975. set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  976. /* Try to submit writer */
  977. status = f81534_submit_writer(port, GFP_ATOMIC);
  978. if (status)
  979. dev_err(&port->dev, "%s: submit failed\n", __func__);
  980. return;
  981. case F81534_TOKEN_MSR_CHANGE:
  982. f81534_msr_changed(port, data[3]);
  983. return;
  984. case F81534_TOKEN_RECEIVE:
  985. read_size = data[2];
  986. if (read_size > F81534_MAX_RX_SIZE) {
  987. dev_err(&port->dev,
  988. "%s: phy: %d read_size: %zu larger than: %d\n",
  989. __func__, phy_num, read_size,
  990. F81534_MAX_RX_SIZE);
  991. return;
  992. }
  993. break;
  994. default:
  995. dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
  996. data[1]);
  997. return;
  998. }
  999. for (i = 4; i < 4 + read_size; i += 2) {
  1000. tty_flag = TTY_NORMAL;
  1001. lsr = data[i + 1];
  1002. if (lsr & UART_LSR_BRK_ERROR_BITS) {
  1003. if (lsr & UART_LSR_BI) {
  1004. tty_flag = TTY_BREAK;
  1005. port->icount.brk++;
  1006. usb_serial_handle_break(port);
  1007. } else if (lsr & UART_LSR_PE) {
  1008. tty_flag = TTY_PARITY;
  1009. port->icount.parity++;
  1010. } else if (lsr & UART_LSR_FE) {
  1011. tty_flag = TTY_FRAME;
  1012. port->icount.frame++;
  1013. }
  1014. if (lsr & UART_LSR_OE) {
  1015. port->icount.overrun++;
  1016. tty_insert_flip_char(&port->port, 0,
  1017. TTY_OVERRUN);
  1018. }
  1019. schedule_work(&port_priv->lsr_work);
  1020. }
  1021. if (port->port.console && port->sysrq) {
  1022. if (usb_serial_handle_sysrq_char(port, data[i]))
  1023. continue;
  1024. }
  1025. tty_insert_flip_char(&port->port, data[i], tty_flag);
  1026. }
  1027. tty_flip_buffer_push(&port->port);
  1028. }
  1029. static void f81534_process_read_urb(struct urb *urb)
  1030. {
  1031. struct f81534_serial_private *serial_priv;
  1032. struct usb_serial_port *port;
  1033. struct usb_serial *serial;
  1034. u8 *buf;
  1035. int phy_port_num;
  1036. int tty_port_num;
  1037. size_t i;
  1038. if (!urb->actual_length ||
  1039. urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
  1040. return;
  1041. }
  1042. port = urb->context;
  1043. serial = port->serial;
  1044. buf = urb->transfer_buffer;
  1045. serial_priv = usb_get_serial_data(serial);
  1046. for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
  1047. phy_port_num = buf[i];
  1048. if (phy_port_num >= F81534_NUM_PORT) {
  1049. dev_err(&port->dev,
  1050. "%s: phy_port_num: %d larger than: %d\n",
  1051. __func__, phy_port_num, F81534_NUM_PORT);
  1052. continue;
  1053. }
  1054. tty_port_num = serial_priv->tty_idx[phy_port_num];
  1055. port = serial->port[tty_port_num];
  1056. if (tty_port_initialized(&port->port))
  1057. f81534_process_per_serial_block(port, &buf[i]);
  1058. }
  1059. }
  1060. static void f81534_write_usb_callback(struct urb *urb)
  1061. {
  1062. struct usb_serial_port *port = urb->context;
  1063. switch (urb->status) {
  1064. case 0:
  1065. break;
  1066. case -ENOENT:
  1067. case -ECONNRESET:
  1068. case -ESHUTDOWN:
  1069. dev_dbg(&port->dev, "%s - urb stopped: %d\n",
  1070. __func__, urb->status);
  1071. return;
  1072. case -EPIPE:
  1073. dev_err(&port->dev, "%s - urb stopped: %d\n",
  1074. __func__, urb->status);
  1075. return;
  1076. default:
  1077. dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
  1078. __func__, urb->status);
  1079. break;
  1080. }
  1081. }
  1082. static void f81534_lsr_worker(struct work_struct *work)
  1083. {
  1084. struct f81534_port_private *port_priv;
  1085. struct usb_serial_port *port;
  1086. int status;
  1087. u8 tmp;
  1088. port_priv = container_of(work, struct f81534_port_private, lsr_work);
  1089. port = port_priv->port;
  1090. status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
  1091. if (status)
  1092. dev_warn(&port->dev, "read LSR failed: %d\n", status);
  1093. }
  1094. static int f81534_set_port_output_pin(struct usb_serial_port *port)
  1095. {
  1096. struct f81534_serial_private *serial_priv;
  1097. struct f81534_port_private *port_priv;
  1098. struct usb_serial *serial;
  1099. const struct f81534_port_out_pin *pins;
  1100. int status;
  1101. int i;
  1102. u8 value;
  1103. u8 idx;
  1104. serial = port->serial;
  1105. serial_priv = usb_get_serial_data(serial);
  1106. port_priv = usb_get_serial_port_data(port);
  1107. idx = F81534_CONF_GPIO_OFFSET + port_priv->phy_num;
  1108. value = serial_priv->conf_data[idx];
  1109. pins = &f81534_port_out_pins[port_priv->phy_num];
  1110. for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
  1111. status = f81534_set_mask_register(serial,
  1112. pins->pin[i].reg_addr, pins->pin[i].reg_mask,
  1113. value & BIT(i) ? pins->pin[i].reg_mask : 0);
  1114. if (status)
  1115. return status;
  1116. }
  1117. dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
  1118. return 0;
  1119. }
  1120. static int f81534_port_probe(struct usb_serial_port *port)
  1121. {
  1122. struct f81534_serial_private *serial_priv;
  1123. struct f81534_port_private *port_priv;
  1124. int ret;
  1125. u8 value;
  1126. serial_priv = usb_get_serial_data(port->serial);
  1127. port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
  1128. if (!port_priv)
  1129. return -ENOMEM;
  1130. /*
  1131. * We'll make tx frame error when baud rate from 384~500kps. So we'll
  1132. * delay all tx data frame with 1bit.
  1133. */
  1134. port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
  1135. spin_lock_init(&port_priv->msr_lock);
  1136. mutex_init(&port_priv->mcr_mutex);
  1137. mutex_init(&port_priv->lcr_mutex);
  1138. INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
  1139. /* Assign logic-to-phy mapping */
  1140. ret = f81534_logic_to_phy_port(port->serial, port);
  1141. if (ret < 0)
  1142. return ret;
  1143. port_priv->phy_num = ret;
  1144. port_priv->port = port;
  1145. usb_set_serial_port_data(port, port_priv);
  1146. dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
  1147. port->port_number, port_priv->phy_num);
  1148. /*
  1149. * The F81532/534 will hang-up when enable LSR interrupt in IER and
  1150. * occur data overrun. So we'll disable the LSR interrupt in probe()
  1151. * and submit the LSR worker to clear LSR state when reported LSR error
  1152. * bit with bulk-in data in f81534_process_per_serial_block().
  1153. */
  1154. ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
  1155. UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
  1156. if (ret)
  1157. return ret;
  1158. value = serial_priv->conf_data[port_priv->phy_num];
  1159. switch (value & F81534_PORT_CONF_MODE_MASK) {
  1160. case F81534_PORT_CONF_RS485_INVERT:
  1161. port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
  1162. F81534_CLK_RS485_INVERT;
  1163. dev_dbg(&port->dev, "RS485 invert mode\n");
  1164. break;
  1165. case F81534_PORT_CONF_RS485:
  1166. port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
  1167. dev_dbg(&port->dev, "RS485 mode\n");
  1168. break;
  1169. default:
  1170. case F81534_PORT_CONF_RS232:
  1171. dev_dbg(&port->dev, "RS232 mode\n");
  1172. break;
  1173. }
  1174. return f81534_set_port_output_pin(port);
  1175. }
  1176. static int f81534_port_remove(struct usb_serial_port *port)
  1177. {
  1178. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  1179. flush_work(&port_priv->lsr_work);
  1180. return 0;
  1181. }
  1182. static int f81534_tiocmget(struct tty_struct *tty)
  1183. {
  1184. struct usb_serial_port *port = tty->driver_data;
  1185. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  1186. int status;
  1187. int r;
  1188. u8 msr;
  1189. u8 mcr;
  1190. /* Read current MSR from device */
  1191. status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
  1192. if (status)
  1193. return status;
  1194. mutex_lock(&port_priv->mcr_mutex);
  1195. mcr = port_priv->shadow_mcr;
  1196. mutex_unlock(&port_priv->mcr_mutex);
  1197. r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
  1198. (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
  1199. (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
  1200. (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
  1201. (msr & UART_MSR_RI ? TIOCM_RI : 0) |
  1202. (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
  1203. return r;
  1204. }
  1205. static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
  1206. unsigned int clear)
  1207. {
  1208. struct usb_serial_port *port = tty->driver_data;
  1209. return f81534_update_mctrl(port, set, clear);
  1210. }
  1211. static void f81534_dtr_rts(struct usb_serial_port *port, int on)
  1212. {
  1213. if (on)
  1214. f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
  1215. else
  1216. f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
  1217. }
  1218. static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
  1219. const u8 *buf, int count)
  1220. {
  1221. int bytes_out, status;
  1222. if (!count)
  1223. return 0;
  1224. bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
  1225. &port->lock);
  1226. status = f81534_submit_writer(port, GFP_ATOMIC);
  1227. if (status) {
  1228. dev_err(&port->dev, "%s: submit failed\n", __func__);
  1229. return status;
  1230. }
  1231. return bytes_out;
  1232. }
  1233. static bool f81534_tx_empty(struct usb_serial_port *port)
  1234. {
  1235. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  1236. return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  1237. }
  1238. static int f81534_resume(struct usb_serial *serial)
  1239. {
  1240. struct f81534_serial_private *serial_priv =
  1241. usb_get_serial_data(serial);
  1242. struct usb_serial_port *port;
  1243. int error = 0;
  1244. int status;
  1245. size_t i;
  1246. /*
  1247. * We'll register port 0 bulkin when port had opened, It'll take all
  1248. * port received data, MSR register change and TX_EMPTY information.
  1249. */
  1250. mutex_lock(&serial_priv->urb_mutex);
  1251. if (serial_priv->opened_port) {
  1252. status = f81534_submit_read_urb(serial, GFP_NOIO);
  1253. if (status) {
  1254. mutex_unlock(&serial_priv->urb_mutex);
  1255. return status;
  1256. }
  1257. }
  1258. mutex_unlock(&serial_priv->urb_mutex);
  1259. for (i = 0; i < serial->num_ports; i++) {
  1260. port = serial->port[i];
  1261. if (!tty_port_initialized(&port->port))
  1262. continue;
  1263. status = f81534_submit_writer(port, GFP_NOIO);
  1264. if (status) {
  1265. dev_err(&port->dev, "%s: submit failed\n", __func__);
  1266. ++error;
  1267. }
  1268. }
  1269. if (error)
  1270. return -EIO;
  1271. return 0;
  1272. }
  1273. static struct usb_serial_driver f81534_device = {
  1274. .driver = {
  1275. .owner = THIS_MODULE,
  1276. .name = "f81534",
  1277. },
  1278. .description = DRIVER_DESC,
  1279. .id_table = f81534_id_table,
  1280. .num_bulk_in = 1,
  1281. .num_bulk_out = 1,
  1282. .open = f81534_open,
  1283. .close = f81534_close,
  1284. .write = f81534_write,
  1285. .tx_empty = f81534_tx_empty,
  1286. .calc_num_ports = f81534_calc_num_ports,
  1287. .port_probe = f81534_port_probe,
  1288. .port_remove = f81534_port_remove,
  1289. .break_ctl = f81534_break_ctl,
  1290. .dtr_rts = f81534_dtr_rts,
  1291. .process_read_urb = f81534_process_read_urb,
  1292. .get_serial = f81534_get_serial_info,
  1293. .tiocmget = f81534_tiocmget,
  1294. .tiocmset = f81534_tiocmset,
  1295. .write_bulk_callback = f81534_write_usb_callback,
  1296. .set_termios = f81534_set_termios,
  1297. .resume = f81534_resume,
  1298. };
  1299. static struct usb_serial_driver *const serial_drivers[] = {
  1300. &f81534_device, NULL
  1301. };
  1302. module_usb_serial_driver(serial_drivers, f81534_id_table);
  1303. MODULE_DEVICE_TABLE(usb, f81534_id_table);
  1304. MODULE_DESCRIPTION(DRIVER_DESC);
  1305. MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
  1306. MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
  1307. MODULE_LICENSE("GPL");