fpga-mgr.h 5.4 KB

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  1. /*
  2. * FPGA Framework
  3. *
  4. * Copyright (C) 2013-2015 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/mutex.h>
  19. #include <linux/platform_device.h>
  20. #ifndef _LINUX_FPGA_MGR_H
  21. #define _LINUX_FPGA_MGR_H
  22. struct fpga_manager;
  23. struct sg_table;
  24. /**
  25. * enum fpga_mgr_states - fpga framework states
  26. * @FPGA_MGR_STATE_UNKNOWN: can't determine state
  27. * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
  28. * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
  29. * @FPGA_MGR_STATE_RESET: FPGA in reset state
  30. * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress
  31. * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed
  32. * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
  33. * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage
  34. * @FPGA_MGR_STATE_WRITE: writing image to FPGA
  35. * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
  36. * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps
  37. * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE
  38. * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
  39. */
  40. enum fpga_mgr_states {
  41. /* default FPGA states */
  42. FPGA_MGR_STATE_UNKNOWN,
  43. FPGA_MGR_STATE_POWER_OFF,
  44. FPGA_MGR_STATE_POWER_UP,
  45. FPGA_MGR_STATE_RESET,
  46. /* getting an image for loading */
  47. FPGA_MGR_STATE_FIRMWARE_REQ,
  48. FPGA_MGR_STATE_FIRMWARE_REQ_ERR,
  49. /* write sequence: init, write, complete */
  50. FPGA_MGR_STATE_WRITE_INIT,
  51. FPGA_MGR_STATE_WRITE_INIT_ERR,
  52. FPGA_MGR_STATE_WRITE,
  53. FPGA_MGR_STATE_WRITE_ERR,
  54. FPGA_MGR_STATE_WRITE_COMPLETE,
  55. FPGA_MGR_STATE_WRITE_COMPLETE_ERR,
  56. /* fpga is programmed and operating */
  57. FPGA_MGR_STATE_OPERATING,
  58. };
  59. /*
  60. * FPGA Manager flags
  61. * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
  62. * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
  63. */
  64. #define FPGA_MGR_PARTIAL_RECONFIG BIT(0)
  65. #define FPGA_MGR_EXTERNAL_CONFIG BIT(1)
  66. #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2)
  67. /**
  68. * struct fpga_image_info - information specific to a FPGA image
  69. * @flags: boolean flags as defined above
  70. * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
  71. * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
  72. * @config_complete_timeout_us: maximum time for FPGA to switch to operating
  73. * status in the write_complete op.
  74. */
  75. struct fpga_image_info {
  76. u32 flags;
  77. u32 enable_timeout_us;
  78. u32 disable_timeout_us;
  79. u32 config_complete_timeout_us;
  80. };
  81. /**
  82. * struct fpga_manager_ops - ops for low level fpga manager drivers
  83. * @initial_header_size: Maximum number of bytes that should be passed into write_init
  84. * @state: returns an enum value of the FPGA's state
  85. * @write_init: prepare the FPGA to receive confuration data
  86. * @write: write count bytes of configuration data to the FPGA
  87. * @write_sg: write the scatter list of configuration data to the FPGA
  88. * @write_complete: set FPGA to operating state after writing is done
  89. * @fpga_remove: optional: Set FPGA into a specific state during driver remove
  90. *
  91. * fpga_manager_ops are the low level functions implemented by a specific
  92. * fpga manager driver. The optional ones are tested for NULL before being
  93. * called, so leaving them out is fine.
  94. */
  95. struct fpga_manager_ops {
  96. size_t initial_header_size;
  97. enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
  98. int (*write_init)(struct fpga_manager *mgr,
  99. struct fpga_image_info *info,
  100. const char *buf, size_t count);
  101. int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
  102. int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt);
  103. int (*write_complete)(struct fpga_manager *mgr,
  104. struct fpga_image_info *info);
  105. void (*fpga_remove)(struct fpga_manager *mgr);
  106. };
  107. /**
  108. * struct fpga_manager - fpga manager structure
  109. * @name: name of low level fpga manager
  110. * @dev: fpga manager device
  111. * @ref_mutex: only allows one reference to fpga manager
  112. * @state: state of fpga manager
  113. * @mops: pointer to struct of fpga manager ops
  114. * @priv: low level driver private date
  115. */
  116. struct fpga_manager {
  117. const char *name;
  118. struct device dev;
  119. struct mutex ref_mutex;
  120. enum fpga_mgr_states state;
  121. const struct fpga_manager_ops *mops;
  122. void *priv;
  123. };
  124. #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
  125. int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
  126. const char *buf, size_t count);
  127. int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
  128. struct sg_table *sgt);
  129. int fpga_mgr_firmware_load(struct fpga_manager *mgr,
  130. struct fpga_image_info *info,
  131. const char *image_name);
  132. struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
  133. struct fpga_manager *fpga_mgr_get(struct device *dev);
  134. void fpga_mgr_put(struct fpga_manager *mgr);
  135. int fpga_mgr_register(struct device *dev, const char *name,
  136. const struct fpga_manager_ops *mops, void *priv);
  137. void fpga_mgr_unregister(struct device *dev);
  138. #endif /*_LINUX_FPGA_MGR_H */