ca8210.c 84 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244
  1. /*
  2. * http://www.cascoda.com/products/ca-821x/
  3. * Copyright (c) 2016, Cascoda, Ltd.
  4. * All rights reserved.
  5. *
  6. * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is
  7. * the license notice for both respectively.
  8. *
  9. *******************************************************************************
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. *******************************************************************************
  22. *
  23. * Redistribution and use in source and binary forms, with or without
  24. * modification, are permitted provided that the following conditions are met:
  25. *
  26. * 1. Redistributions of source code must retain the above copyright notice,
  27. * this list of conditions and the following disclaimer.
  28. *
  29. * 2. Redistributions in binary form must reproduce the above copyright notice,
  30. * this list of conditions and the following disclaimer in the documentation
  31. * and/or other materials provided with the distribution.
  32. *
  33. * 3. Neither the name of the copyright holder nor the names of its contributors
  34. * may be used to endorse or promote products derived from this software without
  35. * specific prior written permission.
  36. *
  37. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  38. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  39. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  40. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
  41. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  42. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  43. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  44. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  45. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  46. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  47. * POSSIBILITY OF SUCH DAMAGE.
  48. */
  49. #include <linux/cdev.h>
  50. #include <linux/clk-provider.h>
  51. #include <linux/debugfs.h>
  52. #include <linux/delay.h>
  53. #include <linux/gpio.h>
  54. #include <linux/ieee802154.h>
  55. #include <linux/kfifo.h>
  56. #include <linux/of.h>
  57. #include <linux/of_device.h>
  58. #include <linux/of_gpio.h>
  59. #include <linux/module.h>
  60. #include <linux/mutex.h>
  61. #include <linux/poll.h>
  62. #include <linux/skbuff.h>
  63. #include <linux/slab.h>
  64. #include <linux/spi/spi.h>
  65. #include <linux/spinlock.h>
  66. #include <linux/string.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/interrupt.h>
  69. #include <net/ieee802154_netdev.h>
  70. #include <net/mac802154.h>
  71. #define DRIVER_NAME "ca8210"
  72. /* external clock frequencies */
  73. #define ONE_MHZ 1000000
  74. #define TWO_MHZ (2 * ONE_MHZ)
  75. #define FOUR_MHZ (4 * ONE_MHZ)
  76. #define EIGHT_MHZ (8 * ONE_MHZ)
  77. #define SIXTEEN_MHZ (16 * ONE_MHZ)
  78. /* spi constants */
  79. #define CA8210_SPI_BUF_SIZE 256
  80. #define CA8210_SYNC_TIMEOUT 1000 /* Timeout for synchronous commands [ms] */
  81. /* test interface constants */
  82. #define CA8210_TEST_INT_FILE_NAME "ca8210_test"
  83. #define CA8210_TEST_INT_FIFO_SIZE 256
  84. /* MAC status enumerations */
  85. #define MAC_SUCCESS (0x00)
  86. #define MAC_ERROR (0x01)
  87. #define MAC_CANCELLED (0x02)
  88. #define MAC_READY_FOR_POLL (0x03)
  89. #define MAC_COUNTER_ERROR (0xDB)
  90. #define MAC_IMPROPER_KEY_TYPE (0xDC)
  91. #define MAC_IMPROPER_SECURITY_LEVEL (0xDD)
  92. #define MAC_UNSUPPORTED_LEGACY (0xDE)
  93. #define MAC_UNSUPPORTED_SECURITY (0xDF)
  94. #define MAC_BEACON_LOST (0xE0)
  95. #define MAC_CHANNEL_ACCESS_FAILURE (0xE1)
  96. #define MAC_DENIED (0xE2)
  97. #define MAC_DISABLE_TRX_FAILURE (0xE3)
  98. #define MAC_SECURITY_ERROR (0xE4)
  99. #define MAC_FRAME_TOO_LONG (0xE5)
  100. #define MAC_INVALID_GTS (0xE6)
  101. #define MAC_INVALID_HANDLE (0xE7)
  102. #define MAC_INVALID_PARAMETER (0xE8)
  103. #define MAC_NO_ACK (0xE9)
  104. #define MAC_NO_BEACON (0xEA)
  105. #define MAC_NO_DATA (0xEB)
  106. #define MAC_NO_SHORT_ADDRESS (0xEC)
  107. #define MAC_OUT_OF_CAP (0xED)
  108. #define MAC_PAN_ID_CONFLICT (0xEE)
  109. #define MAC_REALIGNMENT (0xEF)
  110. #define MAC_TRANSACTION_EXPIRED (0xF0)
  111. #define MAC_TRANSACTION_OVERFLOW (0xF1)
  112. #define MAC_TX_ACTIVE (0xF2)
  113. #define MAC_UNAVAILABLE_KEY (0xF3)
  114. #define MAC_UNSUPPORTED_ATTRIBUTE (0xF4)
  115. #define MAC_INVALID_ADDRESS (0xF5)
  116. #define MAC_ON_TIME_TOO_LONG (0xF6)
  117. #define MAC_PAST_TIME (0xF7)
  118. #define MAC_TRACKING_OFF (0xF8)
  119. #define MAC_INVALID_INDEX (0xF9)
  120. #define MAC_LIMIT_REACHED (0xFA)
  121. #define MAC_READ_ONLY (0xFB)
  122. #define MAC_SCAN_IN_PROGRESS (0xFC)
  123. #define MAC_SUPERFRAME_OVERLAP (0xFD)
  124. #define MAC_SYSTEM_ERROR (0xFF)
  125. /* HWME attribute IDs */
  126. #define HWME_EDTHRESHOLD (0x04)
  127. #define HWME_EDVALUE (0x06)
  128. #define HWME_SYSCLKOUT (0x0F)
  129. #define HWME_LQILIMIT (0x11)
  130. /* TDME attribute IDs */
  131. #define TDME_CHANNEL (0x00)
  132. #define TDME_ATM_CONFIG (0x06)
  133. #define MAX_HWME_ATTRIBUTE_SIZE 16
  134. #define MAX_TDME_ATTRIBUTE_SIZE 2
  135. /* PHY/MAC PIB Attribute Enumerations */
  136. #define PHY_CURRENT_CHANNEL (0x00)
  137. #define PHY_TRANSMIT_POWER (0x02)
  138. #define PHY_CCA_MODE (0x03)
  139. #define MAC_ASSOCIATION_PERMIT (0x41)
  140. #define MAC_AUTO_REQUEST (0x42)
  141. #define MAC_BATT_LIFE_EXT (0x43)
  142. #define MAC_BATT_LIFE_EXT_PERIODS (0x44)
  143. #define MAC_BEACON_PAYLOAD (0x45)
  144. #define MAC_BEACON_PAYLOAD_LENGTH (0x46)
  145. #define MAC_BEACON_ORDER (0x47)
  146. #define MAC_GTS_PERMIT (0x4d)
  147. #define MAC_MAX_CSMA_BACKOFFS (0x4e)
  148. #define MAC_MIN_BE (0x4f)
  149. #define MAC_PAN_ID (0x50)
  150. #define MAC_PROMISCUOUS_MODE (0x51)
  151. #define MAC_RX_ON_WHEN_IDLE (0x52)
  152. #define MAC_SHORT_ADDRESS (0x53)
  153. #define MAC_SUPERFRAME_ORDER (0x54)
  154. #define MAC_ASSOCIATED_PAN_COORD (0x56)
  155. #define MAC_MAX_BE (0x57)
  156. #define MAC_MAX_FRAME_RETRIES (0x59)
  157. #define MAC_RESPONSE_WAIT_TIME (0x5A)
  158. #define MAC_SECURITY_ENABLED (0x5D)
  159. #define MAC_AUTO_REQUEST_SECURITY_LEVEL (0x78)
  160. #define MAC_AUTO_REQUEST_KEY_ID_MODE (0x79)
  161. #define NS_IEEE_ADDRESS (0xFF) /* Non-standard IEEE address */
  162. /* MAC Address Mode Definitions */
  163. #define MAC_MODE_NO_ADDR (0x00)
  164. #define MAC_MODE_SHORT_ADDR (0x02)
  165. #define MAC_MODE_LONG_ADDR (0x03)
  166. /* MAC constants */
  167. #define MAX_BEACON_OVERHEAD (75)
  168. #define MAX_BEACON_PAYLOAD_LENGTH (IEEE802154_MTU - MAX_BEACON_OVERHEAD)
  169. #define MAX_ATTRIBUTE_SIZE (122)
  170. #define MAX_DATA_SIZE (114)
  171. #define CA8210_VALID_CHANNELS (0x07FFF800)
  172. /* MAC workarounds for V1.1 and MPW silicon (V0.x) */
  173. #define CA8210_MAC_WORKAROUNDS (0)
  174. #define CA8210_MAC_MPW (0)
  175. /* memory manipulation macros */
  176. #define LS_BYTE(x) ((u8)((x) & 0xFF))
  177. #define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF))
  178. /* message ID codes in SPI commands */
  179. /* downstream */
  180. #define MCPS_DATA_REQUEST (0x00)
  181. #define MLME_ASSOCIATE_REQUEST (0x02)
  182. #define MLME_ASSOCIATE_RESPONSE (0x03)
  183. #define MLME_DISASSOCIATE_REQUEST (0x04)
  184. #define MLME_GET_REQUEST (0x05)
  185. #define MLME_ORPHAN_RESPONSE (0x06)
  186. #define MLME_RESET_REQUEST (0x07)
  187. #define MLME_RX_ENABLE_REQUEST (0x08)
  188. #define MLME_SCAN_REQUEST (0x09)
  189. #define MLME_SET_REQUEST (0x0A)
  190. #define MLME_START_REQUEST (0x0B)
  191. #define MLME_POLL_REQUEST (0x0D)
  192. #define HWME_SET_REQUEST (0x0E)
  193. #define HWME_GET_REQUEST (0x0F)
  194. #define TDME_SETSFR_REQUEST (0x11)
  195. #define TDME_GETSFR_REQUEST (0x12)
  196. #define TDME_SET_REQUEST (0x14)
  197. /* upstream */
  198. #define MCPS_DATA_INDICATION (0x00)
  199. #define MCPS_DATA_CONFIRM (0x01)
  200. #define MLME_RESET_CONFIRM (0x0A)
  201. #define MLME_SET_CONFIRM (0x0E)
  202. #define MLME_START_CONFIRM (0x0F)
  203. #define HWME_SET_CONFIRM (0x12)
  204. #define HWME_GET_CONFIRM (0x13)
  205. #define HWME_WAKEUP_INDICATION (0x15)
  206. #define TDME_SETSFR_CONFIRM (0x17)
  207. /* SPI command IDs */
  208. /* bit indicating a confirm or indication from slave to master */
  209. #define SPI_S2M (0x20)
  210. /* bit indicating a synchronous message */
  211. #define SPI_SYN (0x40)
  212. /* SPI command definitions */
  213. #define SPI_IDLE (0xFF)
  214. #define SPI_NACK (0xF0)
  215. #define SPI_MCPS_DATA_REQUEST (MCPS_DATA_REQUEST)
  216. #define SPI_MCPS_DATA_INDICATION (MCPS_DATA_INDICATION + SPI_S2M)
  217. #define SPI_MCPS_DATA_CONFIRM (MCPS_DATA_CONFIRM + SPI_S2M)
  218. #define SPI_MLME_ASSOCIATE_REQUEST (MLME_ASSOCIATE_REQUEST)
  219. #define SPI_MLME_RESET_REQUEST (MLME_RESET_REQUEST + SPI_SYN)
  220. #define SPI_MLME_SET_REQUEST (MLME_SET_REQUEST + SPI_SYN)
  221. #define SPI_MLME_START_REQUEST (MLME_START_REQUEST + SPI_SYN)
  222. #define SPI_MLME_RESET_CONFIRM (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN)
  223. #define SPI_MLME_SET_CONFIRM (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  224. #define SPI_MLME_START_CONFIRM (MLME_START_CONFIRM + SPI_S2M + SPI_SYN)
  225. #define SPI_HWME_SET_REQUEST (HWME_SET_REQUEST + SPI_SYN)
  226. #define SPI_HWME_GET_REQUEST (HWME_GET_REQUEST + SPI_SYN)
  227. #define SPI_HWME_SET_CONFIRM (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  228. #define SPI_HWME_GET_CONFIRM (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN)
  229. #define SPI_HWME_WAKEUP_INDICATION (HWME_WAKEUP_INDICATION + SPI_S2M)
  230. #define SPI_TDME_SETSFR_REQUEST (TDME_SETSFR_REQUEST + SPI_SYN)
  231. #define SPI_TDME_SET_REQUEST (TDME_SET_REQUEST + SPI_SYN)
  232. #define SPI_TDME_SETSFR_CONFIRM (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN)
  233. /* TDME SFR addresses */
  234. /* Page 0 */
  235. #define CA8210_SFR_PACFG (0xB1)
  236. #define CA8210_SFR_MACCON (0xD8)
  237. #define CA8210_SFR_PACFGIB (0xFE)
  238. /* Page 1 */
  239. #define CA8210_SFR_LOTXCAL (0xBF)
  240. #define CA8210_SFR_PTHRH (0xD1)
  241. #define CA8210_SFR_PRECFG (0xD3)
  242. #define CA8210_SFR_LNAGX40 (0xE1)
  243. #define CA8210_SFR_LNAGX41 (0xE2)
  244. #define CA8210_SFR_LNAGX42 (0xE3)
  245. #define CA8210_SFR_LNAGX43 (0xE4)
  246. #define CA8210_SFR_LNAGX44 (0xE5)
  247. #define CA8210_SFR_LNAGX45 (0xE6)
  248. #define CA8210_SFR_LNAGX46 (0xE7)
  249. #define CA8210_SFR_LNAGX47 (0xE9)
  250. #define PACFGIB_DEFAULT_CURRENT (0x3F)
  251. #define PTHRH_DEFAULT_THRESHOLD (0x5A)
  252. #define LNAGX40_DEFAULT_GAIN (0x29) /* 10dB */
  253. #define LNAGX41_DEFAULT_GAIN (0x54) /* 21dB */
  254. #define LNAGX42_DEFAULT_GAIN (0x6C) /* 27dB */
  255. #define LNAGX43_DEFAULT_GAIN (0x7A) /* 30dB */
  256. #define LNAGX44_DEFAULT_GAIN (0x84) /* 33dB */
  257. #define LNAGX45_DEFAULT_GAIN (0x8B) /* 34dB */
  258. #define LNAGX46_DEFAULT_GAIN (0x92) /* 36dB */
  259. #define LNAGX47_DEFAULT_GAIN (0x96) /* 37dB */
  260. #define CA8210_IOCTL_HARD_RESET (0x00)
  261. /* Structs/Enums */
  262. /**
  263. * struct cas_control - spi transfer structure
  264. * @msg: spi_message for each exchange
  265. * @transfer: spi_transfer for each exchange
  266. * @tx_buf: source array for transmission
  267. * @tx_in_buf: array storing bytes received during transmission
  268. * @priv: pointer to private data
  269. *
  270. * This structure stores all the necessary data passed around during a single
  271. * spi exchange.
  272. */
  273. struct cas_control {
  274. struct spi_message msg;
  275. struct spi_transfer transfer;
  276. u8 tx_buf[CA8210_SPI_BUF_SIZE];
  277. u8 tx_in_buf[CA8210_SPI_BUF_SIZE];
  278. struct ca8210_priv *priv;
  279. };
  280. /**
  281. * struct ca8210_test - ca8210 test interface structure
  282. * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device
  283. * @up_fifo: fifo for upstream messages
  284. *
  285. * This structure stores all the data pertaining to the debug interface
  286. */
  287. struct ca8210_test {
  288. struct dentry *ca8210_dfs_spi_int;
  289. struct kfifo up_fifo;
  290. wait_queue_head_t readq;
  291. };
  292. /**
  293. * struct ca8210_priv - ca8210 private data structure
  294. * @spi: pointer to the ca8210 spi device object
  295. * @hw: pointer to the ca8210 ieee802154_hw object
  296. * @hw_registered: true if hw has been registered with ieee802154
  297. * @lock: spinlock protecting the private data area
  298. * @mlme_workqueue: workqueue for triggering MLME Reset
  299. * @irq_workqueue: workqueue for irq processing
  300. * @tx_skb: current socket buffer to transmit
  301. * @nextmsduhandle: msdu handle to pass to the 15.4 MAC layer for the
  302. * next transmission
  303. * @clk: external clock provided by the ca8210
  304. * @last_dsn: sequence number of last data packet received, for
  305. * resend detection
  306. * @test: test interface data section for this instance
  307. * @async_tx_pending: true if an asynchronous transmission was started and
  308. * is not complete
  309. * @sync_command_response: pointer to buffer to fill with sync response
  310. * @ca8210_is_awake: nonzero if ca8210 is initialised, ready for comms
  311. * @sync_down: counts number of downstream synchronous commands
  312. * @sync_up: counts number of upstream synchronous commands
  313. * @spi_transfer_complete completion object for a single spi_transfer
  314. * @sync_exchange_complete completion object for a complete synchronous API
  315. * exchange
  316. * @promiscuous whether the ca8210 is in promiscuous mode or not
  317. * @retries: records how many times the current pending spi
  318. * transfer has been retried
  319. */
  320. struct ca8210_priv {
  321. struct spi_device *spi;
  322. struct ieee802154_hw *hw;
  323. bool hw_registered;
  324. spinlock_t lock;
  325. struct workqueue_struct *mlme_workqueue;
  326. struct workqueue_struct *irq_workqueue;
  327. struct sk_buff *tx_skb;
  328. u8 nextmsduhandle;
  329. struct clk *clk;
  330. int last_dsn;
  331. struct ca8210_test test;
  332. bool async_tx_pending;
  333. u8 *sync_command_response;
  334. struct completion ca8210_is_awake;
  335. int sync_down, sync_up;
  336. struct completion spi_transfer_complete, sync_exchange_complete;
  337. bool promiscuous;
  338. int retries;
  339. };
  340. /**
  341. * struct work_priv_container - link between a work object and the relevant
  342. * device's private data
  343. * @work: work object being executed
  344. * @priv: device's private data section
  345. *
  346. */
  347. struct work_priv_container {
  348. struct work_struct work;
  349. struct ca8210_priv *priv;
  350. };
  351. /**
  352. * struct ca8210_platform_data - ca8210 platform data structure
  353. * @extclockenable: true if the external clock is to be enabled
  354. * @extclockfreq: frequency of the external clock
  355. * @extclockgpio: ca8210 output gpio of the external clock
  356. * @gpio_reset: gpio number of ca8210 reset line
  357. * @gpio_irq: gpio number of ca8210 interrupt line
  358. * @irq_id: identifier for the ca8210 irq
  359. *
  360. */
  361. struct ca8210_platform_data {
  362. bool extclockenable;
  363. unsigned int extclockfreq;
  364. unsigned int extclockgpio;
  365. int gpio_reset;
  366. int gpio_irq;
  367. int irq_id;
  368. };
  369. /**
  370. * struct fulladdr - full MAC addressing information structure
  371. * @mode: address mode (none, short, extended)
  372. * @pan_id: 16-bit LE pan id
  373. * @address: LE address, variable length as specified by mode
  374. *
  375. */
  376. struct fulladdr {
  377. u8 mode;
  378. u8 pan_id[2];
  379. u8 address[8];
  380. };
  381. /**
  382. * union macaddr: generic MAC address container
  383. * @short_addr: 16-bit short address
  384. * @ieee_address: 64-bit extended address as LE byte array
  385. *
  386. */
  387. union macaddr {
  388. u16 short_address;
  389. u8 ieee_address[8];
  390. };
  391. /**
  392. * struct secspec: security specification for SAP commands
  393. * @security_level: 0-7, controls level of authentication & encryption
  394. * @key_id_mode: 0-3, specifies how to obtain key
  395. * @key_source: extended key retrieval data
  396. * @key_index: single-byte key identifier
  397. *
  398. */
  399. struct secspec {
  400. u8 security_level;
  401. u8 key_id_mode;
  402. u8 key_source[8];
  403. u8 key_index;
  404. };
  405. /* downlink functions parameter set definitions */
  406. struct mcps_data_request_pset {
  407. u8 src_addr_mode;
  408. struct fulladdr dst;
  409. u8 msdu_length;
  410. u8 msdu_handle;
  411. u8 tx_options;
  412. u8 msdu[MAX_DATA_SIZE];
  413. };
  414. struct mlme_set_request_pset {
  415. u8 pib_attribute;
  416. u8 pib_attribute_index;
  417. u8 pib_attribute_length;
  418. u8 pib_attribute_value[MAX_ATTRIBUTE_SIZE];
  419. };
  420. struct hwme_set_request_pset {
  421. u8 hw_attribute;
  422. u8 hw_attribute_length;
  423. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  424. };
  425. struct hwme_get_request_pset {
  426. u8 hw_attribute;
  427. };
  428. struct tdme_setsfr_request_pset {
  429. u8 sfr_page;
  430. u8 sfr_address;
  431. u8 sfr_value;
  432. };
  433. /* uplink functions parameter set definitions */
  434. struct hwme_set_confirm_pset {
  435. u8 status;
  436. u8 hw_attribute;
  437. };
  438. struct hwme_get_confirm_pset {
  439. u8 status;
  440. u8 hw_attribute;
  441. u8 hw_attribute_length;
  442. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  443. };
  444. struct tdme_setsfr_confirm_pset {
  445. u8 status;
  446. u8 sfr_page;
  447. u8 sfr_address;
  448. };
  449. struct mac_message {
  450. u8 command_id;
  451. u8 length;
  452. union {
  453. struct mcps_data_request_pset data_req;
  454. struct mlme_set_request_pset set_req;
  455. struct hwme_set_request_pset hwme_set_req;
  456. struct hwme_get_request_pset hwme_get_req;
  457. struct tdme_setsfr_request_pset tdme_set_sfr_req;
  458. struct hwme_set_confirm_pset hwme_set_cnf;
  459. struct hwme_get_confirm_pset hwme_get_cnf;
  460. struct tdme_setsfr_confirm_pset tdme_set_sfr_cnf;
  461. u8 u8param;
  462. u8 status;
  463. u8 payload[148];
  464. } pdata;
  465. };
  466. union pa_cfg_sfr {
  467. struct {
  468. u8 bias_current_trim : 3;
  469. u8 /* reserved */ : 1;
  470. u8 buffer_capacitor_trim : 3;
  471. u8 boost : 1;
  472. };
  473. u8 paib;
  474. };
  475. struct preamble_cfg_sfr {
  476. u8 timeout_symbols : 3;
  477. u8 acquisition_symbols : 3;
  478. u8 search_symbols : 2;
  479. };
  480. static int (*cascoda_api_upstream)(
  481. const u8 *buf,
  482. size_t len,
  483. void *device_ref
  484. );
  485. /**
  486. * link_to_linux_err() - Translates an 802.15.4 return code into the closest
  487. * linux error
  488. * @link_status: 802.15.4 status code
  489. *
  490. * Return: 0 or Linux error code
  491. */
  492. static int link_to_linux_err(int link_status)
  493. {
  494. if (link_status < 0) {
  495. /* status is already a Linux code */
  496. return link_status;
  497. }
  498. switch (link_status) {
  499. case MAC_SUCCESS:
  500. case MAC_REALIGNMENT:
  501. return 0;
  502. case MAC_IMPROPER_KEY_TYPE:
  503. return -EKEYREJECTED;
  504. case MAC_IMPROPER_SECURITY_LEVEL:
  505. case MAC_UNSUPPORTED_LEGACY:
  506. case MAC_DENIED:
  507. return -EACCES;
  508. case MAC_BEACON_LOST:
  509. case MAC_NO_ACK:
  510. case MAC_NO_BEACON:
  511. return -ENETUNREACH;
  512. case MAC_CHANNEL_ACCESS_FAILURE:
  513. case MAC_TX_ACTIVE:
  514. case MAC_SCAN_IN_PROGRESS:
  515. return -EBUSY;
  516. case MAC_DISABLE_TRX_FAILURE:
  517. case MAC_OUT_OF_CAP:
  518. return -EAGAIN;
  519. case MAC_FRAME_TOO_LONG:
  520. return -EMSGSIZE;
  521. case MAC_INVALID_GTS:
  522. case MAC_PAST_TIME:
  523. return -EBADSLT;
  524. case MAC_INVALID_HANDLE:
  525. return -EBADMSG;
  526. case MAC_INVALID_PARAMETER:
  527. case MAC_UNSUPPORTED_ATTRIBUTE:
  528. case MAC_ON_TIME_TOO_LONG:
  529. case MAC_INVALID_INDEX:
  530. return -EINVAL;
  531. case MAC_NO_DATA:
  532. return -ENODATA;
  533. case MAC_NO_SHORT_ADDRESS:
  534. return -EFAULT;
  535. case MAC_PAN_ID_CONFLICT:
  536. return -EADDRINUSE;
  537. case MAC_TRANSACTION_EXPIRED:
  538. return -ETIME;
  539. case MAC_TRANSACTION_OVERFLOW:
  540. return -ENOBUFS;
  541. case MAC_UNAVAILABLE_KEY:
  542. return -ENOKEY;
  543. case MAC_INVALID_ADDRESS:
  544. return -ENXIO;
  545. case MAC_TRACKING_OFF:
  546. case MAC_SUPERFRAME_OVERLAP:
  547. return -EREMOTEIO;
  548. case MAC_LIMIT_REACHED:
  549. return -EDQUOT;
  550. case MAC_READ_ONLY:
  551. return -EROFS;
  552. default:
  553. return -EPROTO;
  554. }
  555. }
  556. /**
  557. * ca8210_test_int_driver_write() - Writes a message to the test interface to be
  558. * read by the userspace
  559. * @buf: Buffer containing upstream message
  560. * @len: length of message to write
  561. * @spi: SPI device of message originator
  562. *
  563. * Return: 0 or linux error code
  564. */
  565. static int ca8210_test_int_driver_write(
  566. const u8 *buf,
  567. size_t len,
  568. void *spi
  569. )
  570. {
  571. struct ca8210_priv *priv = spi_get_drvdata(spi);
  572. struct ca8210_test *test = &priv->test;
  573. char *fifo_buffer;
  574. int i;
  575. dev_dbg(
  576. &priv->spi->dev,
  577. "test_interface: Buffering upstream message:\n"
  578. );
  579. for (i = 0; i < len; i++)
  580. dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]);
  581. fifo_buffer = kmalloc(len, GFP_KERNEL);
  582. if (!fifo_buffer)
  583. return -ENOMEM;
  584. memcpy(fifo_buffer, buf, len);
  585. kfifo_in(&test->up_fifo, &fifo_buffer, 4);
  586. wake_up_interruptible(&priv->test.readq);
  587. return 0;
  588. }
  589. /* SPI Operation */
  590. static int ca8210_net_rx(
  591. struct ieee802154_hw *hw,
  592. u8 *command,
  593. size_t len
  594. );
  595. static u8 mlme_reset_request_sync(
  596. u8 set_default_pib,
  597. void *device_ref
  598. );
  599. static int ca8210_spi_transfer(
  600. struct spi_device *spi,
  601. const u8 *buf,
  602. size_t len
  603. );
  604. /**
  605. * ca8210_reset_send() - Hard resets the ca8210 for a given time
  606. * @spi: Pointer to target ca8210 spi device
  607. * @ms: Milliseconds to hold the reset line low for
  608. */
  609. static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)
  610. {
  611. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  612. struct ca8210_priv *priv = spi_get_drvdata(spi);
  613. long status;
  614. gpio_set_value(pdata->gpio_reset, 0);
  615. reinit_completion(&priv->ca8210_is_awake);
  616. msleep(ms);
  617. gpio_set_value(pdata->gpio_reset, 1);
  618. priv->promiscuous = false;
  619. /* Wait until wakeup indication seen */
  620. status = wait_for_completion_interruptible_timeout(
  621. &priv->ca8210_is_awake,
  622. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  623. );
  624. if (status == 0) {
  625. dev_crit(
  626. &spi->dev,
  627. "Fatal: No wakeup from ca8210 after reset!\n"
  628. );
  629. }
  630. dev_dbg(&spi->dev, "Reset the device\n");
  631. }
  632. /**
  633. * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW
  634. * condition happens.
  635. * @work: Pointer to work being executed
  636. */
  637. static void ca8210_mlme_reset_worker(struct work_struct *work)
  638. {
  639. struct work_priv_container *wpc = container_of(
  640. work,
  641. struct work_priv_container,
  642. work
  643. );
  644. struct ca8210_priv *priv = wpc->priv;
  645. mlme_reset_request_sync(0, priv->spi);
  646. kfree(wpc);
  647. }
  648. /**
  649. * ca8210_rx_done() - Calls various message dispatches responding to a received
  650. * command
  651. * @arg: Pointer to the cas_control object for the relevant spi transfer
  652. *
  653. * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test
  654. * interface and network driver.
  655. */
  656. static void ca8210_rx_done(struct cas_control *cas_ctl)
  657. {
  658. u8 *buf;
  659. u8 len;
  660. struct work_priv_container *mlme_reset_wpc;
  661. struct ca8210_priv *priv = cas_ctl->priv;
  662. buf = cas_ctl->tx_in_buf;
  663. len = buf[1] + 2;
  664. if (len > CA8210_SPI_BUF_SIZE) {
  665. dev_crit(
  666. &priv->spi->dev,
  667. "Received packet len (%d) erroneously long\n",
  668. len
  669. );
  670. goto finish;
  671. }
  672. if (buf[0] & SPI_SYN) {
  673. if (priv->sync_command_response) {
  674. memcpy(priv->sync_command_response, buf, len);
  675. complete(&priv->sync_exchange_complete);
  676. } else {
  677. if (cascoda_api_upstream)
  678. cascoda_api_upstream(buf, len, priv->spi);
  679. priv->sync_up++;
  680. }
  681. } else {
  682. if (cascoda_api_upstream)
  683. cascoda_api_upstream(buf, len, priv->spi);
  684. }
  685. ca8210_net_rx(priv->hw, buf, len);
  686. if (buf[0] == SPI_MCPS_DATA_CONFIRM) {
  687. if (buf[3] == MAC_TRANSACTION_OVERFLOW) {
  688. dev_info(
  689. &priv->spi->dev,
  690. "Waiting for transaction overflow to stabilise...\n");
  691. msleep(2000);
  692. dev_info(
  693. &priv->spi->dev,
  694. "Resetting MAC...\n");
  695. mlme_reset_wpc = kmalloc(sizeof(*mlme_reset_wpc),
  696. GFP_KERNEL);
  697. if (!mlme_reset_wpc)
  698. goto finish;
  699. INIT_WORK(
  700. &mlme_reset_wpc->work,
  701. ca8210_mlme_reset_worker
  702. );
  703. mlme_reset_wpc->priv = priv;
  704. queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work);
  705. }
  706. } else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) {
  707. dev_notice(
  708. &priv->spi->dev,
  709. "Wakeup indication received, reason:\n"
  710. );
  711. switch (buf[2]) {
  712. case 0:
  713. dev_notice(
  714. &priv->spi->dev,
  715. "Transceiver woken up from Power Up / System Reset\n"
  716. );
  717. break;
  718. case 1:
  719. dev_notice(
  720. &priv->spi->dev,
  721. "Watchdog Timer Time-Out\n"
  722. );
  723. break;
  724. case 2:
  725. dev_notice(
  726. &priv->spi->dev,
  727. "Transceiver woken up from Power-Off by Sleep Timer Time-Out\n");
  728. break;
  729. case 3:
  730. dev_notice(
  731. &priv->spi->dev,
  732. "Transceiver woken up from Power-Off by GPIO Activity\n"
  733. );
  734. break;
  735. case 4:
  736. dev_notice(
  737. &priv->spi->dev,
  738. "Transceiver woken up from Standby by Sleep Timer Time-Out\n"
  739. );
  740. break;
  741. case 5:
  742. dev_notice(
  743. &priv->spi->dev,
  744. "Transceiver woken up from Standby by GPIO Activity\n"
  745. );
  746. break;
  747. case 6:
  748. dev_notice(
  749. &priv->spi->dev,
  750. "Sleep-Timer Time-Out in Active Mode\n"
  751. );
  752. break;
  753. default:
  754. dev_warn(&priv->spi->dev, "Wakeup reason unknown\n");
  755. break;
  756. }
  757. complete(&priv->ca8210_is_awake);
  758. }
  759. finish:;
  760. }
  761. static int ca8210_remove(struct spi_device *spi_device);
  762. /**
  763. * ca8210_spi_transfer_complete() - Called when a single spi transfer has
  764. * completed
  765. * @context: Pointer to the cas_control object for the finished transfer
  766. */
  767. static void ca8210_spi_transfer_complete(void *context)
  768. {
  769. struct cas_control *cas_ctl = context;
  770. struct ca8210_priv *priv = cas_ctl->priv;
  771. bool duplex_rx = false;
  772. int i;
  773. u8 retry_buffer[CA8210_SPI_BUF_SIZE];
  774. if (
  775. cas_ctl->tx_in_buf[0] == SPI_NACK ||
  776. (cas_ctl->tx_in_buf[0] == SPI_IDLE &&
  777. cas_ctl->tx_in_buf[1] == SPI_NACK)
  778. ) {
  779. /* ca8210 is busy */
  780. dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n");
  781. if (cas_ctl->tx_buf[0] == SPI_IDLE) {
  782. dev_warn(
  783. &priv->spi->dev,
  784. "IRQ servicing NACKd, dropping transfer\n"
  785. );
  786. kfree(cas_ctl);
  787. return;
  788. }
  789. if (priv->retries > 3) {
  790. dev_err(&priv->spi->dev, "too many retries!\n");
  791. kfree(cas_ctl);
  792. ca8210_remove(priv->spi);
  793. return;
  794. }
  795. memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);
  796. kfree(cas_ctl);
  797. ca8210_spi_transfer(
  798. priv->spi,
  799. retry_buffer,
  800. CA8210_SPI_BUF_SIZE
  801. );
  802. priv->retries++;
  803. dev_info(&priv->spi->dev, "retried spi write\n");
  804. return;
  805. } else if (
  806. cas_ctl->tx_in_buf[0] != SPI_IDLE &&
  807. cas_ctl->tx_in_buf[0] != SPI_NACK
  808. ) {
  809. duplex_rx = true;
  810. }
  811. if (duplex_rx) {
  812. dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n");
  813. for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)
  814. dev_dbg(
  815. &priv->spi->dev,
  816. "%#03x\n",
  817. cas_ctl->tx_in_buf[i]
  818. );
  819. ca8210_rx_done(cas_ctl);
  820. }
  821. complete(&priv->spi_transfer_complete);
  822. kfree(cas_ctl);
  823. priv->retries = 0;
  824. }
  825. /**
  826. * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210
  827. * @spi: Pointer to spi device for transfer
  828. * @buf: Octet array to send
  829. * @len: length of the buffer being sent
  830. *
  831. * Return: 0 or linux error code
  832. */
  833. static int ca8210_spi_transfer(
  834. struct spi_device *spi,
  835. const u8 *buf,
  836. size_t len
  837. )
  838. {
  839. int i, status = 0;
  840. struct ca8210_priv *priv;
  841. struct cas_control *cas_ctl;
  842. if (!spi) {
  843. pr_crit("NULL spi device passed to %s\n", __func__);
  844. return -ENODEV;
  845. }
  846. priv = spi_get_drvdata(spi);
  847. reinit_completion(&priv->spi_transfer_complete);
  848. dev_dbg(&spi->dev, "%s called\n", __func__);
  849. cas_ctl = kmalloc(sizeof(*cas_ctl), GFP_ATOMIC);
  850. if (!cas_ctl)
  851. return -ENOMEM;
  852. cas_ctl->priv = priv;
  853. memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  854. memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  855. memcpy(cas_ctl->tx_buf, buf, len);
  856. for (i = 0; i < len; i++)
  857. dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);
  858. spi_message_init(&cas_ctl->msg);
  859. cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */
  860. cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */
  861. cas_ctl->transfer.speed_hz = 0; /* Use device setting */
  862. cas_ctl->transfer.bits_per_word = 0; /* Use device setting */
  863. cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;
  864. cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;
  865. cas_ctl->transfer.delay_usecs = 0;
  866. cas_ctl->transfer.cs_change = 0;
  867. cas_ctl->transfer.len = sizeof(struct mac_message);
  868. cas_ctl->msg.complete = ca8210_spi_transfer_complete;
  869. cas_ctl->msg.context = cas_ctl;
  870. spi_message_add_tail(
  871. &cas_ctl->transfer,
  872. &cas_ctl->msg
  873. );
  874. status = spi_async(spi, &cas_ctl->msg);
  875. if (status < 0) {
  876. dev_crit(
  877. &spi->dev,
  878. "status %d from spi_sync in write\n",
  879. status
  880. );
  881. }
  882. return status;
  883. }
  884. /**
  885. * ca8210_spi_exchange() - Exchange API/SAP commands with the radio
  886. * @buf: Octet array of command being sent downstream
  887. * @len: length of buf
  888. * @response: buffer for storing synchronous response
  889. * @device_ref: spi_device pointer for ca8210
  890. *
  891. * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for
  892. * synchronous commands waits for the corresponding response to be read from
  893. * the spi before returning. The response is written to the response parameter.
  894. *
  895. * Return: 0 or linux error code
  896. */
  897. static int ca8210_spi_exchange(
  898. const u8 *buf,
  899. size_t len,
  900. u8 *response,
  901. void *device_ref
  902. )
  903. {
  904. int status = 0;
  905. struct spi_device *spi = device_ref;
  906. struct ca8210_priv *priv = spi->dev.driver_data;
  907. long wait_remaining;
  908. if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */
  909. reinit_completion(&priv->sync_exchange_complete);
  910. priv->sync_command_response = response;
  911. }
  912. do {
  913. reinit_completion(&priv->spi_transfer_complete);
  914. status = ca8210_spi_transfer(priv->spi, buf, len);
  915. if (status) {
  916. dev_warn(
  917. &spi->dev,
  918. "spi write failed, returned %d\n",
  919. status
  920. );
  921. if (status == -EBUSY)
  922. continue;
  923. if (((buf[0] & SPI_SYN) && response))
  924. complete(&priv->sync_exchange_complete);
  925. goto cleanup;
  926. }
  927. wait_remaining = wait_for_completion_interruptible_timeout(
  928. &priv->spi_transfer_complete,
  929. msecs_to_jiffies(1000)
  930. );
  931. if (wait_remaining == -ERESTARTSYS) {
  932. status = -ERESTARTSYS;
  933. } else if (wait_remaining == 0) {
  934. dev_err(
  935. &spi->dev,
  936. "SPI downstream transfer timed out!\n"
  937. );
  938. status = -ETIME;
  939. goto cleanup;
  940. }
  941. } while (status < 0);
  942. if (!((buf[0] & SPI_SYN) && response))
  943. goto cleanup;
  944. wait_remaining = wait_for_completion_interruptible_timeout(
  945. &priv->sync_exchange_complete,
  946. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  947. );
  948. if (wait_remaining == -ERESTARTSYS) {
  949. status = -ERESTARTSYS;
  950. } else if (wait_remaining == 0) {
  951. dev_err(
  952. &spi->dev,
  953. "Synchronous confirm timeout\n"
  954. );
  955. status = -ETIME;
  956. }
  957. cleanup:
  958. priv->sync_command_response = NULL;
  959. return status;
  960. }
  961. /**
  962. * ca8210_interrupt_handler() - Called when an irq is received from the ca8210
  963. * @irq: Id of the irq being handled
  964. * @dev_id: Pointer passed by the system, pointing to the ca8210's private data
  965. *
  966. * This function is called when the irq line from the ca8210 is asserted,
  967. * signifying that the ca8210 has a message to send upstream to us. Starts the
  968. * asynchronous spi read.
  969. *
  970. * Return: irq return code
  971. */
  972. static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id)
  973. {
  974. struct ca8210_priv *priv = dev_id;
  975. int status;
  976. dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n");
  977. do {
  978. status = ca8210_spi_transfer(priv->spi, NULL, 0);
  979. if (status && (status != -EBUSY)) {
  980. dev_warn(
  981. &priv->spi->dev,
  982. "spi read failed, returned %d\n",
  983. status
  984. );
  985. }
  986. } while (status == -EBUSY);
  987. return IRQ_HANDLED;
  988. }
  989. static int (*cascoda_api_downstream)(
  990. const u8 *buf,
  991. size_t len,
  992. u8 *response,
  993. void *device_ref
  994. ) = ca8210_spi_exchange;
  995. /* Cascoda API / 15.4 SAP Primitives */
  996. /**
  997. * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API
  998. * @sfr_page: SFR Page
  999. * @sfr_address: SFR Address
  1000. * @sfr_value: SFR Value
  1001. * @device_ref: Nondescript pointer to target device
  1002. *
  1003. * Return: 802.15.4 status code of TDME-SETSFR.confirm
  1004. */
  1005. static u8 tdme_setsfr_request_sync(
  1006. u8 sfr_page,
  1007. u8 sfr_address,
  1008. u8 sfr_value,
  1009. void *device_ref
  1010. )
  1011. {
  1012. int ret;
  1013. struct mac_message command, response;
  1014. struct spi_device *spi = device_ref;
  1015. command.command_id = SPI_TDME_SETSFR_REQUEST;
  1016. command.length = 3;
  1017. command.pdata.tdme_set_sfr_req.sfr_page = sfr_page;
  1018. command.pdata.tdme_set_sfr_req.sfr_address = sfr_address;
  1019. command.pdata.tdme_set_sfr_req.sfr_value = sfr_value;
  1020. response.command_id = SPI_IDLE;
  1021. ret = cascoda_api_downstream(
  1022. &command.command_id,
  1023. command.length + 2,
  1024. &response.command_id,
  1025. device_ref
  1026. );
  1027. if (ret) {
  1028. dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret);
  1029. return MAC_SYSTEM_ERROR;
  1030. }
  1031. if (response.command_id != SPI_TDME_SETSFR_CONFIRM) {
  1032. dev_crit(
  1033. &spi->dev,
  1034. "sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n",
  1035. response.command_id
  1036. );
  1037. return MAC_SYSTEM_ERROR;
  1038. }
  1039. return response.pdata.tdme_set_sfr_cnf.status;
  1040. }
  1041. /**
  1042. * tdme_chipinit() - TDME Chip Register Default Initialisation Macro
  1043. * @device_ref: Nondescript pointer to target device
  1044. *
  1045. * Return: 802.15.4 status code of API calls
  1046. */
  1047. static u8 tdme_chipinit(void *device_ref)
  1048. {
  1049. u8 status = MAC_SUCCESS;
  1050. u8 sfr_address;
  1051. struct spi_device *spi = device_ref;
  1052. struct preamble_cfg_sfr pre_cfg_value = {
  1053. .timeout_symbols = 3,
  1054. .acquisition_symbols = 3,
  1055. .search_symbols = 1,
  1056. };
  1057. /* LNA Gain Settings */
  1058. status = tdme_setsfr_request_sync(
  1059. 1, (sfr_address = CA8210_SFR_LNAGX40),
  1060. LNAGX40_DEFAULT_GAIN, device_ref);
  1061. if (status)
  1062. goto finish;
  1063. status = tdme_setsfr_request_sync(
  1064. 1, (sfr_address = CA8210_SFR_LNAGX41),
  1065. LNAGX41_DEFAULT_GAIN, device_ref);
  1066. if (status)
  1067. goto finish;
  1068. status = tdme_setsfr_request_sync(
  1069. 1, (sfr_address = CA8210_SFR_LNAGX42),
  1070. LNAGX42_DEFAULT_GAIN, device_ref);
  1071. if (status)
  1072. goto finish;
  1073. status = tdme_setsfr_request_sync(
  1074. 1, (sfr_address = CA8210_SFR_LNAGX43),
  1075. LNAGX43_DEFAULT_GAIN, device_ref);
  1076. if (status)
  1077. goto finish;
  1078. status = tdme_setsfr_request_sync(
  1079. 1, (sfr_address = CA8210_SFR_LNAGX44),
  1080. LNAGX44_DEFAULT_GAIN, device_ref);
  1081. if (status)
  1082. goto finish;
  1083. status = tdme_setsfr_request_sync(
  1084. 1, (sfr_address = CA8210_SFR_LNAGX45),
  1085. LNAGX45_DEFAULT_GAIN, device_ref);
  1086. if (status)
  1087. goto finish;
  1088. status = tdme_setsfr_request_sync(
  1089. 1, (sfr_address = CA8210_SFR_LNAGX46),
  1090. LNAGX46_DEFAULT_GAIN, device_ref);
  1091. if (status)
  1092. goto finish;
  1093. status = tdme_setsfr_request_sync(
  1094. 1, (sfr_address = CA8210_SFR_LNAGX47),
  1095. LNAGX47_DEFAULT_GAIN, device_ref);
  1096. if (status)
  1097. goto finish;
  1098. /* Preamble Timing Config */
  1099. status = tdme_setsfr_request_sync(
  1100. 1, (sfr_address = CA8210_SFR_PRECFG),
  1101. *((u8 *)&pre_cfg_value), device_ref);
  1102. if (status)
  1103. goto finish;
  1104. /* Preamble Threshold High */
  1105. status = tdme_setsfr_request_sync(
  1106. 1, (sfr_address = CA8210_SFR_PTHRH),
  1107. PTHRH_DEFAULT_THRESHOLD, device_ref);
  1108. if (status)
  1109. goto finish;
  1110. /* Tx Output Power 8 dBm */
  1111. status = tdme_setsfr_request_sync(
  1112. 0, (sfr_address = CA8210_SFR_PACFGIB),
  1113. PACFGIB_DEFAULT_CURRENT, device_ref);
  1114. if (status)
  1115. goto finish;
  1116. finish:
  1117. if (status != MAC_SUCCESS) {
  1118. dev_err(
  1119. &spi->dev,
  1120. "failed to set sfr at %#03x, status = %#03x\n",
  1121. sfr_address,
  1122. status
  1123. );
  1124. }
  1125. return status;
  1126. }
  1127. /**
  1128. * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx)
  1129. * @channel: 802.15.4 channel to initialise chip for
  1130. * @device_ref: Nondescript pointer to target device
  1131. *
  1132. * Return: 802.15.4 status code of API calls
  1133. */
  1134. static u8 tdme_channelinit(u8 channel, void *device_ref)
  1135. {
  1136. /* Transceiver front-end local oscillator tx two-point calibration
  1137. * value. Tuned for the hardware.
  1138. */
  1139. u8 txcalval;
  1140. if (channel >= 25)
  1141. txcalval = 0xA7;
  1142. else if (channel >= 23)
  1143. txcalval = 0xA8;
  1144. else if (channel >= 22)
  1145. txcalval = 0xA9;
  1146. else if (channel >= 20)
  1147. txcalval = 0xAA;
  1148. else if (channel >= 17)
  1149. txcalval = 0xAB;
  1150. else if (channel >= 16)
  1151. txcalval = 0xAC;
  1152. else if (channel >= 14)
  1153. txcalval = 0xAD;
  1154. else if (channel >= 12)
  1155. txcalval = 0xAE;
  1156. else
  1157. txcalval = 0xAF;
  1158. return tdme_setsfr_request_sync(
  1159. 1,
  1160. CA8210_SFR_LOTXCAL,
  1161. txcalval,
  1162. device_ref
  1163. ); /* LO Tx Cal */
  1164. }
  1165. /**
  1166. * tdme_checkpibattribute() - Checks Attribute Values that are not checked in
  1167. * MAC
  1168. * @pib_attribute: Attribute Number
  1169. * @pib_attribute_length: Attribute length
  1170. * @pib_attribute_value: Pointer to Attribute Value
  1171. * @device_ref: Nondescript pointer to target device
  1172. *
  1173. * Return: 802.15.4 status code of checks
  1174. */
  1175. static u8 tdme_checkpibattribute(
  1176. u8 pib_attribute,
  1177. u8 pib_attribute_length,
  1178. const void *pib_attribute_value
  1179. )
  1180. {
  1181. u8 status = MAC_SUCCESS;
  1182. u8 value;
  1183. value = *((u8 *)pib_attribute_value);
  1184. switch (pib_attribute) {
  1185. /* PHY */
  1186. case PHY_TRANSMIT_POWER:
  1187. if (value > 0x3F)
  1188. status = MAC_INVALID_PARAMETER;
  1189. break;
  1190. case PHY_CCA_MODE:
  1191. if (value > 0x03)
  1192. status = MAC_INVALID_PARAMETER;
  1193. break;
  1194. /* MAC */
  1195. case MAC_BATT_LIFE_EXT_PERIODS:
  1196. if (value < 6 || value > 41)
  1197. status = MAC_INVALID_PARAMETER;
  1198. break;
  1199. case MAC_BEACON_PAYLOAD:
  1200. if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH)
  1201. status = MAC_INVALID_PARAMETER;
  1202. break;
  1203. case MAC_BEACON_PAYLOAD_LENGTH:
  1204. if (value > MAX_BEACON_PAYLOAD_LENGTH)
  1205. status = MAC_INVALID_PARAMETER;
  1206. break;
  1207. case MAC_BEACON_ORDER:
  1208. if (value > 15)
  1209. status = MAC_INVALID_PARAMETER;
  1210. break;
  1211. case MAC_MAX_BE:
  1212. if (value < 3 || value > 8)
  1213. status = MAC_INVALID_PARAMETER;
  1214. break;
  1215. case MAC_MAX_CSMA_BACKOFFS:
  1216. if (value > 5)
  1217. status = MAC_INVALID_PARAMETER;
  1218. break;
  1219. case MAC_MAX_FRAME_RETRIES:
  1220. if (value > 7)
  1221. status = MAC_INVALID_PARAMETER;
  1222. break;
  1223. case MAC_MIN_BE:
  1224. if (value > 8)
  1225. status = MAC_INVALID_PARAMETER;
  1226. break;
  1227. case MAC_RESPONSE_WAIT_TIME:
  1228. if (value < 2 || value > 64)
  1229. status = MAC_INVALID_PARAMETER;
  1230. break;
  1231. case MAC_SUPERFRAME_ORDER:
  1232. if (value > 15)
  1233. status = MAC_INVALID_PARAMETER;
  1234. break;
  1235. /* boolean */
  1236. case MAC_ASSOCIATED_PAN_COORD:
  1237. case MAC_ASSOCIATION_PERMIT:
  1238. case MAC_AUTO_REQUEST:
  1239. case MAC_BATT_LIFE_EXT:
  1240. case MAC_GTS_PERMIT:
  1241. case MAC_PROMISCUOUS_MODE:
  1242. case MAC_RX_ON_WHEN_IDLE:
  1243. case MAC_SECURITY_ENABLED:
  1244. if (value > 1)
  1245. status = MAC_INVALID_PARAMETER;
  1246. break;
  1247. /* MAC SEC */
  1248. case MAC_AUTO_REQUEST_SECURITY_LEVEL:
  1249. if (value > 7)
  1250. status = MAC_INVALID_PARAMETER;
  1251. break;
  1252. case MAC_AUTO_REQUEST_KEY_ID_MODE:
  1253. if (value > 3)
  1254. status = MAC_INVALID_PARAMETER;
  1255. break;
  1256. default:
  1257. break;
  1258. }
  1259. return status;
  1260. }
  1261. /**
  1262. * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower
  1263. * @txp: Transmit Power
  1264. * @device_ref: Nondescript pointer to target device
  1265. *
  1266. * Normalised to 802.15.4 Definition (6-bit, signed):
  1267. * Bit 7-6: not used
  1268. * Bit 5-0: tx power (-32 - +31 dB)
  1269. *
  1270. * Return: 802.15.4 status code of api calls
  1271. */
  1272. static u8 tdme_settxpower(u8 txp, void *device_ref)
  1273. {
  1274. u8 status;
  1275. s8 txp_val;
  1276. u8 txp_ext;
  1277. union pa_cfg_sfr pa_cfg_val;
  1278. /* extend from 6 to 8 bit */
  1279. txp_ext = 0x3F & txp;
  1280. if (txp_ext & 0x20)
  1281. txp_ext += 0xC0;
  1282. txp_val = (s8)txp_ext;
  1283. if (CA8210_MAC_MPW) {
  1284. if (txp_val > 0) {
  1285. /* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */
  1286. pa_cfg_val.bias_current_trim = 3;
  1287. pa_cfg_val.buffer_capacitor_trim = 5;
  1288. pa_cfg_val.boost = 1;
  1289. } else {
  1290. /* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */
  1291. pa_cfg_val.bias_current_trim = 3;
  1292. pa_cfg_val.buffer_capacitor_trim = 7;
  1293. pa_cfg_val.boost = 0;
  1294. }
  1295. /* write PACFG */
  1296. status = tdme_setsfr_request_sync(
  1297. 0,
  1298. CA8210_SFR_PACFG,
  1299. pa_cfg_val.paib,
  1300. device_ref
  1301. );
  1302. } else {
  1303. /* Look-Up Table for Setting Current and Frequency Trim values
  1304. * for desired Output Power
  1305. */
  1306. if (txp_val > 8) {
  1307. pa_cfg_val.paib = 0x3F;
  1308. } else if (txp_val == 8) {
  1309. pa_cfg_val.paib = 0x32;
  1310. } else if (txp_val == 7) {
  1311. pa_cfg_val.paib = 0x22;
  1312. } else if (txp_val == 6) {
  1313. pa_cfg_val.paib = 0x18;
  1314. } else if (txp_val == 5) {
  1315. pa_cfg_val.paib = 0x10;
  1316. } else if (txp_val == 4) {
  1317. pa_cfg_val.paib = 0x0C;
  1318. } else if (txp_val == 3) {
  1319. pa_cfg_val.paib = 0x08;
  1320. } else if (txp_val == 2) {
  1321. pa_cfg_val.paib = 0x05;
  1322. } else if (txp_val == 1) {
  1323. pa_cfg_val.paib = 0x03;
  1324. } else if (txp_val == 0) {
  1325. pa_cfg_val.paib = 0x01;
  1326. } else { /* < 0 */
  1327. pa_cfg_val.paib = 0x00;
  1328. }
  1329. /* write PACFGIB */
  1330. status = tdme_setsfr_request_sync(
  1331. 0,
  1332. CA8210_SFR_PACFGIB,
  1333. pa_cfg_val.paib,
  1334. device_ref
  1335. );
  1336. }
  1337. return status;
  1338. }
  1339. /**
  1340. * mcps_data_request() - mcps_data_request (Send Data) according to API Spec
  1341. * @src_addr_mode: Source Addressing Mode
  1342. * @dst_address_mode: Destination Addressing Mode
  1343. * @dst_pan_id: Destination PAN ID
  1344. * @dst_addr: Pointer to Destination Address
  1345. * @msdu_length: length of Data
  1346. * @msdu: Pointer to Data
  1347. * @msdu_handle: Handle of Data
  1348. * @tx_options: Tx Options Bit Field
  1349. * @security: Pointer to Security Structure or NULL
  1350. * @device_ref: Nondescript pointer to target device
  1351. *
  1352. * Return: 802.15.4 status code of action
  1353. */
  1354. static u8 mcps_data_request(
  1355. u8 src_addr_mode,
  1356. u8 dst_address_mode,
  1357. u16 dst_pan_id,
  1358. union macaddr *dst_addr,
  1359. u8 msdu_length,
  1360. u8 *msdu,
  1361. u8 msdu_handle,
  1362. u8 tx_options,
  1363. struct secspec *security,
  1364. void *device_ref
  1365. )
  1366. {
  1367. struct secspec *psec;
  1368. struct mac_message command;
  1369. command.command_id = SPI_MCPS_DATA_REQUEST;
  1370. command.pdata.data_req.src_addr_mode = src_addr_mode;
  1371. command.pdata.data_req.dst.mode = dst_address_mode;
  1372. if (dst_address_mode != MAC_MODE_NO_ADDR) {
  1373. command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id);
  1374. command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id);
  1375. if (dst_address_mode == MAC_MODE_SHORT_ADDR) {
  1376. command.pdata.data_req.dst.address[0] = LS_BYTE(
  1377. dst_addr->short_address
  1378. );
  1379. command.pdata.data_req.dst.address[1] = MS_BYTE(
  1380. dst_addr->short_address
  1381. );
  1382. } else { /* MAC_MODE_LONG_ADDR*/
  1383. memcpy(
  1384. command.pdata.data_req.dst.address,
  1385. dst_addr->ieee_address,
  1386. 8
  1387. );
  1388. }
  1389. }
  1390. command.pdata.data_req.msdu_length = msdu_length;
  1391. command.pdata.data_req.msdu_handle = msdu_handle;
  1392. command.pdata.data_req.tx_options = tx_options;
  1393. memcpy(command.pdata.data_req.msdu, msdu, msdu_length);
  1394. psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length);
  1395. command.length = sizeof(struct mcps_data_request_pset) -
  1396. MAX_DATA_SIZE + msdu_length;
  1397. if (!security || security->security_level == 0) {
  1398. psec->security_level = 0;
  1399. command.length += 1;
  1400. } else {
  1401. *psec = *security;
  1402. command.length += sizeof(struct secspec);
  1403. }
  1404. if (ca8210_spi_transfer(device_ref, &command.command_id,
  1405. command.length + 2))
  1406. return MAC_SYSTEM_ERROR;
  1407. return MAC_SUCCESS;
  1408. }
  1409. /**
  1410. * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec
  1411. * @set_default_pib: Set defaults in PIB
  1412. * @device_ref: Nondescript pointer to target device
  1413. *
  1414. * Return: 802.15.4 status code of MLME-RESET.confirm
  1415. */
  1416. static u8 mlme_reset_request_sync(
  1417. u8 set_default_pib,
  1418. void *device_ref
  1419. )
  1420. {
  1421. u8 status;
  1422. struct mac_message command, response;
  1423. struct spi_device *spi = device_ref;
  1424. command.command_id = SPI_MLME_RESET_REQUEST;
  1425. command.length = 1;
  1426. command.pdata.u8param = set_default_pib;
  1427. if (cascoda_api_downstream(
  1428. &command.command_id,
  1429. command.length + 2,
  1430. &response.command_id,
  1431. device_ref)) {
  1432. dev_err(&spi->dev, "cascoda_api_downstream failed\n");
  1433. return MAC_SYSTEM_ERROR;
  1434. }
  1435. if (response.command_id != SPI_MLME_RESET_CONFIRM)
  1436. return MAC_SYSTEM_ERROR;
  1437. status = response.pdata.status;
  1438. /* reset COORD Bit for Channel Filtering as Coordinator */
  1439. if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) {
  1440. status = tdme_setsfr_request_sync(
  1441. 0,
  1442. CA8210_SFR_MACCON,
  1443. 0,
  1444. device_ref
  1445. );
  1446. }
  1447. return status;
  1448. }
  1449. /**
  1450. * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec
  1451. * @pib_attribute: Attribute Number
  1452. * @pib_attribute_index: Index within Attribute if an Array
  1453. * @pib_attribute_length: Attribute length
  1454. * @pib_attribute_value: Pointer to Attribute Value
  1455. * @device_ref: Nondescript pointer to target device
  1456. *
  1457. * Return: 802.15.4 status code of MLME-SET.confirm
  1458. */
  1459. static u8 mlme_set_request_sync(
  1460. u8 pib_attribute,
  1461. u8 pib_attribute_index,
  1462. u8 pib_attribute_length,
  1463. const void *pib_attribute_value,
  1464. void *device_ref
  1465. )
  1466. {
  1467. u8 status;
  1468. struct mac_message command, response;
  1469. /* pre-check the validity of pib_attribute values that are not checked
  1470. * in MAC
  1471. */
  1472. if (tdme_checkpibattribute(
  1473. pib_attribute, pib_attribute_length, pib_attribute_value)) {
  1474. return MAC_INVALID_PARAMETER;
  1475. }
  1476. if (pib_attribute == PHY_CURRENT_CHANNEL) {
  1477. status = tdme_channelinit(
  1478. *((u8 *)pib_attribute_value),
  1479. device_ref
  1480. );
  1481. if (status)
  1482. return status;
  1483. }
  1484. if (pib_attribute == PHY_TRANSMIT_POWER) {
  1485. return tdme_settxpower(
  1486. *((u8 *)pib_attribute_value),
  1487. device_ref
  1488. );
  1489. }
  1490. command.command_id = SPI_MLME_SET_REQUEST;
  1491. command.length = sizeof(struct mlme_set_request_pset) -
  1492. MAX_ATTRIBUTE_SIZE + pib_attribute_length;
  1493. command.pdata.set_req.pib_attribute = pib_attribute;
  1494. command.pdata.set_req.pib_attribute_index = pib_attribute_index;
  1495. command.pdata.set_req.pib_attribute_length = pib_attribute_length;
  1496. memcpy(
  1497. command.pdata.set_req.pib_attribute_value,
  1498. pib_attribute_value,
  1499. pib_attribute_length
  1500. );
  1501. if (cascoda_api_downstream(
  1502. &command.command_id,
  1503. command.length + 2,
  1504. &response.command_id,
  1505. device_ref)) {
  1506. return MAC_SYSTEM_ERROR;
  1507. }
  1508. if (response.command_id != SPI_MLME_SET_CONFIRM)
  1509. return MAC_SYSTEM_ERROR;
  1510. return response.pdata.status;
  1511. }
  1512. /**
  1513. * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec
  1514. * @hw_attribute: Attribute Number
  1515. * @hw_attribute_length: Attribute length
  1516. * @hw_attribute_value: Pointer to Attribute Value
  1517. * @device_ref: Nondescript pointer to target device
  1518. *
  1519. * Return: 802.15.4 status code of HWME-SET.confirm
  1520. */
  1521. static u8 hwme_set_request_sync(
  1522. u8 hw_attribute,
  1523. u8 hw_attribute_length,
  1524. u8 *hw_attribute_value,
  1525. void *device_ref
  1526. )
  1527. {
  1528. struct mac_message command, response;
  1529. command.command_id = SPI_HWME_SET_REQUEST;
  1530. command.length = 2 + hw_attribute_length;
  1531. command.pdata.hwme_set_req.hw_attribute = hw_attribute;
  1532. command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length;
  1533. memcpy(
  1534. command.pdata.hwme_set_req.hw_attribute_value,
  1535. hw_attribute_value,
  1536. hw_attribute_length
  1537. );
  1538. if (cascoda_api_downstream(
  1539. &command.command_id,
  1540. command.length + 2,
  1541. &response.command_id,
  1542. device_ref)) {
  1543. return MAC_SYSTEM_ERROR;
  1544. }
  1545. if (response.command_id != SPI_HWME_SET_CONFIRM)
  1546. return MAC_SYSTEM_ERROR;
  1547. return response.pdata.hwme_set_cnf.status;
  1548. }
  1549. /**
  1550. * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec
  1551. * @hw_attribute: Attribute Number
  1552. * @hw_attribute_length: Attribute length
  1553. * @hw_attribute_value: Pointer to Attribute Value
  1554. * @device_ref: Nondescript pointer to target device
  1555. *
  1556. * Return: 802.15.4 status code of HWME-GET.confirm
  1557. */
  1558. static u8 hwme_get_request_sync(
  1559. u8 hw_attribute,
  1560. u8 *hw_attribute_length,
  1561. u8 *hw_attribute_value,
  1562. void *device_ref
  1563. )
  1564. {
  1565. struct mac_message command, response;
  1566. command.command_id = SPI_HWME_GET_REQUEST;
  1567. command.length = 1;
  1568. command.pdata.hwme_get_req.hw_attribute = hw_attribute;
  1569. if (cascoda_api_downstream(
  1570. &command.command_id,
  1571. command.length + 2,
  1572. &response.command_id,
  1573. device_ref)) {
  1574. return MAC_SYSTEM_ERROR;
  1575. }
  1576. if (response.command_id != SPI_HWME_GET_CONFIRM)
  1577. return MAC_SYSTEM_ERROR;
  1578. if (response.pdata.hwme_get_cnf.status == MAC_SUCCESS) {
  1579. *hw_attribute_length =
  1580. response.pdata.hwme_get_cnf.hw_attribute_length;
  1581. memcpy(
  1582. hw_attribute_value,
  1583. response.pdata.hwme_get_cnf.hw_attribute_value,
  1584. *hw_attribute_length
  1585. );
  1586. }
  1587. return response.pdata.hwme_get_cnf.status;
  1588. }
  1589. /* Network driver operation */
  1590. /**
  1591. * ca8210_async_xmit_complete() - Called to announce that an asynchronous
  1592. * transmission has finished
  1593. * @hw: ieee802154_hw of ca8210 that has finished exchange
  1594. * @msduhandle: Identifier of transmission that has completed
  1595. * @status: Returned 802.15.4 status code of the transmission
  1596. *
  1597. * Return: 0 or linux error code
  1598. */
  1599. static int ca8210_async_xmit_complete(
  1600. struct ieee802154_hw *hw,
  1601. u8 msduhandle,
  1602. u8 status)
  1603. {
  1604. struct ca8210_priv *priv = hw->priv;
  1605. if (priv->nextmsduhandle != msduhandle) {
  1606. dev_err(
  1607. &priv->spi->dev,
  1608. "Unexpected msdu_handle on data confirm, Expected %d, got %d\n",
  1609. priv->nextmsduhandle,
  1610. msduhandle
  1611. );
  1612. return -EIO;
  1613. }
  1614. priv->async_tx_pending = false;
  1615. priv->nextmsduhandle++;
  1616. if (status) {
  1617. dev_err(
  1618. &priv->spi->dev,
  1619. "Link transmission unsuccessful, status = %d\n",
  1620. status
  1621. );
  1622. if (status != MAC_TRANSACTION_OVERFLOW) {
  1623. ieee802154_wake_queue(priv->hw);
  1624. return 0;
  1625. }
  1626. }
  1627. ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);
  1628. return 0;
  1629. }
  1630. /**
  1631. * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received
  1632. * MCPS_DATA_indication
  1633. * @hw: ieee802154_hw that MCPS_DATA_indication was received by
  1634. * @len: length of MCPS_DATA_indication
  1635. * @data_ind: Octet array of MCPS_DATA_indication
  1636. *
  1637. * Called by the spi driver whenever a SAP command is received, this function
  1638. * will ascertain whether the command is of interest to the network driver and
  1639. * take necessary action.
  1640. *
  1641. * Return: 0 or linux error code
  1642. */
  1643. static int ca8210_skb_rx(
  1644. struct ieee802154_hw *hw,
  1645. size_t len,
  1646. u8 *data_ind
  1647. )
  1648. {
  1649. struct ieee802154_hdr hdr;
  1650. int msdulen;
  1651. int hlen;
  1652. u8 mpdulinkquality = data_ind[23];
  1653. struct sk_buff *skb;
  1654. struct ca8210_priv *priv = hw->priv;
  1655. /* Allocate mtu size buffer for every rx packet */
  1656. skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr));
  1657. if (!skb)
  1658. return -ENOMEM;
  1659. skb_reserve(skb, sizeof(hdr));
  1660. msdulen = data_ind[22]; /* msdu_length */
  1661. if (msdulen > IEEE802154_MTU) {
  1662. dev_err(
  1663. &priv->spi->dev,
  1664. "received erroneously large msdu length!\n"
  1665. );
  1666. kfree_skb(skb);
  1667. return -EMSGSIZE;
  1668. }
  1669. dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen);
  1670. if (priv->promiscuous)
  1671. goto copy_payload;
  1672. /* Populate hdr */
  1673. hdr.sec.level = data_ind[29 + msdulen];
  1674. dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level);
  1675. if (hdr.sec.level > 0) {
  1676. hdr.sec.key_id_mode = data_ind[30 + msdulen];
  1677. memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8);
  1678. hdr.sec.key_id = data_ind[39 + msdulen];
  1679. }
  1680. hdr.source.mode = data_ind[0];
  1681. dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode);
  1682. hdr.source.pan_id = *(u16 *)&data_ind[1];
  1683. dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id);
  1684. memcpy(&hdr.source.extended_addr, &data_ind[3], 8);
  1685. hdr.dest.mode = data_ind[11];
  1686. dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode);
  1687. hdr.dest.pan_id = *(u16 *)&data_ind[12];
  1688. dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id);
  1689. memcpy(&hdr.dest.extended_addr, &data_ind[14], 8);
  1690. /* Fill in FC implicitly */
  1691. hdr.fc.type = 1; /* Data frame */
  1692. if (hdr.sec.level)
  1693. hdr.fc.security_enabled = 1;
  1694. else
  1695. hdr.fc.security_enabled = 0;
  1696. if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13])
  1697. hdr.fc.intra_pan = 1;
  1698. else
  1699. hdr.fc.intra_pan = 0;
  1700. hdr.fc.dest_addr_mode = hdr.dest.mode;
  1701. hdr.fc.source_addr_mode = hdr.source.mode;
  1702. /* Add hdr to front of buffer */
  1703. hlen = ieee802154_hdr_push(skb, &hdr);
  1704. if (hlen < 0) {
  1705. dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n");
  1706. kfree_skb(skb);
  1707. return hlen;
  1708. }
  1709. skb_reset_mac_header(skb);
  1710. skb->mac_len = hlen;
  1711. copy_payload:
  1712. /* Add <msdulen> bytes of space to the back of the buffer */
  1713. /* Copy msdu to skb */
  1714. skb_put_data(skb, &data_ind[29], msdulen);
  1715. ieee802154_rx_irqsafe(hw, skb, mpdulinkquality);
  1716. return 0;
  1717. }
  1718. /**
  1719. * ca8210_net_rx() - Acts upon received SAP commands relevant to the network
  1720. * driver
  1721. * @hw: ieee802154_hw that command was received by
  1722. * @command: Octet array of received command
  1723. * @len: length of the received command
  1724. *
  1725. * Called by the spi driver whenever a SAP command is received, this function
  1726. * will ascertain whether the command is of interest to the network driver and
  1727. * take necessary action.
  1728. *
  1729. * Return: 0 or linux error code
  1730. */
  1731. static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len)
  1732. {
  1733. struct ca8210_priv *priv = hw->priv;
  1734. unsigned long flags;
  1735. u8 status;
  1736. dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]);
  1737. if (command[0] == SPI_MCPS_DATA_INDICATION) {
  1738. /* Received data */
  1739. spin_lock_irqsave(&priv->lock, flags);
  1740. if (command[26] == priv->last_dsn) {
  1741. dev_dbg(
  1742. &priv->spi->dev,
  1743. "DSN %d resend received, ignoring...\n",
  1744. command[26]
  1745. );
  1746. spin_unlock_irqrestore(&priv->lock, flags);
  1747. return 0;
  1748. }
  1749. priv->last_dsn = command[26];
  1750. spin_unlock_irqrestore(&priv->lock, flags);
  1751. return ca8210_skb_rx(hw, len - 2, command + 2);
  1752. } else if (command[0] == SPI_MCPS_DATA_CONFIRM) {
  1753. status = command[3];
  1754. if (priv->async_tx_pending) {
  1755. return ca8210_async_xmit_complete(
  1756. hw,
  1757. command[2],
  1758. status
  1759. );
  1760. }
  1761. }
  1762. return 0;
  1763. }
  1764. /**
  1765. * ca8210_skb_tx() - Transmits a given socket buffer using the ca8210
  1766. * @skb: Socket buffer to transmit
  1767. * @msduhandle: Data identifier to pass to the 802.15.4 MAC
  1768. * @priv: Pointer to private data section of target ca8210
  1769. *
  1770. * Return: 0 or linux error code
  1771. */
  1772. static int ca8210_skb_tx(
  1773. struct sk_buff *skb,
  1774. u8 msduhandle,
  1775. struct ca8210_priv *priv
  1776. )
  1777. {
  1778. int status;
  1779. struct ieee802154_hdr header = { };
  1780. struct secspec secspec;
  1781. unsigned int mac_len;
  1782. dev_dbg(&priv->spi->dev, "%s called\n", __func__);
  1783. /* Get addressing info from skb - ieee802154 layer creates a full
  1784. * packet
  1785. */
  1786. mac_len = ieee802154_hdr_peek_addrs(skb, &header);
  1787. secspec.security_level = header.sec.level;
  1788. secspec.key_id_mode = header.sec.key_id_mode;
  1789. if (secspec.key_id_mode == 2)
  1790. memcpy(secspec.key_source, &header.sec.short_src, 4);
  1791. else if (secspec.key_id_mode == 3)
  1792. memcpy(secspec.key_source, &header.sec.extended_src, 8);
  1793. secspec.key_index = header.sec.key_id;
  1794. /* Pass to Cascoda API */
  1795. status = mcps_data_request(
  1796. header.source.mode,
  1797. header.dest.mode,
  1798. header.dest.pan_id,
  1799. (union macaddr *)&header.dest.extended_addr,
  1800. skb->len - mac_len,
  1801. &skb->data[mac_len],
  1802. msduhandle,
  1803. header.fc.ack_request,
  1804. &secspec,
  1805. priv->spi
  1806. );
  1807. return link_to_linux_err(status);
  1808. }
  1809. /**
  1810. * ca8210_start() - Starts the network driver
  1811. * @hw: ieee802154_hw of ca8210 being started
  1812. *
  1813. * Return: 0 or linux error code
  1814. */
  1815. static int ca8210_start(struct ieee802154_hw *hw)
  1816. {
  1817. int status;
  1818. u8 rx_on_when_idle;
  1819. u8 lqi_threshold = 0;
  1820. struct ca8210_priv *priv = hw->priv;
  1821. priv->last_dsn = -1;
  1822. /* Turn receiver on when idle for now just to test rx */
  1823. rx_on_when_idle = 1;
  1824. status = mlme_set_request_sync(
  1825. MAC_RX_ON_WHEN_IDLE,
  1826. 0,
  1827. 1,
  1828. &rx_on_when_idle,
  1829. priv->spi
  1830. );
  1831. if (status) {
  1832. dev_crit(
  1833. &priv->spi->dev,
  1834. "Setting rx_on_when_idle failed, status = %d\n",
  1835. status
  1836. );
  1837. return link_to_linux_err(status);
  1838. }
  1839. status = hwme_set_request_sync(
  1840. HWME_LQILIMIT,
  1841. 1,
  1842. &lqi_threshold,
  1843. priv->spi
  1844. );
  1845. if (status) {
  1846. dev_crit(
  1847. &priv->spi->dev,
  1848. "Setting lqilimit failed, status = %d\n",
  1849. status
  1850. );
  1851. return link_to_linux_err(status);
  1852. }
  1853. return 0;
  1854. }
  1855. /**
  1856. * ca8210_stop() - Stops the network driver
  1857. * @hw: ieee802154_hw of ca8210 being stopped
  1858. *
  1859. * Return: 0 or linux error code
  1860. */
  1861. static void ca8210_stop(struct ieee802154_hw *hw)
  1862. {
  1863. }
  1864. /**
  1865. * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using
  1866. * the ca8210
  1867. * @hw: ieee802154_hw of ca8210 to transmit from
  1868. * @skb: Socket buffer to transmit
  1869. *
  1870. * Return: 0 or linux error code
  1871. */
  1872. static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb)
  1873. {
  1874. struct ca8210_priv *priv = hw->priv;
  1875. int status;
  1876. dev_dbg(&priv->spi->dev, "calling %s\n", __func__);
  1877. priv->tx_skb = skb;
  1878. priv->async_tx_pending = true;
  1879. status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv);
  1880. return status;
  1881. }
  1882. /**
  1883. * ca8210_get_ed() - Returns the measured energy on the current channel at this
  1884. * instant in time
  1885. * @hw: ieee802154_hw of target ca8210
  1886. * @level: Measured Energy Detect level
  1887. *
  1888. * Return: 0 or linux error code
  1889. */
  1890. static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level)
  1891. {
  1892. u8 lenvar;
  1893. struct ca8210_priv *priv = hw->priv;
  1894. return link_to_linux_err(
  1895. hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi)
  1896. );
  1897. }
  1898. /**
  1899. * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the
  1900. * ca8210
  1901. * @hw: ieee802154_hw of target ca8210
  1902. * @page: Channel page to set
  1903. * @channel: Channel number to set
  1904. *
  1905. * Return: 0 or linux error code
  1906. */
  1907. static int ca8210_set_channel(
  1908. struct ieee802154_hw *hw,
  1909. u8 page,
  1910. u8 channel
  1911. )
  1912. {
  1913. u8 status;
  1914. struct ca8210_priv *priv = hw->priv;
  1915. status = mlme_set_request_sync(
  1916. PHY_CURRENT_CHANNEL,
  1917. 0,
  1918. 1,
  1919. &channel,
  1920. priv->spi
  1921. );
  1922. if (status) {
  1923. dev_err(
  1924. &priv->spi->dev,
  1925. "error setting channel, MLME-SET.confirm status = %d\n",
  1926. status
  1927. );
  1928. }
  1929. return link_to_linux_err(status);
  1930. }
  1931. /**
  1932. * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the
  1933. * ca8210
  1934. * @hw: ieee802154_hw of target ca8210
  1935. * @filt: Filtering parameters
  1936. * @changed: Bitmap representing which parameters to change
  1937. *
  1938. * Effectively just sets the actual addressing information identifying this node
  1939. * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.4
  1940. * 2006 specification.
  1941. *
  1942. * Return: 0 or linux error code
  1943. */
  1944. static int ca8210_set_hw_addr_filt(
  1945. struct ieee802154_hw *hw,
  1946. struct ieee802154_hw_addr_filt *filt,
  1947. unsigned long changed
  1948. )
  1949. {
  1950. u8 status = 0;
  1951. struct ca8210_priv *priv = hw->priv;
  1952. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  1953. status = mlme_set_request_sync(
  1954. MAC_PAN_ID,
  1955. 0,
  1956. 2,
  1957. &filt->pan_id, priv->spi
  1958. );
  1959. if (status) {
  1960. dev_err(
  1961. &priv->spi->dev,
  1962. "error setting pan id, MLME-SET.confirm status = %d",
  1963. status
  1964. );
  1965. return link_to_linux_err(status);
  1966. }
  1967. }
  1968. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  1969. status = mlme_set_request_sync(
  1970. MAC_SHORT_ADDRESS,
  1971. 0,
  1972. 2,
  1973. &filt->short_addr, priv->spi
  1974. );
  1975. if (status) {
  1976. dev_err(
  1977. &priv->spi->dev,
  1978. "error setting short address, MLME-SET.confirm status = %d",
  1979. status
  1980. );
  1981. return link_to_linux_err(status);
  1982. }
  1983. }
  1984. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  1985. status = mlme_set_request_sync(
  1986. NS_IEEE_ADDRESS,
  1987. 0,
  1988. 8,
  1989. &filt->ieee_addr,
  1990. priv->spi
  1991. );
  1992. if (status) {
  1993. dev_err(
  1994. &priv->spi->dev,
  1995. "error setting ieee address, MLME-SET.confirm status = %d",
  1996. status
  1997. );
  1998. return link_to_linux_err(status);
  1999. }
  2000. }
  2001. /* TODO: Should use MLME_START to set coord bit? */
  2002. return 0;
  2003. }
  2004. /**
  2005. * ca8210_set_tx_power() - Sets the transmit power of the ca8210
  2006. * @hw: ieee802154_hw of target ca8210
  2007. * @mbm: Transmit power in mBm (dBm*100)
  2008. *
  2009. * Return: 0 or linux error code
  2010. */
  2011. static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm)
  2012. {
  2013. struct ca8210_priv *priv = hw->priv;
  2014. mbm /= 100;
  2015. return link_to_linux_err(
  2016. mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi)
  2017. );
  2018. }
  2019. /**
  2020. * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca8210
  2021. * @hw: ieee802154_hw of target ca8210
  2022. * @cca: CCA mode to set
  2023. *
  2024. * Return: 0 or linux error code
  2025. */
  2026. static int ca8210_set_cca_mode(
  2027. struct ieee802154_hw *hw,
  2028. const struct wpan_phy_cca *cca
  2029. )
  2030. {
  2031. u8 status;
  2032. u8 cca_mode;
  2033. struct ca8210_priv *priv = hw->priv;
  2034. cca_mode = cca->mode & 3;
  2035. if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) {
  2036. /* cca_mode 0 == CS OR ED, 3 == CS AND ED */
  2037. cca_mode = 0;
  2038. }
  2039. status = mlme_set_request_sync(
  2040. PHY_CCA_MODE,
  2041. 0,
  2042. 1,
  2043. &cca_mode,
  2044. priv->spi
  2045. );
  2046. if (status) {
  2047. dev_err(
  2048. &priv->spi->dev,
  2049. "error setting cca mode, MLME-SET.confirm status = %d",
  2050. status
  2051. );
  2052. }
  2053. return link_to_linux_err(status);
  2054. }
  2055. /**
  2056. * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca8210
  2057. * @hw: ieee802154_hw of target ca8210
  2058. * @level: ED level to set (in mbm)
  2059. *
  2060. * Sets the minimum threshold of measured energy above which the ca8210 will
  2061. * back off and retry a transmission.
  2062. *
  2063. * Return: 0 or linux error code
  2064. */
  2065. static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
  2066. {
  2067. u8 status;
  2068. u8 ed_threshold = (level / 100) * 2 + 256;
  2069. struct ca8210_priv *priv = hw->priv;
  2070. status = hwme_set_request_sync(
  2071. HWME_EDTHRESHOLD,
  2072. 1,
  2073. &ed_threshold,
  2074. priv->spi
  2075. );
  2076. if (status) {
  2077. dev_err(
  2078. &priv->spi->dev,
  2079. "error setting ed threshold, HWME-SET.confirm status = %d",
  2080. status
  2081. );
  2082. }
  2083. return link_to_linux_err(status);
  2084. }
  2085. /**
  2086. * ca8210_set_csma_params() - Sets the CSMA parameters of the ca8210
  2087. * @hw: ieee802154_hw of target ca8210
  2088. * @min_be: Minimum backoff exponent when backing off a transmission
  2089. * @max_be: Maximum backoff exponent when backing off a transmission
  2090. * @retries: Number of times to retry after backing off
  2091. *
  2092. * Return: 0 or linux error code
  2093. */
  2094. static int ca8210_set_csma_params(
  2095. struct ieee802154_hw *hw,
  2096. u8 min_be,
  2097. u8 max_be,
  2098. u8 retries
  2099. )
  2100. {
  2101. u8 status;
  2102. struct ca8210_priv *priv = hw->priv;
  2103. status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi);
  2104. if (status) {
  2105. dev_err(
  2106. &priv->spi->dev,
  2107. "error setting min be, MLME-SET.confirm status = %d",
  2108. status
  2109. );
  2110. return link_to_linux_err(status);
  2111. }
  2112. status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi);
  2113. if (status) {
  2114. dev_err(
  2115. &priv->spi->dev,
  2116. "error setting max be, MLME-SET.confirm status = %d",
  2117. status
  2118. );
  2119. return link_to_linux_err(status);
  2120. }
  2121. status = mlme_set_request_sync(
  2122. MAC_MAX_CSMA_BACKOFFS,
  2123. 0,
  2124. 1,
  2125. &retries,
  2126. priv->spi
  2127. );
  2128. if (status) {
  2129. dev_err(
  2130. &priv->spi->dev,
  2131. "error setting max csma backoffs, MLME-SET.confirm status = %d",
  2132. status
  2133. );
  2134. }
  2135. return link_to_linux_err(status);
  2136. }
  2137. /**
  2138. * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca8210
  2139. * @hw: ieee802154_hw of target ca8210
  2140. * @retries: Number of retries
  2141. *
  2142. * Sets the number of times to retry a transmission if no acknowledgment was
  2143. * was received from the other end when one was requested.
  2144. *
  2145. * Return: 0 or linux error code
  2146. */
  2147. static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  2148. {
  2149. u8 status;
  2150. struct ca8210_priv *priv = hw->priv;
  2151. status = mlme_set_request_sync(
  2152. MAC_MAX_FRAME_RETRIES,
  2153. 0,
  2154. 1,
  2155. &retries,
  2156. priv->spi
  2157. );
  2158. if (status) {
  2159. dev_err(
  2160. &priv->spi->dev,
  2161. "error setting frame retries, MLME-SET.confirm status = %d",
  2162. status
  2163. );
  2164. }
  2165. return link_to_linux_err(status);
  2166. }
  2167. static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  2168. {
  2169. u8 status;
  2170. struct ca8210_priv *priv = hw->priv;
  2171. status = mlme_set_request_sync(
  2172. MAC_PROMISCUOUS_MODE,
  2173. 0,
  2174. 1,
  2175. (const void *)&on,
  2176. priv->spi
  2177. );
  2178. if (status) {
  2179. dev_err(
  2180. &priv->spi->dev,
  2181. "error setting promiscuous mode, MLME-SET.confirm status = %d",
  2182. status
  2183. );
  2184. } else {
  2185. priv->promiscuous = on;
  2186. }
  2187. return link_to_linux_err(status);
  2188. }
  2189. static const struct ieee802154_ops ca8210_phy_ops = {
  2190. .start = ca8210_start,
  2191. .stop = ca8210_stop,
  2192. .xmit_async = ca8210_xmit_async,
  2193. .ed = ca8210_get_ed,
  2194. .set_channel = ca8210_set_channel,
  2195. .set_hw_addr_filt = ca8210_set_hw_addr_filt,
  2196. .set_txpower = ca8210_set_tx_power,
  2197. .set_cca_mode = ca8210_set_cca_mode,
  2198. .set_cca_ed_level = ca8210_set_cca_ed_level,
  2199. .set_csma_params = ca8210_set_csma_params,
  2200. .set_frame_retries = ca8210_set_frame_retries,
  2201. .set_promiscuous_mode = ca8210_set_promiscuous_mode
  2202. };
  2203. /* Test/EVBME Interface */
  2204. /**
  2205. * ca8210_test_int_open() - Opens the test interface to the userspace
  2206. * @inodp: inode representation of file interface
  2207. * @filp: file interface
  2208. *
  2209. * Return: 0 or linux error code
  2210. */
  2211. static int ca8210_test_int_open(struct inode *inodp, struct file *filp)
  2212. {
  2213. struct ca8210_priv *priv = inodp->i_private;
  2214. filp->private_data = priv;
  2215. return 0;
  2216. }
  2217. /**
  2218. * ca8210_test_check_upstream() - Checks a command received from the upstream
  2219. * testing interface for required action
  2220. * @buf: Buffer containing command to check
  2221. * @device_ref: Nondescript pointer to target device
  2222. *
  2223. * Return: 0 or linux error code
  2224. */
  2225. static int ca8210_test_check_upstream(u8 *buf, void *device_ref)
  2226. {
  2227. int ret;
  2228. u8 response[CA8210_SPI_BUF_SIZE];
  2229. if (buf[0] == SPI_MLME_SET_REQUEST) {
  2230. ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5);
  2231. if (ret) {
  2232. response[0] = SPI_MLME_SET_CONFIRM;
  2233. response[1] = 3;
  2234. response[2] = MAC_INVALID_PARAMETER;
  2235. response[3] = buf[2];
  2236. response[4] = buf[3];
  2237. if (cascoda_api_upstream)
  2238. cascoda_api_upstream(response, 5, device_ref);
  2239. return ret;
  2240. }
  2241. }
  2242. if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) {
  2243. return tdme_channelinit(buf[2], device_ref);
  2244. } else if (buf[0] == SPI_MLME_START_REQUEST) {
  2245. return tdme_channelinit(buf[4], device_ref);
  2246. } else if (
  2247. (buf[0] == SPI_MLME_SET_REQUEST) &&
  2248. (buf[2] == PHY_CURRENT_CHANNEL)
  2249. ) {
  2250. return tdme_channelinit(buf[5], device_ref);
  2251. } else if (
  2252. (buf[0] == SPI_TDME_SET_REQUEST) &&
  2253. (buf[2] == TDME_CHANNEL)
  2254. ) {
  2255. return tdme_channelinit(buf[4], device_ref);
  2256. } else if (
  2257. (CA8210_MAC_WORKAROUNDS) &&
  2258. (buf[0] == SPI_MLME_RESET_REQUEST) &&
  2259. (buf[2] == 1)
  2260. ) {
  2261. /* reset COORD Bit for Channel Filtering as Coordinator */
  2262. return tdme_setsfr_request_sync(
  2263. 0,
  2264. CA8210_SFR_MACCON,
  2265. 0,
  2266. device_ref
  2267. );
  2268. }
  2269. return 0;
  2270. } /* End of EVBMECheckSerialCommand() */
  2271. /**
  2272. * ca8210_test_int_user_write() - Called by a process in userspace to send a
  2273. * message to the ca8210 drivers
  2274. * @filp: file interface
  2275. * @in_buf: Buffer containing message to write
  2276. * @len: length of message
  2277. * @off: file offset
  2278. *
  2279. * Return: 0 or linux error code
  2280. */
  2281. static ssize_t ca8210_test_int_user_write(
  2282. struct file *filp,
  2283. const char __user *in_buf,
  2284. size_t len,
  2285. loff_t *off
  2286. )
  2287. {
  2288. int ret;
  2289. struct ca8210_priv *priv = filp->private_data;
  2290. u8 command[CA8210_SPI_BUF_SIZE];
  2291. memset(command, SPI_IDLE, 6);
  2292. if (len > CA8210_SPI_BUF_SIZE || len < 2) {
  2293. dev_warn(
  2294. &priv->spi->dev,
  2295. "userspace requested erroneous write length (%zu)\n",
  2296. len
  2297. );
  2298. return -EBADE;
  2299. }
  2300. ret = copy_from_user(command, in_buf, len);
  2301. if (ret) {
  2302. dev_err(
  2303. &priv->spi->dev,
  2304. "%d bytes could not be copied from userspace\n",
  2305. ret
  2306. );
  2307. return -EIO;
  2308. }
  2309. if (len != command[1] + 2) {
  2310. dev_err(
  2311. &priv->spi->dev,
  2312. "write len does not match packet length field\n"
  2313. );
  2314. return -EBADE;
  2315. }
  2316. ret = ca8210_test_check_upstream(command, priv->spi);
  2317. if (ret == 0) {
  2318. ret = ca8210_spi_exchange(
  2319. command,
  2320. command[1] + 2,
  2321. NULL,
  2322. priv->spi
  2323. );
  2324. if (ret < 0) {
  2325. /* effectively 0 bytes were written successfully */
  2326. dev_err(
  2327. &priv->spi->dev,
  2328. "spi exchange failed\n"
  2329. );
  2330. return ret;
  2331. }
  2332. if (command[0] & SPI_SYN)
  2333. priv->sync_down++;
  2334. }
  2335. return len;
  2336. }
  2337. /**
  2338. * ca8210_test_int_user_read() - Called by a process in userspace to read a
  2339. * message from the ca8210 drivers
  2340. * @filp: file interface
  2341. * @buf: Buffer to write message to
  2342. * @len: length of message to read (ignored)
  2343. * @offp: file offset
  2344. *
  2345. * If the O_NONBLOCK flag was set when opening the file then this function will
  2346. * not block, i.e. it will return if the fifo is empty. Otherwise the function
  2347. * will block, i.e. wait until new data arrives.
  2348. *
  2349. * Return: number of bytes read
  2350. */
  2351. static ssize_t ca8210_test_int_user_read(
  2352. struct file *filp,
  2353. char __user *buf,
  2354. size_t len,
  2355. loff_t *offp
  2356. )
  2357. {
  2358. int i, cmdlen;
  2359. struct ca8210_priv *priv = filp->private_data;
  2360. unsigned char *fifo_buffer;
  2361. unsigned long bytes_not_copied;
  2362. if (filp->f_flags & O_NONBLOCK) {
  2363. /* Non-blocking mode */
  2364. if (kfifo_is_empty(&priv->test.up_fifo))
  2365. return 0;
  2366. } else {
  2367. /* Blocking mode */
  2368. wait_event_interruptible(
  2369. priv->test.readq,
  2370. !kfifo_is_empty(&priv->test.up_fifo)
  2371. );
  2372. }
  2373. if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) {
  2374. dev_err(
  2375. &priv->spi->dev,
  2376. "test_interface: Wrong number of elements popped from upstream fifo\n"
  2377. );
  2378. return 0;
  2379. }
  2380. cmdlen = fifo_buffer[1];
  2381. bytes_not_copied = cmdlen + 2;
  2382. bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied);
  2383. if (bytes_not_copied > 0) {
  2384. dev_err(
  2385. &priv->spi->dev,
  2386. "%lu bytes could not be copied to user space!\n",
  2387. bytes_not_copied
  2388. );
  2389. }
  2390. dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen);
  2391. dev_dbg(&priv->spi->dev, "test_interface: Read\n");
  2392. for (i = 0; i < cmdlen + 2; i++)
  2393. dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]);
  2394. kfree(fifo_buffer);
  2395. return cmdlen + 2;
  2396. }
  2397. /**
  2398. * ca8210_test_int_ioctl() - Called by a process in userspace to enact an
  2399. * arbitrary action
  2400. * @filp: file interface
  2401. * @ioctl_num: which action to enact
  2402. * @ioctl_param: arbitrary parameter for the action
  2403. *
  2404. * Return: status
  2405. */
  2406. static long ca8210_test_int_ioctl(
  2407. struct file *filp,
  2408. unsigned int ioctl_num,
  2409. unsigned long ioctl_param
  2410. )
  2411. {
  2412. struct ca8210_priv *priv = filp->private_data;
  2413. switch (ioctl_num) {
  2414. case CA8210_IOCTL_HARD_RESET:
  2415. ca8210_reset_send(priv->spi, ioctl_param);
  2416. break;
  2417. default:
  2418. break;
  2419. }
  2420. return 0;
  2421. }
  2422. /**
  2423. * ca8210_test_int_poll() - Called by a process in userspace to determine which
  2424. * actions are currently possible for the file
  2425. * @filp: file interface
  2426. * @ptable: poll table
  2427. *
  2428. * Return: set of poll return flags
  2429. */
  2430. static __poll_t ca8210_test_int_poll(
  2431. struct file *filp,
  2432. struct poll_table_struct *ptable
  2433. )
  2434. {
  2435. __poll_t return_flags = 0;
  2436. struct ca8210_priv *priv = filp->private_data;
  2437. poll_wait(filp, &priv->test.readq, ptable);
  2438. if (!kfifo_is_empty(&priv->test.up_fifo))
  2439. return_flags |= (EPOLLIN | EPOLLRDNORM);
  2440. if (wait_event_interruptible(
  2441. priv->test.readq,
  2442. !kfifo_is_empty(&priv->test.up_fifo))) {
  2443. return EPOLLERR;
  2444. }
  2445. return return_flags;
  2446. }
  2447. static const struct file_operations test_int_fops = {
  2448. .read = ca8210_test_int_user_read,
  2449. .write = ca8210_test_int_user_write,
  2450. .open = ca8210_test_int_open,
  2451. .release = NULL,
  2452. .unlocked_ioctl = ca8210_test_int_ioctl,
  2453. .poll = ca8210_test_int_poll
  2454. };
  2455. /* Init/Deinit */
  2456. /**
  2457. * ca8210_get_platform_data() - Populate a ca8210_platform_data object
  2458. * @spi_device: Pointer to ca8210 spi device object to get data for
  2459. * @pdata: Pointer to ca8210_platform_data object to populate
  2460. *
  2461. * Return: 0 or linux error code
  2462. */
  2463. static int ca8210_get_platform_data(
  2464. struct spi_device *spi_device,
  2465. struct ca8210_platform_data *pdata
  2466. )
  2467. {
  2468. int ret = 0;
  2469. if (!spi_device->dev.of_node)
  2470. return -EINVAL;
  2471. pdata->extclockenable = of_property_read_bool(
  2472. spi_device->dev.of_node,
  2473. "extclock-enable"
  2474. );
  2475. if (pdata->extclockenable) {
  2476. ret = of_property_read_u32(
  2477. spi_device->dev.of_node,
  2478. "extclock-freq",
  2479. &pdata->extclockfreq
  2480. );
  2481. if (ret < 0)
  2482. return ret;
  2483. ret = of_property_read_u32(
  2484. spi_device->dev.of_node,
  2485. "extclock-gpio",
  2486. &pdata->extclockgpio
  2487. );
  2488. }
  2489. return ret;
  2490. }
  2491. /**
  2492. * ca8210_config_extern_clk() - Configure the external clock provided by the
  2493. * ca8210
  2494. * @pdata: Pointer to ca8210_platform_data containing clock parameters
  2495. * @spi: Pointer to target ca8210 spi device
  2496. * @on: True to turn the clock on, false to turn off
  2497. *
  2498. * The external clock is configured with a frequency and output pin taken from
  2499. * the platform data.
  2500. *
  2501. * Return: 0 or linux error code
  2502. */
  2503. static int ca8210_config_extern_clk(
  2504. struct ca8210_platform_data *pdata,
  2505. struct spi_device *spi,
  2506. bool on
  2507. )
  2508. {
  2509. u8 clkparam[2];
  2510. if (on) {
  2511. dev_info(&spi->dev, "Switching external clock on\n");
  2512. switch (pdata->extclockfreq) {
  2513. case SIXTEEN_MHZ:
  2514. clkparam[0] = 1;
  2515. break;
  2516. case EIGHT_MHZ:
  2517. clkparam[0] = 2;
  2518. break;
  2519. case FOUR_MHZ:
  2520. clkparam[0] = 3;
  2521. break;
  2522. case TWO_MHZ:
  2523. clkparam[0] = 4;
  2524. break;
  2525. case ONE_MHZ:
  2526. clkparam[0] = 5;
  2527. break;
  2528. default:
  2529. dev_crit(&spi->dev, "Invalid extclock-freq\n");
  2530. return -EINVAL;
  2531. }
  2532. clkparam[1] = pdata->extclockgpio;
  2533. } else {
  2534. dev_info(&spi->dev, "Switching external clock off\n");
  2535. clkparam[0] = 0; /* off */
  2536. clkparam[1] = 0;
  2537. }
  2538. return link_to_linux_err(
  2539. hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi)
  2540. );
  2541. }
  2542. /**
  2543. * ca8210_register_ext_clock() - Register ca8210's external clock with kernel
  2544. * @spi: Pointer to target ca8210 spi device
  2545. *
  2546. * Return: 0 or linux error code
  2547. */
  2548. static int ca8210_register_ext_clock(struct spi_device *spi)
  2549. {
  2550. struct device_node *np = spi->dev.of_node;
  2551. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2552. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2553. int ret = 0;
  2554. if (!np)
  2555. return -EFAULT;
  2556. priv->clk = clk_register_fixed_rate(
  2557. &spi->dev,
  2558. np->name,
  2559. NULL,
  2560. 0,
  2561. pdata->extclockfreq
  2562. );
  2563. if (IS_ERR(priv->clk)) {
  2564. dev_crit(&spi->dev, "Failed to register external clk\n");
  2565. return PTR_ERR(priv->clk);
  2566. }
  2567. ret = of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);
  2568. if (ret) {
  2569. clk_unregister(priv->clk);
  2570. dev_crit(
  2571. &spi->dev,
  2572. "Failed to register external clock as clock provider\n"
  2573. );
  2574. } else {
  2575. dev_info(&spi->dev, "External clock set as clock provider\n");
  2576. }
  2577. return ret;
  2578. }
  2579. /**
  2580. * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with
  2581. * kernel
  2582. * @spi: Pointer to target ca8210 spi device
  2583. */
  2584. static void ca8210_unregister_ext_clock(struct spi_device *spi)
  2585. {
  2586. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2587. if (!priv->clk)
  2588. return
  2589. of_clk_del_provider(spi->dev.of_node);
  2590. clk_unregister(priv->clk);
  2591. dev_info(&spi->dev, "External clock unregistered\n");
  2592. }
  2593. /**
  2594. * ca8210_reset_init() - Initialise the reset input to the ca8210
  2595. * @spi: Pointer to target ca8210 spi device
  2596. *
  2597. * Return: 0 or linux error code
  2598. */
  2599. static int ca8210_reset_init(struct spi_device *spi)
  2600. {
  2601. int ret;
  2602. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2603. pdata->gpio_reset = of_get_named_gpio(
  2604. spi->dev.of_node,
  2605. "reset-gpio",
  2606. 0
  2607. );
  2608. ret = gpio_direction_output(pdata->gpio_reset, 1);
  2609. if (ret < 0) {
  2610. dev_crit(
  2611. &spi->dev,
  2612. "Reset GPIO %d did not set to output mode\n",
  2613. pdata->gpio_reset
  2614. );
  2615. }
  2616. return ret;
  2617. }
  2618. /**
  2619. * ca8210_interrupt_init() - Initialise the irq output from the ca8210
  2620. * @spi: Pointer to target ca8210 spi device
  2621. *
  2622. * Return: 0 or linux error code
  2623. */
  2624. static int ca8210_interrupt_init(struct spi_device *spi)
  2625. {
  2626. int ret;
  2627. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2628. pdata->gpio_irq = of_get_named_gpio(
  2629. spi->dev.of_node,
  2630. "irq-gpio",
  2631. 0
  2632. );
  2633. pdata->irq_id = gpio_to_irq(pdata->gpio_irq);
  2634. if (pdata->irq_id < 0) {
  2635. dev_crit(
  2636. &spi->dev,
  2637. "Could not get irq for gpio pin %d\n",
  2638. pdata->gpio_irq
  2639. );
  2640. gpio_free(pdata->gpio_irq);
  2641. return pdata->irq_id;
  2642. }
  2643. ret = request_irq(
  2644. pdata->irq_id,
  2645. ca8210_interrupt_handler,
  2646. IRQF_TRIGGER_FALLING,
  2647. "ca8210-irq",
  2648. spi_get_drvdata(spi)
  2649. );
  2650. if (ret) {
  2651. dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id);
  2652. gpio_unexport(pdata->gpio_irq);
  2653. gpio_free(pdata->gpio_irq);
  2654. }
  2655. return ret;
  2656. }
  2657. /**
  2658. * ca8210_dev_com_init() - Initialise the spi communication component
  2659. * @priv: Pointer to private data structure
  2660. *
  2661. * Return: 0 or linux error code
  2662. */
  2663. static int ca8210_dev_com_init(struct ca8210_priv *priv)
  2664. {
  2665. priv->mlme_workqueue = alloc_ordered_workqueue(
  2666. "MLME work queue",
  2667. WQ_UNBOUND
  2668. );
  2669. if (!priv->mlme_workqueue) {
  2670. dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n");
  2671. return -ENOMEM;
  2672. }
  2673. priv->irq_workqueue = alloc_ordered_workqueue(
  2674. "ca8210 irq worker",
  2675. WQ_UNBOUND
  2676. );
  2677. if (!priv->irq_workqueue) {
  2678. dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n");
  2679. return -ENOMEM;
  2680. }
  2681. return 0;
  2682. }
  2683. /**
  2684. * ca8210_dev_com_clear() - Deinitialise the spi communication component
  2685. * @priv: Pointer to private data structure
  2686. */
  2687. static void ca8210_dev_com_clear(struct ca8210_priv *priv)
  2688. {
  2689. flush_workqueue(priv->mlme_workqueue);
  2690. destroy_workqueue(priv->mlme_workqueue);
  2691. flush_workqueue(priv->irq_workqueue);
  2692. destroy_workqueue(priv->irq_workqueue);
  2693. }
  2694. #define CA8210_MAX_TX_POWERS (9)
  2695. static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = {
  2696. 800, 700, 600, 500, 400, 300, 200, 100, 0
  2697. };
  2698. #define CA8210_MAX_ED_LEVELS (21)
  2699. static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = {
  2700. -10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900,
  2701. -9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400,
  2702. -9350, -9300
  2703. };
  2704. /**
  2705. * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the
  2706. * ca8210's defaults
  2707. * @ca8210_hw: Pointer to ieee802154_hw to populate
  2708. */
  2709. static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw)
  2710. {
  2711. /* Support channels 11-26 */
  2712. ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS;
  2713. ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS;
  2714. ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers;
  2715. ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS;
  2716. ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels;
  2717. ca8210_hw->phy->current_channel = 18;
  2718. ca8210_hw->phy->current_page = 0;
  2719. ca8210_hw->phy->transmit_power = 800;
  2720. ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER;
  2721. ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;
  2722. ca8210_hw->phy->cca_ed_level = -9800;
  2723. ca8210_hw->phy->symbol_duration = 16;
  2724. ca8210_hw->phy->lifs_period = 40;
  2725. ca8210_hw->phy->sifs_period = 12;
  2726. ca8210_hw->flags =
  2727. IEEE802154_HW_AFILT |
  2728. IEEE802154_HW_OMIT_CKSUM |
  2729. IEEE802154_HW_FRAME_RETRIES |
  2730. IEEE802154_HW_PROMISCUOUS |
  2731. IEEE802154_HW_CSMA_PARAMS;
  2732. ca8210_hw->phy->flags =
  2733. WPAN_PHY_FLAG_TXPOWER |
  2734. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  2735. WPAN_PHY_FLAG_CCA_MODE;
  2736. }
  2737. /**
  2738. * ca8210_test_interface_init() - Initialise the test file interface
  2739. * @priv: Pointer to private data structure
  2740. *
  2741. * Provided as an alternative to the standard linux network interface, the test
  2742. * interface exposes a file in the filesystem (ca8210_test) that allows
  2743. * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to
  2744. * the stack.
  2745. *
  2746. * Return: 0 or linux error code
  2747. */
  2748. static int ca8210_test_interface_init(struct ca8210_priv *priv)
  2749. {
  2750. struct ca8210_test *test = &priv->test;
  2751. char node_name[32];
  2752. snprintf(
  2753. node_name,
  2754. sizeof(node_name),
  2755. "ca8210@%d_%d",
  2756. priv->spi->master->bus_num,
  2757. priv->spi->chip_select
  2758. );
  2759. test->ca8210_dfs_spi_int = debugfs_create_file(
  2760. node_name,
  2761. 0600, /* S_IRUSR | S_IWUSR */
  2762. NULL,
  2763. priv,
  2764. &test_int_fops
  2765. );
  2766. if (IS_ERR(test->ca8210_dfs_spi_int)) {
  2767. dev_err(
  2768. &priv->spi->dev,
  2769. "Error %ld when creating debugfs node\n",
  2770. PTR_ERR(test->ca8210_dfs_spi_int)
  2771. );
  2772. return PTR_ERR(test->ca8210_dfs_spi_int);
  2773. }
  2774. debugfs_create_symlink("ca8210", NULL, node_name);
  2775. init_waitqueue_head(&test->readq);
  2776. return kfifo_alloc(
  2777. &test->up_fifo,
  2778. CA8210_TEST_INT_FIFO_SIZE,
  2779. GFP_KERNEL
  2780. );
  2781. }
  2782. /**
  2783. * ca8210_test_interface_clear() - Deinitialise the test file interface
  2784. * @priv: Pointer to private data structure
  2785. */
  2786. static void ca8210_test_interface_clear(struct ca8210_priv *priv)
  2787. {
  2788. struct ca8210_test *test = &priv->test;
  2789. if (!IS_ERR(test->ca8210_dfs_spi_int))
  2790. debugfs_remove(test->ca8210_dfs_spi_int);
  2791. kfifo_free(&test->up_fifo);
  2792. dev_info(&priv->spi->dev, "Test interface removed\n");
  2793. }
  2794. /**
  2795. * ca8210_remove() - Shut down a ca8210 upon being disconnected
  2796. * @priv: Pointer to private data structure
  2797. *
  2798. * Return: 0 or linux error code
  2799. */
  2800. static int ca8210_remove(struct spi_device *spi_device)
  2801. {
  2802. struct ca8210_priv *priv;
  2803. struct ca8210_platform_data *pdata;
  2804. dev_info(&spi_device->dev, "Removing ca8210\n");
  2805. pdata = spi_device->dev.platform_data;
  2806. if (pdata) {
  2807. if (pdata->extclockenable) {
  2808. ca8210_unregister_ext_clock(spi_device);
  2809. ca8210_config_extern_clk(pdata, spi_device, 0);
  2810. }
  2811. free_irq(pdata->irq_id, spi_device->dev.driver_data);
  2812. kfree(pdata);
  2813. spi_device->dev.platform_data = NULL;
  2814. }
  2815. /* get spi_device private data */
  2816. priv = spi_get_drvdata(spi_device);
  2817. if (priv) {
  2818. dev_info(
  2819. &spi_device->dev,
  2820. "sync_down = %d, sync_up = %d\n",
  2821. priv->sync_down,
  2822. priv->sync_up
  2823. );
  2824. ca8210_dev_com_clear(spi_device->dev.driver_data);
  2825. if (priv->hw) {
  2826. if (priv->hw_registered)
  2827. ieee802154_unregister_hw(priv->hw);
  2828. ieee802154_free_hw(priv->hw);
  2829. priv->hw = NULL;
  2830. dev_info(
  2831. &spi_device->dev,
  2832. "Unregistered & freed ieee802154_hw.\n"
  2833. );
  2834. }
  2835. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS))
  2836. ca8210_test_interface_clear(priv);
  2837. }
  2838. return 0;
  2839. }
  2840. /**
  2841. * ca8210_probe() - Set up a connected ca8210 upon being detected by the system
  2842. * @priv: Pointer to private data structure
  2843. *
  2844. * Return: 0 or linux error code
  2845. */
  2846. static int ca8210_probe(struct spi_device *spi_device)
  2847. {
  2848. struct ca8210_priv *priv;
  2849. struct ieee802154_hw *hw;
  2850. struct ca8210_platform_data *pdata;
  2851. int ret;
  2852. dev_info(&spi_device->dev, "Inserting ca8210\n");
  2853. /* allocate ieee802154_hw and private data */
  2854. hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops);
  2855. if (!hw) {
  2856. dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n");
  2857. ret = -ENOMEM;
  2858. goto error;
  2859. }
  2860. priv = hw->priv;
  2861. priv->hw = hw;
  2862. priv->spi = spi_device;
  2863. hw->parent = &spi_device->dev;
  2864. spin_lock_init(&priv->lock);
  2865. priv->async_tx_pending = false;
  2866. priv->hw_registered = false;
  2867. priv->sync_up = 0;
  2868. priv->sync_down = 0;
  2869. priv->promiscuous = false;
  2870. priv->retries = 0;
  2871. init_completion(&priv->ca8210_is_awake);
  2872. init_completion(&priv->spi_transfer_complete);
  2873. init_completion(&priv->sync_exchange_complete);
  2874. spi_set_drvdata(priv->spi, priv);
  2875. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {
  2876. cascoda_api_upstream = ca8210_test_int_driver_write;
  2877. ca8210_test_interface_init(priv);
  2878. } else {
  2879. cascoda_api_upstream = NULL;
  2880. }
  2881. ca8210_hw_setup(hw);
  2882. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  2883. pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
  2884. if (!pdata) {
  2885. ret = -ENOMEM;
  2886. goto error;
  2887. }
  2888. ret = ca8210_get_platform_data(priv->spi, pdata);
  2889. if (ret) {
  2890. dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n");
  2891. goto error;
  2892. }
  2893. priv->spi->dev.platform_data = pdata;
  2894. ret = ca8210_dev_com_init(priv);
  2895. if (ret) {
  2896. dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n");
  2897. goto error;
  2898. }
  2899. ret = ca8210_reset_init(priv->spi);
  2900. if (ret) {
  2901. dev_crit(&spi_device->dev, "ca8210_reset_init failed\n");
  2902. goto error;
  2903. }
  2904. ret = ca8210_interrupt_init(priv->spi);
  2905. if (ret) {
  2906. dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n");
  2907. goto error;
  2908. }
  2909. msleep(100);
  2910. ca8210_reset_send(priv->spi, 1);
  2911. ret = tdme_chipinit(priv->spi);
  2912. if (ret) {
  2913. dev_crit(&spi_device->dev, "tdme_chipinit failed\n");
  2914. goto error;
  2915. }
  2916. if (pdata->extclockenable) {
  2917. ret = ca8210_config_extern_clk(pdata, priv->spi, 1);
  2918. if (ret) {
  2919. dev_crit(
  2920. &spi_device->dev,
  2921. "ca8210_config_extern_clk failed\n"
  2922. );
  2923. goto error;
  2924. }
  2925. ret = ca8210_register_ext_clock(priv->spi);
  2926. if (ret) {
  2927. dev_crit(
  2928. &spi_device->dev,
  2929. "ca8210_register_ext_clock failed\n"
  2930. );
  2931. goto error;
  2932. }
  2933. }
  2934. ret = ieee802154_register_hw(hw);
  2935. if (ret) {
  2936. dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n");
  2937. goto error;
  2938. }
  2939. priv->hw_registered = true;
  2940. return 0;
  2941. error:
  2942. msleep(100); /* wait for pending spi transfers to complete */
  2943. ca8210_remove(spi_device);
  2944. return link_to_linux_err(ret);
  2945. }
  2946. static const struct of_device_id ca8210_of_ids[] = {
  2947. {.compatible = "cascoda,ca8210", },
  2948. {},
  2949. };
  2950. MODULE_DEVICE_TABLE(of, ca8210_of_ids);
  2951. static struct spi_driver ca8210_spi_driver = {
  2952. .driver = {
  2953. .name = DRIVER_NAME,
  2954. .owner = THIS_MODULE,
  2955. .of_match_table = of_match_ptr(ca8210_of_ids),
  2956. },
  2957. .probe = ca8210_probe,
  2958. .remove = ca8210_remove
  2959. };
  2960. module_spi_driver(ca8210_spi_driver);
  2961. MODULE_AUTHOR("Harry Morris <h.morris@cascoda.com>");
  2962. MODULE_DESCRIPTION("CA-8210 SoftMAC driver");
  2963. MODULE_LICENSE("Dual BSD/GPL");
  2964. MODULE_VERSION("1.0");