amdgpu_mn.c 9.1 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <linux/firmware.h>
  31. #include <linux/module.h>
  32. #include <linux/mmu_notifier.h>
  33. #include <linux/interval_tree.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm.h>
  36. #include "amdgpu.h"
  37. struct amdgpu_mn {
  38. /* constant after initialisation */
  39. struct amdgpu_device *adev;
  40. struct mm_struct *mm;
  41. struct mmu_notifier mn;
  42. /* only used on destruction */
  43. struct work_struct work;
  44. /* protected by adev->mn_lock */
  45. struct hlist_node node;
  46. /* objects protected by lock */
  47. struct mutex lock;
  48. struct rb_root objects;
  49. };
  50. struct amdgpu_mn_node {
  51. struct interval_tree_node it;
  52. struct list_head bos;
  53. };
  54. /**
  55. * amdgpu_mn_destroy - destroy the rmn
  56. *
  57. * @work: previously sheduled work item
  58. *
  59. * Lazy destroys the notifier from a work item
  60. */
  61. static void amdgpu_mn_destroy(struct work_struct *work)
  62. {
  63. struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work);
  64. struct amdgpu_device *adev = rmn->adev;
  65. struct amdgpu_mn_node *node, *next_node;
  66. struct amdgpu_bo *bo, *next_bo;
  67. mutex_lock(&adev->mn_lock);
  68. mutex_lock(&rmn->lock);
  69. hash_del(&rmn->node);
  70. rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
  71. it.rb) {
  72. list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
  73. bo->mn = NULL;
  74. list_del_init(&bo->mn_list);
  75. }
  76. kfree(node);
  77. }
  78. mutex_unlock(&rmn->lock);
  79. mutex_unlock(&adev->mn_lock);
  80. mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm);
  81. kfree(rmn);
  82. }
  83. /**
  84. * amdgpu_mn_release - callback to notify about mm destruction
  85. *
  86. * @mn: our notifier
  87. * @mn: the mm this callback is about
  88. *
  89. * Shedule a work item to lazy destroy our notifier.
  90. */
  91. static void amdgpu_mn_release(struct mmu_notifier *mn,
  92. struct mm_struct *mm)
  93. {
  94. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  95. INIT_WORK(&rmn->work, amdgpu_mn_destroy);
  96. schedule_work(&rmn->work);
  97. }
  98. /**
  99. * amdgpu_mn_invalidate_node - unmap all BOs of a node
  100. *
  101. * @node: the node with the BOs to unmap
  102. *
  103. * We block for all BOs and unmap them by move them
  104. * into system domain again.
  105. */
  106. static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
  107. unsigned long start,
  108. unsigned long end)
  109. {
  110. struct amdgpu_bo *bo;
  111. long r;
  112. list_for_each_entry(bo, &node->bos, mn_list) {
  113. if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
  114. continue;
  115. r = amdgpu_bo_reserve(bo, true);
  116. if (r) {
  117. DRM_ERROR("(%ld) failed to reserve user bo\n", r);
  118. continue;
  119. }
  120. r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
  121. true, false, MAX_SCHEDULE_TIMEOUT);
  122. if (r <= 0)
  123. DRM_ERROR("(%ld) failed to wait for user bo\n", r);
  124. amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
  125. r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
  126. if (r)
  127. DRM_ERROR("(%ld) failed to validate user bo\n", r);
  128. amdgpu_bo_unreserve(bo);
  129. }
  130. }
  131. /**
  132. * amdgpu_mn_invalidate_page - callback to notify about mm change
  133. *
  134. * @mn: our notifier
  135. * @mn: the mm this callback is about
  136. * @address: address of invalidate page
  137. *
  138. * Invalidation of a single page. Blocks for all BOs mapping it
  139. * and unmap them by move them into system domain again.
  140. */
  141. static void amdgpu_mn_invalidate_page(struct mmu_notifier *mn,
  142. struct mm_struct *mm,
  143. unsigned long address)
  144. {
  145. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  146. struct interval_tree_node *it;
  147. mutex_lock(&rmn->lock);
  148. it = interval_tree_iter_first(&rmn->objects, address, address);
  149. if (it) {
  150. struct amdgpu_mn_node *node;
  151. node = container_of(it, struct amdgpu_mn_node, it);
  152. amdgpu_mn_invalidate_node(node, address, address);
  153. }
  154. mutex_unlock(&rmn->lock);
  155. }
  156. /**
  157. * amdgpu_mn_invalidate_range_start - callback to notify about mm change
  158. *
  159. * @mn: our notifier
  160. * @mn: the mm this callback is about
  161. * @start: start of updated range
  162. * @end: end of updated range
  163. *
  164. * We block for all BOs between start and end to be idle and
  165. * unmap them by move them into system domain again.
  166. */
  167. static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
  168. struct mm_struct *mm,
  169. unsigned long start,
  170. unsigned long end)
  171. {
  172. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  173. struct interval_tree_node *it;
  174. /* notification is exclusive, but interval is inclusive */
  175. end -= 1;
  176. mutex_lock(&rmn->lock);
  177. it = interval_tree_iter_first(&rmn->objects, start, end);
  178. while (it) {
  179. struct amdgpu_mn_node *node;
  180. node = container_of(it, struct amdgpu_mn_node, it);
  181. it = interval_tree_iter_next(it, start, end);
  182. amdgpu_mn_invalidate_node(node, start, end);
  183. }
  184. mutex_unlock(&rmn->lock);
  185. }
  186. static const struct mmu_notifier_ops amdgpu_mn_ops = {
  187. .release = amdgpu_mn_release,
  188. .invalidate_page = amdgpu_mn_invalidate_page,
  189. .invalidate_range_start = amdgpu_mn_invalidate_range_start,
  190. };
  191. /**
  192. * amdgpu_mn_get - create notifier context
  193. *
  194. * @adev: amdgpu device pointer
  195. *
  196. * Creates a notifier context for current->mm.
  197. */
  198. static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
  199. {
  200. struct mm_struct *mm = current->mm;
  201. struct amdgpu_mn *rmn;
  202. int r;
  203. mutex_lock(&adev->mn_lock);
  204. if (down_write_killable(&mm->mmap_sem)) {
  205. mutex_unlock(&adev->mn_lock);
  206. return ERR_PTR(-EINTR);
  207. }
  208. hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm)
  209. if (rmn->mm == mm)
  210. goto release_locks;
  211. rmn = kzalloc(sizeof(*rmn), GFP_KERNEL);
  212. if (!rmn) {
  213. rmn = ERR_PTR(-ENOMEM);
  214. goto release_locks;
  215. }
  216. rmn->adev = adev;
  217. rmn->mm = mm;
  218. rmn->mn.ops = &amdgpu_mn_ops;
  219. mutex_init(&rmn->lock);
  220. rmn->objects = RB_ROOT;
  221. r = __mmu_notifier_register(&rmn->mn, mm);
  222. if (r)
  223. goto free_rmn;
  224. hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm);
  225. release_locks:
  226. up_write(&mm->mmap_sem);
  227. mutex_unlock(&adev->mn_lock);
  228. return rmn;
  229. free_rmn:
  230. up_write(&mm->mmap_sem);
  231. mutex_unlock(&adev->mn_lock);
  232. kfree(rmn);
  233. return ERR_PTR(r);
  234. }
  235. /**
  236. * amdgpu_mn_register - register a BO for notifier updates
  237. *
  238. * @bo: amdgpu buffer object
  239. * @addr: userptr addr we should monitor
  240. *
  241. * Registers an MMU notifier for the given BO at the specified address.
  242. * Returns 0 on success, -ERRNO if anything goes wrong.
  243. */
  244. int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
  245. {
  246. unsigned long end = addr + amdgpu_bo_size(bo) - 1;
  247. struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
  248. struct amdgpu_mn *rmn;
  249. struct amdgpu_mn_node *node = NULL;
  250. struct list_head bos;
  251. struct interval_tree_node *it;
  252. rmn = amdgpu_mn_get(adev);
  253. if (IS_ERR(rmn))
  254. return PTR_ERR(rmn);
  255. INIT_LIST_HEAD(&bos);
  256. mutex_lock(&rmn->lock);
  257. while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
  258. kfree(node);
  259. node = container_of(it, struct amdgpu_mn_node, it);
  260. interval_tree_remove(&node->it, &rmn->objects);
  261. addr = min(it->start, addr);
  262. end = max(it->last, end);
  263. list_splice(&node->bos, &bos);
  264. }
  265. if (!node) {
  266. node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
  267. if (!node) {
  268. mutex_unlock(&rmn->lock);
  269. return -ENOMEM;
  270. }
  271. }
  272. bo->mn = rmn;
  273. node->it.start = addr;
  274. node->it.last = end;
  275. INIT_LIST_HEAD(&node->bos);
  276. list_splice(&bos, &node->bos);
  277. list_add(&bo->mn_list, &node->bos);
  278. interval_tree_insert(&node->it, &rmn->objects);
  279. mutex_unlock(&rmn->lock);
  280. return 0;
  281. }
  282. /**
  283. * amdgpu_mn_unregister - unregister a BO for notifier updates
  284. *
  285. * @bo: amdgpu buffer object
  286. *
  287. * Remove any registration of MMU notifier updates from the buffer object.
  288. */
  289. void amdgpu_mn_unregister(struct amdgpu_bo *bo)
  290. {
  291. struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
  292. struct amdgpu_mn *rmn;
  293. struct list_head *head;
  294. mutex_lock(&adev->mn_lock);
  295. rmn = bo->mn;
  296. if (rmn == NULL) {
  297. mutex_unlock(&adev->mn_lock);
  298. return;
  299. }
  300. mutex_lock(&rmn->lock);
  301. /* save the next list entry for later */
  302. head = bo->mn_list.next;
  303. bo->mn = NULL;
  304. list_del(&bo->mn_list);
  305. if (list_empty(head)) {
  306. struct amdgpu_mn_node *node;
  307. node = container_of(head, struct amdgpu_mn_node, bos);
  308. interval_tree_remove(&node->it, &rmn->objects);
  309. kfree(node);
  310. }
  311. mutex_unlock(&rmn->lock);
  312. mutex_unlock(&adev->mn_lock);
  313. }