dwc3-pci.c 6.5 KB

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  1. /**
  2. * dwc3-pci.c - PCI Specific glue layer
  3. *
  4. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Authors: Felipe Balbi <balbi@ti.com>,
  7. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  8. *
  9. * This program is free software: you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 of
  11. * the License as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/pci.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/usb/otg.h>
  24. #include <linux/usb/usb_phy_generic.h>
  25. #include "platform_data.h"
  26. /* FIXME define these in <linux/pci_ids.h> */
  27. #define PCI_VENDOR_ID_SYNOPSYS 0x16c3
  28. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
  29. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  30. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  31. #define PCI_DEVICE_ID_INTEL_BSW 0x22B7
  32. #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
  33. #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
  34. struct dwc3_pci {
  35. struct device *dev;
  36. struct platform_device *dwc3;
  37. struct platform_device *usb2_phy;
  38. struct platform_device *usb3_phy;
  39. };
  40. static int dwc3_pci_register_phys(struct dwc3_pci *glue)
  41. {
  42. struct usb_phy_generic_platform_data pdata;
  43. struct platform_device *pdev;
  44. int ret;
  45. memset(&pdata, 0x00, sizeof(pdata));
  46. pdev = platform_device_alloc("usb_phy_generic", 0);
  47. if (!pdev)
  48. return -ENOMEM;
  49. glue->usb2_phy = pdev;
  50. pdata.type = USB_PHY_TYPE_USB2;
  51. pdata.gpio_reset = -1;
  52. ret = platform_device_add_data(glue->usb2_phy, &pdata, sizeof(pdata));
  53. if (ret)
  54. goto err1;
  55. pdev = platform_device_alloc("usb_phy_generic", 1);
  56. if (!pdev) {
  57. ret = -ENOMEM;
  58. goto err1;
  59. }
  60. glue->usb3_phy = pdev;
  61. pdata.type = USB_PHY_TYPE_USB3;
  62. ret = platform_device_add_data(glue->usb3_phy, &pdata, sizeof(pdata));
  63. if (ret)
  64. goto err2;
  65. ret = platform_device_add(glue->usb2_phy);
  66. if (ret)
  67. goto err2;
  68. ret = platform_device_add(glue->usb3_phy);
  69. if (ret)
  70. goto err3;
  71. return 0;
  72. err3:
  73. platform_device_del(glue->usb2_phy);
  74. err2:
  75. platform_device_put(glue->usb3_phy);
  76. err1:
  77. platform_device_put(glue->usb2_phy);
  78. return ret;
  79. }
  80. static int dwc3_pci_probe(struct pci_dev *pci,
  81. const struct pci_device_id *id)
  82. {
  83. struct resource res[2];
  84. struct platform_device *dwc3;
  85. struct dwc3_pci *glue;
  86. int ret;
  87. struct device *dev = &pci->dev;
  88. struct dwc3_platform_data dwc3_pdata;
  89. memset(&dwc3_pdata, 0x00, sizeof(dwc3_pdata));
  90. glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
  91. if (!glue)
  92. return -ENOMEM;
  93. glue->dev = dev;
  94. ret = pcim_enable_device(pci);
  95. if (ret) {
  96. dev_err(dev, "failed to enable pci device\n");
  97. return -ENODEV;
  98. }
  99. pci_set_master(pci);
  100. ret = dwc3_pci_register_phys(glue);
  101. if (ret) {
  102. dev_err(dev, "couldn't register PHYs\n");
  103. return ret;
  104. }
  105. dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  106. if (!dwc3) {
  107. dev_err(dev, "couldn't allocate dwc3 device\n");
  108. return -ENOMEM;
  109. }
  110. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  111. res[0].start = pci_resource_start(pci, 0);
  112. res[0].end = pci_resource_end(pci, 0);
  113. res[0].name = "dwc_usb3";
  114. res[0].flags = IORESOURCE_MEM;
  115. res[1].start = pci->irq;
  116. res[1].name = "dwc_usb3";
  117. res[1].flags = IORESOURCE_IRQ;
  118. if (pci->vendor == PCI_VENDOR_ID_AMD &&
  119. pci->device == PCI_DEVICE_ID_AMD_NL_USB) {
  120. dwc3_pdata.has_lpm_erratum = true;
  121. dwc3_pdata.lpm_nyet_threshold = 0xf;
  122. dwc3_pdata.u2exit_lfps_quirk = true;
  123. dwc3_pdata.u2ss_inp3_quirk = true;
  124. dwc3_pdata.req_p1p2p3_quirk = true;
  125. dwc3_pdata.del_p1p2p3_quirk = true;
  126. dwc3_pdata.del_phy_power_chg_quirk = true;
  127. dwc3_pdata.lfps_filter_quirk = true;
  128. dwc3_pdata.rx_detect_poll_quirk = true;
  129. dwc3_pdata.tx_de_emphasis_quirk = true;
  130. dwc3_pdata.tx_de_emphasis = 1;
  131. /*
  132. * FIXME these quirks should be removed when AMD NL
  133. * taps out
  134. */
  135. dwc3_pdata.disable_scramble_quirk = true;
  136. dwc3_pdata.dis_u3_susphy_quirk = true;
  137. dwc3_pdata.dis_u2_susphy_quirk = true;
  138. }
  139. ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
  140. if (ret) {
  141. dev_err(dev, "couldn't add resources to dwc3 device\n");
  142. return ret;
  143. }
  144. pci_set_drvdata(pci, glue);
  145. ret = platform_device_add_data(dwc3, &dwc3_pdata, sizeof(dwc3_pdata));
  146. if (ret)
  147. goto err3;
  148. dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask);
  149. dwc3->dev.dma_mask = dev->dma_mask;
  150. dwc3->dev.dma_parms = dev->dma_parms;
  151. dwc3->dev.parent = dev;
  152. glue->dwc3 = dwc3;
  153. ret = platform_device_add(dwc3);
  154. if (ret) {
  155. dev_err(dev, "failed to register dwc3 device\n");
  156. goto err3;
  157. }
  158. return 0;
  159. err3:
  160. platform_device_put(dwc3);
  161. return ret;
  162. }
  163. static void dwc3_pci_remove(struct pci_dev *pci)
  164. {
  165. struct dwc3_pci *glue = pci_get_drvdata(pci);
  166. platform_device_unregister(glue->dwc3);
  167. platform_device_unregister(glue->usb2_phy);
  168. platform_device_unregister(glue->usb3_phy);
  169. }
  170. static const struct pci_device_id dwc3_pci_id_table[] = {
  171. {
  172. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  173. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
  174. },
  175. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  176. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  177. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  178. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
  179. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
  180. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  181. { } /* Terminating Entry */
  182. };
  183. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  184. #ifdef CONFIG_PM_SLEEP
  185. static int dwc3_pci_suspend(struct device *dev)
  186. {
  187. struct pci_dev *pci = to_pci_dev(dev);
  188. pci_disable_device(pci);
  189. return 0;
  190. }
  191. static int dwc3_pci_resume(struct device *dev)
  192. {
  193. struct pci_dev *pci = to_pci_dev(dev);
  194. int ret;
  195. ret = pci_enable_device(pci);
  196. if (ret) {
  197. dev_err(dev, "can't re-enable device --> %d\n", ret);
  198. return ret;
  199. }
  200. pci_set_master(pci);
  201. return 0;
  202. }
  203. #endif /* CONFIG_PM_SLEEP */
  204. static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
  205. SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
  206. };
  207. static struct pci_driver dwc3_pci_driver = {
  208. .name = "dwc3-pci",
  209. .id_table = dwc3_pci_id_table,
  210. .probe = dwc3_pci_probe,
  211. .remove = dwc3_pci_remove,
  212. .driver = {
  213. .pm = &dwc3_pci_dev_pm_ops,
  214. },
  215. };
  216. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  217. MODULE_LICENSE("GPL v2");
  218. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  219. module_pci_driver(dwc3_pci_driver);