of_serial.c 8.4 KB

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  1. /*
  2. * Serial Port driver for Open Firmware platform devices
  3. *
  4. * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/serial_reg.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_irq.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/nwpserial.h>
  22. #include <linux/clk.h>
  23. #include "8250/8250.h"
  24. struct of_serial_info {
  25. struct clk *clk;
  26. int type;
  27. int line;
  28. };
  29. #ifdef CONFIG_ARCH_TEGRA
  30. void tegra_serial_handle_break(struct uart_port *p)
  31. {
  32. unsigned int status, tmout = 10000;
  33. do {
  34. status = p->serial_in(p, UART_LSR);
  35. if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  36. status = p->serial_in(p, UART_RX);
  37. else
  38. break;
  39. if (--tmout == 0)
  40. break;
  41. udelay(1);
  42. } while (1);
  43. }
  44. #else
  45. static inline void tegra_serial_handle_break(struct uart_port *port)
  46. {
  47. }
  48. #endif
  49. /*
  50. * Fill a struct uart_port for a given device node
  51. */
  52. static int of_platform_serial_setup(struct platform_device *ofdev,
  53. int type, struct uart_port *port,
  54. struct of_serial_info *info)
  55. {
  56. struct resource resource;
  57. struct device_node *np = ofdev->dev.of_node;
  58. u32 clk, spd, prop;
  59. int ret;
  60. memset(port, 0, sizeof *port);
  61. if (of_property_read_u32(np, "clock-frequency", &clk)) {
  62. /* Get clk rate through clk driver if present */
  63. info->clk = clk_get(&ofdev->dev, NULL);
  64. if (IS_ERR(info->clk)) {
  65. dev_warn(&ofdev->dev,
  66. "clk or clock-frequency not defined\n");
  67. return PTR_ERR(info->clk);
  68. }
  69. clk_prepare_enable(info->clk);
  70. clk = clk_get_rate(info->clk);
  71. }
  72. /* If current-speed was set, then try not to change it. */
  73. if (of_property_read_u32(np, "current-speed", &spd) == 0)
  74. port->custom_divisor = clk / (16 * spd);
  75. ret = of_address_to_resource(np, 0, &resource);
  76. if (ret) {
  77. dev_warn(&ofdev->dev, "invalid address\n");
  78. goto out;
  79. }
  80. spin_lock_init(&port->lock);
  81. port->mapbase = resource.start;
  82. /* Check for shifted address mapping */
  83. if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  84. port->mapbase += prop;
  85. /* Check for registers offset within the devices address range */
  86. if (of_property_read_u32(np, "reg-shift", &prop) == 0)
  87. port->regshift = prop;
  88. /* Check for fifo size */
  89. if (of_property_read_u32(np, "fifo-size", &prop) == 0)
  90. port->fifosize = prop;
  91. port->irq = irq_of_parse_and_map(np, 0);
  92. port->iotype = UPIO_MEM;
  93. if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
  94. switch (prop) {
  95. case 1:
  96. port->iotype = UPIO_MEM;
  97. break;
  98. case 4:
  99. port->iotype = UPIO_MEM32;
  100. break;
  101. default:
  102. dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
  103. prop);
  104. ret = -EINVAL;
  105. goto out;
  106. }
  107. }
  108. port->type = type;
  109. port->uartclk = clk;
  110. port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
  111. | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  112. if (of_find_property(np, "no-loopback-test", NULL))
  113. port->flags |= UPF_SKIP_TEST;
  114. port->dev = &ofdev->dev;
  115. switch (type) {
  116. case PORT_TEGRA:
  117. port->handle_break = tegra_serial_handle_break;
  118. break;
  119. case PORT_RT2880:
  120. port->iotype = UPIO_AU;
  121. break;
  122. }
  123. return 0;
  124. out:
  125. if (info->clk)
  126. clk_disable_unprepare(info->clk);
  127. return ret;
  128. }
  129. /*
  130. * Try to register a serial port
  131. */
  132. static struct of_device_id of_platform_serial_table[];
  133. static int of_platform_serial_probe(struct platform_device *ofdev)
  134. {
  135. const struct of_device_id *match;
  136. struct of_serial_info *info;
  137. struct uart_port port;
  138. int port_type;
  139. int ret;
  140. match = of_match_device(of_platform_serial_table, &ofdev->dev);
  141. if (!match)
  142. return -EINVAL;
  143. if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
  144. return -EBUSY;
  145. info = kzalloc(sizeof(*info), GFP_KERNEL);
  146. if (info == NULL)
  147. return -ENOMEM;
  148. port_type = (unsigned long)match->data;
  149. ret = of_platform_serial_setup(ofdev, port_type, &port, info);
  150. if (ret)
  151. goto out;
  152. switch (port_type) {
  153. #ifdef CONFIG_SERIAL_8250
  154. case PORT_8250 ... PORT_MAX_8250:
  155. {
  156. struct uart_8250_port port8250;
  157. memset(&port8250, 0, sizeof(port8250));
  158. port.type = port_type;
  159. port8250.port = port;
  160. if (port.fifosize)
  161. port8250.capabilities = UART_CAP_FIFO;
  162. if (of_property_read_bool(ofdev->dev.of_node,
  163. "auto-flow-control"))
  164. port8250.capabilities |= UART_CAP_AFE;
  165. ret = serial8250_register_8250_port(&port8250);
  166. break;
  167. }
  168. #endif
  169. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  170. case PORT_NWPSERIAL:
  171. ret = nwpserial_register_port(&port);
  172. break;
  173. #endif
  174. default:
  175. /* need to add code for these */
  176. case PORT_UNKNOWN:
  177. dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
  178. ret = -ENODEV;
  179. break;
  180. }
  181. if (ret < 0)
  182. goto out;
  183. info->type = port_type;
  184. info->line = ret;
  185. platform_set_drvdata(ofdev, info);
  186. return 0;
  187. out:
  188. kfree(info);
  189. irq_dispose_mapping(port.irq);
  190. return ret;
  191. }
  192. /*
  193. * Release a line
  194. */
  195. static int of_platform_serial_remove(struct platform_device *ofdev)
  196. {
  197. struct of_serial_info *info = platform_get_drvdata(ofdev);
  198. switch (info->type) {
  199. #ifdef CONFIG_SERIAL_8250
  200. case PORT_8250 ... PORT_MAX_8250:
  201. serial8250_unregister_port(info->line);
  202. break;
  203. #endif
  204. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  205. case PORT_NWPSERIAL:
  206. nwpserial_unregister_port(info->line);
  207. break;
  208. #endif
  209. default:
  210. /* need to add code for these */
  211. break;
  212. }
  213. if (info->clk)
  214. clk_disable_unprepare(info->clk);
  215. kfree(info);
  216. return 0;
  217. }
  218. #ifdef CONFIG_PM_SLEEP
  219. #ifdef CONFIG_SERIAL_8250
  220. static void of_serial_suspend_8250(struct of_serial_info *info)
  221. {
  222. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  223. struct uart_port *port = &port8250->port;
  224. serial8250_suspend_port(info->line);
  225. if (info->clk && (!uart_console(port) || console_suspend_enabled))
  226. clk_disable_unprepare(info->clk);
  227. }
  228. static void of_serial_resume_8250(struct of_serial_info *info)
  229. {
  230. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  231. struct uart_port *port = &port8250->port;
  232. if (info->clk && (!uart_console(port) || console_suspend_enabled))
  233. clk_prepare_enable(info->clk);
  234. serial8250_resume_port(info->line);
  235. }
  236. #else
  237. static inline void of_serial_suspend_8250(struct of_serial_info *info)
  238. {
  239. }
  240. static inline void of_serial_resume_8250(struct of_serial_info *info)
  241. {
  242. }
  243. #endif
  244. static int of_serial_suspend(struct device *dev)
  245. {
  246. struct of_serial_info *info = dev_get_drvdata(dev);
  247. switch (info->type) {
  248. case PORT_8250 ... PORT_MAX_8250:
  249. of_serial_suspend_8250(info);
  250. break;
  251. default:
  252. break;
  253. }
  254. return 0;
  255. }
  256. static int of_serial_resume(struct device *dev)
  257. {
  258. struct of_serial_info *info = dev_get_drvdata(dev);
  259. switch (info->type) {
  260. case PORT_8250 ... PORT_MAX_8250:
  261. of_serial_resume_8250(info);
  262. break;
  263. default:
  264. break;
  265. }
  266. return 0;
  267. }
  268. #endif
  269. static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
  270. /*
  271. * A few common types, add more as needed.
  272. */
  273. static struct of_device_id of_platform_serial_table[] = {
  274. { .compatible = "ns8250", .data = (void *)PORT_8250, },
  275. { .compatible = "ns16450", .data = (void *)PORT_16450, },
  276. { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
  277. { .compatible = "ns16550", .data = (void *)PORT_16550, },
  278. { .compatible = "ns16750", .data = (void *)PORT_16750, },
  279. { .compatible = "ns16850", .data = (void *)PORT_16850, },
  280. { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
  281. { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
  282. { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
  283. { .compatible = "altr,16550-FIFO32",
  284. .data = (void *)PORT_ALTR_16550_F32, },
  285. { .compatible = "altr,16550-FIFO64",
  286. .data = (void *)PORT_ALTR_16550_F64, },
  287. { .compatible = "altr,16550-FIFO128",
  288. .data = (void *)PORT_ALTR_16550_F128, },
  289. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  290. { .compatible = "ibm,qpace-nwp-serial",
  291. .data = (void *)PORT_NWPSERIAL, },
  292. #endif
  293. { .type = "serial", .data = (void *)PORT_UNKNOWN, },
  294. { /* end of list */ },
  295. };
  296. static struct platform_driver of_platform_serial_driver = {
  297. .driver = {
  298. .name = "of_serial",
  299. .of_match_table = of_platform_serial_table,
  300. },
  301. .probe = of_platform_serial_probe,
  302. .remove = of_platform_serial_remove,
  303. };
  304. module_platform_driver(of_platform_serial_driver);
  305. MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
  306. MODULE_LICENSE("GPL");
  307. MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");