mmu_pv.c 67 KB

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  1. /*
  2. * Xen mmu operations
  3. *
  4. * This file contains the various mmu fetch and update operations.
  5. * The most important job they must perform is the mapping between the
  6. * domain's pfn and the overall machine mfns.
  7. *
  8. * Xen allows guests to directly update the pagetable, in a controlled
  9. * fashion. In other words, the guest modifies the same pagetable
  10. * that the CPU actually uses, which eliminates the overhead of having
  11. * a separate shadow pagetable.
  12. *
  13. * In order to allow this, it falls on the guest domain to map its
  14. * notion of a "physical" pfn - which is just a domain-local linear
  15. * address - into a real "machine address" which the CPU's MMU can
  16. * use.
  17. *
  18. * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
  19. * inserted directly into the pagetable. When creating a new
  20. * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
  21. * when reading the content back with __(pgd|pmd|pte)_val, it converts
  22. * the mfn back into a pfn.
  23. *
  24. * The other constraint is that all pages which make up a pagetable
  25. * must be mapped read-only in the guest. This prevents uncontrolled
  26. * guest updates to the pagetable. Xen strictly enforces this, and
  27. * will disallow any pagetable update which will end up mapping a
  28. * pagetable page RW, and will disallow using any writable page as a
  29. * pagetable.
  30. *
  31. * Naively, when loading %cr3 with the base of a new pagetable, Xen
  32. * would need to validate the whole pagetable before going on.
  33. * Naturally, this is quite slow. The solution is to "pin" a
  34. * pagetable, which enforces all the constraints on the pagetable even
  35. * when it is not actively in use. This menas that Xen can be assured
  36. * that it is still valid when you do load it into %cr3, and doesn't
  37. * need to revalidate it.
  38. *
  39. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  40. */
  41. #include <linux/sched/mm.h>
  42. #include <linux/highmem.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/bug.h>
  45. #include <linux/vmalloc.h>
  46. #include <linux/export.h>
  47. #include <linux/init.h>
  48. #include <linux/gfp.h>
  49. #include <linux/memblock.h>
  50. #include <linux/seq_file.h>
  51. #include <linux/crash_dump.h>
  52. #ifdef CONFIG_KEXEC_CORE
  53. #include <linux/kexec.h>
  54. #endif
  55. #include <trace/events/xen.h>
  56. #include <asm/pgtable.h>
  57. #include <asm/tlbflush.h>
  58. #include <asm/fixmap.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/setup.h>
  61. #include <asm/paravirt.h>
  62. #include <asm/e820/api.h>
  63. #include <asm/linkage.h>
  64. #include <asm/page.h>
  65. #include <asm/init.h>
  66. #include <asm/pat.h>
  67. #include <asm/smp.h>
  68. #include <asm/xen/hypercall.h>
  69. #include <asm/xen/hypervisor.h>
  70. #include <xen/xen.h>
  71. #include <xen/page.h>
  72. #include <xen/interface/xen.h>
  73. #include <xen/interface/hvm/hvm_op.h>
  74. #include <xen/interface/version.h>
  75. #include <xen/interface/memory.h>
  76. #include <xen/hvc-console.h>
  77. #include "multicalls.h"
  78. #include "mmu.h"
  79. #include "debugfs.h"
  80. #ifdef CONFIG_X86_32
  81. /*
  82. * Identity map, in addition to plain kernel map. This needs to be
  83. * large enough to allocate page table pages to allocate the rest.
  84. * Each page can map 2MB.
  85. */
  86. #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
  87. static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
  88. #endif
  89. #ifdef CONFIG_X86_64
  90. /* l3 pud for userspace vsyscall mapping */
  91. static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
  92. #endif /* CONFIG_X86_64 */
  93. /*
  94. * Note about cr3 (pagetable base) values:
  95. *
  96. * xen_cr3 contains the current logical cr3 value; it contains the
  97. * last set cr3. This may not be the current effective cr3, because
  98. * its update may be being lazily deferred. However, a vcpu looking
  99. * at its own cr3 can use this value knowing that it everything will
  100. * be self-consistent.
  101. *
  102. * xen_current_cr3 contains the actual vcpu cr3; it is set once the
  103. * hypercall to set the vcpu cr3 is complete (so it may be a little
  104. * out of date, but it will never be set early). If one vcpu is
  105. * looking at another vcpu's cr3 value, it should use this variable.
  106. */
  107. DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
  108. DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
  109. static phys_addr_t xen_pt_base, xen_pt_size __initdata;
  110. /*
  111. * Just beyond the highest usermode address. STACK_TOP_MAX has a
  112. * redzone above it, so round it up to a PGD boundary.
  113. */
  114. #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
  115. void make_lowmem_page_readonly(void *vaddr)
  116. {
  117. pte_t *pte, ptev;
  118. unsigned long address = (unsigned long)vaddr;
  119. unsigned int level;
  120. pte = lookup_address(address, &level);
  121. if (pte == NULL)
  122. return; /* vaddr missing */
  123. ptev = pte_wrprotect(*pte);
  124. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  125. BUG();
  126. }
  127. void make_lowmem_page_readwrite(void *vaddr)
  128. {
  129. pte_t *pte, ptev;
  130. unsigned long address = (unsigned long)vaddr;
  131. unsigned int level;
  132. pte = lookup_address(address, &level);
  133. if (pte == NULL)
  134. return; /* vaddr missing */
  135. ptev = pte_mkwrite(*pte);
  136. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  137. BUG();
  138. }
  139. static bool xen_page_pinned(void *ptr)
  140. {
  141. struct page *page = virt_to_page(ptr);
  142. return PagePinned(page);
  143. }
  144. static void xen_extend_mmu_update(const struct mmu_update *update)
  145. {
  146. struct multicall_space mcs;
  147. struct mmu_update *u;
  148. mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
  149. if (mcs.mc != NULL) {
  150. mcs.mc->args[1]++;
  151. } else {
  152. mcs = __xen_mc_entry(sizeof(*u));
  153. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  154. }
  155. u = mcs.args;
  156. *u = *update;
  157. }
  158. static void xen_extend_mmuext_op(const struct mmuext_op *op)
  159. {
  160. struct multicall_space mcs;
  161. struct mmuext_op *u;
  162. mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
  163. if (mcs.mc != NULL) {
  164. mcs.mc->args[1]++;
  165. } else {
  166. mcs = __xen_mc_entry(sizeof(*u));
  167. MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  168. }
  169. u = mcs.args;
  170. *u = *op;
  171. }
  172. static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
  173. {
  174. struct mmu_update u;
  175. preempt_disable();
  176. xen_mc_batch();
  177. /* ptr may be ioremapped for 64-bit pagetable setup */
  178. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  179. u.val = pmd_val_ma(val);
  180. xen_extend_mmu_update(&u);
  181. xen_mc_issue(PARAVIRT_LAZY_MMU);
  182. preempt_enable();
  183. }
  184. static void xen_set_pmd(pmd_t *ptr, pmd_t val)
  185. {
  186. trace_xen_mmu_set_pmd(ptr, val);
  187. /* If page is not pinned, we can just update the entry
  188. directly */
  189. if (!xen_page_pinned(ptr)) {
  190. *ptr = val;
  191. return;
  192. }
  193. xen_set_pmd_hyper(ptr, val);
  194. }
  195. /*
  196. * Associate a virtual page frame with a given physical page frame
  197. * and protection flags for that frame.
  198. */
  199. void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
  200. {
  201. set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
  202. }
  203. static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
  204. {
  205. struct mmu_update u;
  206. if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
  207. return false;
  208. xen_mc_batch();
  209. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  210. u.val = pte_val_ma(pteval);
  211. xen_extend_mmu_update(&u);
  212. xen_mc_issue(PARAVIRT_LAZY_MMU);
  213. return true;
  214. }
  215. static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
  216. {
  217. if (!xen_batched_set_pte(ptep, pteval)) {
  218. /*
  219. * Could call native_set_pte() here and trap and
  220. * emulate the PTE write but with 32-bit guests this
  221. * needs two traps (one for each of the two 32-bit
  222. * words in the PTE) so do one hypercall directly
  223. * instead.
  224. */
  225. struct mmu_update u;
  226. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  227. u.val = pte_val_ma(pteval);
  228. HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
  229. }
  230. }
  231. static void xen_set_pte(pte_t *ptep, pte_t pteval)
  232. {
  233. trace_xen_mmu_set_pte(ptep, pteval);
  234. __xen_set_pte(ptep, pteval);
  235. }
  236. static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
  237. pte_t *ptep, pte_t pteval)
  238. {
  239. trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
  240. __xen_set_pte(ptep, pteval);
  241. }
  242. pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
  243. unsigned long addr, pte_t *ptep)
  244. {
  245. /* Just return the pte as-is. We preserve the bits on commit */
  246. trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
  247. return *ptep;
  248. }
  249. void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
  250. pte_t *ptep, pte_t pte)
  251. {
  252. struct mmu_update u;
  253. trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
  254. xen_mc_batch();
  255. u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
  256. u.val = pte_val_ma(pte);
  257. xen_extend_mmu_update(&u);
  258. xen_mc_issue(PARAVIRT_LAZY_MMU);
  259. }
  260. /* Assume pteval_t is equivalent to all the other *val_t types. */
  261. static pteval_t pte_mfn_to_pfn(pteval_t val)
  262. {
  263. if (val & _PAGE_PRESENT) {
  264. unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
  265. unsigned long pfn = mfn_to_pfn(mfn);
  266. pteval_t flags = val & PTE_FLAGS_MASK;
  267. if (unlikely(pfn == ~0))
  268. val = flags & ~_PAGE_PRESENT;
  269. else
  270. val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
  271. }
  272. return val;
  273. }
  274. static pteval_t pte_pfn_to_mfn(pteval_t val)
  275. {
  276. if (val & _PAGE_PRESENT) {
  277. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  278. pteval_t flags = val & PTE_FLAGS_MASK;
  279. unsigned long mfn;
  280. mfn = __pfn_to_mfn(pfn);
  281. /*
  282. * If there's no mfn for the pfn, then just create an
  283. * empty non-present pte. Unfortunately this loses
  284. * information about the original pfn, so
  285. * pte_mfn_to_pfn is asymmetric.
  286. */
  287. if (unlikely(mfn == INVALID_P2M_ENTRY)) {
  288. mfn = 0;
  289. flags = 0;
  290. } else
  291. mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
  292. val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
  293. }
  294. return val;
  295. }
  296. __visible pteval_t xen_pte_val(pte_t pte)
  297. {
  298. pteval_t pteval = pte.pte;
  299. return pte_mfn_to_pfn(pteval);
  300. }
  301. PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
  302. __visible pgdval_t xen_pgd_val(pgd_t pgd)
  303. {
  304. return pte_mfn_to_pfn(pgd.pgd);
  305. }
  306. PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
  307. __visible pte_t xen_make_pte(pteval_t pte)
  308. {
  309. pte = pte_pfn_to_mfn(pte);
  310. return native_make_pte(pte);
  311. }
  312. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
  313. __visible pgd_t xen_make_pgd(pgdval_t pgd)
  314. {
  315. pgd = pte_pfn_to_mfn(pgd);
  316. return native_make_pgd(pgd);
  317. }
  318. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
  319. __visible pmdval_t xen_pmd_val(pmd_t pmd)
  320. {
  321. return pte_mfn_to_pfn(pmd.pmd);
  322. }
  323. PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
  324. static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
  325. {
  326. struct mmu_update u;
  327. preempt_disable();
  328. xen_mc_batch();
  329. /* ptr may be ioremapped for 64-bit pagetable setup */
  330. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  331. u.val = pud_val_ma(val);
  332. xen_extend_mmu_update(&u);
  333. xen_mc_issue(PARAVIRT_LAZY_MMU);
  334. preempt_enable();
  335. }
  336. static void xen_set_pud(pud_t *ptr, pud_t val)
  337. {
  338. trace_xen_mmu_set_pud(ptr, val);
  339. /* If page is not pinned, we can just update the entry
  340. directly */
  341. if (!xen_page_pinned(ptr)) {
  342. *ptr = val;
  343. return;
  344. }
  345. xen_set_pud_hyper(ptr, val);
  346. }
  347. #ifdef CONFIG_X86_PAE
  348. static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
  349. {
  350. trace_xen_mmu_set_pte_atomic(ptep, pte);
  351. set_64bit((u64 *)ptep, native_pte_val(pte));
  352. }
  353. static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  354. {
  355. trace_xen_mmu_pte_clear(mm, addr, ptep);
  356. if (!xen_batched_set_pte(ptep, native_make_pte(0)))
  357. native_pte_clear(mm, addr, ptep);
  358. }
  359. static void xen_pmd_clear(pmd_t *pmdp)
  360. {
  361. trace_xen_mmu_pmd_clear(pmdp);
  362. set_pmd(pmdp, __pmd(0));
  363. }
  364. #endif /* CONFIG_X86_PAE */
  365. __visible pmd_t xen_make_pmd(pmdval_t pmd)
  366. {
  367. pmd = pte_pfn_to_mfn(pmd);
  368. return native_make_pmd(pmd);
  369. }
  370. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
  371. #ifdef CONFIG_X86_64
  372. __visible pudval_t xen_pud_val(pud_t pud)
  373. {
  374. return pte_mfn_to_pfn(pud.pud);
  375. }
  376. PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
  377. __visible pud_t xen_make_pud(pudval_t pud)
  378. {
  379. pud = pte_pfn_to_mfn(pud);
  380. return native_make_pud(pud);
  381. }
  382. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
  383. static pgd_t *xen_get_user_pgd(pgd_t *pgd)
  384. {
  385. pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
  386. unsigned offset = pgd - pgd_page;
  387. pgd_t *user_ptr = NULL;
  388. if (offset < pgd_index(USER_LIMIT)) {
  389. struct page *page = virt_to_page(pgd_page);
  390. user_ptr = (pgd_t *)page->private;
  391. if (user_ptr)
  392. user_ptr += offset;
  393. }
  394. return user_ptr;
  395. }
  396. static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
  397. {
  398. struct mmu_update u;
  399. u.ptr = virt_to_machine(ptr).maddr;
  400. u.val = p4d_val_ma(val);
  401. xen_extend_mmu_update(&u);
  402. }
  403. /*
  404. * Raw hypercall-based set_p4d, intended for in early boot before
  405. * there's a page structure. This implies:
  406. * 1. The only existing pagetable is the kernel's
  407. * 2. It is always pinned
  408. * 3. It has no user pagetable attached to it
  409. */
  410. static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
  411. {
  412. preempt_disable();
  413. xen_mc_batch();
  414. __xen_set_p4d_hyper(ptr, val);
  415. xen_mc_issue(PARAVIRT_LAZY_MMU);
  416. preempt_enable();
  417. }
  418. static void xen_set_p4d(p4d_t *ptr, p4d_t val)
  419. {
  420. pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
  421. pgd_t pgd_val;
  422. trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
  423. /* If page is not pinned, we can just update the entry
  424. directly */
  425. if (!xen_page_pinned(ptr)) {
  426. *ptr = val;
  427. if (user_ptr) {
  428. WARN_ON(xen_page_pinned(user_ptr));
  429. pgd_val.pgd = p4d_val_ma(val);
  430. *user_ptr = pgd_val;
  431. }
  432. return;
  433. }
  434. /* If it's pinned, then we can at least batch the kernel and
  435. user updates together. */
  436. xen_mc_batch();
  437. __xen_set_p4d_hyper(ptr, val);
  438. if (user_ptr)
  439. __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
  440. xen_mc_issue(PARAVIRT_LAZY_MMU);
  441. }
  442. #endif /* CONFIG_X86_64 */
  443. static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
  444. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  445. bool last, unsigned long limit)
  446. {
  447. int i, nr, flush = 0;
  448. nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
  449. for (i = 0; i < nr; i++) {
  450. if (!pmd_none(pmd[i]))
  451. flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
  452. }
  453. return flush;
  454. }
  455. static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
  456. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  457. bool last, unsigned long limit)
  458. {
  459. int i, nr, flush = 0;
  460. nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
  461. for (i = 0; i < nr; i++) {
  462. pmd_t *pmd;
  463. if (pud_none(pud[i]))
  464. continue;
  465. pmd = pmd_offset(&pud[i], 0);
  466. if (PTRS_PER_PMD > 1)
  467. flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
  468. flush |= xen_pmd_walk(mm, pmd, func,
  469. last && i == nr - 1, limit);
  470. }
  471. return flush;
  472. }
  473. static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
  474. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  475. bool last, unsigned long limit)
  476. {
  477. int flush = 0;
  478. pud_t *pud;
  479. if (p4d_none(*p4d))
  480. return flush;
  481. pud = pud_offset(p4d, 0);
  482. if (PTRS_PER_PUD > 1)
  483. flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
  484. flush |= xen_pud_walk(mm, pud, func, last, limit);
  485. return flush;
  486. }
  487. /*
  488. * (Yet another) pagetable walker. This one is intended for pinning a
  489. * pagetable. This means that it walks a pagetable and calls the
  490. * callback function on each page it finds making up the page table,
  491. * at every level. It walks the entire pagetable, but it only bothers
  492. * pinning pte pages which are below limit. In the normal case this
  493. * will be STACK_TOP_MAX, but at boot we need to pin up to
  494. * FIXADDR_TOP.
  495. *
  496. * For 32-bit the important bit is that we don't pin beyond there,
  497. * because then we start getting into Xen's ptes.
  498. *
  499. * For 64-bit, we must skip the Xen hole in the middle of the address
  500. * space, just after the big x86-64 virtual hole.
  501. */
  502. static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
  503. int (*func)(struct mm_struct *mm, struct page *,
  504. enum pt_level),
  505. unsigned long limit)
  506. {
  507. int i, nr, flush = 0;
  508. unsigned hole_low, hole_high;
  509. /* The limit is the last byte to be touched */
  510. limit--;
  511. BUG_ON(limit >= FIXADDR_TOP);
  512. /*
  513. * 64-bit has a great big hole in the middle of the address
  514. * space, which contains the Xen mappings. On 32-bit these
  515. * will end up making a zero-sized hole and so is a no-op.
  516. */
  517. hole_low = pgd_index(USER_LIMIT);
  518. hole_high = pgd_index(PAGE_OFFSET);
  519. nr = pgd_index(limit) + 1;
  520. for (i = 0; i < nr; i++) {
  521. p4d_t *p4d;
  522. if (i >= hole_low && i < hole_high)
  523. continue;
  524. if (pgd_none(pgd[i]))
  525. continue;
  526. p4d = p4d_offset(&pgd[i], 0);
  527. flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
  528. }
  529. /* Do the top level last, so that the callbacks can use it as
  530. a cue to do final things like tlb flushes. */
  531. flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
  532. return flush;
  533. }
  534. static int xen_pgd_walk(struct mm_struct *mm,
  535. int (*func)(struct mm_struct *mm, struct page *,
  536. enum pt_level),
  537. unsigned long limit)
  538. {
  539. return __xen_pgd_walk(mm, mm->pgd, func, limit);
  540. }
  541. /* If we're using split pte locks, then take the page's lock and
  542. return a pointer to it. Otherwise return NULL. */
  543. static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
  544. {
  545. spinlock_t *ptl = NULL;
  546. #if USE_SPLIT_PTE_PTLOCKS
  547. ptl = ptlock_ptr(page);
  548. spin_lock_nest_lock(ptl, &mm->page_table_lock);
  549. #endif
  550. return ptl;
  551. }
  552. static void xen_pte_unlock(void *v)
  553. {
  554. spinlock_t *ptl = v;
  555. spin_unlock(ptl);
  556. }
  557. static void xen_do_pin(unsigned level, unsigned long pfn)
  558. {
  559. struct mmuext_op op;
  560. op.cmd = level;
  561. op.arg1.mfn = pfn_to_mfn(pfn);
  562. xen_extend_mmuext_op(&op);
  563. }
  564. static int xen_pin_page(struct mm_struct *mm, struct page *page,
  565. enum pt_level level)
  566. {
  567. unsigned pgfl = TestSetPagePinned(page);
  568. int flush;
  569. if (pgfl)
  570. flush = 0; /* already pinned */
  571. else if (PageHighMem(page))
  572. /* kmaps need flushing if we found an unpinned
  573. highpage */
  574. flush = 1;
  575. else {
  576. void *pt = lowmem_page_address(page);
  577. unsigned long pfn = page_to_pfn(page);
  578. struct multicall_space mcs = __xen_mc_entry(0);
  579. spinlock_t *ptl;
  580. flush = 0;
  581. /*
  582. * We need to hold the pagetable lock between the time
  583. * we make the pagetable RO and when we actually pin
  584. * it. If we don't, then other users may come in and
  585. * attempt to update the pagetable by writing it,
  586. * which will fail because the memory is RO but not
  587. * pinned, so Xen won't do the trap'n'emulate.
  588. *
  589. * If we're using split pte locks, we can't hold the
  590. * entire pagetable's worth of locks during the
  591. * traverse, because we may wrap the preempt count (8
  592. * bits). The solution is to mark RO and pin each PTE
  593. * page while holding the lock. This means the number
  594. * of locks we end up holding is never more than a
  595. * batch size (~32 entries, at present).
  596. *
  597. * If we're not using split pte locks, we needn't pin
  598. * the PTE pages independently, because we're
  599. * protected by the overall pagetable lock.
  600. */
  601. ptl = NULL;
  602. if (level == PT_PTE)
  603. ptl = xen_pte_lock(page, mm);
  604. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  605. pfn_pte(pfn, PAGE_KERNEL_RO),
  606. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  607. if (ptl) {
  608. xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
  609. /* Queue a deferred unlock for when this batch
  610. is completed. */
  611. xen_mc_callback(xen_pte_unlock, ptl);
  612. }
  613. }
  614. return flush;
  615. }
  616. /* This is called just after a mm has been created, but it has not
  617. been used yet. We need to make sure that its pagetable is all
  618. read-only, and can be pinned. */
  619. static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
  620. {
  621. trace_xen_mmu_pgd_pin(mm, pgd);
  622. xen_mc_batch();
  623. if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
  624. /* re-enable interrupts for flushing */
  625. xen_mc_issue(0);
  626. kmap_flush_unused();
  627. xen_mc_batch();
  628. }
  629. #ifdef CONFIG_X86_64
  630. {
  631. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  632. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
  633. if (user_pgd) {
  634. xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
  635. xen_do_pin(MMUEXT_PIN_L4_TABLE,
  636. PFN_DOWN(__pa(user_pgd)));
  637. }
  638. }
  639. #else /* CONFIG_X86_32 */
  640. #ifdef CONFIG_X86_PAE
  641. /* Need to make sure unshared kernel PMD is pinnable */
  642. xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  643. PT_PMD);
  644. #endif
  645. xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
  646. #endif /* CONFIG_X86_64 */
  647. xen_mc_issue(0);
  648. }
  649. static void xen_pgd_pin(struct mm_struct *mm)
  650. {
  651. __xen_pgd_pin(mm, mm->pgd);
  652. }
  653. /*
  654. * On save, we need to pin all pagetables to make sure they get their
  655. * mfns turned into pfns. Search the list for any unpinned pgds and pin
  656. * them (unpinned pgds are not currently in use, probably because the
  657. * process is under construction or destruction).
  658. *
  659. * Expected to be called in stop_machine() ("equivalent to taking
  660. * every spinlock in the system"), so the locking doesn't really
  661. * matter all that much.
  662. */
  663. void xen_mm_pin_all(void)
  664. {
  665. struct page *page;
  666. spin_lock(&pgd_lock);
  667. list_for_each_entry(page, &pgd_list, lru) {
  668. if (!PagePinned(page)) {
  669. __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
  670. SetPageSavePinned(page);
  671. }
  672. }
  673. spin_unlock(&pgd_lock);
  674. }
  675. /*
  676. * The init_mm pagetable is really pinned as soon as its created, but
  677. * that's before we have page structures to store the bits. So do all
  678. * the book-keeping now.
  679. */
  680. static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
  681. enum pt_level level)
  682. {
  683. SetPagePinned(page);
  684. return 0;
  685. }
  686. static void __init xen_mark_init_mm_pinned(void)
  687. {
  688. xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
  689. }
  690. static int xen_unpin_page(struct mm_struct *mm, struct page *page,
  691. enum pt_level level)
  692. {
  693. unsigned pgfl = TestClearPagePinned(page);
  694. if (pgfl && !PageHighMem(page)) {
  695. void *pt = lowmem_page_address(page);
  696. unsigned long pfn = page_to_pfn(page);
  697. spinlock_t *ptl = NULL;
  698. struct multicall_space mcs;
  699. /*
  700. * Do the converse to pin_page. If we're using split
  701. * pte locks, we must be holding the lock for while
  702. * the pte page is unpinned but still RO to prevent
  703. * concurrent updates from seeing it in this
  704. * partially-pinned state.
  705. */
  706. if (level == PT_PTE) {
  707. ptl = xen_pte_lock(page, mm);
  708. if (ptl)
  709. xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
  710. }
  711. mcs = __xen_mc_entry(0);
  712. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  713. pfn_pte(pfn, PAGE_KERNEL),
  714. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  715. if (ptl) {
  716. /* unlock when batch completed */
  717. xen_mc_callback(xen_pte_unlock, ptl);
  718. }
  719. }
  720. return 0; /* never need to flush on unpin */
  721. }
  722. /* Release a pagetables pages back as normal RW */
  723. static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
  724. {
  725. trace_xen_mmu_pgd_unpin(mm, pgd);
  726. xen_mc_batch();
  727. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  728. #ifdef CONFIG_X86_64
  729. {
  730. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  731. if (user_pgd) {
  732. xen_do_pin(MMUEXT_UNPIN_TABLE,
  733. PFN_DOWN(__pa(user_pgd)));
  734. xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
  735. }
  736. }
  737. #endif
  738. #ifdef CONFIG_X86_PAE
  739. /* Need to make sure unshared kernel PMD is unpinned */
  740. xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  741. PT_PMD);
  742. #endif
  743. __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
  744. xen_mc_issue(0);
  745. }
  746. static void xen_pgd_unpin(struct mm_struct *mm)
  747. {
  748. __xen_pgd_unpin(mm, mm->pgd);
  749. }
  750. /*
  751. * On resume, undo any pinning done at save, so that the rest of the
  752. * kernel doesn't see any unexpected pinned pagetables.
  753. */
  754. void xen_mm_unpin_all(void)
  755. {
  756. struct page *page;
  757. spin_lock(&pgd_lock);
  758. list_for_each_entry(page, &pgd_list, lru) {
  759. if (PageSavePinned(page)) {
  760. BUG_ON(!PagePinned(page));
  761. __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
  762. ClearPageSavePinned(page);
  763. }
  764. }
  765. spin_unlock(&pgd_lock);
  766. }
  767. static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
  768. {
  769. spin_lock(&next->page_table_lock);
  770. xen_pgd_pin(next);
  771. spin_unlock(&next->page_table_lock);
  772. }
  773. static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
  774. {
  775. spin_lock(&mm->page_table_lock);
  776. xen_pgd_pin(mm);
  777. spin_unlock(&mm->page_table_lock);
  778. }
  779. static void drop_mm_ref_this_cpu(void *info)
  780. {
  781. struct mm_struct *mm = info;
  782. if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
  783. leave_mm(smp_processor_id());
  784. /*
  785. * If this cpu still has a stale cr3 reference, then make sure
  786. * it has been flushed.
  787. */
  788. if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
  789. xen_mc_flush();
  790. }
  791. #ifdef CONFIG_SMP
  792. /*
  793. * Another cpu may still have their %cr3 pointing at the pagetable, so
  794. * we need to repoint it somewhere else before we can unpin it.
  795. */
  796. static void xen_drop_mm_ref(struct mm_struct *mm)
  797. {
  798. cpumask_var_t mask;
  799. unsigned cpu;
  800. drop_mm_ref_this_cpu(mm);
  801. /* Get the "official" set of cpus referring to our pagetable. */
  802. if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
  803. for_each_online_cpu(cpu) {
  804. if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
  805. continue;
  806. smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
  807. }
  808. return;
  809. }
  810. /*
  811. * It's possible that a vcpu may have a stale reference to our
  812. * cr3, because its in lazy mode, and it hasn't yet flushed
  813. * its set of pending hypercalls yet. In this case, we can
  814. * look at its actual current cr3 value, and force it to flush
  815. * if needed.
  816. */
  817. cpumask_clear(mask);
  818. for_each_online_cpu(cpu) {
  819. if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
  820. cpumask_set_cpu(cpu, mask);
  821. }
  822. smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
  823. free_cpumask_var(mask);
  824. }
  825. #else
  826. static void xen_drop_mm_ref(struct mm_struct *mm)
  827. {
  828. drop_mm_ref_this_cpu(mm);
  829. }
  830. #endif
  831. /*
  832. * While a process runs, Xen pins its pagetables, which means that the
  833. * hypervisor forces it to be read-only, and it controls all updates
  834. * to it. This means that all pagetable updates have to go via the
  835. * hypervisor, which is moderately expensive.
  836. *
  837. * Since we're pulling the pagetable down, we switch to use init_mm,
  838. * unpin old process pagetable and mark it all read-write, which
  839. * allows further operations on it to be simple memory accesses.
  840. *
  841. * The only subtle point is that another CPU may be still using the
  842. * pagetable because of lazy tlb flushing. This means we need need to
  843. * switch all CPUs off this pagetable before we can unpin it.
  844. */
  845. static void xen_exit_mmap(struct mm_struct *mm)
  846. {
  847. get_cpu(); /* make sure we don't move around */
  848. xen_drop_mm_ref(mm);
  849. put_cpu();
  850. spin_lock(&mm->page_table_lock);
  851. /* pgd may not be pinned in the error exit path of execve */
  852. if (xen_page_pinned(mm->pgd))
  853. xen_pgd_unpin(mm);
  854. spin_unlock(&mm->page_table_lock);
  855. }
  856. static void xen_post_allocator_init(void);
  857. static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  858. {
  859. struct mmuext_op op;
  860. op.cmd = cmd;
  861. op.arg1.mfn = pfn_to_mfn(pfn);
  862. if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
  863. BUG();
  864. }
  865. #ifdef CONFIG_X86_64
  866. static void __init xen_cleanhighmap(unsigned long vaddr,
  867. unsigned long vaddr_end)
  868. {
  869. unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  870. pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
  871. /* NOTE: The loop is more greedy than the cleanup_highmap variant.
  872. * We include the PMD passed in on _both_ boundaries. */
  873. for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
  874. pmd++, vaddr += PMD_SIZE) {
  875. if (pmd_none(*pmd))
  876. continue;
  877. if (vaddr < (unsigned long) _text || vaddr > kernel_end)
  878. set_pmd(pmd, __pmd(0));
  879. }
  880. /* In case we did something silly, we should crash in this function
  881. * instead of somewhere later and be confusing. */
  882. xen_mc_flush();
  883. }
  884. /*
  885. * Make a page range writeable and free it.
  886. */
  887. static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
  888. {
  889. void *vaddr = __va(paddr);
  890. void *vaddr_end = vaddr + size;
  891. for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
  892. make_lowmem_page_readwrite(vaddr);
  893. memblock_free(paddr, size);
  894. }
  895. static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
  896. {
  897. unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
  898. if (unpin)
  899. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
  900. ClearPagePinned(virt_to_page(__va(pa)));
  901. xen_free_ro_pages(pa, PAGE_SIZE);
  902. }
  903. static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
  904. {
  905. unsigned long pa;
  906. pte_t *pte_tbl;
  907. int i;
  908. if (pmd_large(*pmd)) {
  909. pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
  910. xen_free_ro_pages(pa, PMD_SIZE);
  911. return;
  912. }
  913. pte_tbl = pte_offset_kernel(pmd, 0);
  914. for (i = 0; i < PTRS_PER_PTE; i++) {
  915. if (pte_none(pte_tbl[i]))
  916. continue;
  917. pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
  918. xen_free_ro_pages(pa, PAGE_SIZE);
  919. }
  920. set_pmd(pmd, __pmd(0));
  921. xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
  922. }
  923. static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
  924. {
  925. unsigned long pa;
  926. pmd_t *pmd_tbl;
  927. int i;
  928. if (pud_large(*pud)) {
  929. pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
  930. xen_free_ro_pages(pa, PUD_SIZE);
  931. return;
  932. }
  933. pmd_tbl = pmd_offset(pud, 0);
  934. for (i = 0; i < PTRS_PER_PMD; i++) {
  935. if (pmd_none(pmd_tbl[i]))
  936. continue;
  937. xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
  938. }
  939. set_pud(pud, __pud(0));
  940. xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
  941. }
  942. static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
  943. {
  944. unsigned long pa;
  945. pud_t *pud_tbl;
  946. int i;
  947. if (p4d_large(*p4d)) {
  948. pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
  949. xen_free_ro_pages(pa, P4D_SIZE);
  950. return;
  951. }
  952. pud_tbl = pud_offset(p4d, 0);
  953. for (i = 0; i < PTRS_PER_PUD; i++) {
  954. if (pud_none(pud_tbl[i]))
  955. continue;
  956. xen_cleanmfnmap_pud(pud_tbl + i, unpin);
  957. }
  958. set_p4d(p4d, __p4d(0));
  959. xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
  960. }
  961. /*
  962. * Since it is well isolated we can (and since it is perhaps large we should)
  963. * also free the page tables mapping the initial P->M table.
  964. */
  965. static void __init xen_cleanmfnmap(unsigned long vaddr)
  966. {
  967. pgd_t *pgd;
  968. p4d_t *p4d;
  969. bool unpin;
  970. unpin = (vaddr == 2 * PGDIR_SIZE);
  971. vaddr &= PMD_MASK;
  972. pgd = pgd_offset_k(vaddr);
  973. p4d = p4d_offset(pgd, 0);
  974. if (!p4d_none(*p4d))
  975. xen_cleanmfnmap_p4d(p4d, unpin);
  976. }
  977. static void __init xen_pagetable_p2m_free(void)
  978. {
  979. unsigned long size;
  980. unsigned long addr;
  981. size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
  982. /* No memory or already called. */
  983. if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
  984. return;
  985. /* using __ka address and sticking INVALID_P2M_ENTRY! */
  986. memset((void *)xen_start_info->mfn_list, 0xff, size);
  987. addr = xen_start_info->mfn_list;
  988. /*
  989. * We could be in __ka space.
  990. * We roundup to the PMD, which means that if anybody at this stage is
  991. * using the __ka address of xen_start_info or
  992. * xen_start_info->shared_info they are in going to crash. Fortunatly
  993. * we have already revectored in xen_setup_kernel_pagetable and in
  994. * xen_setup_shared_info.
  995. */
  996. size = roundup(size, PMD_SIZE);
  997. if (addr >= __START_KERNEL_map) {
  998. xen_cleanhighmap(addr, addr + size);
  999. size = PAGE_ALIGN(xen_start_info->nr_pages *
  1000. sizeof(unsigned long));
  1001. memblock_free(__pa(addr), size);
  1002. } else {
  1003. xen_cleanmfnmap(addr);
  1004. }
  1005. }
  1006. static void __init xen_pagetable_cleanhighmap(void)
  1007. {
  1008. unsigned long size;
  1009. unsigned long addr;
  1010. /* At this stage, cleanup_highmap has already cleaned __ka space
  1011. * from _brk_limit way up to the max_pfn_mapped (which is the end of
  1012. * the ramdisk). We continue on, erasing PMD entries that point to page
  1013. * tables - do note that they are accessible at this stage via __va.
  1014. * As Xen is aligning the memory end to a 4MB boundary, for good
  1015. * measure we also round up to PMD_SIZE * 2 - which means that if
  1016. * anybody is using __ka address to the initial boot-stack - and try
  1017. * to use it - they are going to crash. The xen_start_info has been
  1018. * taken care of already in xen_setup_kernel_pagetable. */
  1019. addr = xen_start_info->pt_base;
  1020. size = xen_start_info->nr_pt_frames * PAGE_SIZE;
  1021. xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
  1022. xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
  1023. }
  1024. #endif
  1025. static void __init xen_pagetable_p2m_setup(void)
  1026. {
  1027. xen_vmalloc_p2m_tree();
  1028. #ifdef CONFIG_X86_64
  1029. xen_pagetable_p2m_free();
  1030. xen_pagetable_cleanhighmap();
  1031. #endif
  1032. /* And revector! Bye bye old array */
  1033. xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
  1034. }
  1035. static void __init xen_pagetable_init(void)
  1036. {
  1037. paging_init();
  1038. xen_post_allocator_init();
  1039. xen_pagetable_p2m_setup();
  1040. /* Allocate and initialize top and mid mfn levels for p2m structure */
  1041. xen_build_mfn_list_list();
  1042. /* Remap memory freed due to conflicts with E820 map */
  1043. xen_remap_memory();
  1044. xen_setup_shared_info();
  1045. }
  1046. static void xen_write_cr2(unsigned long cr2)
  1047. {
  1048. this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
  1049. }
  1050. static unsigned long xen_read_cr2(void)
  1051. {
  1052. return this_cpu_read(xen_vcpu)->arch.cr2;
  1053. }
  1054. unsigned long xen_read_cr2_direct(void)
  1055. {
  1056. return this_cpu_read(xen_vcpu_info.arch.cr2);
  1057. }
  1058. static void xen_flush_tlb(void)
  1059. {
  1060. struct mmuext_op *op;
  1061. struct multicall_space mcs;
  1062. trace_xen_mmu_flush_tlb(0);
  1063. preempt_disable();
  1064. mcs = xen_mc_entry(sizeof(*op));
  1065. op = mcs.args;
  1066. op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
  1067. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1068. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1069. preempt_enable();
  1070. }
  1071. static void xen_flush_tlb_one_user(unsigned long addr)
  1072. {
  1073. struct mmuext_op *op;
  1074. struct multicall_space mcs;
  1075. trace_xen_mmu_flush_tlb_one_user(addr);
  1076. preempt_disable();
  1077. mcs = xen_mc_entry(sizeof(*op));
  1078. op = mcs.args;
  1079. op->cmd = MMUEXT_INVLPG_LOCAL;
  1080. op->arg1.linear_addr = addr & PAGE_MASK;
  1081. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1082. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1083. preempt_enable();
  1084. }
  1085. static void xen_flush_tlb_others(const struct cpumask *cpus,
  1086. const struct flush_tlb_info *info)
  1087. {
  1088. struct {
  1089. struct mmuext_op op;
  1090. DECLARE_BITMAP(mask, NR_CPUS);
  1091. } *args;
  1092. struct multicall_space mcs;
  1093. const size_t mc_entry_size = sizeof(args->op) +
  1094. sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
  1095. trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
  1096. if (cpumask_empty(cpus))
  1097. return; /* nothing to do */
  1098. mcs = xen_mc_entry(mc_entry_size);
  1099. args = mcs.args;
  1100. args->op.arg2.vcpumask = to_cpumask(args->mask);
  1101. /* Remove us, and any offline CPUS. */
  1102. cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
  1103. cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
  1104. args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
  1105. if (info->end != TLB_FLUSH_ALL &&
  1106. (info->end - info->start) <= PAGE_SIZE) {
  1107. args->op.cmd = MMUEXT_INVLPG_MULTI;
  1108. args->op.arg1.linear_addr = info->start;
  1109. }
  1110. MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
  1111. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1112. }
  1113. static unsigned long xen_read_cr3(void)
  1114. {
  1115. return this_cpu_read(xen_cr3);
  1116. }
  1117. static void set_current_cr3(void *v)
  1118. {
  1119. this_cpu_write(xen_current_cr3, (unsigned long)v);
  1120. }
  1121. static void __xen_write_cr3(bool kernel, unsigned long cr3)
  1122. {
  1123. struct mmuext_op op;
  1124. unsigned long mfn;
  1125. trace_xen_mmu_write_cr3(kernel, cr3);
  1126. if (cr3)
  1127. mfn = pfn_to_mfn(PFN_DOWN(cr3));
  1128. else
  1129. mfn = 0;
  1130. WARN_ON(mfn == 0 && kernel);
  1131. op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
  1132. op.arg1.mfn = mfn;
  1133. xen_extend_mmuext_op(&op);
  1134. if (kernel) {
  1135. this_cpu_write(xen_cr3, cr3);
  1136. /* Update xen_current_cr3 once the batch has actually
  1137. been submitted. */
  1138. xen_mc_callback(set_current_cr3, (void *)cr3);
  1139. }
  1140. }
  1141. static void xen_write_cr3(unsigned long cr3)
  1142. {
  1143. BUG_ON(preemptible());
  1144. xen_mc_batch(); /* disables interrupts */
  1145. /* Update while interrupts are disabled, so its atomic with
  1146. respect to ipis */
  1147. this_cpu_write(xen_cr3, cr3);
  1148. __xen_write_cr3(true, cr3);
  1149. #ifdef CONFIG_X86_64
  1150. {
  1151. pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
  1152. if (user_pgd)
  1153. __xen_write_cr3(false, __pa(user_pgd));
  1154. else
  1155. __xen_write_cr3(false, 0);
  1156. }
  1157. #endif
  1158. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1159. }
  1160. #ifdef CONFIG_X86_64
  1161. /*
  1162. * At the start of the day - when Xen launches a guest, it has already
  1163. * built pagetables for the guest. We diligently look over them
  1164. * in xen_setup_kernel_pagetable and graft as appropriate them in the
  1165. * init_top_pgt and its friends. Then when we are happy we load
  1166. * the new init_top_pgt - and continue on.
  1167. *
  1168. * The generic code starts (start_kernel) and 'init_mem_mapping' sets
  1169. * up the rest of the pagetables. When it has completed it loads the cr3.
  1170. * N.B. that baremetal would start at 'start_kernel' (and the early
  1171. * #PF handler would create bootstrap pagetables) - so we are running
  1172. * with the same assumptions as what to do when write_cr3 is executed
  1173. * at this point.
  1174. *
  1175. * Since there are no user-page tables at all, we have two variants
  1176. * of xen_write_cr3 - the early bootup (this one), and the late one
  1177. * (xen_write_cr3). The reason we have to do that is that in 64-bit
  1178. * the Linux kernel and user-space are both in ring 3 while the
  1179. * hypervisor is in ring 0.
  1180. */
  1181. static void __init xen_write_cr3_init(unsigned long cr3)
  1182. {
  1183. BUG_ON(preemptible());
  1184. xen_mc_batch(); /* disables interrupts */
  1185. /* Update while interrupts are disabled, so its atomic with
  1186. respect to ipis */
  1187. this_cpu_write(xen_cr3, cr3);
  1188. __xen_write_cr3(true, cr3);
  1189. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1190. }
  1191. #endif
  1192. static int xen_pgd_alloc(struct mm_struct *mm)
  1193. {
  1194. pgd_t *pgd = mm->pgd;
  1195. int ret = 0;
  1196. BUG_ON(PagePinned(virt_to_page(pgd)));
  1197. #ifdef CONFIG_X86_64
  1198. {
  1199. struct page *page = virt_to_page(pgd);
  1200. pgd_t *user_pgd;
  1201. BUG_ON(page->private != 0);
  1202. ret = -ENOMEM;
  1203. user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
  1204. page->private = (unsigned long)user_pgd;
  1205. if (user_pgd != NULL) {
  1206. #ifdef CONFIG_X86_VSYSCALL_EMULATION
  1207. user_pgd[pgd_index(VSYSCALL_ADDR)] =
  1208. __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
  1209. #endif
  1210. ret = 0;
  1211. }
  1212. BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
  1213. }
  1214. #endif
  1215. return ret;
  1216. }
  1217. static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
  1218. {
  1219. #ifdef CONFIG_X86_64
  1220. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  1221. if (user_pgd)
  1222. free_page((unsigned long)user_pgd);
  1223. #endif
  1224. }
  1225. /*
  1226. * Init-time set_pte while constructing initial pagetables, which
  1227. * doesn't allow RO page table pages to be remapped RW.
  1228. *
  1229. * If there is no MFN for this PFN then this page is initially
  1230. * ballooned out so clear the PTE (as in decrease_reservation() in
  1231. * drivers/xen/balloon.c).
  1232. *
  1233. * Many of these PTE updates are done on unpinned and writable pages
  1234. * and doing a hypercall for these is unnecessary and expensive. At
  1235. * this point it is not possible to tell if a page is pinned or not,
  1236. * so always write the PTE directly and rely on Xen trapping and
  1237. * emulating any updates as necessary.
  1238. */
  1239. __visible pte_t xen_make_pte_init(pteval_t pte)
  1240. {
  1241. #ifdef CONFIG_X86_64
  1242. unsigned long pfn;
  1243. /*
  1244. * Pages belonging to the initial p2m list mapped outside the default
  1245. * address range must be mapped read-only. This region contains the
  1246. * page tables for mapping the p2m list, too, and page tables MUST be
  1247. * mapped read-only.
  1248. */
  1249. pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
  1250. if (xen_start_info->mfn_list < __START_KERNEL_map &&
  1251. pfn >= xen_start_info->first_p2m_pfn &&
  1252. pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
  1253. pte &= ~_PAGE_RW;
  1254. #endif
  1255. pte = pte_pfn_to_mfn(pte);
  1256. return native_make_pte(pte);
  1257. }
  1258. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
  1259. static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
  1260. {
  1261. #ifdef CONFIG_X86_32
  1262. /* If there's an existing pte, then don't allow _PAGE_RW to be set */
  1263. if (pte_mfn(pte) != INVALID_P2M_ENTRY
  1264. && pte_val_ma(*ptep) & _PAGE_PRESENT)
  1265. pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
  1266. pte_val_ma(pte));
  1267. #endif
  1268. native_set_pte(ptep, pte);
  1269. }
  1270. /* Early in boot, while setting up the initial pagetable, assume
  1271. everything is pinned. */
  1272. static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
  1273. {
  1274. #ifdef CONFIG_FLATMEM
  1275. BUG_ON(mem_map); /* should only be used early */
  1276. #endif
  1277. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1278. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1279. }
  1280. /* Used for pmd and pud */
  1281. static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
  1282. {
  1283. #ifdef CONFIG_FLATMEM
  1284. BUG_ON(mem_map); /* should only be used early */
  1285. #endif
  1286. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1287. }
  1288. /* Early release_pte assumes that all pts are pinned, since there's
  1289. only init_mm and anything attached to that is pinned. */
  1290. static void __init xen_release_pte_init(unsigned long pfn)
  1291. {
  1292. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1293. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1294. }
  1295. static void __init xen_release_pmd_init(unsigned long pfn)
  1296. {
  1297. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1298. }
  1299. static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  1300. {
  1301. struct multicall_space mcs;
  1302. struct mmuext_op *op;
  1303. mcs = __xen_mc_entry(sizeof(*op));
  1304. op = mcs.args;
  1305. op->cmd = cmd;
  1306. op->arg1.mfn = pfn_to_mfn(pfn);
  1307. MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  1308. }
  1309. static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
  1310. {
  1311. struct multicall_space mcs;
  1312. unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
  1313. mcs = __xen_mc_entry(0);
  1314. MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
  1315. pfn_pte(pfn, prot), 0);
  1316. }
  1317. /* This needs to make sure the new pte page is pinned iff its being
  1318. attached to a pinned pagetable. */
  1319. static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
  1320. unsigned level)
  1321. {
  1322. bool pinned = PagePinned(virt_to_page(mm->pgd));
  1323. trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
  1324. if (pinned) {
  1325. struct page *page = pfn_to_page(pfn);
  1326. SetPagePinned(page);
  1327. if (!PageHighMem(page)) {
  1328. xen_mc_batch();
  1329. __set_pfn_prot(pfn, PAGE_KERNEL_RO);
  1330. if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
  1331. __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1332. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1333. } else {
  1334. /* make sure there are no stray mappings of
  1335. this page */
  1336. kmap_flush_unused();
  1337. }
  1338. }
  1339. }
  1340. static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
  1341. {
  1342. xen_alloc_ptpage(mm, pfn, PT_PTE);
  1343. }
  1344. static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
  1345. {
  1346. xen_alloc_ptpage(mm, pfn, PT_PMD);
  1347. }
  1348. /* This should never happen until we're OK to use struct page */
  1349. static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
  1350. {
  1351. struct page *page = pfn_to_page(pfn);
  1352. bool pinned = PagePinned(page);
  1353. trace_xen_mmu_release_ptpage(pfn, level, pinned);
  1354. if (pinned) {
  1355. if (!PageHighMem(page)) {
  1356. xen_mc_batch();
  1357. if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
  1358. __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1359. __set_pfn_prot(pfn, PAGE_KERNEL);
  1360. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1361. }
  1362. ClearPagePinned(page);
  1363. }
  1364. }
  1365. static void xen_release_pte(unsigned long pfn)
  1366. {
  1367. xen_release_ptpage(pfn, PT_PTE);
  1368. }
  1369. static void xen_release_pmd(unsigned long pfn)
  1370. {
  1371. xen_release_ptpage(pfn, PT_PMD);
  1372. }
  1373. #ifdef CONFIG_X86_64
  1374. static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
  1375. {
  1376. xen_alloc_ptpage(mm, pfn, PT_PUD);
  1377. }
  1378. static void xen_release_pud(unsigned long pfn)
  1379. {
  1380. xen_release_ptpage(pfn, PT_PUD);
  1381. }
  1382. #endif
  1383. void __init xen_reserve_top(void)
  1384. {
  1385. #ifdef CONFIG_X86_32
  1386. unsigned long top = HYPERVISOR_VIRT_START;
  1387. struct xen_platform_parameters pp;
  1388. if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
  1389. top = pp.virt_start;
  1390. reserve_top_address(-top);
  1391. #endif /* CONFIG_X86_32 */
  1392. }
  1393. /*
  1394. * Like __va(), but returns address in the kernel mapping (which is
  1395. * all we have until the physical memory mapping has been set up.
  1396. */
  1397. static void * __init __ka(phys_addr_t paddr)
  1398. {
  1399. #ifdef CONFIG_X86_64
  1400. return (void *)(paddr + __START_KERNEL_map);
  1401. #else
  1402. return __va(paddr);
  1403. #endif
  1404. }
  1405. /* Convert a machine address to physical address */
  1406. static unsigned long __init m2p(phys_addr_t maddr)
  1407. {
  1408. phys_addr_t paddr;
  1409. maddr &= XEN_PTE_MFN_MASK;
  1410. paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
  1411. return paddr;
  1412. }
  1413. /* Convert a machine address to kernel virtual */
  1414. static void * __init m2v(phys_addr_t maddr)
  1415. {
  1416. return __ka(m2p(maddr));
  1417. }
  1418. /* Set the page permissions on an identity-mapped pages */
  1419. static void __init set_page_prot_flags(void *addr, pgprot_t prot,
  1420. unsigned long flags)
  1421. {
  1422. unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
  1423. pte_t pte = pfn_pte(pfn, prot);
  1424. if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
  1425. BUG();
  1426. }
  1427. static void __init set_page_prot(void *addr, pgprot_t prot)
  1428. {
  1429. return set_page_prot_flags(addr, prot, UVMF_NONE);
  1430. }
  1431. #ifdef CONFIG_X86_32
  1432. static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
  1433. {
  1434. unsigned pmdidx, pteidx;
  1435. unsigned ident_pte;
  1436. unsigned long pfn;
  1437. level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
  1438. PAGE_SIZE);
  1439. ident_pte = 0;
  1440. pfn = 0;
  1441. for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
  1442. pte_t *pte_page;
  1443. /* Reuse or allocate a page of ptes */
  1444. if (pmd_present(pmd[pmdidx]))
  1445. pte_page = m2v(pmd[pmdidx].pmd);
  1446. else {
  1447. /* Check for free pte pages */
  1448. if (ident_pte == LEVEL1_IDENT_ENTRIES)
  1449. break;
  1450. pte_page = &level1_ident_pgt[ident_pte];
  1451. ident_pte += PTRS_PER_PTE;
  1452. pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
  1453. }
  1454. /* Install mappings */
  1455. for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
  1456. pte_t pte;
  1457. if (pfn > max_pfn_mapped)
  1458. max_pfn_mapped = pfn;
  1459. if (!pte_none(pte_page[pteidx]))
  1460. continue;
  1461. pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
  1462. pte_page[pteidx] = pte;
  1463. }
  1464. }
  1465. for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
  1466. set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
  1467. set_page_prot(pmd, PAGE_KERNEL_RO);
  1468. }
  1469. #endif
  1470. void __init xen_setup_machphys_mapping(void)
  1471. {
  1472. struct xen_machphys_mapping mapping;
  1473. if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
  1474. machine_to_phys_mapping = (unsigned long *)mapping.v_start;
  1475. machine_to_phys_nr = mapping.max_mfn + 1;
  1476. } else {
  1477. machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
  1478. }
  1479. #ifdef CONFIG_X86_32
  1480. WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
  1481. < machine_to_phys_mapping);
  1482. #endif
  1483. }
  1484. #ifdef CONFIG_X86_64
  1485. static void __init convert_pfn_mfn(void *v)
  1486. {
  1487. pte_t *pte = v;
  1488. int i;
  1489. /* All levels are converted the same way, so just treat them
  1490. as ptes. */
  1491. for (i = 0; i < PTRS_PER_PTE; i++)
  1492. pte[i] = xen_make_pte(pte[i].pte);
  1493. }
  1494. static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
  1495. unsigned long addr)
  1496. {
  1497. if (*pt_base == PFN_DOWN(__pa(addr))) {
  1498. set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
  1499. clear_page((void *)addr);
  1500. (*pt_base)++;
  1501. }
  1502. if (*pt_end == PFN_DOWN(__pa(addr))) {
  1503. set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
  1504. clear_page((void *)addr);
  1505. (*pt_end)--;
  1506. }
  1507. }
  1508. /*
  1509. * Set up the initial kernel pagetable.
  1510. *
  1511. * We can construct this by grafting the Xen provided pagetable into
  1512. * head_64.S's preconstructed pagetables. We copy the Xen L2's into
  1513. * level2_ident_pgt, and level2_kernel_pgt. This means that only the
  1514. * kernel has a physical mapping to start with - but that's enough to
  1515. * get __va working. We need to fill in the rest of the physical
  1516. * mapping once some sort of allocator has been set up.
  1517. */
  1518. void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
  1519. {
  1520. pud_t *l3;
  1521. pmd_t *l2;
  1522. unsigned long addr[3];
  1523. unsigned long pt_base, pt_end;
  1524. unsigned i;
  1525. /* max_pfn_mapped is the last pfn mapped in the initial memory
  1526. * mappings. Considering that on Xen after the kernel mappings we
  1527. * have the mappings of some pages that don't exist in pfn space, we
  1528. * set max_pfn_mapped to the last real pfn mapped. */
  1529. if (xen_start_info->mfn_list < __START_KERNEL_map)
  1530. max_pfn_mapped = xen_start_info->first_p2m_pfn;
  1531. else
  1532. max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
  1533. pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
  1534. pt_end = pt_base + xen_start_info->nr_pt_frames;
  1535. /* Zap identity mapping */
  1536. init_top_pgt[0] = __pgd(0);
  1537. /* Pre-constructed entries are in pfn, so convert to mfn */
  1538. /* L4[272] -> level3_ident_pgt */
  1539. /* L4[511] -> level3_kernel_pgt */
  1540. convert_pfn_mfn(init_top_pgt);
  1541. /* L3_i[0] -> level2_ident_pgt */
  1542. convert_pfn_mfn(level3_ident_pgt);
  1543. /* L3_k[510] -> level2_kernel_pgt */
  1544. /* L3_k[511] -> level2_fixmap_pgt */
  1545. convert_pfn_mfn(level3_kernel_pgt);
  1546. /* L3_k[511][506] -> level1_fixmap_pgt */
  1547. convert_pfn_mfn(level2_fixmap_pgt);
  1548. /* We get [511][511] and have Xen's version of level2_kernel_pgt */
  1549. l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
  1550. l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
  1551. addr[0] = (unsigned long)pgd;
  1552. addr[1] = (unsigned long)l3;
  1553. addr[2] = (unsigned long)l2;
  1554. /* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
  1555. * Both L4[272][0] and L4[511][510] have entries that point to the same
  1556. * L2 (PMD) tables. Meaning that if you modify it in __va space
  1557. * it will be also modified in the __ka space! (But if you just
  1558. * modify the PMD table to point to other PTE's or none, then you
  1559. * are OK - which is what cleanup_highmap does) */
  1560. copy_page(level2_ident_pgt, l2);
  1561. /* Graft it onto L4[511][510] */
  1562. copy_page(level2_kernel_pgt, l2);
  1563. /*
  1564. * Zap execute permission from the ident map. Due to the sharing of
  1565. * L1 entries we need to do this in the L2.
  1566. */
  1567. if (__supported_pte_mask & _PAGE_NX) {
  1568. for (i = 0; i < PTRS_PER_PMD; ++i) {
  1569. if (pmd_none(level2_ident_pgt[i]))
  1570. continue;
  1571. level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
  1572. }
  1573. }
  1574. /* Copy the initial P->M table mappings if necessary. */
  1575. i = pgd_index(xen_start_info->mfn_list);
  1576. if (i && i < pgd_index(__START_KERNEL_map))
  1577. init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
  1578. /* Make pagetable pieces RO */
  1579. set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
  1580. set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
  1581. set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
  1582. set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
  1583. set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
  1584. set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
  1585. set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
  1586. set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO);
  1587. /* Pin down new L4 */
  1588. pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
  1589. PFN_DOWN(__pa_symbol(init_top_pgt)));
  1590. /* Unpin Xen-provided one */
  1591. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1592. /*
  1593. * At this stage there can be no user pgd, and no page structure to
  1594. * attach it to, so make sure we just set kernel pgd.
  1595. */
  1596. xen_mc_batch();
  1597. __xen_write_cr3(true, __pa(init_top_pgt));
  1598. xen_mc_issue(PARAVIRT_LAZY_CPU);
  1599. /* We can't that easily rip out L3 and L2, as the Xen pagetables are
  1600. * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
  1601. * the initial domain. For guests using the toolstack, they are in:
  1602. * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
  1603. * rip out the [L4] (pgd), but for guests we shave off three pages.
  1604. */
  1605. for (i = 0; i < ARRAY_SIZE(addr); i++)
  1606. check_pt_base(&pt_base, &pt_end, addr[i]);
  1607. /* Our (by three pages) smaller Xen pagetable that we are using */
  1608. xen_pt_base = PFN_PHYS(pt_base);
  1609. xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
  1610. memblock_reserve(xen_pt_base, xen_pt_size);
  1611. /* Revector the xen_start_info */
  1612. xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
  1613. }
  1614. /*
  1615. * Read a value from a physical address.
  1616. */
  1617. static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
  1618. {
  1619. unsigned long *vaddr;
  1620. unsigned long val;
  1621. vaddr = early_memremap_ro(addr, sizeof(val));
  1622. val = *vaddr;
  1623. early_memunmap(vaddr, sizeof(val));
  1624. return val;
  1625. }
  1626. /*
  1627. * Translate a virtual address to a physical one without relying on mapped
  1628. * page tables. Don't rely on big pages being aligned in (guest) physical
  1629. * space!
  1630. */
  1631. static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
  1632. {
  1633. phys_addr_t pa;
  1634. pgd_t pgd;
  1635. pud_t pud;
  1636. pmd_t pmd;
  1637. pte_t pte;
  1638. pa = read_cr3_pa();
  1639. pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
  1640. sizeof(pgd)));
  1641. if (!pgd_present(pgd))
  1642. return 0;
  1643. pa = pgd_val(pgd) & PTE_PFN_MASK;
  1644. pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
  1645. sizeof(pud)));
  1646. if (!pud_present(pud))
  1647. return 0;
  1648. pa = pud_val(pud) & PTE_PFN_MASK;
  1649. if (pud_large(pud))
  1650. return pa + (vaddr & ~PUD_MASK);
  1651. pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
  1652. sizeof(pmd)));
  1653. if (!pmd_present(pmd))
  1654. return 0;
  1655. pa = pmd_val(pmd) & PTE_PFN_MASK;
  1656. if (pmd_large(pmd))
  1657. return pa + (vaddr & ~PMD_MASK);
  1658. pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
  1659. sizeof(pte)));
  1660. if (!pte_present(pte))
  1661. return 0;
  1662. pa = pte_pfn(pte) << PAGE_SHIFT;
  1663. return pa | (vaddr & ~PAGE_MASK);
  1664. }
  1665. /*
  1666. * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
  1667. * this area.
  1668. */
  1669. void __init xen_relocate_p2m(void)
  1670. {
  1671. phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
  1672. unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
  1673. int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
  1674. pte_t *pt;
  1675. pmd_t *pmd;
  1676. pud_t *pud;
  1677. pgd_t *pgd;
  1678. unsigned long *new_p2m;
  1679. int save_pud;
  1680. size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
  1681. n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
  1682. n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
  1683. n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
  1684. n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
  1685. n_frames = n_pte + n_pt + n_pmd + n_pud;
  1686. new_area = xen_find_free_area(PFN_PHYS(n_frames));
  1687. if (!new_area) {
  1688. xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
  1689. BUG();
  1690. }
  1691. /*
  1692. * Setup the page tables for addressing the new p2m list.
  1693. * We have asked the hypervisor to map the p2m list at the user address
  1694. * PUD_SIZE. It may have done so, or it may have used a kernel space
  1695. * address depending on the Xen version.
  1696. * To avoid any possible virtual address collision, just use
  1697. * 2 * PUD_SIZE for the new area.
  1698. */
  1699. pud_phys = new_area;
  1700. pmd_phys = pud_phys + PFN_PHYS(n_pud);
  1701. pt_phys = pmd_phys + PFN_PHYS(n_pmd);
  1702. p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
  1703. pgd = __va(read_cr3_pa());
  1704. new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
  1705. save_pud = n_pud;
  1706. for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
  1707. pud = early_memremap(pud_phys, PAGE_SIZE);
  1708. clear_page(pud);
  1709. for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
  1710. idx_pmd++) {
  1711. pmd = early_memremap(pmd_phys, PAGE_SIZE);
  1712. clear_page(pmd);
  1713. for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
  1714. idx_pt++) {
  1715. pt = early_memremap(pt_phys, PAGE_SIZE);
  1716. clear_page(pt);
  1717. for (idx_pte = 0;
  1718. idx_pte < min(n_pte, PTRS_PER_PTE);
  1719. idx_pte++) {
  1720. set_pte(pt + idx_pte,
  1721. pfn_pte(p2m_pfn, PAGE_KERNEL));
  1722. p2m_pfn++;
  1723. }
  1724. n_pte -= PTRS_PER_PTE;
  1725. early_memunmap(pt, PAGE_SIZE);
  1726. make_lowmem_page_readonly(__va(pt_phys));
  1727. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
  1728. PFN_DOWN(pt_phys));
  1729. set_pmd(pmd + idx_pt,
  1730. __pmd(_PAGE_TABLE | pt_phys));
  1731. pt_phys += PAGE_SIZE;
  1732. }
  1733. n_pt -= PTRS_PER_PMD;
  1734. early_memunmap(pmd, PAGE_SIZE);
  1735. make_lowmem_page_readonly(__va(pmd_phys));
  1736. pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
  1737. PFN_DOWN(pmd_phys));
  1738. set_pud(pud + idx_pmd, __pud(_PAGE_TABLE | pmd_phys));
  1739. pmd_phys += PAGE_SIZE;
  1740. }
  1741. n_pmd -= PTRS_PER_PUD;
  1742. early_memunmap(pud, PAGE_SIZE);
  1743. make_lowmem_page_readonly(__va(pud_phys));
  1744. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
  1745. set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
  1746. pud_phys += PAGE_SIZE;
  1747. }
  1748. /* Now copy the old p2m info to the new area. */
  1749. memcpy(new_p2m, xen_p2m_addr, size);
  1750. xen_p2m_addr = new_p2m;
  1751. /* Release the old p2m list and set new list info. */
  1752. p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
  1753. BUG_ON(!p2m_pfn);
  1754. p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
  1755. if (xen_start_info->mfn_list < __START_KERNEL_map) {
  1756. pfn = xen_start_info->first_p2m_pfn;
  1757. pfn_end = xen_start_info->first_p2m_pfn +
  1758. xen_start_info->nr_p2m_frames;
  1759. set_pgd(pgd + 1, __pgd(0));
  1760. } else {
  1761. pfn = p2m_pfn;
  1762. pfn_end = p2m_pfn_end;
  1763. }
  1764. memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
  1765. while (pfn < pfn_end) {
  1766. if (pfn == p2m_pfn) {
  1767. pfn = p2m_pfn_end;
  1768. continue;
  1769. }
  1770. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1771. pfn++;
  1772. }
  1773. xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
  1774. xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
  1775. xen_start_info->nr_p2m_frames = n_frames;
  1776. }
  1777. #else /* !CONFIG_X86_64 */
  1778. static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
  1779. static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
  1780. static void __init xen_write_cr3_init(unsigned long cr3)
  1781. {
  1782. unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
  1783. BUG_ON(read_cr3_pa() != __pa(initial_page_table));
  1784. BUG_ON(cr3 != __pa(swapper_pg_dir));
  1785. /*
  1786. * We are switching to swapper_pg_dir for the first time (from
  1787. * initial_page_table) and therefore need to mark that page
  1788. * read-only and then pin it.
  1789. *
  1790. * Xen disallows sharing of kernel PMDs for PAE
  1791. * guests. Therefore we must copy the kernel PMD from
  1792. * initial_page_table into a new kernel PMD to be used in
  1793. * swapper_pg_dir.
  1794. */
  1795. swapper_kernel_pmd =
  1796. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1797. copy_page(swapper_kernel_pmd, initial_kernel_pmd);
  1798. swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
  1799. __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
  1800. set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
  1801. set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
  1802. xen_write_cr3(cr3);
  1803. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
  1804. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
  1805. PFN_DOWN(__pa(initial_page_table)));
  1806. set_page_prot(initial_page_table, PAGE_KERNEL);
  1807. set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
  1808. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1809. }
  1810. /*
  1811. * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
  1812. * not the first page table in the page table pool.
  1813. * Iterate through the initial page tables to find the real page table base.
  1814. */
  1815. static phys_addr_t __init xen_find_pt_base(pmd_t *pmd)
  1816. {
  1817. phys_addr_t pt_base, paddr;
  1818. unsigned pmdidx;
  1819. pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
  1820. for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
  1821. if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
  1822. paddr = m2p(pmd[pmdidx].pmd);
  1823. pt_base = min(pt_base, paddr);
  1824. }
  1825. return pt_base;
  1826. }
  1827. void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
  1828. {
  1829. pmd_t *kernel_pmd;
  1830. kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
  1831. xen_pt_base = xen_find_pt_base(kernel_pmd);
  1832. xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
  1833. initial_kernel_pmd =
  1834. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1835. max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
  1836. copy_page(initial_kernel_pmd, kernel_pmd);
  1837. xen_map_identity_early(initial_kernel_pmd, max_pfn);
  1838. copy_page(initial_page_table, pgd);
  1839. initial_page_table[KERNEL_PGD_BOUNDARY] =
  1840. __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
  1841. set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
  1842. set_page_prot(initial_page_table, PAGE_KERNEL_RO);
  1843. set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
  1844. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1845. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
  1846. PFN_DOWN(__pa(initial_page_table)));
  1847. xen_write_cr3(__pa(initial_page_table));
  1848. memblock_reserve(xen_pt_base, xen_pt_size);
  1849. }
  1850. #endif /* CONFIG_X86_64 */
  1851. void __init xen_reserve_special_pages(void)
  1852. {
  1853. phys_addr_t paddr;
  1854. memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
  1855. if (xen_start_info->store_mfn) {
  1856. paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
  1857. memblock_reserve(paddr, PAGE_SIZE);
  1858. }
  1859. if (!xen_initial_domain()) {
  1860. paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
  1861. memblock_reserve(paddr, PAGE_SIZE);
  1862. }
  1863. }
  1864. void __init xen_pt_check_e820(void)
  1865. {
  1866. if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
  1867. xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
  1868. BUG();
  1869. }
  1870. }
  1871. static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
  1872. static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
  1873. {
  1874. pte_t pte;
  1875. phys >>= PAGE_SHIFT;
  1876. switch (idx) {
  1877. case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
  1878. #ifdef CONFIG_X86_32
  1879. case FIX_WP_TEST:
  1880. # ifdef CONFIG_HIGHMEM
  1881. case FIX_KMAP_BEGIN ... FIX_KMAP_END:
  1882. # endif
  1883. #elif defined(CONFIG_X86_VSYSCALL_EMULATION)
  1884. case VSYSCALL_PAGE:
  1885. #endif
  1886. case FIX_TEXT_POKE0:
  1887. case FIX_TEXT_POKE1:
  1888. /* All local page mappings */
  1889. pte = pfn_pte(phys, prot);
  1890. break;
  1891. #ifdef CONFIG_X86_LOCAL_APIC
  1892. case FIX_APIC_BASE: /* maps dummy local APIC */
  1893. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1894. break;
  1895. #endif
  1896. #ifdef CONFIG_X86_IO_APIC
  1897. case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
  1898. /*
  1899. * We just don't map the IO APIC - all access is via
  1900. * hypercalls. Keep the address in the pte for reference.
  1901. */
  1902. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1903. break;
  1904. #endif
  1905. case FIX_PARAVIRT_BOOTMAP:
  1906. /* This is an MFN, but it isn't an IO mapping from the
  1907. IO domain */
  1908. pte = mfn_pte(phys, prot);
  1909. break;
  1910. default:
  1911. /* By default, set_fixmap is used for hardware mappings */
  1912. pte = mfn_pte(phys, prot);
  1913. break;
  1914. }
  1915. __native_set_fixmap(idx, pte);
  1916. #ifdef CONFIG_X86_VSYSCALL_EMULATION
  1917. /* Replicate changes to map the vsyscall page into the user
  1918. pagetable vsyscall mapping. */
  1919. if (idx == VSYSCALL_PAGE) {
  1920. unsigned long vaddr = __fix_to_virt(idx);
  1921. set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
  1922. }
  1923. #endif
  1924. }
  1925. static void __init xen_post_allocator_init(void)
  1926. {
  1927. pv_mmu_ops.set_pte = xen_set_pte;
  1928. pv_mmu_ops.set_pmd = xen_set_pmd;
  1929. pv_mmu_ops.set_pud = xen_set_pud;
  1930. #ifdef CONFIG_X86_64
  1931. pv_mmu_ops.set_p4d = xen_set_p4d;
  1932. #endif
  1933. /* This will work as long as patching hasn't happened yet
  1934. (which it hasn't) */
  1935. pv_mmu_ops.alloc_pte = xen_alloc_pte;
  1936. pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
  1937. pv_mmu_ops.release_pte = xen_release_pte;
  1938. pv_mmu_ops.release_pmd = xen_release_pmd;
  1939. #ifdef CONFIG_X86_64
  1940. pv_mmu_ops.alloc_pud = xen_alloc_pud;
  1941. pv_mmu_ops.release_pud = xen_release_pud;
  1942. #endif
  1943. pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte);
  1944. #ifdef CONFIG_X86_64
  1945. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1946. SetPagePinned(virt_to_page(level3_user_vsyscall));
  1947. #endif
  1948. xen_mark_init_mm_pinned();
  1949. }
  1950. static void xen_leave_lazy_mmu(void)
  1951. {
  1952. preempt_disable();
  1953. xen_mc_flush();
  1954. paravirt_leave_lazy_mmu();
  1955. preempt_enable();
  1956. }
  1957. static const struct pv_mmu_ops xen_mmu_ops __initconst = {
  1958. .read_cr2 = xen_read_cr2,
  1959. .write_cr2 = xen_write_cr2,
  1960. .read_cr3 = xen_read_cr3,
  1961. .write_cr3 = xen_write_cr3_init,
  1962. .flush_tlb_user = xen_flush_tlb,
  1963. .flush_tlb_kernel = xen_flush_tlb,
  1964. .flush_tlb_one_user = xen_flush_tlb_one_user,
  1965. .flush_tlb_others = xen_flush_tlb_others,
  1966. .pgd_alloc = xen_pgd_alloc,
  1967. .pgd_free = xen_pgd_free,
  1968. .alloc_pte = xen_alloc_pte_init,
  1969. .release_pte = xen_release_pte_init,
  1970. .alloc_pmd = xen_alloc_pmd_init,
  1971. .release_pmd = xen_release_pmd_init,
  1972. .set_pte = xen_set_pte_init,
  1973. .set_pte_at = xen_set_pte_at,
  1974. .set_pmd = xen_set_pmd_hyper,
  1975. .ptep_modify_prot_start = __ptep_modify_prot_start,
  1976. .ptep_modify_prot_commit = __ptep_modify_prot_commit,
  1977. .pte_val = PV_CALLEE_SAVE(xen_pte_val),
  1978. .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
  1979. .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
  1980. .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
  1981. #ifdef CONFIG_X86_PAE
  1982. .set_pte_atomic = xen_set_pte_atomic,
  1983. .pte_clear = xen_pte_clear,
  1984. .pmd_clear = xen_pmd_clear,
  1985. #endif /* CONFIG_X86_PAE */
  1986. .set_pud = xen_set_pud_hyper,
  1987. .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
  1988. .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
  1989. #ifdef CONFIG_X86_64
  1990. .pud_val = PV_CALLEE_SAVE(xen_pud_val),
  1991. .make_pud = PV_CALLEE_SAVE(xen_make_pud),
  1992. .set_p4d = xen_set_p4d_hyper,
  1993. .alloc_pud = xen_alloc_pmd_init,
  1994. .release_pud = xen_release_pmd_init,
  1995. #endif /* CONFIG_X86_64 */
  1996. .activate_mm = xen_activate_mm,
  1997. .dup_mmap = xen_dup_mmap,
  1998. .exit_mmap = xen_exit_mmap,
  1999. .lazy_mode = {
  2000. .enter = paravirt_enter_lazy_mmu,
  2001. .leave = xen_leave_lazy_mmu,
  2002. .flush = paravirt_flush_lazy_mmu,
  2003. },
  2004. .set_fixmap = xen_set_fixmap,
  2005. };
  2006. void __init xen_init_mmu_ops(void)
  2007. {
  2008. x86_init.paging.pagetable_init = xen_pagetable_init;
  2009. pv_mmu_ops = xen_mmu_ops;
  2010. memset(dummy_mapping, 0xff, PAGE_SIZE);
  2011. }
  2012. /* Protected by xen_reservation_lock. */
  2013. #define MAX_CONTIG_ORDER 9 /* 2MB */
  2014. static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
  2015. #define VOID_PTE (mfn_pte(0, __pgprot(0)))
  2016. static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
  2017. unsigned long *in_frames,
  2018. unsigned long *out_frames)
  2019. {
  2020. int i;
  2021. struct multicall_space mcs;
  2022. xen_mc_batch();
  2023. for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
  2024. mcs = __xen_mc_entry(0);
  2025. if (in_frames)
  2026. in_frames[i] = virt_to_mfn(vaddr);
  2027. MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
  2028. __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
  2029. if (out_frames)
  2030. out_frames[i] = virt_to_pfn(vaddr);
  2031. }
  2032. xen_mc_issue(0);
  2033. }
  2034. /*
  2035. * Update the pfn-to-mfn mappings for a virtual address range, either to
  2036. * point to an array of mfns, or contiguously from a single starting
  2037. * mfn.
  2038. */
  2039. static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
  2040. unsigned long *mfns,
  2041. unsigned long first_mfn)
  2042. {
  2043. unsigned i, limit;
  2044. unsigned long mfn;
  2045. xen_mc_batch();
  2046. limit = 1u << order;
  2047. for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
  2048. struct multicall_space mcs;
  2049. unsigned flags;
  2050. mcs = __xen_mc_entry(0);
  2051. if (mfns)
  2052. mfn = mfns[i];
  2053. else
  2054. mfn = first_mfn + i;
  2055. if (i < (limit - 1))
  2056. flags = 0;
  2057. else {
  2058. if (order == 0)
  2059. flags = UVMF_INVLPG | UVMF_ALL;
  2060. else
  2061. flags = UVMF_TLB_FLUSH | UVMF_ALL;
  2062. }
  2063. MULTI_update_va_mapping(mcs.mc, vaddr,
  2064. mfn_pte(mfn, PAGE_KERNEL), flags);
  2065. set_phys_to_machine(virt_to_pfn(vaddr), mfn);
  2066. }
  2067. xen_mc_issue(0);
  2068. }
  2069. /*
  2070. * Perform the hypercall to exchange a region of our pfns to point to
  2071. * memory with the required contiguous alignment. Takes the pfns as
  2072. * input, and populates mfns as output.
  2073. *
  2074. * Returns a success code indicating whether the hypervisor was able to
  2075. * satisfy the request or not.
  2076. */
  2077. static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
  2078. unsigned long *pfns_in,
  2079. unsigned long extents_out,
  2080. unsigned int order_out,
  2081. unsigned long *mfns_out,
  2082. unsigned int address_bits)
  2083. {
  2084. long rc;
  2085. int success;
  2086. struct xen_memory_exchange exchange = {
  2087. .in = {
  2088. .nr_extents = extents_in,
  2089. .extent_order = order_in,
  2090. .extent_start = pfns_in,
  2091. .domid = DOMID_SELF
  2092. },
  2093. .out = {
  2094. .nr_extents = extents_out,
  2095. .extent_order = order_out,
  2096. .extent_start = mfns_out,
  2097. .address_bits = address_bits,
  2098. .domid = DOMID_SELF
  2099. }
  2100. };
  2101. BUG_ON(extents_in << order_in != extents_out << order_out);
  2102. rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
  2103. success = (exchange.nr_exchanged == extents_in);
  2104. BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
  2105. BUG_ON(success && (rc != 0));
  2106. return success;
  2107. }
  2108. int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
  2109. unsigned int address_bits,
  2110. dma_addr_t *dma_handle)
  2111. {
  2112. unsigned long *in_frames = discontig_frames, out_frame;
  2113. unsigned long flags;
  2114. int success;
  2115. unsigned long vstart = (unsigned long)phys_to_virt(pstart);
  2116. /*
  2117. * Currently an auto-translated guest will not perform I/O, nor will
  2118. * it require PAE page directories below 4GB. Therefore any calls to
  2119. * this function are redundant and can be ignored.
  2120. */
  2121. if (unlikely(order > MAX_CONTIG_ORDER))
  2122. return -ENOMEM;
  2123. memset((void *) vstart, 0, PAGE_SIZE << order);
  2124. spin_lock_irqsave(&xen_reservation_lock, flags);
  2125. /* 1. Zap current PTEs, remembering MFNs. */
  2126. xen_zap_pfn_range(vstart, order, in_frames, NULL);
  2127. /* 2. Get a new contiguous memory extent. */
  2128. out_frame = virt_to_pfn(vstart);
  2129. success = xen_exchange_memory(1UL << order, 0, in_frames,
  2130. 1, order, &out_frame,
  2131. address_bits);
  2132. /* 3. Map the new extent in place of old pages. */
  2133. if (success)
  2134. xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
  2135. else
  2136. xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
  2137. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  2138. *dma_handle = virt_to_machine(vstart).maddr;
  2139. return success ? 0 : -ENOMEM;
  2140. }
  2141. EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
  2142. void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
  2143. {
  2144. unsigned long *out_frames = discontig_frames, in_frame;
  2145. unsigned long flags;
  2146. int success;
  2147. unsigned long vstart;
  2148. if (unlikely(order > MAX_CONTIG_ORDER))
  2149. return;
  2150. vstart = (unsigned long)phys_to_virt(pstart);
  2151. memset((void *) vstart, 0, PAGE_SIZE << order);
  2152. spin_lock_irqsave(&xen_reservation_lock, flags);
  2153. /* 1. Find start MFN of contiguous extent. */
  2154. in_frame = virt_to_mfn(vstart);
  2155. /* 2. Zap current PTEs. */
  2156. xen_zap_pfn_range(vstart, order, NULL, out_frames);
  2157. /* 3. Do the exchange for non-contiguous MFNs. */
  2158. success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
  2159. 0, out_frames, 0);
  2160. /* 4. Map new pages in place of old pages. */
  2161. if (success)
  2162. xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
  2163. else
  2164. xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
  2165. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  2166. }
  2167. EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
  2168. #ifdef CONFIG_KEXEC_CORE
  2169. phys_addr_t paddr_vmcoreinfo_note(void)
  2170. {
  2171. if (xen_pv_domain())
  2172. return virt_to_machine(vmcoreinfo_note).maddr;
  2173. else
  2174. return __pa(vmcoreinfo_note);
  2175. }
  2176. #endif /* CONFIG_KEXEC_CORE */