topology.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Check for extended topology enumeration cpuid leaf 0xb and if it
  4. * exists, use it for populating initial_apicid and cpu topology
  5. * detection.
  6. */
  7. #include <linux/cpu.h>
  8. #include <asm/apic.h>
  9. #include <asm/pat.h>
  10. #include <asm/processor.h>
  11. /* leaf 0xb SMT level */
  12. #define SMT_LEVEL 0
  13. /* leaf 0xb sub-leaf types */
  14. #define INVALID_TYPE 0
  15. #define SMT_TYPE 1
  16. #define CORE_TYPE 2
  17. #define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff)
  18. #define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f)
  19. #define LEVEL_MAX_SIBLINGS(ebx) ((ebx) & 0xffff)
  20. /*
  21. * Check for extended topology enumeration cpuid leaf 0xb and if it
  22. * exists, use it for populating initial_apicid and cpu topology
  23. * detection.
  24. */
  25. void detect_extended_topology(struct cpuinfo_x86 *c)
  26. {
  27. #ifdef CONFIG_SMP
  28. unsigned int eax, ebx, ecx, edx, sub_index;
  29. unsigned int ht_mask_width, core_plus_mask_width;
  30. unsigned int core_select_mask, core_level_siblings;
  31. static bool printed;
  32. if (c->cpuid_level < 0xb)
  33. return;
  34. cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
  35. /*
  36. * check if the cpuid leaf 0xb is actually implemented.
  37. */
  38. if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
  39. return;
  40. set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
  41. /*
  42. * initial apic id, which also represents 32-bit extended x2apic id.
  43. */
  44. c->initial_apicid = edx;
  45. /*
  46. * Populate HT related information from sub-leaf level 0.
  47. */
  48. core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
  49. core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
  50. sub_index = 1;
  51. do {
  52. cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
  53. /*
  54. * Check for the Core type in the implemented sub leaves.
  55. */
  56. if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
  57. core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
  58. core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
  59. break;
  60. }
  61. sub_index++;
  62. } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
  63. core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
  64. c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
  65. & core_select_mask;
  66. c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
  67. /*
  68. * Reinit the apicid, now that we have extended initial_apicid.
  69. */
  70. c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
  71. c->x86_max_cores = (core_level_siblings / smp_num_siblings);
  72. if (!printed) {
  73. pr_info("CPU: Physical Processor ID: %d\n",
  74. c->phys_proc_id);
  75. if (c->x86_max_cores > 1)
  76. pr_info("CPU: Processor Core ID: %d\n",
  77. c->cpu_core_id);
  78. printed = 1;
  79. }
  80. return;
  81. #endif
  82. }