aesni-intel_glue.c 39 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <crypto/b128ops.h>
  30. #include <crypto/gcm.h>
  31. #include <crypto/xts.h>
  32. #include <asm/cpu_device_id.h>
  33. #include <asm/fpu/api.h>
  34. #include <asm/crypto/aes.h>
  35. #include <crypto/scatterwalk.h>
  36. #include <crypto/internal/aead.h>
  37. #include <crypto/internal/simd.h>
  38. #include <crypto/internal/skcipher.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #ifdef CONFIG_X86_64
  42. #include <asm/crypto/glue_helper.h>
  43. #endif
  44. #define AESNI_ALIGN 16
  45. #define AESNI_ALIGN_ATTR __attribute__ ((__aligned__(AESNI_ALIGN)))
  46. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE - 1))
  47. #define RFC4106_HASH_SUBKEY_SIZE 16
  48. #define AESNI_ALIGN_EXTRA ((AESNI_ALIGN - 1) & ~(CRYPTO_MINALIGN - 1))
  49. #define CRYPTO_AES_CTX_SIZE (sizeof(struct crypto_aes_ctx) + AESNI_ALIGN_EXTRA)
  50. #define XTS_AES_CTX_SIZE (sizeof(struct aesni_xts_ctx) + AESNI_ALIGN_EXTRA)
  51. /* This data is stored at the end of the crypto_tfm struct.
  52. * It's a type of per "session" data storage location.
  53. * This needs to be 16 byte aligned.
  54. */
  55. struct aesni_rfc4106_gcm_ctx {
  56. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  57. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  58. u8 nonce[4];
  59. };
  60. struct generic_gcmaes_ctx {
  61. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  62. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  63. };
  64. struct aesni_xts_ctx {
  65. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  66. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  67. };
  68. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  69. unsigned int key_len);
  70. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  71. const u8 *in);
  72. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  73. const u8 *in);
  74. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  75. const u8 *in, unsigned int len);
  76. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in, unsigned int len);
  78. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len, u8 *iv);
  80. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len, u8 *iv);
  82. int crypto_fpu_init(void);
  83. void crypto_fpu_exit(void);
  84. #define AVX_GEN2_OPTSIZE 640
  85. #define AVX_GEN4_OPTSIZE 4096
  86. #ifdef CONFIG_X86_64
  87. static void (*aesni_ctr_enc_tfm)(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  92. const u8 *in, bool enc, u8 *iv);
  93. /* asmlinkage void aesni_gcm_enc()
  94. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  95. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  96. * const u8 *in, Plaintext input
  97. * unsigned long plaintext_len, Length of data in bytes for encryption.
  98. * u8 *iv, Pre-counter block j0: 12 byte IV concatenated with 0x00000001.
  99. * 16-byte aligned pointer.
  100. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  101. * const u8 *aad, Additional Authentication Data (AAD)
  102. * unsigned long aad_len, Length of AAD in bytes.
  103. * u8 *auth_tag, Authenticated Tag output.
  104. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  105. * Valid values are 16 (most likely), 12 or 8.
  106. */
  107. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  108. const u8 *in, unsigned long plaintext_len, u8 *iv,
  109. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  110. u8 *auth_tag, unsigned long auth_tag_len);
  111. /* asmlinkage void aesni_gcm_dec()
  112. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  113. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  114. * const u8 *in, Ciphertext input
  115. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  116. * u8 *iv, Pre-counter block j0: 12 byte IV concatenated with 0x00000001.
  117. * 16-byte aligned pointer.
  118. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  119. * const u8 *aad, Additional Authentication Data (AAD)
  120. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  121. * to be 8 or 12 bytes
  122. * u8 *auth_tag, Authenticated Tag output.
  123. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  124. * Valid values are 16 (most likely), 12 or 8.
  125. */
  126. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  127. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  128. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  129. u8 *auth_tag, unsigned long auth_tag_len);
  130. #ifdef CONFIG_AS_AVX
  131. asmlinkage void aes_ctr_enc_128_avx_by8(const u8 *in, u8 *iv,
  132. void *keys, u8 *out, unsigned int num_bytes);
  133. asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
  134. void *keys, u8 *out, unsigned int num_bytes);
  135. asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
  136. void *keys, u8 *out, unsigned int num_bytes);
  137. /*
  138. * asmlinkage void aesni_gcm_precomp_avx_gen2()
  139. * gcm_data *my_ctx_data, context data
  140. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  141. */
  142. asmlinkage void aesni_gcm_precomp_avx_gen2(void *my_ctx_data, u8 *hash_subkey);
  143. asmlinkage void aesni_gcm_enc_avx_gen2(void *ctx, u8 *out,
  144. const u8 *in, unsigned long plaintext_len, u8 *iv,
  145. const u8 *aad, unsigned long aad_len,
  146. u8 *auth_tag, unsigned long auth_tag_len);
  147. asmlinkage void aesni_gcm_dec_avx_gen2(void *ctx, u8 *out,
  148. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  149. const u8 *aad, unsigned long aad_len,
  150. u8 *auth_tag, unsigned long auth_tag_len);
  151. static void aesni_gcm_enc_avx(void *ctx, u8 *out,
  152. const u8 *in, unsigned long plaintext_len, u8 *iv,
  153. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  154. u8 *auth_tag, unsigned long auth_tag_len)
  155. {
  156. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  157. if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)){
  158. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  159. aad_len, auth_tag, auth_tag_len);
  160. } else {
  161. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  162. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  163. aad_len, auth_tag, auth_tag_len);
  164. }
  165. }
  166. static void aesni_gcm_dec_avx(void *ctx, u8 *out,
  167. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  168. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  169. u8 *auth_tag, unsigned long auth_tag_len)
  170. {
  171. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  172. if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  173. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
  174. aad_len, auth_tag, auth_tag_len);
  175. } else {
  176. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  177. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  178. aad_len, auth_tag, auth_tag_len);
  179. }
  180. }
  181. #endif
  182. #ifdef CONFIG_AS_AVX2
  183. /*
  184. * asmlinkage void aesni_gcm_precomp_avx_gen4()
  185. * gcm_data *my_ctx_data, context data
  186. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  187. */
  188. asmlinkage void aesni_gcm_precomp_avx_gen4(void *my_ctx_data, u8 *hash_subkey);
  189. asmlinkage void aesni_gcm_enc_avx_gen4(void *ctx, u8 *out,
  190. const u8 *in, unsigned long plaintext_len, u8 *iv,
  191. const u8 *aad, unsigned long aad_len,
  192. u8 *auth_tag, unsigned long auth_tag_len);
  193. asmlinkage void aesni_gcm_dec_avx_gen4(void *ctx, u8 *out,
  194. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  195. const u8 *aad, unsigned long aad_len,
  196. u8 *auth_tag, unsigned long auth_tag_len);
  197. static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
  198. const u8 *in, unsigned long plaintext_len, u8 *iv,
  199. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  200. u8 *auth_tag, unsigned long auth_tag_len)
  201. {
  202. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  203. if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  204. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  205. aad_len, auth_tag, auth_tag_len);
  206. } else if (plaintext_len < AVX_GEN4_OPTSIZE) {
  207. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  208. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  209. aad_len, auth_tag, auth_tag_len);
  210. } else {
  211. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  212. aesni_gcm_enc_avx_gen4(ctx, out, in, plaintext_len, iv, aad,
  213. aad_len, auth_tag, auth_tag_len);
  214. }
  215. }
  216. static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
  217. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  218. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  219. u8 *auth_tag, unsigned long auth_tag_len)
  220. {
  221. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  222. if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  223. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
  224. aad, aad_len, auth_tag, auth_tag_len);
  225. } else if (ciphertext_len < AVX_GEN4_OPTSIZE) {
  226. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  227. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  228. aad_len, auth_tag, auth_tag_len);
  229. } else {
  230. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  231. aesni_gcm_dec_avx_gen4(ctx, out, in, ciphertext_len, iv, aad,
  232. aad_len, auth_tag, auth_tag_len);
  233. }
  234. }
  235. #endif
  236. static void (*aesni_gcm_enc_tfm)(void *ctx, u8 *out,
  237. const u8 *in, unsigned long plaintext_len, u8 *iv,
  238. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  239. u8 *auth_tag, unsigned long auth_tag_len);
  240. static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,
  241. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  242. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  243. u8 *auth_tag, unsigned long auth_tag_len);
  244. static inline struct
  245. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  246. {
  247. unsigned long align = AESNI_ALIGN;
  248. if (align <= crypto_tfm_ctx_alignment())
  249. align = 1;
  250. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  251. }
  252. static inline struct
  253. generic_gcmaes_ctx *generic_gcmaes_ctx_get(struct crypto_aead *tfm)
  254. {
  255. unsigned long align = AESNI_ALIGN;
  256. if (align <= crypto_tfm_ctx_alignment())
  257. align = 1;
  258. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  259. }
  260. #endif
  261. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  262. {
  263. unsigned long addr = (unsigned long)raw_ctx;
  264. unsigned long align = AESNI_ALIGN;
  265. if (align <= crypto_tfm_ctx_alignment())
  266. align = 1;
  267. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  268. }
  269. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  270. const u8 *in_key, unsigned int key_len)
  271. {
  272. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  273. u32 *flags = &tfm->crt_flags;
  274. int err;
  275. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  276. key_len != AES_KEYSIZE_256) {
  277. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  278. return -EINVAL;
  279. }
  280. if (!irq_fpu_usable())
  281. err = crypto_aes_expand_key(ctx, in_key, key_len);
  282. else {
  283. kernel_fpu_begin();
  284. err = aesni_set_key(ctx, in_key, key_len);
  285. kernel_fpu_end();
  286. }
  287. return err;
  288. }
  289. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  290. unsigned int key_len)
  291. {
  292. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  293. }
  294. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  295. {
  296. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  297. if (!irq_fpu_usable())
  298. crypto_aes_encrypt_x86(ctx, dst, src);
  299. else {
  300. kernel_fpu_begin();
  301. aesni_enc(ctx, dst, src);
  302. kernel_fpu_end();
  303. }
  304. }
  305. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  306. {
  307. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  308. if (!irq_fpu_usable())
  309. crypto_aes_decrypt_x86(ctx, dst, src);
  310. else {
  311. kernel_fpu_begin();
  312. aesni_dec(ctx, dst, src);
  313. kernel_fpu_end();
  314. }
  315. }
  316. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  317. {
  318. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  319. aesni_enc(ctx, dst, src);
  320. }
  321. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  322. {
  323. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  324. aesni_dec(ctx, dst, src);
  325. }
  326. static int aesni_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
  327. unsigned int len)
  328. {
  329. return aes_set_key_common(crypto_skcipher_tfm(tfm),
  330. crypto_skcipher_ctx(tfm), key, len);
  331. }
  332. static int ecb_encrypt(struct skcipher_request *req)
  333. {
  334. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  335. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  336. struct skcipher_walk walk;
  337. unsigned int nbytes;
  338. int err;
  339. err = skcipher_walk_virt(&walk, req, true);
  340. kernel_fpu_begin();
  341. while ((nbytes = walk.nbytes)) {
  342. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  343. nbytes & AES_BLOCK_MASK);
  344. nbytes &= AES_BLOCK_SIZE - 1;
  345. err = skcipher_walk_done(&walk, nbytes);
  346. }
  347. kernel_fpu_end();
  348. return err;
  349. }
  350. static int ecb_decrypt(struct skcipher_request *req)
  351. {
  352. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  353. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  354. struct skcipher_walk walk;
  355. unsigned int nbytes;
  356. int err;
  357. err = skcipher_walk_virt(&walk, req, true);
  358. kernel_fpu_begin();
  359. while ((nbytes = walk.nbytes)) {
  360. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  361. nbytes & AES_BLOCK_MASK);
  362. nbytes &= AES_BLOCK_SIZE - 1;
  363. err = skcipher_walk_done(&walk, nbytes);
  364. }
  365. kernel_fpu_end();
  366. return err;
  367. }
  368. static int cbc_encrypt(struct skcipher_request *req)
  369. {
  370. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  371. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  372. struct skcipher_walk walk;
  373. unsigned int nbytes;
  374. int err;
  375. err = skcipher_walk_virt(&walk, req, true);
  376. kernel_fpu_begin();
  377. while ((nbytes = walk.nbytes)) {
  378. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  379. nbytes & AES_BLOCK_MASK, walk.iv);
  380. nbytes &= AES_BLOCK_SIZE - 1;
  381. err = skcipher_walk_done(&walk, nbytes);
  382. }
  383. kernel_fpu_end();
  384. return err;
  385. }
  386. static int cbc_decrypt(struct skcipher_request *req)
  387. {
  388. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  389. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  390. struct skcipher_walk walk;
  391. unsigned int nbytes;
  392. int err;
  393. err = skcipher_walk_virt(&walk, req, true);
  394. kernel_fpu_begin();
  395. while ((nbytes = walk.nbytes)) {
  396. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  397. nbytes & AES_BLOCK_MASK, walk.iv);
  398. nbytes &= AES_BLOCK_SIZE - 1;
  399. err = skcipher_walk_done(&walk, nbytes);
  400. }
  401. kernel_fpu_end();
  402. return err;
  403. }
  404. #ifdef CONFIG_X86_64
  405. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  406. struct skcipher_walk *walk)
  407. {
  408. u8 *ctrblk = walk->iv;
  409. u8 keystream[AES_BLOCK_SIZE];
  410. u8 *src = walk->src.virt.addr;
  411. u8 *dst = walk->dst.virt.addr;
  412. unsigned int nbytes = walk->nbytes;
  413. aesni_enc(ctx, keystream, ctrblk);
  414. crypto_xor_cpy(dst, keystream, src, nbytes);
  415. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  416. }
  417. #ifdef CONFIG_AS_AVX
  418. static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  419. const u8 *in, unsigned int len, u8 *iv)
  420. {
  421. /*
  422. * based on key length, override with the by8 version
  423. * of ctr mode encryption/decryption for improved performance
  424. * aes_set_key_common() ensures that key length is one of
  425. * {128,192,256}
  426. */
  427. if (ctx->key_length == AES_KEYSIZE_128)
  428. aes_ctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len);
  429. else if (ctx->key_length == AES_KEYSIZE_192)
  430. aes_ctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len);
  431. else
  432. aes_ctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len);
  433. }
  434. #endif
  435. static int ctr_crypt(struct skcipher_request *req)
  436. {
  437. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  438. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  439. struct skcipher_walk walk;
  440. unsigned int nbytes;
  441. int err;
  442. err = skcipher_walk_virt(&walk, req, true);
  443. kernel_fpu_begin();
  444. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  445. aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  446. nbytes & AES_BLOCK_MASK, walk.iv);
  447. nbytes &= AES_BLOCK_SIZE - 1;
  448. err = skcipher_walk_done(&walk, nbytes);
  449. }
  450. if (walk.nbytes) {
  451. ctr_crypt_final(ctx, &walk);
  452. err = skcipher_walk_done(&walk, 0);
  453. }
  454. kernel_fpu_end();
  455. return err;
  456. }
  457. static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key,
  458. unsigned int keylen)
  459. {
  460. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  461. int err;
  462. err = xts_verify_key(tfm, key, keylen);
  463. if (err)
  464. return err;
  465. keylen /= 2;
  466. /* first half of xts-key is for crypt */
  467. err = aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_crypt_ctx,
  468. key, keylen);
  469. if (err)
  470. return err;
  471. /* second half of xts-key is for tweak */
  472. return aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_tweak_ctx,
  473. key + keylen, keylen);
  474. }
  475. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  476. {
  477. aesni_enc(ctx, out, in);
  478. }
  479. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  480. {
  481. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  482. }
  483. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  484. {
  485. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  486. }
  487. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  488. {
  489. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  490. }
  491. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  492. {
  493. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  494. }
  495. static const struct common_glue_ctx aesni_enc_xts = {
  496. .num_funcs = 2,
  497. .fpu_blocks_limit = 1,
  498. .funcs = { {
  499. .num_blocks = 8,
  500. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  501. }, {
  502. .num_blocks = 1,
  503. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  504. } }
  505. };
  506. static const struct common_glue_ctx aesni_dec_xts = {
  507. .num_funcs = 2,
  508. .fpu_blocks_limit = 1,
  509. .funcs = { {
  510. .num_blocks = 8,
  511. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  512. }, {
  513. .num_blocks = 1,
  514. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  515. } }
  516. };
  517. static int xts_encrypt(struct skcipher_request *req)
  518. {
  519. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  520. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  521. return glue_xts_req_128bit(&aesni_enc_xts, req,
  522. XTS_TWEAK_CAST(aesni_xts_tweak),
  523. aes_ctx(ctx->raw_tweak_ctx),
  524. aes_ctx(ctx->raw_crypt_ctx));
  525. }
  526. static int xts_decrypt(struct skcipher_request *req)
  527. {
  528. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  529. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  530. return glue_xts_req_128bit(&aesni_dec_xts, req,
  531. XTS_TWEAK_CAST(aesni_xts_tweak),
  532. aes_ctx(ctx->raw_tweak_ctx),
  533. aes_ctx(ctx->raw_crypt_ctx));
  534. }
  535. static int rfc4106_init(struct crypto_aead *aead)
  536. {
  537. struct cryptd_aead *cryptd_tfm;
  538. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  539. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni",
  540. CRYPTO_ALG_INTERNAL,
  541. CRYPTO_ALG_INTERNAL);
  542. if (IS_ERR(cryptd_tfm))
  543. return PTR_ERR(cryptd_tfm);
  544. *ctx = cryptd_tfm;
  545. crypto_aead_set_reqsize(aead, crypto_aead_reqsize(&cryptd_tfm->base));
  546. return 0;
  547. }
  548. static void rfc4106_exit(struct crypto_aead *aead)
  549. {
  550. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  551. cryptd_free_aead(*ctx);
  552. }
  553. static int
  554. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  555. {
  556. struct crypto_cipher *tfm;
  557. int ret;
  558. tfm = crypto_alloc_cipher("aes", 0, 0);
  559. if (IS_ERR(tfm))
  560. return PTR_ERR(tfm);
  561. ret = crypto_cipher_setkey(tfm, key, key_len);
  562. if (ret)
  563. goto out_free_cipher;
  564. /* Clear the data in the hash sub key container to zero.*/
  565. /* We want to cipher all zeros to create the hash sub key. */
  566. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  567. crypto_cipher_encrypt_one(tfm, hash_subkey, hash_subkey);
  568. out_free_cipher:
  569. crypto_free_cipher(tfm);
  570. return ret;
  571. }
  572. static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key,
  573. unsigned int key_len)
  574. {
  575. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(aead);
  576. if (key_len < 4) {
  577. crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  578. return -EINVAL;
  579. }
  580. /*Account for 4 byte nonce at the end.*/
  581. key_len -= 4;
  582. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  583. return aes_set_key_common(crypto_aead_tfm(aead),
  584. &ctx->aes_key_expanded, key, key_len) ?:
  585. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  586. }
  587. static int gcmaes_wrapper_set_key(struct crypto_aead *parent, const u8 *key,
  588. unsigned int key_len)
  589. {
  590. struct cryptd_aead **ctx = crypto_aead_ctx(parent);
  591. struct cryptd_aead *cryptd_tfm = *ctx;
  592. return crypto_aead_setkey(&cryptd_tfm->base, key, key_len);
  593. }
  594. static int common_rfc4106_set_authsize(struct crypto_aead *aead,
  595. unsigned int authsize)
  596. {
  597. switch (authsize) {
  598. case 8:
  599. case 12:
  600. case 16:
  601. break;
  602. default:
  603. return -EINVAL;
  604. }
  605. return 0;
  606. }
  607. /* This is the Integrity Check Value (aka the authentication tag length and can
  608. * be 8, 12 or 16 bytes long. */
  609. static int gcmaes_wrapper_set_authsize(struct crypto_aead *parent,
  610. unsigned int authsize)
  611. {
  612. struct cryptd_aead **ctx = crypto_aead_ctx(parent);
  613. struct cryptd_aead *cryptd_tfm = *ctx;
  614. return crypto_aead_setauthsize(&cryptd_tfm->base, authsize);
  615. }
  616. static int generic_gcmaes_set_authsize(struct crypto_aead *tfm,
  617. unsigned int authsize)
  618. {
  619. switch (authsize) {
  620. case 4:
  621. case 8:
  622. case 12:
  623. case 13:
  624. case 14:
  625. case 15:
  626. case 16:
  627. break;
  628. default:
  629. return -EINVAL;
  630. }
  631. return 0;
  632. }
  633. static int gcmaes_encrypt(struct aead_request *req, unsigned int assoclen,
  634. u8 *hash_subkey, u8 *iv, void *aes_ctx)
  635. {
  636. u8 one_entry_in_sg = 0;
  637. u8 *src, *dst, *assoc;
  638. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  639. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  640. struct scatter_walk src_sg_walk;
  641. struct scatter_walk dst_sg_walk = {};
  642. if (sg_is_last(req->src) &&
  643. (!PageHighMem(sg_page(req->src)) ||
  644. req->src->offset + req->src->length <= PAGE_SIZE) &&
  645. sg_is_last(req->dst) &&
  646. (!PageHighMem(sg_page(req->dst)) ||
  647. req->dst->offset + req->dst->length <= PAGE_SIZE)) {
  648. one_entry_in_sg = 1;
  649. scatterwalk_start(&src_sg_walk, req->src);
  650. assoc = scatterwalk_map(&src_sg_walk);
  651. src = assoc + req->assoclen;
  652. dst = src;
  653. if (unlikely(req->src != req->dst)) {
  654. scatterwalk_start(&dst_sg_walk, req->dst);
  655. dst = scatterwalk_map(&dst_sg_walk) + req->assoclen;
  656. }
  657. } else {
  658. /* Allocate memory for src, dst, assoc */
  659. assoc = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  660. GFP_ATOMIC);
  661. if (unlikely(!assoc))
  662. return -ENOMEM;
  663. scatterwalk_map_and_copy(assoc, req->src, 0,
  664. req->assoclen + req->cryptlen, 0);
  665. src = assoc + req->assoclen;
  666. dst = src;
  667. }
  668. kernel_fpu_begin();
  669. aesni_gcm_enc_tfm(aes_ctx, dst, src, req->cryptlen, iv,
  670. hash_subkey, assoc, assoclen,
  671. dst + req->cryptlen, auth_tag_len);
  672. kernel_fpu_end();
  673. /* The authTag (aka the Integrity Check Value) needs to be written
  674. * back to the packet. */
  675. if (one_entry_in_sg) {
  676. if (unlikely(req->src != req->dst)) {
  677. scatterwalk_unmap(dst - req->assoclen);
  678. scatterwalk_advance(&dst_sg_walk, req->dst->length);
  679. scatterwalk_done(&dst_sg_walk, 1, 0);
  680. }
  681. scatterwalk_unmap(assoc);
  682. scatterwalk_advance(&src_sg_walk, req->src->length);
  683. scatterwalk_done(&src_sg_walk, req->src == req->dst, 0);
  684. } else {
  685. scatterwalk_map_and_copy(dst, req->dst, req->assoclen,
  686. req->cryptlen + auth_tag_len, 1);
  687. kfree(assoc);
  688. }
  689. return 0;
  690. }
  691. static int gcmaes_decrypt(struct aead_request *req, unsigned int assoclen,
  692. u8 *hash_subkey, u8 *iv, void *aes_ctx)
  693. {
  694. u8 one_entry_in_sg = 0;
  695. u8 *src, *dst, *assoc;
  696. unsigned long tempCipherLen = 0;
  697. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  698. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  699. u8 authTag[16];
  700. struct scatter_walk src_sg_walk;
  701. struct scatter_walk dst_sg_walk = {};
  702. int retval = 0;
  703. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  704. if (sg_is_last(req->src) &&
  705. (!PageHighMem(sg_page(req->src)) ||
  706. req->src->offset + req->src->length <= PAGE_SIZE) &&
  707. sg_is_last(req->dst) && req->dst->length &&
  708. (!PageHighMem(sg_page(req->dst)) ||
  709. req->dst->offset + req->dst->length <= PAGE_SIZE)) {
  710. one_entry_in_sg = 1;
  711. scatterwalk_start(&src_sg_walk, req->src);
  712. assoc = scatterwalk_map(&src_sg_walk);
  713. src = assoc + req->assoclen;
  714. dst = src;
  715. if (unlikely(req->src != req->dst)) {
  716. scatterwalk_start(&dst_sg_walk, req->dst);
  717. dst = scatterwalk_map(&dst_sg_walk) + req->assoclen;
  718. }
  719. } else {
  720. /* Allocate memory for src, dst, assoc */
  721. assoc = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  722. if (!assoc)
  723. return -ENOMEM;
  724. scatterwalk_map_and_copy(assoc, req->src, 0,
  725. req->assoclen + req->cryptlen, 0);
  726. src = assoc + req->assoclen;
  727. dst = src;
  728. }
  729. kernel_fpu_begin();
  730. aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,
  731. hash_subkey, assoc, assoclen,
  732. authTag, auth_tag_len);
  733. kernel_fpu_end();
  734. /* Compare generated tag with passed in tag. */
  735. retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?
  736. -EBADMSG : 0;
  737. if (one_entry_in_sg) {
  738. if (unlikely(req->src != req->dst)) {
  739. scatterwalk_unmap(dst - req->assoclen);
  740. scatterwalk_advance(&dst_sg_walk, req->dst->length);
  741. scatterwalk_done(&dst_sg_walk, 1, 0);
  742. }
  743. scatterwalk_unmap(assoc);
  744. scatterwalk_advance(&src_sg_walk, req->src->length);
  745. scatterwalk_done(&src_sg_walk, req->src == req->dst, 0);
  746. } else {
  747. scatterwalk_map_and_copy(dst, req->dst, req->assoclen,
  748. tempCipherLen, 1);
  749. kfree(assoc);
  750. }
  751. return retval;
  752. }
  753. static int helper_rfc4106_encrypt(struct aead_request *req)
  754. {
  755. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  756. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  757. void *aes_ctx = &(ctx->aes_key_expanded);
  758. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  759. unsigned int i;
  760. __be32 counter = cpu_to_be32(1);
  761. /* Assuming we are supporting rfc4106 64-bit extended */
  762. /* sequence numbers We need to have the AAD length equal */
  763. /* to 16 or 20 bytes */
  764. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  765. return -EINVAL;
  766. /* IV below built */
  767. for (i = 0; i < 4; i++)
  768. *(iv+i) = ctx->nonce[i];
  769. for (i = 0; i < 8; i++)
  770. *(iv+4+i) = req->iv[i];
  771. *((__be32 *)(iv+12)) = counter;
  772. return gcmaes_encrypt(req, req->assoclen - 8, ctx->hash_subkey, iv,
  773. aes_ctx);
  774. }
  775. static int helper_rfc4106_decrypt(struct aead_request *req)
  776. {
  777. __be32 counter = cpu_to_be32(1);
  778. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  779. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  780. void *aes_ctx = &(ctx->aes_key_expanded);
  781. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  782. unsigned int i;
  783. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  784. return -EINVAL;
  785. /* Assuming we are supporting rfc4106 64-bit extended */
  786. /* sequence numbers We need to have the AAD length */
  787. /* equal to 16 or 20 bytes */
  788. /* IV below built */
  789. for (i = 0; i < 4; i++)
  790. *(iv+i) = ctx->nonce[i];
  791. for (i = 0; i < 8; i++)
  792. *(iv+4+i) = req->iv[i];
  793. *((__be32 *)(iv+12)) = counter;
  794. return gcmaes_decrypt(req, req->assoclen - 8, ctx->hash_subkey, iv,
  795. aes_ctx);
  796. }
  797. static int gcmaes_wrapper_encrypt(struct aead_request *req)
  798. {
  799. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  800. struct cryptd_aead **ctx = crypto_aead_ctx(tfm);
  801. struct cryptd_aead *cryptd_tfm = *ctx;
  802. tfm = &cryptd_tfm->base;
  803. if (irq_fpu_usable() && (!in_atomic() ||
  804. !cryptd_aead_queued(cryptd_tfm)))
  805. tfm = cryptd_aead_child(cryptd_tfm);
  806. aead_request_set_tfm(req, tfm);
  807. return crypto_aead_encrypt(req);
  808. }
  809. static int gcmaes_wrapper_decrypt(struct aead_request *req)
  810. {
  811. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  812. struct cryptd_aead **ctx = crypto_aead_ctx(tfm);
  813. struct cryptd_aead *cryptd_tfm = *ctx;
  814. tfm = &cryptd_tfm->base;
  815. if (irq_fpu_usable() && (!in_atomic() ||
  816. !cryptd_aead_queued(cryptd_tfm)))
  817. tfm = cryptd_aead_child(cryptd_tfm);
  818. aead_request_set_tfm(req, tfm);
  819. return crypto_aead_decrypt(req);
  820. }
  821. #endif
  822. static struct crypto_alg aesni_algs[] = { {
  823. .cra_name = "aes",
  824. .cra_driver_name = "aes-aesni",
  825. .cra_priority = 300,
  826. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  827. .cra_blocksize = AES_BLOCK_SIZE,
  828. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  829. .cra_module = THIS_MODULE,
  830. .cra_u = {
  831. .cipher = {
  832. .cia_min_keysize = AES_MIN_KEY_SIZE,
  833. .cia_max_keysize = AES_MAX_KEY_SIZE,
  834. .cia_setkey = aes_set_key,
  835. .cia_encrypt = aes_encrypt,
  836. .cia_decrypt = aes_decrypt
  837. }
  838. }
  839. }, {
  840. .cra_name = "__aes",
  841. .cra_driver_name = "__aes-aesni",
  842. .cra_priority = 300,
  843. .cra_flags = CRYPTO_ALG_TYPE_CIPHER | CRYPTO_ALG_INTERNAL,
  844. .cra_blocksize = AES_BLOCK_SIZE,
  845. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  846. .cra_module = THIS_MODULE,
  847. .cra_u = {
  848. .cipher = {
  849. .cia_min_keysize = AES_MIN_KEY_SIZE,
  850. .cia_max_keysize = AES_MAX_KEY_SIZE,
  851. .cia_setkey = aes_set_key,
  852. .cia_encrypt = __aes_encrypt,
  853. .cia_decrypt = __aes_decrypt
  854. }
  855. }
  856. } };
  857. static struct skcipher_alg aesni_skciphers[] = {
  858. {
  859. .base = {
  860. .cra_name = "__ecb(aes)",
  861. .cra_driver_name = "__ecb-aes-aesni",
  862. .cra_priority = 400,
  863. .cra_flags = CRYPTO_ALG_INTERNAL,
  864. .cra_blocksize = AES_BLOCK_SIZE,
  865. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  866. .cra_module = THIS_MODULE,
  867. },
  868. .min_keysize = AES_MIN_KEY_SIZE,
  869. .max_keysize = AES_MAX_KEY_SIZE,
  870. .setkey = aesni_skcipher_setkey,
  871. .encrypt = ecb_encrypt,
  872. .decrypt = ecb_decrypt,
  873. }, {
  874. .base = {
  875. .cra_name = "__cbc(aes)",
  876. .cra_driver_name = "__cbc-aes-aesni",
  877. .cra_priority = 400,
  878. .cra_flags = CRYPTO_ALG_INTERNAL,
  879. .cra_blocksize = AES_BLOCK_SIZE,
  880. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  881. .cra_module = THIS_MODULE,
  882. },
  883. .min_keysize = AES_MIN_KEY_SIZE,
  884. .max_keysize = AES_MAX_KEY_SIZE,
  885. .ivsize = AES_BLOCK_SIZE,
  886. .setkey = aesni_skcipher_setkey,
  887. .encrypt = cbc_encrypt,
  888. .decrypt = cbc_decrypt,
  889. #ifdef CONFIG_X86_64
  890. }, {
  891. .base = {
  892. .cra_name = "__ctr(aes)",
  893. .cra_driver_name = "__ctr-aes-aesni",
  894. .cra_priority = 400,
  895. .cra_flags = CRYPTO_ALG_INTERNAL,
  896. .cra_blocksize = 1,
  897. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  898. .cra_module = THIS_MODULE,
  899. },
  900. .min_keysize = AES_MIN_KEY_SIZE,
  901. .max_keysize = AES_MAX_KEY_SIZE,
  902. .ivsize = AES_BLOCK_SIZE,
  903. .chunksize = AES_BLOCK_SIZE,
  904. .setkey = aesni_skcipher_setkey,
  905. .encrypt = ctr_crypt,
  906. .decrypt = ctr_crypt,
  907. }, {
  908. .base = {
  909. .cra_name = "__xts(aes)",
  910. .cra_driver_name = "__xts-aes-aesni",
  911. .cra_priority = 401,
  912. .cra_flags = CRYPTO_ALG_INTERNAL,
  913. .cra_blocksize = AES_BLOCK_SIZE,
  914. .cra_ctxsize = XTS_AES_CTX_SIZE,
  915. .cra_module = THIS_MODULE,
  916. },
  917. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  918. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  919. .ivsize = AES_BLOCK_SIZE,
  920. .setkey = xts_aesni_setkey,
  921. .encrypt = xts_encrypt,
  922. .decrypt = xts_decrypt,
  923. #endif
  924. }
  925. };
  926. static
  927. struct simd_skcipher_alg *aesni_simd_skciphers[ARRAY_SIZE(aesni_skciphers)];
  928. static struct {
  929. const char *algname;
  930. const char *drvname;
  931. const char *basename;
  932. struct simd_skcipher_alg *simd;
  933. } aesni_simd_skciphers2[] = {
  934. #if (defined(MODULE) && IS_ENABLED(CONFIG_CRYPTO_PCBC)) || \
  935. IS_BUILTIN(CONFIG_CRYPTO_PCBC)
  936. {
  937. .algname = "pcbc(aes)",
  938. .drvname = "pcbc-aes-aesni",
  939. .basename = "fpu(pcbc(__aes-aesni))",
  940. },
  941. #endif
  942. };
  943. #ifdef CONFIG_X86_64
  944. static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key,
  945. unsigned int key_len)
  946. {
  947. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(aead);
  948. return aes_set_key_common(crypto_aead_tfm(aead),
  949. &ctx->aes_key_expanded, key, key_len) ?:
  950. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  951. }
  952. static int generic_gcmaes_encrypt(struct aead_request *req)
  953. {
  954. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  955. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm);
  956. void *aes_ctx = &(ctx->aes_key_expanded);
  957. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  958. __be32 counter = cpu_to_be32(1);
  959. memcpy(iv, req->iv, 12);
  960. *((__be32 *)(iv+12)) = counter;
  961. return gcmaes_encrypt(req, req->assoclen, ctx->hash_subkey, iv,
  962. aes_ctx);
  963. }
  964. static int generic_gcmaes_decrypt(struct aead_request *req)
  965. {
  966. __be32 counter = cpu_to_be32(1);
  967. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  968. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm);
  969. void *aes_ctx = &(ctx->aes_key_expanded);
  970. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  971. memcpy(iv, req->iv, 12);
  972. *((__be32 *)(iv+12)) = counter;
  973. return gcmaes_decrypt(req, req->assoclen, ctx->hash_subkey, iv,
  974. aes_ctx);
  975. }
  976. static int generic_gcmaes_init(struct crypto_aead *aead)
  977. {
  978. struct cryptd_aead *cryptd_tfm;
  979. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  980. cryptd_tfm = cryptd_alloc_aead("__driver-generic-gcm-aes-aesni",
  981. CRYPTO_ALG_INTERNAL,
  982. CRYPTO_ALG_INTERNAL);
  983. if (IS_ERR(cryptd_tfm))
  984. return PTR_ERR(cryptd_tfm);
  985. *ctx = cryptd_tfm;
  986. crypto_aead_set_reqsize(aead, crypto_aead_reqsize(&cryptd_tfm->base));
  987. return 0;
  988. }
  989. static void generic_gcmaes_exit(struct crypto_aead *aead)
  990. {
  991. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  992. cryptd_free_aead(*ctx);
  993. }
  994. static struct aead_alg aesni_aead_algs[] = { {
  995. .setkey = common_rfc4106_set_key,
  996. .setauthsize = common_rfc4106_set_authsize,
  997. .encrypt = helper_rfc4106_encrypt,
  998. .decrypt = helper_rfc4106_decrypt,
  999. .ivsize = GCM_RFC4106_IV_SIZE,
  1000. .maxauthsize = 16,
  1001. .base = {
  1002. .cra_name = "__gcm-aes-aesni",
  1003. .cra_driver_name = "__driver-gcm-aes-aesni",
  1004. .cra_flags = CRYPTO_ALG_INTERNAL,
  1005. .cra_blocksize = 1,
  1006. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx),
  1007. .cra_alignmask = AESNI_ALIGN - 1,
  1008. .cra_module = THIS_MODULE,
  1009. },
  1010. }, {
  1011. .init = rfc4106_init,
  1012. .exit = rfc4106_exit,
  1013. .setkey = gcmaes_wrapper_set_key,
  1014. .setauthsize = gcmaes_wrapper_set_authsize,
  1015. .encrypt = gcmaes_wrapper_encrypt,
  1016. .decrypt = gcmaes_wrapper_decrypt,
  1017. .ivsize = GCM_RFC4106_IV_SIZE,
  1018. .maxauthsize = 16,
  1019. .base = {
  1020. .cra_name = "rfc4106(gcm(aes))",
  1021. .cra_driver_name = "rfc4106-gcm-aesni",
  1022. .cra_priority = 400,
  1023. .cra_flags = CRYPTO_ALG_ASYNC,
  1024. .cra_blocksize = 1,
  1025. .cra_ctxsize = sizeof(struct cryptd_aead *),
  1026. .cra_module = THIS_MODULE,
  1027. },
  1028. }, {
  1029. .setkey = generic_gcmaes_set_key,
  1030. .setauthsize = generic_gcmaes_set_authsize,
  1031. .encrypt = generic_gcmaes_encrypt,
  1032. .decrypt = generic_gcmaes_decrypt,
  1033. .ivsize = GCM_AES_IV_SIZE,
  1034. .maxauthsize = 16,
  1035. .base = {
  1036. .cra_name = "__generic-gcm-aes-aesni",
  1037. .cra_driver_name = "__driver-generic-gcm-aes-aesni",
  1038. .cra_priority = 0,
  1039. .cra_flags = CRYPTO_ALG_INTERNAL,
  1040. .cra_blocksize = 1,
  1041. .cra_ctxsize = sizeof(struct generic_gcmaes_ctx),
  1042. .cra_alignmask = AESNI_ALIGN - 1,
  1043. .cra_module = THIS_MODULE,
  1044. },
  1045. }, {
  1046. .init = generic_gcmaes_init,
  1047. .exit = generic_gcmaes_exit,
  1048. .setkey = gcmaes_wrapper_set_key,
  1049. .setauthsize = gcmaes_wrapper_set_authsize,
  1050. .encrypt = gcmaes_wrapper_encrypt,
  1051. .decrypt = gcmaes_wrapper_decrypt,
  1052. .ivsize = GCM_AES_IV_SIZE,
  1053. .maxauthsize = 16,
  1054. .base = {
  1055. .cra_name = "gcm(aes)",
  1056. .cra_driver_name = "generic-gcm-aesni",
  1057. .cra_priority = 400,
  1058. .cra_flags = CRYPTO_ALG_ASYNC,
  1059. .cra_blocksize = 1,
  1060. .cra_ctxsize = sizeof(struct cryptd_aead *),
  1061. .cra_module = THIS_MODULE,
  1062. },
  1063. } };
  1064. #else
  1065. static struct aead_alg aesni_aead_algs[0];
  1066. #endif
  1067. static const struct x86_cpu_id aesni_cpu_id[] = {
  1068. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1069. {}
  1070. };
  1071. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1072. static void aesni_free_simds(void)
  1073. {
  1074. int i;
  1075. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers) &&
  1076. aesni_simd_skciphers[i]; i++)
  1077. simd_skcipher_free(aesni_simd_skciphers[i]);
  1078. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++)
  1079. if (aesni_simd_skciphers2[i].simd)
  1080. simd_skcipher_free(aesni_simd_skciphers2[i].simd);
  1081. }
  1082. static int __init aesni_init(void)
  1083. {
  1084. struct simd_skcipher_alg *simd;
  1085. const char *basename;
  1086. const char *algname;
  1087. const char *drvname;
  1088. int err;
  1089. int i;
  1090. if (!x86_match_cpu(aesni_cpu_id))
  1091. return -ENODEV;
  1092. #ifdef CONFIG_X86_64
  1093. #ifdef CONFIG_AS_AVX2
  1094. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  1095. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  1096. aesni_gcm_enc_tfm = aesni_gcm_enc_avx2;
  1097. aesni_gcm_dec_tfm = aesni_gcm_dec_avx2;
  1098. } else
  1099. #endif
  1100. #ifdef CONFIG_AS_AVX
  1101. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1102. pr_info("AVX version of gcm_enc/dec engaged.\n");
  1103. aesni_gcm_enc_tfm = aesni_gcm_enc_avx;
  1104. aesni_gcm_dec_tfm = aesni_gcm_dec_avx;
  1105. } else
  1106. #endif
  1107. {
  1108. pr_info("SSE version of gcm_enc/dec engaged.\n");
  1109. aesni_gcm_enc_tfm = aesni_gcm_enc;
  1110. aesni_gcm_dec_tfm = aesni_gcm_dec;
  1111. }
  1112. aesni_ctr_enc_tfm = aesni_ctr_enc;
  1113. #ifdef CONFIG_AS_AVX
  1114. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1115. /* optimize performance of ctr mode encryption transform */
  1116. aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
  1117. pr_info("AES CTR mode by8 optimization enabled\n");
  1118. }
  1119. #endif
  1120. #endif
  1121. err = crypto_fpu_init();
  1122. if (err)
  1123. return err;
  1124. err = crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1125. if (err)
  1126. goto fpu_exit;
  1127. err = crypto_register_skciphers(aesni_skciphers,
  1128. ARRAY_SIZE(aesni_skciphers));
  1129. if (err)
  1130. goto unregister_algs;
  1131. err = crypto_register_aeads(aesni_aead_algs,
  1132. ARRAY_SIZE(aesni_aead_algs));
  1133. if (err)
  1134. goto unregister_skciphers;
  1135. for (i = 0; i < ARRAY_SIZE(aesni_skciphers); i++) {
  1136. algname = aesni_skciphers[i].base.cra_name + 2;
  1137. drvname = aesni_skciphers[i].base.cra_driver_name + 2;
  1138. basename = aesni_skciphers[i].base.cra_driver_name;
  1139. simd = simd_skcipher_create_compat(algname, drvname, basename);
  1140. err = PTR_ERR(simd);
  1141. if (IS_ERR(simd))
  1142. goto unregister_simds;
  1143. aesni_simd_skciphers[i] = simd;
  1144. }
  1145. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++) {
  1146. algname = aesni_simd_skciphers2[i].algname;
  1147. drvname = aesni_simd_skciphers2[i].drvname;
  1148. basename = aesni_simd_skciphers2[i].basename;
  1149. simd = simd_skcipher_create_compat(algname, drvname, basename);
  1150. err = PTR_ERR(simd);
  1151. if (IS_ERR(simd))
  1152. continue;
  1153. aesni_simd_skciphers2[i].simd = simd;
  1154. }
  1155. return 0;
  1156. unregister_simds:
  1157. aesni_free_simds();
  1158. crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));
  1159. unregister_skciphers:
  1160. crypto_unregister_skciphers(aesni_skciphers,
  1161. ARRAY_SIZE(aesni_skciphers));
  1162. unregister_algs:
  1163. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1164. fpu_exit:
  1165. crypto_fpu_exit();
  1166. return err;
  1167. }
  1168. static void __exit aesni_exit(void)
  1169. {
  1170. aesni_free_simds();
  1171. crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));
  1172. crypto_unregister_skciphers(aesni_skciphers,
  1173. ARRAY_SIZE(aesni_skciphers));
  1174. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1175. crypto_fpu_exit();
  1176. }
  1177. late_initcall(aesni_init);
  1178. module_exit(aesni_exit);
  1179. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1180. MODULE_LICENSE("GPL");
  1181. MODULE_ALIAS_CRYPTO("aes");