hw_breakpoint.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422
  1. /*
  2. * arch/sh/kernel/hw_breakpoint.c
  3. *
  4. * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
  5. *
  6. * Copyright (C) 2009 - 2010 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/perf_event.h>
  14. #include <linux/sched/signal.h>
  15. #include <linux/hw_breakpoint.h>
  16. #include <linux/percpu.h>
  17. #include <linux/kallsyms.h>
  18. #include <linux/notifier.h>
  19. #include <linux/kprobes.h>
  20. #include <linux/kdebug.h>
  21. #include <linux/io.h>
  22. #include <linux/clk.h>
  23. #include <asm/hw_breakpoint.h>
  24. #include <asm/mmu_context.h>
  25. #include <asm/ptrace.h>
  26. #include <asm/traps.h>
  27. /*
  28. * Stores the breakpoints currently in use on each breakpoint address
  29. * register for each cpus
  30. */
  31. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  32. /*
  33. * A dummy placeholder for early accesses until the CPUs get a chance to
  34. * register their UBCs later in the boot process.
  35. */
  36. static struct sh_ubc ubc_dummy = { .num_events = 0 };
  37. static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
  38. /*
  39. * Install a perf counter breakpoint.
  40. *
  41. * We seek a free UBC channel and use it for this breakpoint.
  42. *
  43. * Atomic: we hold the counter->ctx->lock and we only handle variables
  44. * and registers local to this cpu.
  45. */
  46. int arch_install_hw_breakpoint(struct perf_event *bp)
  47. {
  48. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  49. int i;
  50. for (i = 0; i < sh_ubc->num_events; i++) {
  51. struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
  52. if (!*slot) {
  53. *slot = bp;
  54. break;
  55. }
  56. }
  57. if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
  58. return -EBUSY;
  59. clk_enable(sh_ubc->clk);
  60. sh_ubc->enable(info, i);
  61. return 0;
  62. }
  63. /*
  64. * Uninstall the breakpoint contained in the given counter.
  65. *
  66. * First we search the debug address register it uses and then we disable
  67. * it.
  68. *
  69. * Atomic: we hold the counter->ctx->lock and we only handle variables
  70. * and registers local to this cpu.
  71. */
  72. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  73. {
  74. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  75. int i;
  76. for (i = 0; i < sh_ubc->num_events; i++) {
  77. struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
  78. if (*slot == bp) {
  79. *slot = NULL;
  80. break;
  81. }
  82. }
  83. if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
  84. return;
  85. sh_ubc->disable(info, i);
  86. clk_disable(sh_ubc->clk);
  87. }
  88. static int get_hbp_len(u16 hbp_len)
  89. {
  90. unsigned int len_in_bytes = 0;
  91. switch (hbp_len) {
  92. case SH_BREAKPOINT_LEN_1:
  93. len_in_bytes = 1;
  94. break;
  95. case SH_BREAKPOINT_LEN_2:
  96. len_in_bytes = 2;
  97. break;
  98. case SH_BREAKPOINT_LEN_4:
  99. len_in_bytes = 4;
  100. break;
  101. case SH_BREAKPOINT_LEN_8:
  102. len_in_bytes = 8;
  103. break;
  104. }
  105. return len_in_bytes;
  106. }
  107. /*
  108. * Check for virtual address in kernel space.
  109. */
  110. int arch_check_bp_in_kernelspace(struct perf_event *bp)
  111. {
  112. unsigned int len;
  113. unsigned long va;
  114. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  115. va = info->address;
  116. len = get_hbp_len(info->len);
  117. return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
  118. }
  119. int arch_bp_generic_fields(int sh_len, int sh_type,
  120. int *gen_len, int *gen_type)
  121. {
  122. /* Len */
  123. switch (sh_len) {
  124. case SH_BREAKPOINT_LEN_1:
  125. *gen_len = HW_BREAKPOINT_LEN_1;
  126. break;
  127. case SH_BREAKPOINT_LEN_2:
  128. *gen_len = HW_BREAKPOINT_LEN_2;
  129. break;
  130. case SH_BREAKPOINT_LEN_4:
  131. *gen_len = HW_BREAKPOINT_LEN_4;
  132. break;
  133. case SH_BREAKPOINT_LEN_8:
  134. *gen_len = HW_BREAKPOINT_LEN_8;
  135. break;
  136. default:
  137. return -EINVAL;
  138. }
  139. /* Type */
  140. switch (sh_type) {
  141. case SH_BREAKPOINT_READ:
  142. *gen_type = HW_BREAKPOINT_R;
  143. case SH_BREAKPOINT_WRITE:
  144. *gen_type = HW_BREAKPOINT_W;
  145. break;
  146. case SH_BREAKPOINT_RW:
  147. *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
  148. break;
  149. default:
  150. return -EINVAL;
  151. }
  152. return 0;
  153. }
  154. static int arch_build_bp_info(struct perf_event *bp)
  155. {
  156. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  157. info->address = bp->attr.bp_addr;
  158. /* Len */
  159. switch (bp->attr.bp_len) {
  160. case HW_BREAKPOINT_LEN_1:
  161. info->len = SH_BREAKPOINT_LEN_1;
  162. break;
  163. case HW_BREAKPOINT_LEN_2:
  164. info->len = SH_BREAKPOINT_LEN_2;
  165. break;
  166. case HW_BREAKPOINT_LEN_4:
  167. info->len = SH_BREAKPOINT_LEN_4;
  168. break;
  169. case HW_BREAKPOINT_LEN_8:
  170. info->len = SH_BREAKPOINT_LEN_8;
  171. break;
  172. default:
  173. return -EINVAL;
  174. }
  175. /* Type */
  176. switch (bp->attr.bp_type) {
  177. case HW_BREAKPOINT_R:
  178. info->type = SH_BREAKPOINT_READ;
  179. break;
  180. case HW_BREAKPOINT_W:
  181. info->type = SH_BREAKPOINT_WRITE;
  182. break;
  183. case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
  184. info->type = SH_BREAKPOINT_RW;
  185. break;
  186. default:
  187. return -EINVAL;
  188. }
  189. return 0;
  190. }
  191. /*
  192. * Validate the arch-specific HW Breakpoint register settings
  193. */
  194. int arch_validate_hwbkpt_settings(struct perf_event *bp)
  195. {
  196. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  197. unsigned int align;
  198. int ret;
  199. ret = arch_build_bp_info(bp);
  200. if (ret)
  201. return ret;
  202. ret = -EINVAL;
  203. switch (info->len) {
  204. case SH_BREAKPOINT_LEN_1:
  205. align = 0;
  206. break;
  207. case SH_BREAKPOINT_LEN_2:
  208. align = 1;
  209. break;
  210. case SH_BREAKPOINT_LEN_4:
  211. align = 3;
  212. break;
  213. case SH_BREAKPOINT_LEN_8:
  214. align = 7;
  215. break;
  216. default:
  217. return ret;
  218. }
  219. /*
  220. * For kernel-addresses, either the address or symbol name can be
  221. * specified.
  222. */
  223. if (info->name)
  224. info->address = (unsigned long)kallsyms_lookup_name(info->name);
  225. /*
  226. * Check that the low-order bits of the address are appropriate
  227. * for the alignment implied by len.
  228. */
  229. if (info->address & align)
  230. return -EINVAL;
  231. return 0;
  232. }
  233. /*
  234. * Release the user breakpoints used by ptrace
  235. */
  236. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  237. {
  238. int i;
  239. struct thread_struct *t = &tsk->thread;
  240. for (i = 0; i < sh_ubc->num_events; i++) {
  241. unregister_hw_breakpoint(t->ptrace_bps[i]);
  242. t->ptrace_bps[i] = NULL;
  243. }
  244. }
  245. static int __kprobes hw_breakpoint_handler(struct die_args *args)
  246. {
  247. int cpu, i, rc = NOTIFY_STOP;
  248. struct perf_event *bp;
  249. unsigned int cmf, resume_mask;
  250. /*
  251. * Do an early return if none of the channels triggered.
  252. */
  253. cmf = sh_ubc->triggered_mask();
  254. if (unlikely(!cmf))
  255. return NOTIFY_DONE;
  256. /*
  257. * By default, resume all of the active channels.
  258. */
  259. resume_mask = sh_ubc->active_mask();
  260. /*
  261. * Disable breakpoints during exception handling.
  262. */
  263. sh_ubc->disable_all();
  264. cpu = get_cpu();
  265. for (i = 0; i < sh_ubc->num_events; i++) {
  266. unsigned long event_mask = (1 << i);
  267. if (likely(!(cmf & event_mask)))
  268. continue;
  269. /*
  270. * The counter may be concurrently released but that can only
  271. * occur from a call_rcu() path. We can then safely fetch
  272. * the breakpoint, use its callback, touch its counter
  273. * while we are in an rcu_read_lock() path.
  274. */
  275. rcu_read_lock();
  276. bp = per_cpu(bp_per_reg[i], cpu);
  277. if (bp)
  278. rc = NOTIFY_DONE;
  279. /*
  280. * Reset the condition match flag to denote completion of
  281. * exception handling.
  282. */
  283. sh_ubc->clear_triggered_mask(event_mask);
  284. /*
  285. * bp can be NULL due to concurrent perf counter
  286. * removing.
  287. */
  288. if (!bp) {
  289. rcu_read_unlock();
  290. break;
  291. }
  292. /*
  293. * Don't restore the channel if the breakpoint is from
  294. * ptrace, as it always operates in one-shot mode.
  295. */
  296. if (bp->overflow_handler == ptrace_triggered)
  297. resume_mask &= ~(1 << i);
  298. perf_bp_event(bp, args->regs);
  299. /* Deliver the signal to userspace */
  300. if (!arch_check_bp_in_kernelspace(bp)) {
  301. siginfo_t info;
  302. info.si_signo = args->signr;
  303. info.si_errno = notifier_to_errno(rc);
  304. info.si_code = TRAP_HWBKPT;
  305. force_sig_info(args->signr, &info, current);
  306. }
  307. rcu_read_unlock();
  308. }
  309. if (cmf == 0)
  310. rc = NOTIFY_DONE;
  311. sh_ubc->enable_all(resume_mask);
  312. put_cpu();
  313. return rc;
  314. }
  315. BUILD_TRAP_HANDLER(breakpoint)
  316. {
  317. unsigned long ex = lookup_exception_vector();
  318. TRAP_HANDLER_DECL;
  319. notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
  320. }
  321. /*
  322. * Handle debug exception notifications.
  323. */
  324. int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
  325. unsigned long val, void *data)
  326. {
  327. struct die_args *args = data;
  328. if (val != DIE_BREAKPOINT)
  329. return NOTIFY_DONE;
  330. /*
  331. * If the breakpoint hasn't been triggered by the UBC, it's
  332. * probably from a debugger, so don't do anything more here.
  333. *
  334. * This also permits the UBC interface clock to remain off for
  335. * non-UBC breakpoints, as we don't need to check the triggered
  336. * or active channel masks.
  337. */
  338. if (args->trapnr != sh_ubc->trap_nr)
  339. return NOTIFY_DONE;
  340. return hw_breakpoint_handler(data);
  341. }
  342. void hw_breakpoint_pmu_read(struct perf_event *bp)
  343. {
  344. /* TODO */
  345. }
  346. int register_sh_ubc(struct sh_ubc *ubc)
  347. {
  348. /* Bail if it's already assigned */
  349. if (sh_ubc != &ubc_dummy)
  350. return -EBUSY;
  351. sh_ubc = ubc;
  352. pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
  353. WARN_ON(ubc->num_events > HBP_NUM);
  354. return 0;
  355. }