smp.c 30 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <asm/asm-offsets.h>
  33. #include <asm/switch_to.h>
  34. #include <asm/facility.h>
  35. #include <asm/ipl.h>
  36. #include <asm/setup.h>
  37. #include <asm/irq.h>
  38. #include <asm/tlbflush.h>
  39. #include <asm/vtimer.h>
  40. #include <asm/lowcore.h>
  41. #include <asm/sclp.h>
  42. #include <asm/vdso.h>
  43. #include <asm/debug.h>
  44. #include <asm/os_info.h>
  45. #include <asm/sigp.h>
  46. #include <asm/idle.h>
  47. #include "entry.h"
  48. enum {
  49. ec_schedule = 0,
  50. ec_call_function_single,
  51. ec_stop_cpu,
  52. };
  53. enum {
  54. CPU_STATE_STANDBY,
  55. CPU_STATE_CONFIGURED,
  56. };
  57. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  58. struct pcpu {
  59. struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
  60. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  61. signed char state; /* physical cpu state */
  62. signed char polarization; /* physical polarization */
  63. u16 address; /* physical cpu address */
  64. };
  65. static u8 boot_cpu_type;
  66. static struct pcpu pcpu_devices[NR_CPUS];
  67. unsigned int smp_cpu_mt_shift;
  68. EXPORT_SYMBOL(smp_cpu_mt_shift);
  69. unsigned int smp_cpu_mtid;
  70. EXPORT_SYMBOL(smp_cpu_mtid);
  71. static unsigned int smp_max_threads __initdata = -1U;
  72. static int __init early_nosmt(char *s)
  73. {
  74. smp_max_threads = 1;
  75. return 0;
  76. }
  77. early_param("nosmt", early_nosmt);
  78. static int __init early_smt(char *s)
  79. {
  80. get_option(&s, &smp_max_threads);
  81. return 0;
  82. }
  83. early_param("smt", early_smt);
  84. /*
  85. * The smp_cpu_state_mutex must be held when changing the state or polarization
  86. * member of a pcpu data structure within the pcpu_devices arreay.
  87. */
  88. DEFINE_MUTEX(smp_cpu_state_mutex);
  89. /*
  90. * Signal processor helper functions.
  91. */
  92. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm,
  93. u32 *status)
  94. {
  95. int cc;
  96. while (1) {
  97. cc = __pcpu_sigp(addr, order, parm, NULL);
  98. if (cc != SIGP_CC_BUSY)
  99. return cc;
  100. cpu_relax();
  101. }
  102. }
  103. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  104. {
  105. int cc, retry;
  106. for (retry = 0; ; retry++) {
  107. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  108. if (cc != SIGP_CC_BUSY)
  109. break;
  110. if (retry >= 3)
  111. udelay(10);
  112. }
  113. return cc;
  114. }
  115. static inline int pcpu_stopped(struct pcpu *pcpu)
  116. {
  117. u32 uninitialized_var(status);
  118. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  119. 0, &status) != SIGP_CC_STATUS_STORED)
  120. return 0;
  121. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  122. }
  123. static inline int pcpu_running(struct pcpu *pcpu)
  124. {
  125. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  126. 0, NULL) != SIGP_CC_STATUS_STORED)
  127. return 1;
  128. /* Status stored condition code is equivalent to cpu not running. */
  129. return 0;
  130. }
  131. /*
  132. * Find struct pcpu by cpu address.
  133. */
  134. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  135. {
  136. int cpu;
  137. for_each_cpu(cpu, mask)
  138. if (pcpu_devices[cpu].address == address)
  139. return pcpu_devices + cpu;
  140. return NULL;
  141. }
  142. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  143. {
  144. int order;
  145. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  146. return;
  147. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  148. pcpu_sigp_retry(pcpu, order, 0);
  149. }
  150. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  151. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  152. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  153. {
  154. unsigned long async_stack, panic_stack;
  155. struct _lowcore *lc;
  156. if (pcpu != &pcpu_devices[0]) {
  157. pcpu->lowcore = (struct _lowcore *)
  158. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  159. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  160. panic_stack = __get_free_page(GFP_KERNEL);
  161. if (!pcpu->lowcore || !panic_stack || !async_stack)
  162. goto out;
  163. } else {
  164. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  165. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  166. }
  167. lc = pcpu->lowcore;
  168. memcpy(lc, &S390_lowcore, 512);
  169. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  170. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  171. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  172. lc->cpu_nr = cpu;
  173. lc->spinlock_lockval = arch_spin_lockval(cpu);
  174. #ifndef CONFIG_64BIT
  175. if (MACHINE_HAS_IEEE) {
  176. lc->extended_save_area_addr = get_zeroed_page(GFP_KERNEL);
  177. if (!lc->extended_save_area_addr)
  178. goto out;
  179. }
  180. #else
  181. if (MACHINE_HAS_VX)
  182. lc->vector_save_area_addr =
  183. (unsigned long) &lc->vector_save_area;
  184. if (vdso_alloc_per_cpu(lc))
  185. goto out;
  186. #endif
  187. lowcore_ptr[cpu] = lc;
  188. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  189. return 0;
  190. out:
  191. if (pcpu != &pcpu_devices[0]) {
  192. free_page(panic_stack);
  193. free_pages(async_stack, ASYNC_ORDER);
  194. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  195. }
  196. return -ENOMEM;
  197. }
  198. #ifdef CONFIG_HOTPLUG_CPU
  199. static void pcpu_free_lowcore(struct pcpu *pcpu)
  200. {
  201. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  202. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  203. #ifndef CONFIG_64BIT
  204. if (MACHINE_HAS_IEEE) {
  205. struct _lowcore *lc = pcpu->lowcore;
  206. free_page((unsigned long) lc->extended_save_area_addr);
  207. lc->extended_save_area_addr = 0;
  208. }
  209. #else
  210. vdso_free_per_cpu(pcpu->lowcore);
  211. #endif
  212. if (pcpu == &pcpu_devices[0])
  213. return;
  214. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  215. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  216. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  217. }
  218. #endif /* CONFIG_HOTPLUG_CPU */
  219. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  220. {
  221. struct _lowcore *lc = pcpu->lowcore;
  222. if (MACHINE_HAS_TLB_LC)
  223. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  224. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  225. atomic_inc(&init_mm.context.attach_count);
  226. lc->cpu_nr = cpu;
  227. lc->spinlock_lockval = arch_spin_lockval(cpu);
  228. lc->percpu_offset = __per_cpu_offset[cpu];
  229. lc->kernel_asce = S390_lowcore.kernel_asce;
  230. lc->machine_flags = S390_lowcore.machine_flags;
  231. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  232. __ctl_store(lc->cregs_save_area, 0, 15);
  233. save_access_regs((unsigned int *) lc->access_regs_save_area);
  234. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  235. MAX_FACILITY_BIT/8);
  236. }
  237. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  238. {
  239. struct _lowcore *lc = pcpu->lowcore;
  240. struct thread_info *ti = task_thread_info(tsk);
  241. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  242. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  243. lc->thread_info = (unsigned long) task_thread_info(tsk);
  244. lc->current_task = (unsigned long) tsk;
  245. lc->user_timer = ti->user_timer;
  246. lc->system_timer = ti->system_timer;
  247. lc->steal_timer = 0;
  248. }
  249. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  250. {
  251. struct _lowcore *lc = pcpu->lowcore;
  252. lc->restart_stack = lc->kernel_stack;
  253. lc->restart_fn = (unsigned long) func;
  254. lc->restart_data = (unsigned long) data;
  255. lc->restart_source = -1UL;
  256. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  257. }
  258. /*
  259. * Call function via PSW restart on pcpu and stop the current cpu.
  260. */
  261. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  262. void *data, unsigned long stack)
  263. {
  264. struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  265. unsigned long source_cpu = stap();
  266. __load_psw_mask(PSW_KERNEL_BITS);
  267. if (pcpu->address == source_cpu)
  268. func(data); /* should not return */
  269. /* Stop target cpu (if func returns this stops the current cpu). */
  270. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  271. /* Restart func on the target cpu and stop the current cpu. */
  272. mem_assign_absolute(lc->restart_stack, stack);
  273. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  274. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  275. mem_assign_absolute(lc->restart_source, source_cpu);
  276. asm volatile(
  277. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  278. " brc 2,0b # busy, try again\n"
  279. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  280. " brc 2,1b # busy, try again\n"
  281. : : "d" (pcpu->address), "d" (source_cpu),
  282. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  283. : "0", "1", "cc");
  284. for (;;) ;
  285. }
  286. /*
  287. * Enable additional logical cpus for multi-threading.
  288. */
  289. static int pcpu_set_smt(unsigned int mtid)
  290. {
  291. register unsigned long reg1 asm ("1") = (unsigned long) mtid;
  292. int cc;
  293. if (smp_cpu_mtid == mtid)
  294. return 0;
  295. asm volatile(
  296. " sigp %1,0,%2 # sigp set multi-threading\n"
  297. " ipm %0\n"
  298. " srl %0,28\n"
  299. : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING)
  300. : "cc");
  301. if (cc == 0) {
  302. smp_cpu_mtid = mtid;
  303. smp_cpu_mt_shift = 0;
  304. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  305. smp_cpu_mt_shift++;
  306. pcpu_devices[0].address = stap();
  307. }
  308. return cc;
  309. }
  310. /*
  311. * Call function on an online CPU.
  312. */
  313. void smp_call_online_cpu(void (*func)(void *), void *data)
  314. {
  315. struct pcpu *pcpu;
  316. /* Use the current cpu if it is online. */
  317. pcpu = pcpu_find_address(cpu_online_mask, stap());
  318. if (!pcpu)
  319. /* Use the first online cpu. */
  320. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  321. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  322. }
  323. /*
  324. * Call function on the ipl CPU.
  325. */
  326. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  327. {
  328. pcpu_delegate(&pcpu_devices[0], func, data,
  329. pcpu_devices->lowcore->panic_stack -
  330. PANIC_FRAME_OFFSET + PAGE_SIZE);
  331. }
  332. int smp_find_processor_id(u16 address)
  333. {
  334. int cpu;
  335. for_each_present_cpu(cpu)
  336. if (pcpu_devices[cpu].address == address)
  337. return cpu;
  338. return -1;
  339. }
  340. int smp_vcpu_scheduled(int cpu)
  341. {
  342. return pcpu_running(pcpu_devices + cpu);
  343. }
  344. void smp_yield_cpu(int cpu)
  345. {
  346. if (MACHINE_HAS_DIAG9C)
  347. asm volatile("diag %0,0,0x9c"
  348. : : "d" (pcpu_devices[cpu].address));
  349. else if (MACHINE_HAS_DIAG44)
  350. asm volatile("diag 0,0,0x44");
  351. }
  352. /*
  353. * Send cpus emergency shutdown signal. This gives the cpus the
  354. * opportunity to complete outstanding interrupts.
  355. */
  356. static void smp_emergency_stop(cpumask_t *cpumask)
  357. {
  358. u64 end;
  359. int cpu;
  360. end = get_tod_clock() + (1000000UL << 12);
  361. for_each_cpu(cpu, cpumask) {
  362. struct pcpu *pcpu = pcpu_devices + cpu;
  363. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  364. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  365. 0, NULL) == SIGP_CC_BUSY &&
  366. get_tod_clock() < end)
  367. cpu_relax();
  368. }
  369. while (get_tod_clock() < end) {
  370. for_each_cpu(cpu, cpumask)
  371. if (pcpu_stopped(pcpu_devices + cpu))
  372. cpumask_clear_cpu(cpu, cpumask);
  373. if (cpumask_empty(cpumask))
  374. break;
  375. cpu_relax();
  376. }
  377. }
  378. /*
  379. * Stop all cpus but the current one.
  380. */
  381. void smp_send_stop(void)
  382. {
  383. cpumask_t cpumask;
  384. int cpu;
  385. /* Disable all interrupts/machine checks */
  386. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  387. trace_hardirqs_off();
  388. debug_set_critical();
  389. cpumask_copy(&cpumask, cpu_online_mask);
  390. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  391. if (oops_in_progress)
  392. smp_emergency_stop(&cpumask);
  393. /* stop all processors */
  394. for_each_cpu(cpu, &cpumask) {
  395. struct pcpu *pcpu = pcpu_devices + cpu;
  396. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  397. while (!pcpu_stopped(pcpu))
  398. cpu_relax();
  399. }
  400. }
  401. /*
  402. * This is the main routine where commands issued by other
  403. * cpus are handled.
  404. */
  405. static void smp_handle_ext_call(void)
  406. {
  407. unsigned long bits;
  408. /* handle bit signal external calls */
  409. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  410. if (test_bit(ec_stop_cpu, &bits))
  411. smp_stop_cpu();
  412. if (test_bit(ec_schedule, &bits))
  413. scheduler_ipi();
  414. if (test_bit(ec_call_function_single, &bits))
  415. generic_smp_call_function_single_interrupt();
  416. }
  417. static void do_ext_call_interrupt(struct ext_code ext_code,
  418. unsigned int param32, unsigned long param64)
  419. {
  420. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  421. smp_handle_ext_call();
  422. }
  423. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  424. {
  425. int cpu;
  426. for_each_cpu(cpu, mask)
  427. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  428. }
  429. void arch_send_call_function_single_ipi(int cpu)
  430. {
  431. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  432. }
  433. #ifndef CONFIG_64BIT
  434. /*
  435. * this function sends a 'purge tlb' signal to another CPU.
  436. */
  437. static void smp_ptlb_callback(void *info)
  438. {
  439. __tlb_flush_local();
  440. }
  441. void smp_ptlb_all(void)
  442. {
  443. on_each_cpu(smp_ptlb_callback, NULL, 1);
  444. }
  445. EXPORT_SYMBOL(smp_ptlb_all);
  446. #endif /* ! CONFIG_64BIT */
  447. /*
  448. * this function sends a 'reschedule' IPI to another CPU.
  449. * it goes straight through and wastes no time serializing
  450. * anything. Worst case is that we lose a reschedule ...
  451. */
  452. void smp_send_reschedule(int cpu)
  453. {
  454. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  455. }
  456. /*
  457. * parameter area for the set/clear control bit callbacks
  458. */
  459. struct ec_creg_mask_parms {
  460. unsigned long orval;
  461. unsigned long andval;
  462. int cr;
  463. };
  464. /*
  465. * callback for setting/clearing control bits
  466. */
  467. static void smp_ctl_bit_callback(void *info)
  468. {
  469. struct ec_creg_mask_parms *pp = info;
  470. unsigned long cregs[16];
  471. __ctl_store(cregs, 0, 15);
  472. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  473. __ctl_load(cregs, 0, 15);
  474. }
  475. /*
  476. * Set a bit in a control register of all cpus
  477. */
  478. void smp_ctl_set_bit(int cr, int bit)
  479. {
  480. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  481. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  482. }
  483. EXPORT_SYMBOL(smp_ctl_set_bit);
  484. /*
  485. * Clear a bit in a control register of all cpus
  486. */
  487. void smp_ctl_clear_bit(int cr, int bit)
  488. {
  489. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  490. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  491. }
  492. EXPORT_SYMBOL(smp_ctl_clear_bit);
  493. #ifdef CONFIG_CRASH_DUMP
  494. static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu)
  495. {
  496. void *lc = pcpu_devices[0].lowcore;
  497. struct save_area_ext *sa_ext;
  498. unsigned long vx_sa;
  499. sa_ext = dump_save_area_create(cpu);
  500. if (!sa_ext)
  501. panic("could not allocate memory for save area\n");
  502. if (is_boot_cpu) {
  503. /* Copy the registers of the boot CPU. */
  504. copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa),
  505. SAVE_AREA_BASE - PAGE_SIZE, 0);
  506. if (MACHINE_HAS_VX)
  507. save_vx_regs_safe(sa_ext->vx_regs);
  508. return;
  509. }
  510. /* Get the registers of a non-boot cpu. */
  511. __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
  512. memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa));
  513. if (!MACHINE_HAS_VX)
  514. return;
  515. /* Get the VX registers */
  516. vx_sa = __get_free_page(GFP_KERNEL);
  517. if (!vx_sa)
  518. panic("could not allocate memory for VX save area\n");
  519. __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);
  520. memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs));
  521. free_page(vx_sa);
  522. }
  523. /*
  524. * Collect CPU state of the previous, crashed system.
  525. * There are four cases:
  526. * 1) standard zfcp dump
  527. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  528. * The state for all CPUs except the boot CPU needs to be collected
  529. * with sigp stop-and-store-status. The boot CPU state is located in
  530. * the absolute lowcore of the memory stored in the HSA. The zcore code
  531. * will allocate the save area and copy the boot CPU state from the HSA.
  532. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  533. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  534. * The state for all CPUs except the boot CPU needs to be collected
  535. * with sigp stop-and-store-status. The firmware or the boot-loader
  536. * stored the registers of the boot CPU in the absolute lowcore in the
  537. * memory of the old system.
  538. * 3) kdump and the old kernel did not store the CPU state,
  539. * or stand-alone kdump for DASD
  540. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  541. * The state for all CPUs except the boot CPU needs to be collected
  542. * with sigp stop-and-store-status. The kexec code or the boot-loader
  543. * stored the registers of the boot CPU in the memory of the old system.
  544. * 4) kdump and the old kernel stored the CPU state
  545. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  546. * The state of all CPUs is stored in ELF sections in the memory of the
  547. * old system. The ELF sections are picked up by the crash_dump code
  548. * via elfcorehdr_addr.
  549. */
  550. static void __init smp_store_cpu_states(struct sclp_cpu_info *info)
  551. {
  552. unsigned int cpu, address, i, j;
  553. int is_boot_cpu;
  554. if (is_kdump_kernel())
  555. /* Previous system stored the CPU states. Nothing to do. */
  556. return;
  557. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  558. /* No previous system present, normal boot. */
  559. return;
  560. /* Set multi-threading state to the previous system. */
  561. pcpu_set_smt(sclp_get_mtid_prev());
  562. /* Collect CPU states. */
  563. cpu = 0;
  564. for (i = 0; i < info->configured; i++) {
  565. /* Skip CPUs with different CPU type. */
  566. if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
  567. continue;
  568. for (j = 0; j <= smp_cpu_mtid; j++, cpu++) {
  569. address = (info->cpu[i].core_id << smp_cpu_mt_shift) + j;
  570. is_boot_cpu = (address == pcpu_devices[0].address);
  571. if (is_boot_cpu && !OLDMEM_BASE)
  572. /* Skip boot CPU for standard zfcp dump. */
  573. continue;
  574. /* Get state for this CPu. */
  575. __smp_store_cpu_state(cpu, address, is_boot_cpu);
  576. }
  577. }
  578. }
  579. int smp_store_status(int cpu)
  580. {
  581. unsigned long vx_sa;
  582. struct pcpu *pcpu;
  583. pcpu = pcpu_devices + cpu;
  584. if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
  585. 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
  586. return -EIO;
  587. if (!MACHINE_HAS_VX)
  588. return 0;
  589. vx_sa = __pa(pcpu->lowcore->vector_save_area_addr);
  590. __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  591. vx_sa, NULL);
  592. return 0;
  593. }
  594. #endif /* CONFIG_CRASH_DUMP */
  595. void smp_cpu_set_polarization(int cpu, int val)
  596. {
  597. pcpu_devices[cpu].polarization = val;
  598. }
  599. int smp_cpu_get_polarization(int cpu)
  600. {
  601. return pcpu_devices[cpu].polarization;
  602. }
  603. static struct sclp_cpu_info *smp_get_cpu_info(void)
  604. {
  605. static int use_sigp_detection;
  606. struct sclp_cpu_info *info;
  607. int address;
  608. info = kzalloc(sizeof(*info), GFP_KERNEL);
  609. if (info && (use_sigp_detection || sclp_get_cpu_info(info))) {
  610. use_sigp_detection = 1;
  611. for (address = 0; address <= MAX_CPU_ADDRESS;
  612. address += (1U << smp_cpu_mt_shift)) {
  613. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
  614. SIGP_CC_NOT_OPERATIONAL)
  615. continue;
  616. info->cpu[info->configured].core_id =
  617. address >> smp_cpu_mt_shift;
  618. info->configured++;
  619. }
  620. info->combined = info->configured;
  621. }
  622. return info;
  623. }
  624. static int smp_add_present_cpu(int cpu);
  625. static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)
  626. {
  627. struct pcpu *pcpu;
  628. cpumask_t avail;
  629. int cpu, nr, i, j;
  630. u16 address;
  631. nr = 0;
  632. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  633. cpu = cpumask_first(&avail);
  634. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  635. if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
  636. continue;
  637. address = info->cpu[i].core_id << smp_cpu_mt_shift;
  638. for (j = 0; j <= smp_cpu_mtid; j++) {
  639. if (pcpu_find_address(cpu_present_mask, address + j))
  640. continue;
  641. pcpu = pcpu_devices + cpu;
  642. pcpu->address = address + j;
  643. pcpu->state =
  644. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  645. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  646. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  647. set_cpu_present(cpu, true);
  648. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  649. set_cpu_present(cpu, false);
  650. else
  651. nr++;
  652. cpu = cpumask_next(cpu, &avail);
  653. if (cpu >= nr_cpu_ids)
  654. break;
  655. }
  656. }
  657. return nr;
  658. }
  659. static void __init smp_detect_cpus(void)
  660. {
  661. unsigned int cpu, mtid, c_cpus, s_cpus;
  662. struct sclp_cpu_info *info;
  663. u16 address;
  664. /* Get CPU information */
  665. info = smp_get_cpu_info();
  666. if (!info)
  667. panic("smp_detect_cpus failed to allocate memory\n");
  668. /* Find boot CPU type */
  669. if (info->has_cpu_type) {
  670. address = stap();
  671. for (cpu = 0; cpu < info->combined; cpu++)
  672. if (info->cpu[cpu].core_id == address) {
  673. /* The boot cpu dictates the cpu type. */
  674. boot_cpu_type = info->cpu[cpu].type;
  675. break;
  676. }
  677. if (cpu >= info->combined)
  678. panic("Could not find boot CPU type");
  679. }
  680. #ifdef CONFIG_CRASH_DUMP
  681. /* Collect CPU state of previous system */
  682. smp_store_cpu_states(info);
  683. #endif
  684. /* Set multi-threading state for the current system */
  685. mtid = sclp_get_mtid(boot_cpu_type);
  686. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  687. pcpu_set_smt(mtid);
  688. /* Print number of CPUs */
  689. c_cpus = s_cpus = 0;
  690. for (cpu = 0; cpu < info->combined; cpu++) {
  691. if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type)
  692. continue;
  693. if (cpu < info->configured)
  694. c_cpus += smp_cpu_mtid + 1;
  695. else
  696. s_cpus += smp_cpu_mtid + 1;
  697. }
  698. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  699. /* Add CPUs present at boot */
  700. get_online_cpus();
  701. __smp_rescan_cpus(info, 0);
  702. put_online_cpus();
  703. kfree(info);
  704. }
  705. /*
  706. * Activate a secondary processor.
  707. */
  708. static void smp_start_secondary(void *cpuvoid)
  709. {
  710. S390_lowcore.last_update_clock = get_tod_clock();
  711. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  712. S390_lowcore.restart_fn = (unsigned long) do_restart;
  713. S390_lowcore.restart_data = 0;
  714. S390_lowcore.restart_source = -1UL;
  715. restore_access_regs(S390_lowcore.access_regs_save_area);
  716. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  717. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  718. cpu_init();
  719. preempt_disable();
  720. init_cpu_timer();
  721. vtime_init();
  722. pfault_init();
  723. notify_cpu_starting(smp_processor_id());
  724. set_cpu_online(smp_processor_id(), true);
  725. inc_irq_stat(CPU_RST);
  726. local_irq_enable();
  727. cpu_startup_entry(CPUHP_ONLINE);
  728. }
  729. /* Upping and downing of CPUs */
  730. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  731. {
  732. struct pcpu *pcpu;
  733. int base, i, rc;
  734. pcpu = pcpu_devices + cpu;
  735. if (pcpu->state != CPU_STATE_CONFIGURED)
  736. return -EIO;
  737. base = cpu - (cpu % (smp_cpu_mtid + 1));
  738. for (i = 0; i <= smp_cpu_mtid; i++) {
  739. if (base + i < nr_cpu_ids)
  740. if (cpu_online(base + i))
  741. break;
  742. }
  743. /*
  744. * If this is the first CPU of the core to get online
  745. * do an initial CPU reset.
  746. */
  747. if (i > smp_cpu_mtid &&
  748. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  749. SIGP_CC_ORDER_CODE_ACCEPTED)
  750. return -EIO;
  751. rc = pcpu_alloc_lowcore(pcpu, cpu);
  752. if (rc)
  753. return rc;
  754. pcpu_prepare_secondary(pcpu, cpu);
  755. pcpu_attach_task(pcpu, tidle);
  756. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  757. while (!cpu_online(cpu))
  758. cpu_relax();
  759. return 0;
  760. }
  761. static unsigned int setup_possible_cpus __initdata;
  762. static int __init _setup_possible_cpus(char *s)
  763. {
  764. get_option(&s, &setup_possible_cpus);
  765. return 0;
  766. }
  767. early_param("possible_cpus", _setup_possible_cpus);
  768. #ifdef CONFIG_HOTPLUG_CPU
  769. int __cpu_disable(void)
  770. {
  771. unsigned long cregs[16];
  772. /* Handle possible pending IPIs */
  773. smp_handle_ext_call();
  774. set_cpu_online(smp_processor_id(), false);
  775. /* Disable pseudo page faults on this cpu. */
  776. pfault_fini();
  777. /* Disable interrupt sources via control register. */
  778. __ctl_store(cregs, 0, 15);
  779. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  780. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  781. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  782. __ctl_load(cregs, 0, 15);
  783. clear_cpu_flag(CIF_NOHZ_DELAY);
  784. return 0;
  785. }
  786. void __cpu_die(unsigned int cpu)
  787. {
  788. struct pcpu *pcpu;
  789. /* Wait until target cpu is down */
  790. pcpu = pcpu_devices + cpu;
  791. while (!pcpu_stopped(pcpu))
  792. cpu_relax();
  793. pcpu_free_lowcore(pcpu);
  794. atomic_dec(&init_mm.context.attach_count);
  795. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  796. if (MACHINE_HAS_TLB_LC)
  797. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  798. }
  799. void __noreturn cpu_die(void)
  800. {
  801. idle_task_exit();
  802. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  803. for (;;) ;
  804. }
  805. #endif /* CONFIG_HOTPLUG_CPU */
  806. void __init smp_fill_possible_mask(void)
  807. {
  808. unsigned int possible, sclp, cpu;
  809. sclp = min(smp_max_threads, sclp_get_mtid_max() + 1);
  810. sclp = sclp_get_max_cpu()*sclp ?: nr_cpu_ids;
  811. possible = setup_possible_cpus ?: nr_cpu_ids;
  812. possible = min(possible, sclp);
  813. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  814. set_cpu_possible(cpu, true);
  815. }
  816. void __init smp_prepare_cpus(unsigned int max_cpus)
  817. {
  818. /* request the 0x1201 emergency signal external interrupt */
  819. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  820. panic("Couldn't request external interrupt 0x1201");
  821. /* request the 0x1202 external call external interrupt */
  822. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  823. panic("Couldn't request external interrupt 0x1202");
  824. smp_detect_cpus();
  825. }
  826. void __init smp_prepare_boot_cpu(void)
  827. {
  828. struct pcpu *pcpu = pcpu_devices;
  829. pcpu->state = CPU_STATE_CONFIGURED;
  830. pcpu->address = stap();
  831. pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
  832. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  833. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  834. set_cpu_present(0, true);
  835. set_cpu_online(0, true);
  836. }
  837. void __init smp_cpus_done(unsigned int max_cpus)
  838. {
  839. }
  840. void __init smp_setup_processor_id(void)
  841. {
  842. S390_lowcore.cpu_nr = 0;
  843. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  844. }
  845. /*
  846. * the frequency of the profiling timer can be changed
  847. * by writing a multiplier value into /proc/profile.
  848. *
  849. * usually you want to run this on all CPUs ;)
  850. */
  851. int setup_profiling_timer(unsigned int multiplier)
  852. {
  853. return 0;
  854. }
  855. #ifdef CONFIG_HOTPLUG_CPU
  856. static ssize_t cpu_configure_show(struct device *dev,
  857. struct device_attribute *attr, char *buf)
  858. {
  859. ssize_t count;
  860. mutex_lock(&smp_cpu_state_mutex);
  861. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  862. mutex_unlock(&smp_cpu_state_mutex);
  863. return count;
  864. }
  865. static ssize_t cpu_configure_store(struct device *dev,
  866. struct device_attribute *attr,
  867. const char *buf, size_t count)
  868. {
  869. struct pcpu *pcpu;
  870. int cpu, val, rc, i;
  871. char delim;
  872. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  873. return -EINVAL;
  874. if (val != 0 && val != 1)
  875. return -EINVAL;
  876. get_online_cpus();
  877. mutex_lock(&smp_cpu_state_mutex);
  878. rc = -EBUSY;
  879. /* disallow configuration changes of online cpus and cpu 0 */
  880. cpu = dev->id;
  881. cpu -= cpu % (smp_cpu_mtid + 1);
  882. if (cpu == 0)
  883. goto out;
  884. for (i = 0; i <= smp_cpu_mtid; i++)
  885. if (cpu_online(cpu + i))
  886. goto out;
  887. pcpu = pcpu_devices + cpu;
  888. rc = 0;
  889. switch (val) {
  890. case 0:
  891. if (pcpu->state != CPU_STATE_CONFIGURED)
  892. break;
  893. rc = sclp_cpu_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  894. if (rc)
  895. break;
  896. for (i = 0; i <= smp_cpu_mtid; i++) {
  897. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  898. continue;
  899. pcpu[i].state = CPU_STATE_STANDBY;
  900. smp_cpu_set_polarization(cpu + i,
  901. POLARIZATION_UNKNOWN);
  902. }
  903. topology_expect_change();
  904. break;
  905. case 1:
  906. if (pcpu->state != CPU_STATE_STANDBY)
  907. break;
  908. rc = sclp_cpu_configure(pcpu->address >> smp_cpu_mt_shift);
  909. if (rc)
  910. break;
  911. for (i = 0; i <= smp_cpu_mtid; i++) {
  912. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  913. continue;
  914. pcpu[i].state = CPU_STATE_CONFIGURED;
  915. smp_cpu_set_polarization(cpu + i,
  916. POLARIZATION_UNKNOWN);
  917. }
  918. topology_expect_change();
  919. break;
  920. default:
  921. break;
  922. }
  923. out:
  924. mutex_unlock(&smp_cpu_state_mutex);
  925. put_online_cpus();
  926. return rc ? rc : count;
  927. }
  928. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  929. #endif /* CONFIG_HOTPLUG_CPU */
  930. static ssize_t show_cpu_address(struct device *dev,
  931. struct device_attribute *attr, char *buf)
  932. {
  933. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  934. }
  935. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  936. static struct attribute *cpu_common_attrs[] = {
  937. #ifdef CONFIG_HOTPLUG_CPU
  938. &dev_attr_configure.attr,
  939. #endif
  940. &dev_attr_address.attr,
  941. NULL,
  942. };
  943. static struct attribute_group cpu_common_attr_group = {
  944. .attrs = cpu_common_attrs,
  945. };
  946. static struct attribute *cpu_online_attrs[] = {
  947. &dev_attr_idle_count.attr,
  948. &dev_attr_idle_time_us.attr,
  949. NULL,
  950. };
  951. static struct attribute_group cpu_online_attr_group = {
  952. .attrs = cpu_online_attrs,
  953. };
  954. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  955. void *hcpu)
  956. {
  957. unsigned int cpu = (unsigned int)(long)hcpu;
  958. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  959. int err = 0;
  960. switch (action & ~CPU_TASKS_FROZEN) {
  961. case CPU_ONLINE:
  962. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  963. break;
  964. case CPU_DEAD:
  965. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  966. break;
  967. }
  968. return notifier_from_errno(err);
  969. }
  970. static int smp_add_present_cpu(int cpu)
  971. {
  972. struct device *s;
  973. struct cpu *c;
  974. int rc;
  975. c = kzalloc(sizeof(*c), GFP_KERNEL);
  976. if (!c)
  977. return -ENOMEM;
  978. per_cpu(cpu_device, cpu) = c;
  979. s = &c->dev;
  980. c->hotpluggable = 1;
  981. rc = register_cpu(c, cpu);
  982. if (rc)
  983. goto out;
  984. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  985. if (rc)
  986. goto out_cpu;
  987. if (cpu_online(cpu)) {
  988. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  989. if (rc)
  990. goto out_online;
  991. }
  992. rc = topology_cpu_init(c);
  993. if (rc)
  994. goto out_topology;
  995. return 0;
  996. out_topology:
  997. if (cpu_online(cpu))
  998. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  999. out_online:
  1000. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  1001. out_cpu:
  1002. #ifdef CONFIG_HOTPLUG_CPU
  1003. unregister_cpu(c);
  1004. #endif
  1005. out:
  1006. return rc;
  1007. }
  1008. #ifdef CONFIG_HOTPLUG_CPU
  1009. int __ref smp_rescan_cpus(void)
  1010. {
  1011. struct sclp_cpu_info *info;
  1012. int nr;
  1013. info = smp_get_cpu_info();
  1014. if (!info)
  1015. return -ENOMEM;
  1016. get_online_cpus();
  1017. mutex_lock(&smp_cpu_state_mutex);
  1018. nr = __smp_rescan_cpus(info, 1);
  1019. mutex_unlock(&smp_cpu_state_mutex);
  1020. put_online_cpus();
  1021. kfree(info);
  1022. if (nr)
  1023. topology_schedule_update();
  1024. return 0;
  1025. }
  1026. static ssize_t __ref rescan_store(struct device *dev,
  1027. struct device_attribute *attr,
  1028. const char *buf,
  1029. size_t count)
  1030. {
  1031. int rc;
  1032. rc = smp_rescan_cpus();
  1033. return rc ? rc : count;
  1034. }
  1035. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1036. #endif /* CONFIG_HOTPLUG_CPU */
  1037. static int __init s390_smp_init(void)
  1038. {
  1039. int cpu, rc = 0;
  1040. #ifdef CONFIG_HOTPLUG_CPU
  1041. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1042. if (rc)
  1043. return rc;
  1044. #endif
  1045. cpu_notifier_register_begin();
  1046. for_each_present_cpu(cpu) {
  1047. rc = smp_add_present_cpu(cpu);
  1048. if (rc)
  1049. goto out;
  1050. }
  1051. __hotcpu_notifier(smp_cpu_notify, 0);
  1052. out:
  1053. cpu_notifier_register_done();
  1054. return rc;
  1055. }
  1056. subsys_initcall(s390_smp_init);