entry.S 4.4 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. * Copyright (C) 2001 MIPS Technologies, Inc.
  9. */
  10. #include <asm/asm.h>
  11. #include <asm/asmmacro.h>
  12. #include <asm/regdef.h>
  13. #include <asm/mipsregs.h>
  14. #include <asm/stackframe.h>
  15. #include <asm/isadep.h>
  16. #include <asm/thread_info.h>
  17. #include <asm/war.h>
  18. #ifndef CONFIG_PREEMPT
  19. #define resume_kernel restore_all
  20. #else
  21. #define __ret_from_irq ret_from_exception
  22. #endif
  23. .text
  24. .align 5
  25. #ifndef CONFIG_PREEMPT
  26. FEXPORT(ret_from_exception)
  27. local_irq_disable # preempt stop
  28. b __ret_from_irq
  29. #endif
  30. FEXPORT(ret_from_irq)
  31. LONG_S s0, TI_REGS($28)
  32. FEXPORT(__ret_from_irq)
  33. /*
  34. * We can be coming here from a syscall done in the kernel space,
  35. * e.g. a failed kernel_execve().
  36. */
  37. resume_userspace_check:
  38. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  39. andi t0, t0, KU_USER
  40. beqz t0, resume_kernel
  41. resume_userspace:
  42. local_irq_disable # make sure we dont miss an
  43. # interrupt setting need_resched
  44. # between sampling and return
  45. #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
  46. lw k0, TI_R2_EMUL_RET($28)
  47. bnez k0, restore_all_from_r2_emul
  48. #endif
  49. LONG_L a2, TI_FLAGS($28) # current->work
  50. andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
  51. bnez t0, work_pending
  52. j restore_all
  53. #ifdef CONFIG_PREEMPT
  54. resume_kernel:
  55. local_irq_disable
  56. lw t0, TI_PRE_COUNT($28)
  57. bnez t0, restore_all
  58. need_resched:
  59. LONG_L t0, TI_FLAGS($28)
  60. andi t1, t0, _TIF_NEED_RESCHED
  61. beqz t1, restore_all
  62. LONG_L t0, PT_STATUS(sp) # Interrupts off?
  63. andi t0, 1
  64. beqz t0, restore_all
  65. jal preempt_schedule_irq
  66. b need_resched
  67. #endif
  68. FEXPORT(ret_from_kernel_thread)
  69. jal schedule_tail # a0 = struct task_struct *prev
  70. move a0, s1
  71. jal s0
  72. j syscall_exit
  73. FEXPORT(ret_from_fork)
  74. jal schedule_tail # a0 = struct task_struct *prev
  75. FEXPORT(syscall_exit)
  76. local_irq_disable # make sure need_resched and
  77. # signals dont change between
  78. # sampling and return
  79. LONG_L a2, TI_FLAGS($28) # current->work
  80. li t0, _TIF_ALLWORK_MASK
  81. and t0, a2, t0
  82. bnez t0, syscall_exit_work
  83. restore_all: # restore full frame
  84. .set noat
  85. RESTORE_TEMP
  86. RESTORE_AT
  87. RESTORE_STATIC
  88. restore_partial: # restore partial frame
  89. #ifdef CONFIG_TRACE_IRQFLAGS
  90. SAVE_STATIC
  91. SAVE_AT
  92. SAVE_TEMP
  93. LONG_L v0, PT_STATUS(sp)
  94. #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  95. and v0, ST0_IEP
  96. #else
  97. and v0, ST0_IE
  98. #endif
  99. beqz v0, 1f
  100. jal trace_hardirqs_on
  101. b 2f
  102. 1: jal trace_hardirqs_off
  103. 2:
  104. RESTORE_TEMP
  105. RESTORE_AT
  106. RESTORE_STATIC
  107. #endif
  108. RESTORE_SOME
  109. RESTORE_SP_AND_RET
  110. .set at
  111. #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
  112. restore_all_from_r2_emul: # restore full frame
  113. .set noat
  114. sw zero, TI_R2_EMUL_RET($28) # reset it
  115. RESTORE_TEMP
  116. RESTORE_AT
  117. RESTORE_STATIC
  118. RESTORE_SOME
  119. LONG_L sp, PT_R29(sp)
  120. eretnc
  121. .set at
  122. #endif
  123. work_pending:
  124. andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
  125. beqz t0, work_notifysig
  126. work_resched:
  127. jal schedule
  128. local_irq_disable # make sure need_resched and
  129. # signals dont change between
  130. # sampling and return
  131. LONG_L a2, TI_FLAGS($28)
  132. andi t0, a2, _TIF_WORK_MASK # is there any work to be done
  133. # other than syscall tracing?
  134. beqz t0, restore_all
  135. andi t0, a2, _TIF_NEED_RESCHED
  136. bnez t0, work_resched
  137. work_notifysig: # deal with pending signals and
  138. # notify-resume requests
  139. move a0, sp
  140. li a1, 0
  141. jal do_notify_resume # a2 already loaded
  142. j resume_userspace_check
  143. FEXPORT(syscall_exit_partial)
  144. local_irq_disable # make sure need_resched doesn't
  145. # change between and return
  146. LONG_L a2, TI_FLAGS($28) # current->work
  147. li t0, _TIF_ALLWORK_MASK
  148. and t0, a2
  149. beqz t0, restore_partial
  150. SAVE_STATIC
  151. syscall_exit_work:
  152. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  153. andi t0, t0, KU_USER
  154. beqz t0, resume_kernel
  155. li t0, _TIF_WORK_SYSCALL_EXIT
  156. and t0, a2 # a2 is preloaded with TI_FLAGS
  157. beqz t0, work_pending # trace bit set?
  158. local_irq_enable # could let syscall_trace_leave()
  159. # call schedule() instead
  160. move a0, sp
  161. jal syscall_trace_leave
  162. b resume_userspace
  163. #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
  164. defined(CONFIG_MIPS_MT)
  165. /*
  166. * MIPS32R2 Instruction Hazard Barrier - must be called
  167. *
  168. * For C code use the inline version named instruction_hazard().
  169. */
  170. LEAF(mips_ihb)
  171. .set mips32r2
  172. jr.hb ra
  173. nop
  174. END(mips_ihb)
  175. #endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */