ff-protocol-ff400.c 8.1 KB

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  1. /*
  2. * ff-protocol-ff400.c - a part of driver for RME Fireface series
  3. *
  4. * Copyright (c) 2015-2017 Takashi Sakamoto
  5. *
  6. * Licensed under the terms of the GNU General Public License, version 2.
  7. */
  8. #include <linux/delay.h>
  9. #include "ff.h"
  10. #define FF400_STF 0x000080100500ull
  11. #define FF400_RX_PACKET_FORMAT 0x000080100504ull
  12. #define FF400_ISOC_COMM_START 0x000080100508ull
  13. #define FF400_TX_PACKET_FORMAT 0x00008010050cull
  14. #define FF400_ISOC_COMM_STOP 0x000080100510ull
  15. #define FF400_SYNC_STATUS 0x0000801c0000ull
  16. #define FF400_FETCH_PCM_FRAMES 0x0000801c0000ull /* For block request. */
  17. #define FF400_CLOCK_CONFIG 0x0000801c0004ull
  18. #define FF400_MIDI_HIGH_ADDR 0x0000801003f4ull
  19. #define FF400_MIDI_RX_PORT_0 0x000080180000ull
  20. #define FF400_MIDI_RX_PORT_1 0x000080190000ull
  21. static int ff400_get_clock(struct snd_ff *ff, unsigned int *rate,
  22. enum snd_ff_clock_src *src)
  23. {
  24. __le32 reg;
  25. u32 data;
  26. int err;
  27. err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
  28. FF400_SYNC_STATUS, &reg, sizeof(reg), 0);
  29. if (err < 0)
  30. return err;
  31. data = le32_to_cpu(reg);
  32. /* Calculate sampling rate. */
  33. switch ((data >> 1) & 0x03) {
  34. case 0x01:
  35. *rate = 32000;
  36. break;
  37. case 0x00:
  38. *rate = 44100;
  39. break;
  40. case 0x03:
  41. *rate = 48000;
  42. break;
  43. case 0x02:
  44. default:
  45. return -EIO;
  46. }
  47. if (data & 0x08)
  48. *rate *= 2;
  49. else if (data & 0x10)
  50. *rate *= 4;
  51. /* Calculate source of clock. */
  52. if (data & 0x01) {
  53. *src = SND_FF_CLOCK_SRC_INTERNAL;
  54. } else {
  55. /* TODO: 0x00, 0x01, 0x02, 0x06, 0x07? */
  56. switch ((data >> 10) & 0x07) {
  57. case 0x03:
  58. *src = SND_FF_CLOCK_SRC_SPDIF;
  59. break;
  60. case 0x04:
  61. *src = SND_FF_CLOCK_SRC_WORD;
  62. break;
  63. case 0x05:
  64. *src = SND_FF_CLOCK_SRC_LTC;
  65. break;
  66. case 0x00:
  67. default:
  68. *src = SND_FF_CLOCK_SRC_ADAT;
  69. break;
  70. }
  71. }
  72. return 0;
  73. }
  74. static int ff400_begin_session(struct snd_ff *ff, unsigned int rate)
  75. {
  76. __le32 reg;
  77. int i, err;
  78. /* Check whether the given value is supported or not. */
  79. for (i = 0; i < CIP_SFC_COUNT; i++) {
  80. if (amdtp_rate_table[i] == rate)
  81. break;
  82. }
  83. if (i == CIP_SFC_COUNT)
  84. return -EINVAL;
  85. /* Set the number of data blocks transferred in a second. */
  86. reg = cpu_to_le32(rate);
  87. err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  88. FF400_STF, &reg, sizeof(reg), 0);
  89. if (err < 0)
  90. return err;
  91. msleep(100);
  92. /*
  93. * Set isochronous channel and the number of quadlets of received
  94. * packets.
  95. */
  96. reg = cpu_to_le32(((ff->rx_stream.data_block_quadlets << 3) << 8) |
  97. ff->rx_resources.channel);
  98. err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  99. FF400_RX_PACKET_FORMAT, &reg, sizeof(reg), 0);
  100. if (err < 0)
  101. return err;
  102. /*
  103. * Set isochronous channel and the number of quadlets of transmitted
  104. * packet.
  105. */
  106. /* TODO: investigate the purpose of this 0x80. */
  107. reg = cpu_to_le32((0x80 << 24) |
  108. (ff->tx_resources.channel << 5) |
  109. (ff->tx_stream.data_block_quadlets));
  110. err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  111. FF400_TX_PACKET_FORMAT, &reg, sizeof(reg), 0);
  112. if (err < 0)
  113. return err;
  114. /* Allow to transmit packets. */
  115. reg = cpu_to_le32(0x00000001);
  116. return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  117. FF400_ISOC_COMM_START, &reg, sizeof(reg), 0);
  118. }
  119. static void ff400_finish_session(struct snd_ff *ff)
  120. {
  121. __le32 reg;
  122. reg = cpu_to_le32(0x80000000);
  123. snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  124. FF400_ISOC_COMM_STOP, &reg, sizeof(reg), 0);
  125. }
  126. static int ff400_switch_fetching_mode(struct snd_ff *ff, bool enable)
  127. {
  128. __le32 *reg;
  129. int i;
  130. reg = kcalloc(18, sizeof(__le32), GFP_KERNEL);
  131. if (reg == NULL)
  132. return -ENOMEM;
  133. if (enable) {
  134. /*
  135. * Each quadlet is corresponding to data channels in a data
  136. * blocks in reverse order. Precisely, quadlets for available
  137. * data channels should be enabled. Here, I take second best
  138. * to fetch PCM frames from all of data channels regardless of
  139. * stf.
  140. */
  141. for (i = 0; i < 18; ++i)
  142. reg[i] = cpu_to_le32(0x00000001);
  143. }
  144. return snd_fw_transaction(ff->unit, TCODE_WRITE_BLOCK_REQUEST,
  145. FF400_FETCH_PCM_FRAMES, reg,
  146. sizeof(__le32) * 18, 0);
  147. }
  148. static void ff400_dump_sync_status(struct snd_ff *ff,
  149. struct snd_info_buffer *buffer)
  150. {
  151. __le32 reg;
  152. u32 data;
  153. int err;
  154. err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
  155. FF400_SYNC_STATUS, &reg, sizeof(reg), 0);
  156. if (err < 0)
  157. return;
  158. data = le32_to_cpu(reg);
  159. snd_iprintf(buffer, "External source detection:\n");
  160. snd_iprintf(buffer, "Word Clock:");
  161. if ((data >> 24) & 0x20) {
  162. if ((data >> 24) & 0x40)
  163. snd_iprintf(buffer, "sync\n");
  164. else
  165. snd_iprintf(buffer, "lock\n");
  166. } else {
  167. snd_iprintf(buffer, "none\n");
  168. }
  169. snd_iprintf(buffer, "S/PDIF:");
  170. if ((data >> 16) & 0x10) {
  171. if ((data >> 16) & 0x04)
  172. snd_iprintf(buffer, "sync\n");
  173. else
  174. snd_iprintf(buffer, "lock\n");
  175. } else {
  176. snd_iprintf(buffer, "none\n");
  177. }
  178. snd_iprintf(buffer, "ADAT:");
  179. if ((data >> 8) & 0x04) {
  180. if ((data >> 8) & 0x10)
  181. snd_iprintf(buffer, "sync\n");
  182. else
  183. snd_iprintf(buffer, "lock\n");
  184. } else {
  185. snd_iprintf(buffer, "none\n");
  186. }
  187. snd_iprintf(buffer, "\nUsed external source:\n");
  188. if (((data >> 22) & 0x07) == 0x07) {
  189. snd_iprintf(buffer, "None\n");
  190. } else {
  191. switch ((data >> 22) & 0x07) {
  192. case 0x00:
  193. snd_iprintf(buffer, "ADAT:");
  194. break;
  195. case 0x03:
  196. snd_iprintf(buffer, "S/PDIF:");
  197. break;
  198. case 0x04:
  199. snd_iprintf(buffer, "Word:");
  200. break;
  201. case 0x07:
  202. snd_iprintf(buffer, "Nothing:");
  203. break;
  204. case 0x01:
  205. case 0x02:
  206. case 0x05:
  207. case 0x06:
  208. default:
  209. snd_iprintf(buffer, "unknown:");
  210. break;
  211. }
  212. if ((data >> 25) & 0x07) {
  213. switch ((data >> 25) & 0x07) {
  214. case 0x01:
  215. snd_iprintf(buffer, "32000\n");
  216. break;
  217. case 0x02:
  218. snd_iprintf(buffer, "44100\n");
  219. break;
  220. case 0x03:
  221. snd_iprintf(buffer, "48000\n");
  222. break;
  223. case 0x04:
  224. snd_iprintf(buffer, "64000\n");
  225. break;
  226. case 0x05:
  227. snd_iprintf(buffer, "88200\n");
  228. break;
  229. case 0x06:
  230. snd_iprintf(buffer, "96000\n");
  231. break;
  232. case 0x07:
  233. snd_iprintf(buffer, "128000\n");
  234. break;
  235. case 0x08:
  236. snd_iprintf(buffer, "176400\n");
  237. break;
  238. case 0x09:
  239. snd_iprintf(buffer, "192000\n");
  240. break;
  241. case 0x00:
  242. snd_iprintf(buffer, "unknown\n");
  243. break;
  244. }
  245. }
  246. }
  247. snd_iprintf(buffer, "Multiplied:");
  248. snd_iprintf(buffer, "%d\n", (data & 0x3ff) * 250);
  249. }
  250. static void ff400_dump_clock_config(struct snd_ff *ff,
  251. struct snd_info_buffer *buffer)
  252. {
  253. __le32 reg;
  254. u32 data;
  255. unsigned int rate;
  256. const char *src;
  257. int err;
  258. err = snd_fw_transaction(ff->unit, TCODE_READ_BLOCK_REQUEST,
  259. FF400_CLOCK_CONFIG, &reg, sizeof(reg), 0);
  260. if (err < 0)
  261. return;
  262. data = le32_to_cpu(reg);
  263. snd_iprintf(buffer, "Output S/PDIF format: %s (Emphasis: %s)\n",
  264. (data & 0x20) ? "Professional" : "Consumer",
  265. (data & 0x40) ? "on" : "off");
  266. snd_iprintf(buffer, "Optical output interface format: %s\n",
  267. ((data >> 8) & 0x01) ? "S/PDIF" : "ADAT");
  268. snd_iprintf(buffer, "Word output single speed: %s\n",
  269. ((data >> 8) & 0x20) ? "on" : "off");
  270. snd_iprintf(buffer, "S/PDIF input interface: %s\n",
  271. ((data >> 8) & 0x02) ? "Optical" : "Coaxial");
  272. switch ((data >> 1) & 0x03) {
  273. case 0x01:
  274. rate = 32000;
  275. break;
  276. case 0x00:
  277. rate = 44100;
  278. break;
  279. case 0x03:
  280. rate = 48000;
  281. break;
  282. case 0x02:
  283. default:
  284. return;
  285. }
  286. if (data & 0x08)
  287. rate *= 2;
  288. else if (data & 0x10)
  289. rate *= 4;
  290. snd_iprintf(buffer, "Sampling rate: %d\n", rate);
  291. if (data & 0x01) {
  292. src = "Internal";
  293. } else {
  294. switch ((data >> 10) & 0x07) {
  295. case 0x00:
  296. src = "ADAT";
  297. break;
  298. case 0x03:
  299. src = "S/PDIF";
  300. break;
  301. case 0x04:
  302. src = "Word";
  303. break;
  304. case 0x05:
  305. src = "LTC";
  306. break;
  307. default:
  308. return;
  309. }
  310. }
  311. snd_iprintf(buffer, "Sync to clock source: %s\n", src);
  312. }
  313. const struct snd_ff_protocol snd_ff_protocol_ff400 = {
  314. .get_clock = ff400_get_clock,
  315. .begin_session = ff400_begin_session,
  316. .finish_session = ff400_finish_session,
  317. .switch_fetching_mode = ff400_switch_fetching_mode,
  318. .dump_sync_status = ff400_dump_sync_status,
  319. .dump_clock_config = ff400_dump_clock_config,
  320. .midi_high_addr_reg = FF400_MIDI_HIGH_ADDR,
  321. .midi_rx_port_0_reg = FF400_MIDI_RX_PORT_0,
  322. .midi_rx_port_1_reg = FF400_MIDI_RX_PORT_1,
  323. };