chip.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  4. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  5. *
  6. * This file contains the core interrupt handling code, for irq-chip based
  7. * architectures. Detailed information is available in
  8. * Documentation/core-api/genericirq.rst
  9. */
  10. #include <linux/irq.h>
  11. #include <linux/msi.h>
  12. #include <linux/module.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/irqdomain.h>
  16. #include <trace/events/irq.h>
  17. #include "internals.h"
  18. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  19. {
  20. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  21. return IRQ_NONE;
  22. }
  23. /*
  24. * Chained handlers should never call action on their IRQ. This default
  25. * action will emit warning if such thing happens.
  26. */
  27. struct irqaction chained_action = {
  28. .handler = bad_chained_irq,
  29. };
  30. /**
  31. * irq_set_chip - set the irq chip for an irq
  32. * @irq: irq number
  33. * @chip: pointer to irq chip description structure
  34. */
  35. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  36. {
  37. unsigned long flags;
  38. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  39. if (!desc)
  40. return -EINVAL;
  41. if (!chip)
  42. chip = &no_irq_chip;
  43. desc->irq_data.chip = chip;
  44. irq_put_desc_unlock(desc, flags);
  45. /*
  46. * For !CONFIG_SPARSE_IRQ make the irq show up in
  47. * allocated_irqs.
  48. */
  49. irq_mark_irq(irq);
  50. return 0;
  51. }
  52. EXPORT_SYMBOL(irq_set_chip);
  53. /**
  54. * irq_set_type - set the irq trigger type for an irq
  55. * @irq: irq number
  56. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  57. */
  58. int irq_set_irq_type(unsigned int irq, unsigned int type)
  59. {
  60. unsigned long flags;
  61. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  62. int ret = 0;
  63. if (!desc)
  64. return -EINVAL;
  65. ret = __irq_set_trigger(desc, type);
  66. irq_put_desc_busunlock(desc, flags);
  67. return ret;
  68. }
  69. EXPORT_SYMBOL(irq_set_irq_type);
  70. /**
  71. * irq_set_handler_data - set irq handler data for an irq
  72. * @irq: Interrupt number
  73. * @data: Pointer to interrupt specific data
  74. *
  75. * Set the hardware irq controller data for an irq
  76. */
  77. int irq_set_handler_data(unsigned int irq, void *data)
  78. {
  79. unsigned long flags;
  80. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  81. if (!desc)
  82. return -EINVAL;
  83. desc->irq_common_data.handler_data = data;
  84. irq_put_desc_unlock(desc, flags);
  85. return 0;
  86. }
  87. EXPORT_SYMBOL(irq_set_handler_data);
  88. /**
  89. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  90. * @irq_base: Interrupt number base
  91. * @irq_offset: Interrupt number offset
  92. * @entry: Pointer to MSI descriptor data
  93. *
  94. * Set the MSI descriptor entry for an irq at offset
  95. */
  96. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  97. struct msi_desc *entry)
  98. {
  99. unsigned long flags;
  100. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  101. if (!desc)
  102. return -EINVAL;
  103. desc->irq_common_data.msi_desc = entry;
  104. if (entry && !irq_offset)
  105. entry->irq = irq_base;
  106. irq_put_desc_unlock(desc, flags);
  107. return 0;
  108. }
  109. /**
  110. * irq_set_msi_desc - set MSI descriptor data for an irq
  111. * @irq: Interrupt number
  112. * @entry: Pointer to MSI descriptor data
  113. *
  114. * Set the MSI descriptor entry for an irq
  115. */
  116. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  117. {
  118. return irq_set_msi_desc_off(irq, 0, entry);
  119. }
  120. /**
  121. * irq_set_chip_data - set irq chip data for an irq
  122. * @irq: Interrupt number
  123. * @data: Pointer to chip specific data
  124. *
  125. * Set the hardware irq chip data for an irq
  126. */
  127. int irq_set_chip_data(unsigned int irq, void *data)
  128. {
  129. unsigned long flags;
  130. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  131. if (!desc)
  132. return -EINVAL;
  133. desc->irq_data.chip_data = data;
  134. irq_put_desc_unlock(desc, flags);
  135. return 0;
  136. }
  137. EXPORT_SYMBOL(irq_set_chip_data);
  138. struct irq_data *irq_get_irq_data(unsigned int irq)
  139. {
  140. struct irq_desc *desc = irq_to_desc(irq);
  141. return desc ? &desc->irq_data : NULL;
  142. }
  143. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  144. static void irq_state_clr_disabled(struct irq_desc *desc)
  145. {
  146. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  147. }
  148. static void irq_state_clr_masked(struct irq_desc *desc)
  149. {
  150. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  151. }
  152. static void irq_state_clr_started(struct irq_desc *desc)
  153. {
  154. irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
  155. }
  156. static void irq_state_set_started(struct irq_desc *desc)
  157. {
  158. irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
  159. }
  160. enum {
  161. IRQ_STARTUP_NORMAL,
  162. IRQ_STARTUP_MANAGED,
  163. IRQ_STARTUP_ABORT,
  164. };
  165. #ifdef CONFIG_SMP
  166. static int
  167. __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
  168. {
  169. struct irq_data *d = irq_desc_get_irq_data(desc);
  170. if (!irqd_affinity_is_managed(d))
  171. return IRQ_STARTUP_NORMAL;
  172. irqd_clr_managed_shutdown(d);
  173. if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
  174. /*
  175. * Catch code which fiddles with enable_irq() on a managed
  176. * and potentially shutdown IRQ. Chained interrupt
  177. * installment or irq auto probing should not happen on
  178. * managed irqs either.
  179. */
  180. if (WARN_ON_ONCE(force))
  181. return IRQ_STARTUP_ABORT;
  182. /*
  183. * The interrupt was requested, but there is no online CPU
  184. * in it's affinity mask. Put it into managed shutdown
  185. * state and let the cpu hotplug mechanism start it up once
  186. * a CPU in the mask becomes available.
  187. */
  188. return IRQ_STARTUP_ABORT;
  189. }
  190. /*
  191. * Managed interrupts have reserved resources, so this should not
  192. * happen.
  193. */
  194. if (WARN_ON(irq_domain_activate_irq(d, false)))
  195. return IRQ_STARTUP_ABORT;
  196. return IRQ_STARTUP_MANAGED;
  197. }
  198. #else
  199. static __always_inline int
  200. __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
  201. {
  202. return IRQ_STARTUP_NORMAL;
  203. }
  204. #endif
  205. static int __irq_startup(struct irq_desc *desc)
  206. {
  207. struct irq_data *d = irq_desc_get_irq_data(desc);
  208. int ret = 0;
  209. /* Warn if this interrupt is not activated but try nevertheless */
  210. WARN_ON_ONCE(!irqd_is_activated(d));
  211. if (d->chip->irq_startup) {
  212. ret = d->chip->irq_startup(d);
  213. irq_state_clr_disabled(desc);
  214. irq_state_clr_masked(desc);
  215. } else {
  216. irq_enable(desc);
  217. }
  218. irq_state_set_started(desc);
  219. return ret;
  220. }
  221. int irq_startup(struct irq_desc *desc, bool resend, bool force)
  222. {
  223. struct irq_data *d = irq_desc_get_irq_data(desc);
  224. struct cpumask *aff = irq_data_get_affinity_mask(d);
  225. int ret = 0;
  226. desc->depth = 0;
  227. if (irqd_is_started(d)) {
  228. irq_enable(desc);
  229. } else {
  230. switch (__irq_startup_managed(desc, aff, force)) {
  231. case IRQ_STARTUP_NORMAL:
  232. ret = __irq_startup(desc);
  233. irq_setup_affinity(desc);
  234. break;
  235. case IRQ_STARTUP_MANAGED:
  236. irq_do_set_affinity(d, aff, false);
  237. ret = __irq_startup(desc);
  238. break;
  239. case IRQ_STARTUP_ABORT:
  240. irqd_set_managed_shutdown(d);
  241. return 0;
  242. }
  243. }
  244. if (resend)
  245. check_irq_resend(desc);
  246. return ret;
  247. }
  248. int irq_activate(struct irq_desc *desc)
  249. {
  250. struct irq_data *d = irq_desc_get_irq_data(desc);
  251. if (!irqd_affinity_is_managed(d))
  252. return irq_domain_activate_irq(d, false);
  253. return 0;
  254. }
  255. int irq_activate_and_startup(struct irq_desc *desc, bool resend)
  256. {
  257. if (WARN_ON(irq_activate(desc)))
  258. return 0;
  259. return irq_startup(desc, resend, IRQ_START_FORCE);
  260. }
  261. static void __irq_disable(struct irq_desc *desc, bool mask);
  262. void irq_shutdown(struct irq_desc *desc)
  263. {
  264. if (irqd_is_started(&desc->irq_data)) {
  265. desc->depth = 1;
  266. if (desc->irq_data.chip->irq_shutdown) {
  267. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  268. irq_state_set_disabled(desc);
  269. irq_state_set_masked(desc);
  270. } else {
  271. __irq_disable(desc, true);
  272. }
  273. irq_state_clr_started(desc);
  274. }
  275. /*
  276. * This must be called even if the interrupt was never started up,
  277. * because the activation can happen before the interrupt is
  278. * available for request/startup. It has it's own state tracking so
  279. * it's safe to call it unconditionally.
  280. */
  281. irq_domain_deactivate_irq(&desc->irq_data);
  282. }
  283. void irq_enable(struct irq_desc *desc)
  284. {
  285. if (!irqd_irq_disabled(&desc->irq_data)) {
  286. unmask_irq(desc);
  287. } else {
  288. irq_state_clr_disabled(desc);
  289. if (desc->irq_data.chip->irq_enable) {
  290. desc->irq_data.chip->irq_enable(&desc->irq_data);
  291. irq_state_clr_masked(desc);
  292. } else {
  293. unmask_irq(desc);
  294. }
  295. }
  296. }
  297. static void __irq_disable(struct irq_desc *desc, bool mask)
  298. {
  299. if (irqd_irq_disabled(&desc->irq_data)) {
  300. if (mask)
  301. mask_irq(desc);
  302. } else {
  303. irq_state_set_disabled(desc);
  304. if (desc->irq_data.chip->irq_disable) {
  305. desc->irq_data.chip->irq_disable(&desc->irq_data);
  306. irq_state_set_masked(desc);
  307. } else if (mask) {
  308. mask_irq(desc);
  309. }
  310. }
  311. }
  312. /**
  313. * irq_disable - Mark interrupt disabled
  314. * @desc: irq descriptor which should be disabled
  315. *
  316. * If the chip does not implement the irq_disable callback, we
  317. * use a lazy disable approach. That means we mark the interrupt
  318. * disabled, but leave the hardware unmasked. That's an
  319. * optimization because we avoid the hardware access for the
  320. * common case where no interrupt happens after we marked it
  321. * disabled. If an interrupt happens, then the interrupt flow
  322. * handler masks the line at the hardware level and marks it
  323. * pending.
  324. *
  325. * If the interrupt chip does not implement the irq_disable callback,
  326. * a driver can disable the lazy approach for a particular irq line by
  327. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  328. * be used for devices which cannot disable the interrupt at the
  329. * device level under certain circumstances and have to use
  330. * disable_irq[_nosync] instead.
  331. */
  332. void irq_disable(struct irq_desc *desc)
  333. {
  334. __irq_disable(desc, irq_settings_disable_unlazy(desc));
  335. }
  336. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  337. {
  338. if (desc->irq_data.chip->irq_enable)
  339. desc->irq_data.chip->irq_enable(&desc->irq_data);
  340. else
  341. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  342. cpumask_set_cpu(cpu, desc->percpu_enabled);
  343. }
  344. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  345. {
  346. if (desc->irq_data.chip->irq_disable)
  347. desc->irq_data.chip->irq_disable(&desc->irq_data);
  348. else
  349. desc->irq_data.chip->irq_mask(&desc->irq_data);
  350. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  351. }
  352. static inline void mask_ack_irq(struct irq_desc *desc)
  353. {
  354. if (desc->irq_data.chip->irq_mask_ack) {
  355. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  356. irq_state_set_masked(desc);
  357. } else {
  358. mask_irq(desc);
  359. if (desc->irq_data.chip->irq_ack)
  360. desc->irq_data.chip->irq_ack(&desc->irq_data);
  361. }
  362. }
  363. void mask_irq(struct irq_desc *desc)
  364. {
  365. if (irqd_irq_masked(&desc->irq_data))
  366. return;
  367. if (desc->irq_data.chip->irq_mask) {
  368. desc->irq_data.chip->irq_mask(&desc->irq_data);
  369. irq_state_set_masked(desc);
  370. }
  371. }
  372. void unmask_irq(struct irq_desc *desc)
  373. {
  374. if (!irqd_irq_masked(&desc->irq_data))
  375. return;
  376. if (desc->irq_data.chip->irq_unmask) {
  377. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  378. irq_state_clr_masked(desc);
  379. }
  380. }
  381. void unmask_threaded_irq(struct irq_desc *desc)
  382. {
  383. struct irq_chip *chip = desc->irq_data.chip;
  384. if (chip->flags & IRQCHIP_EOI_THREADED)
  385. chip->irq_eoi(&desc->irq_data);
  386. unmask_irq(desc);
  387. }
  388. /*
  389. * handle_nested_irq - Handle a nested irq from a irq thread
  390. * @irq: the interrupt number
  391. *
  392. * Handle interrupts which are nested into a threaded interrupt
  393. * handler. The handler function is called inside the calling
  394. * threads context.
  395. */
  396. void handle_nested_irq(unsigned int irq)
  397. {
  398. struct irq_desc *desc = irq_to_desc(irq);
  399. struct irqaction *action;
  400. irqreturn_t action_ret;
  401. might_sleep();
  402. raw_spin_lock_irq(&desc->lock);
  403. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  404. action = desc->action;
  405. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  406. desc->istate |= IRQS_PENDING;
  407. goto out_unlock;
  408. }
  409. kstat_incr_irqs_this_cpu(desc);
  410. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  411. raw_spin_unlock_irq(&desc->lock);
  412. action_ret = IRQ_NONE;
  413. for_each_action_of_desc(desc, action)
  414. action_ret |= action->thread_fn(action->irq, action->dev_id);
  415. if (!noirqdebug)
  416. note_interrupt(desc, action_ret);
  417. raw_spin_lock_irq(&desc->lock);
  418. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  419. out_unlock:
  420. raw_spin_unlock_irq(&desc->lock);
  421. }
  422. EXPORT_SYMBOL_GPL(handle_nested_irq);
  423. static bool irq_check_poll(struct irq_desc *desc)
  424. {
  425. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  426. return false;
  427. return irq_wait_for_poll(desc);
  428. }
  429. static bool irq_may_run(struct irq_desc *desc)
  430. {
  431. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  432. /*
  433. * If the interrupt is not in progress and is not an armed
  434. * wakeup interrupt, proceed.
  435. */
  436. if (!irqd_has_set(&desc->irq_data, mask))
  437. return true;
  438. /*
  439. * If the interrupt is an armed wakeup source, mark it pending
  440. * and suspended, disable it and notify the pm core about the
  441. * event.
  442. */
  443. if (irq_pm_check_wakeup(desc))
  444. return false;
  445. /*
  446. * Handle a potential concurrent poll on a different core.
  447. */
  448. return irq_check_poll(desc);
  449. }
  450. /**
  451. * handle_simple_irq - Simple and software-decoded IRQs.
  452. * @desc: the interrupt description structure for this irq
  453. *
  454. * Simple interrupts are either sent from a demultiplexing interrupt
  455. * handler or come from hardware, where no interrupt hardware control
  456. * is necessary.
  457. *
  458. * Note: The caller is expected to handle the ack, clear, mask and
  459. * unmask issues if necessary.
  460. */
  461. void handle_simple_irq(struct irq_desc *desc)
  462. {
  463. raw_spin_lock(&desc->lock);
  464. if (!irq_may_run(desc))
  465. goto out_unlock;
  466. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  467. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  468. desc->istate |= IRQS_PENDING;
  469. goto out_unlock;
  470. }
  471. kstat_incr_irqs_this_cpu(desc);
  472. handle_irq_event(desc);
  473. out_unlock:
  474. raw_spin_unlock(&desc->lock);
  475. }
  476. EXPORT_SYMBOL_GPL(handle_simple_irq);
  477. /**
  478. * handle_untracked_irq - Simple and software-decoded IRQs.
  479. * @desc: the interrupt description structure for this irq
  480. *
  481. * Untracked interrupts are sent from a demultiplexing interrupt
  482. * handler when the demultiplexer does not know which device it its
  483. * multiplexed irq domain generated the interrupt. IRQ's handled
  484. * through here are not subjected to stats tracking, randomness, or
  485. * spurious interrupt detection.
  486. *
  487. * Note: Like handle_simple_irq, the caller is expected to handle
  488. * the ack, clear, mask and unmask issues if necessary.
  489. */
  490. void handle_untracked_irq(struct irq_desc *desc)
  491. {
  492. unsigned int flags = 0;
  493. raw_spin_lock(&desc->lock);
  494. if (!irq_may_run(desc))
  495. goto out_unlock;
  496. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  497. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  498. desc->istate |= IRQS_PENDING;
  499. goto out_unlock;
  500. }
  501. desc->istate &= ~IRQS_PENDING;
  502. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  503. raw_spin_unlock(&desc->lock);
  504. __handle_irq_event_percpu(desc, &flags);
  505. raw_spin_lock(&desc->lock);
  506. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  507. out_unlock:
  508. raw_spin_unlock(&desc->lock);
  509. }
  510. EXPORT_SYMBOL_GPL(handle_untracked_irq);
  511. /*
  512. * Called unconditionally from handle_level_irq() and only for oneshot
  513. * interrupts from handle_fasteoi_irq()
  514. */
  515. static void cond_unmask_irq(struct irq_desc *desc)
  516. {
  517. /*
  518. * We need to unmask in the following cases:
  519. * - Standard level irq (IRQF_ONESHOT is not set)
  520. * - Oneshot irq which did not wake the thread (caused by a
  521. * spurious interrupt or a primary handler handling it
  522. * completely).
  523. */
  524. if (!irqd_irq_disabled(&desc->irq_data) &&
  525. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  526. unmask_irq(desc);
  527. }
  528. /**
  529. * handle_level_irq - Level type irq handler
  530. * @desc: the interrupt description structure for this irq
  531. *
  532. * Level type interrupts are active as long as the hardware line has
  533. * the active level. This may require to mask the interrupt and unmask
  534. * it after the associated handler has acknowledged the device, so the
  535. * interrupt line is back to inactive.
  536. */
  537. void handle_level_irq(struct irq_desc *desc)
  538. {
  539. raw_spin_lock(&desc->lock);
  540. mask_ack_irq(desc);
  541. if (!irq_may_run(desc))
  542. goto out_unlock;
  543. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  544. /*
  545. * If its disabled or no action available
  546. * keep it masked and get out of here
  547. */
  548. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  549. desc->istate |= IRQS_PENDING;
  550. goto out_unlock;
  551. }
  552. kstat_incr_irqs_this_cpu(desc);
  553. handle_irq_event(desc);
  554. cond_unmask_irq(desc);
  555. out_unlock:
  556. raw_spin_unlock(&desc->lock);
  557. }
  558. EXPORT_SYMBOL_GPL(handle_level_irq);
  559. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  560. static inline void preflow_handler(struct irq_desc *desc)
  561. {
  562. if (desc->preflow_handler)
  563. desc->preflow_handler(&desc->irq_data);
  564. }
  565. #else
  566. static inline void preflow_handler(struct irq_desc *desc) { }
  567. #endif
  568. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  569. {
  570. if (!(desc->istate & IRQS_ONESHOT)) {
  571. chip->irq_eoi(&desc->irq_data);
  572. return;
  573. }
  574. /*
  575. * We need to unmask in the following cases:
  576. * - Oneshot irq which did not wake the thread (caused by a
  577. * spurious interrupt or a primary handler handling it
  578. * completely).
  579. */
  580. if (!irqd_irq_disabled(&desc->irq_data) &&
  581. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  582. chip->irq_eoi(&desc->irq_data);
  583. unmask_irq(desc);
  584. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  585. chip->irq_eoi(&desc->irq_data);
  586. }
  587. }
  588. /**
  589. * handle_fasteoi_irq - irq handler for transparent controllers
  590. * @desc: the interrupt description structure for this irq
  591. *
  592. * Only a single callback will be issued to the chip: an ->eoi()
  593. * call when the interrupt has been serviced. This enables support
  594. * for modern forms of interrupt handlers, which handle the flow
  595. * details in hardware, transparently.
  596. */
  597. void handle_fasteoi_irq(struct irq_desc *desc)
  598. {
  599. struct irq_chip *chip = desc->irq_data.chip;
  600. raw_spin_lock(&desc->lock);
  601. if (!irq_may_run(desc))
  602. goto out;
  603. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  604. /*
  605. * If its disabled or no action available
  606. * then mask it and get out of here:
  607. */
  608. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  609. desc->istate |= IRQS_PENDING;
  610. mask_irq(desc);
  611. goto out;
  612. }
  613. kstat_incr_irqs_this_cpu(desc);
  614. if (desc->istate & IRQS_ONESHOT)
  615. mask_irq(desc);
  616. preflow_handler(desc);
  617. handle_irq_event(desc);
  618. cond_unmask_eoi_irq(desc, chip);
  619. raw_spin_unlock(&desc->lock);
  620. return;
  621. out:
  622. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  623. chip->irq_eoi(&desc->irq_data);
  624. raw_spin_unlock(&desc->lock);
  625. }
  626. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  627. /**
  628. * handle_edge_irq - edge type IRQ handler
  629. * @desc: the interrupt description structure for this irq
  630. *
  631. * Interrupt occures on the falling and/or rising edge of a hardware
  632. * signal. The occurrence is latched into the irq controller hardware
  633. * and must be acked in order to be reenabled. After the ack another
  634. * interrupt can happen on the same source even before the first one
  635. * is handled by the associated event handler. If this happens it
  636. * might be necessary to disable (mask) the interrupt depending on the
  637. * controller hardware. This requires to reenable the interrupt inside
  638. * of the loop which handles the interrupts which have arrived while
  639. * the handler was running. If all pending interrupts are handled, the
  640. * loop is left.
  641. */
  642. void handle_edge_irq(struct irq_desc *desc)
  643. {
  644. raw_spin_lock(&desc->lock);
  645. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  646. if (!irq_may_run(desc)) {
  647. desc->istate |= IRQS_PENDING;
  648. mask_ack_irq(desc);
  649. goto out_unlock;
  650. }
  651. /*
  652. * If its disabled or no action available then mask it and get
  653. * out of here.
  654. */
  655. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  656. desc->istate |= IRQS_PENDING;
  657. mask_ack_irq(desc);
  658. goto out_unlock;
  659. }
  660. kstat_incr_irqs_this_cpu(desc);
  661. /* Start handling the irq */
  662. desc->irq_data.chip->irq_ack(&desc->irq_data);
  663. do {
  664. if (unlikely(!desc->action)) {
  665. mask_irq(desc);
  666. goto out_unlock;
  667. }
  668. /*
  669. * When another irq arrived while we were handling
  670. * one, we could have masked the irq.
  671. * Renable it, if it was not disabled in meantime.
  672. */
  673. if (unlikely(desc->istate & IRQS_PENDING)) {
  674. if (!irqd_irq_disabled(&desc->irq_data) &&
  675. irqd_irq_masked(&desc->irq_data))
  676. unmask_irq(desc);
  677. }
  678. handle_irq_event(desc);
  679. } while ((desc->istate & IRQS_PENDING) &&
  680. !irqd_irq_disabled(&desc->irq_data));
  681. out_unlock:
  682. raw_spin_unlock(&desc->lock);
  683. }
  684. EXPORT_SYMBOL(handle_edge_irq);
  685. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  686. /**
  687. * handle_edge_eoi_irq - edge eoi type IRQ handler
  688. * @desc: the interrupt description structure for this irq
  689. *
  690. * Similar as the above handle_edge_irq, but using eoi and w/o the
  691. * mask/unmask logic.
  692. */
  693. void handle_edge_eoi_irq(struct irq_desc *desc)
  694. {
  695. struct irq_chip *chip = irq_desc_get_chip(desc);
  696. raw_spin_lock(&desc->lock);
  697. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  698. if (!irq_may_run(desc)) {
  699. desc->istate |= IRQS_PENDING;
  700. goto out_eoi;
  701. }
  702. /*
  703. * If its disabled or no action available then mask it and get
  704. * out of here.
  705. */
  706. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  707. desc->istate |= IRQS_PENDING;
  708. goto out_eoi;
  709. }
  710. kstat_incr_irqs_this_cpu(desc);
  711. do {
  712. if (unlikely(!desc->action))
  713. goto out_eoi;
  714. handle_irq_event(desc);
  715. } while ((desc->istate & IRQS_PENDING) &&
  716. !irqd_irq_disabled(&desc->irq_data));
  717. out_eoi:
  718. chip->irq_eoi(&desc->irq_data);
  719. raw_spin_unlock(&desc->lock);
  720. }
  721. #endif
  722. /**
  723. * handle_percpu_irq - Per CPU local irq handler
  724. * @desc: the interrupt description structure for this irq
  725. *
  726. * Per CPU interrupts on SMP machines without locking requirements
  727. */
  728. void handle_percpu_irq(struct irq_desc *desc)
  729. {
  730. struct irq_chip *chip = irq_desc_get_chip(desc);
  731. kstat_incr_irqs_this_cpu(desc);
  732. if (chip->irq_ack)
  733. chip->irq_ack(&desc->irq_data);
  734. handle_irq_event_percpu(desc);
  735. if (chip->irq_eoi)
  736. chip->irq_eoi(&desc->irq_data);
  737. }
  738. /**
  739. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  740. * @desc: the interrupt description structure for this irq
  741. *
  742. * Per CPU interrupts on SMP machines without locking requirements. Same as
  743. * handle_percpu_irq() above but with the following extras:
  744. *
  745. * action->percpu_dev_id is a pointer to percpu variables which
  746. * contain the real device id for the cpu on which this handler is
  747. * called
  748. */
  749. void handle_percpu_devid_irq(struct irq_desc *desc)
  750. {
  751. struct irq_chip *chip = irq_desc_get_chip(desc);
  752. struct irqaction *action = desc->action;
  753. unsigned int irq = irq_desc_get_irq(desc);
  754. irqreturn_t res;
  755. kstat_incr_irqs_this_cpu(desc);
  756. if (chip->irq_ack)
  757. chip->irq_ack(&desc->irq_data);
  758. if (likely(action)) {
  759. trace_irq_handler_entry(irq, action);
  760. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  761. trace_irq_handler_exit(irq, action, res);
  762. } else {
  763. unsigned int cpu = smp_processor_id();
  764. bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
  765. if (enabled)
  766. irq_percpu_disable(desc, cpu);
  767. pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
  768. enabled ? " and unmasked" : "", irq, cpu);
  769. }
  770. if (chip->irq_eoi)
  771. chip->irq_eoi(&desc->irq_data);
  772. }
  773. static void
  774. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  775. int is_chained, const char *name)
  776. {
  777. if (!handle) {
  778. handle = handle_bad_irq;
  779. } else {
  780. struct irq_data *irq_data = &desc->irq_data;
  781. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  782. /*
  783. * With hierarchical domains we might run into a
  784. * situation where the outermost chip is not yet set
  785. * up, but the inner chips are there. Instead of
  786. * bailing we install the handler, but obviously we
  787. * cannot enable/startup the interrupt at this point.
  788. */
  789. while (irq_data) {
  790. if (irq_data->chip != &no_irq_chip)
  791. break;
  792. /*
  793. * Bail out if the outer chip is not set up
  794. * and the interrrupt supposed to be started
  795. * right away.
  796. */
  797. if (WARN_ON(is_chained))
  798. return;
  799. /* Try the parent */
  800. irq_data = irq_data->parent_data;
  801. }
  802. #endif
  803. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  804. return;
  805. }
  806. /* Uninstall? */
  807. if (handle == handle_bad_irq) {
  808. if (desc->irq_data.chip != &no_irq_chip)
  809. mask_ack_irq(desc);
  810. irq_state_set_disabled(desc);
  811. if (is_chained)
  812. desc->action = NULL;
  813. desc->depth = 1;
  814. }
  815. desc->handle_irq = handle;
  816. desc->name = name;
  817. if (handle != handle_bad_irq && is_chained) {
  818. unsigned int type = irqd_get_trigger_type(&desc->irq_data);
  819. /*
  820. * We're about to start this interrupt immediately,
  821. * hence the need to set the trigger configuration.
  822. * But the .set_type callback may have overridden the
  823. * flow handler, ignoring that we're dealing with a
  824. * chained interrupt. Reset it immediately because we
  825. * do know better.
  826. */
  827. if (type != IRQ_TYPE_NONE) {
  828. __irq_set_trigger(desc, type);
  829. desc->handle_irq = handle;
  830. }
  831. irq_settings_set_noprobe(desc);
  832. irq_settings_set_norequest(desc);
  833. irq_settings_set_nothread(desc);
  834. desc->action = &chained_action;
  835. irq_activate_and_startup(desc, IRQ_RESEND);
  836. }
  837. }
  838. void
  839. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  840. const char *name)
  841. {
  842. unsigned long flags;
  843. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  844. if (!desc)
  845. return;
  846. __irq_do_set_handler(desc, handle, is_chained, name);
  847. irq_put_desc_busunlock(desc, flags);
  848. }
  849. EXPORT_SYMBOL_GPL(__irq_set_handler);
  850. void
  851. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  852. void *data)
  853. {
  854. unsigned long flags;
  855. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  856. if (!desc)
  857. return;
  858. desc->irq_common_data.handler_data = data;
  859. __irq_do_set_handler(desc, handle, 1, NULL);
  860. irq_put_desc_busunlock(desc, flags);
  861. }
  862. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  863. void
  864. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  865. irq_flow_handler_t handle, const char *name)
  866. {
  867. irq_set_chip(irq, chip);
  868. __irq_set_handler(irq, handle, 0, name);
  869. }
  870. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  871. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  872. {
  873. unsigned long flags, trigger, tmp;
  874. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  875. if (!desc)
  876. return;
  877. /*
  878. * Warn when a driver sets the no autoenable flag on an already
  879. * active interrupt.
  880. */
  881. WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
  882. irq_settings_clr_and_set(desc, clr, set);
  883. trigger = irqd_get_trigger_type(&desc->irq_data);
  884. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  885. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  886. if (irq_settings_has_no_balance_set(desc))
  887. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  888. if (irq_settings_is_per_cpu(desc))
  889. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  890. if (irq_settings_can_move_pcntxt(desc))
  891. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  892. if (irq_settings_is_level(desc))
  893. irqd_set(&desc->irq_data, IRQD_LEVEL);
  894. tmp = irq_settings_get_trigger_mask(desc);
  895. if (tmp != IRQ_TYPE_NONE)
  896. trigger = tmp;
  897. irqd_set(&desc->irq_data, trigger);
  898. irq_put_desc_unlock(desc, flags);
  899. }
  900. EXPORT_SYMBOL_GPL(irq_modify_status);
  901. /**
  902. * irq_cpu_online - Invoke all irq_cpu_online functions.
  903. *
  904. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  905. * for each.
  906. */
  907. void irq_cpu_online(void)
  908. {
  909. struct irq_desc *desc;
  910. struct irq_chip *chip;
  911. unsigned long flags;
  912. unsigned int irq;
  913. for_each_active_irq(irq) {
  914. desc = irq_to_desc(irq);
  915. if (!desc)
  916. continue;
  917. raw_spin_lock_irqsave(&desc->lock, flags);
  918. chip = irq_data_get_irq_chip(&desc->irq_data);
  919. if (chip && chip->irq_cpu_online &&
  920. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  921. !irqd_irq_disabled(&desc->irq_data)))
  922. chip->irq_cpu_online(&desc->irq_data);
  923. raw_spin_unlock_irqrestore(&desc->lock, flags);
  924. }
  925. }
  926. /**
  927. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  928. *
  929. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  930. * for each.
  931. */
  932. void irq_cpu_offline(void)
  933. {
  934. struct irq_desc *desc;
  935. struct irq_chip *chip;
  936. unsigned long flags;
  937. unsigned int irq;
  938. for_each_active_irq(irq) {
  939. desc = irq_to_desc(irq);
  940. if (!desc)
  941. continue;
  942. raw_spin_lock_irqsave(&desc->lock, flags);
  943. chip = irq_data_get_irq_chip(&desc->irq_data);
  944. if (chip && chip->irq_cpu_offline &&
  945. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  946. !irqd_irq_disabled(&desc->irq_data)))
  947. chip->irq_cpu_offline(&desc->irq_data);
  948. raw_spin_unlock_irqrestore(&desc->lock, flags);
  949. }
  950. }
  951. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  952. #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
  953. /**
  954. * handle_fasteoi_ack_irq - irq handler for edge hierarchy
  955. * stacked on transparent controllers
  956. *
  957. * @desc: the interrupt description structure for this irq
  958. *
  959. * Like handle_fasteoi_irq(), but for use with hierarchy where
  960. * the irq_chip also needs to have its ->irq_ack() function
  961. * called.
  962. */
  963. void handle_fasteoi_ack_irq(struct irq_desc *desc)
  964. {
  965. struct irq_chip *chip = desc->irq_data.chip;
  966. raw_spin_lock(&desc->lock);
  967. if (!irq_may_run(desc))
  968. goto out;
  969. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  970. /*
  971. * If its disabled or no action available
  972. * then mask it and get out of here:
  973. */
  974. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  975. desc->istate |= IRQS_PENDING;
  976. mask_irq(desc);
  977. goto out;
  978. }
  979. kstat_incr_irqs_this_cpu(desc);
  980. if (desc->istate & IRQS_ONESHOT)
  981. mask_irq(desc);
  982. /* Start handling the irq */
  983. desc->irq_data.chip->irq_ack(&desc->irq_data);
  984. preflow_handler(desc);
  985. handle_irq_event(desc);
  986. cond_unmask_eoi_irq(desc, chip);
  987. raw_spin_unlock(&desc->lock);
  988. return;
  989. out:
  990. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  991. chip->irq_eoi(&desc->irq_data);
  992. raw_spin_unlock(&desc->lock);
  993. }
  994. EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
  995. /**
  996. * handle_fasteoi_mask_irq - irq handler for level hierarchy
  997. * stacked on transparent controllers
  998. *
  999. * @desc: the interrupt description structure for this irq
  1000. *
  1001. * Like handle_fasteoi_irq(), but for use with hierarchy where
  1002. * the irq_chip also needs to have its ->irq_mask_ack() function
  1003. * called.
  1004. */
  1005. void handle_fasteoi_mask_irq(struct irq_desc *desc)
  1006. {
  1007. struct irq_chip *chip = desc->irq_data.chip;
  1008. raw_spin_lock(&desc->lock);
  1009. mask_ack_irq(desc);
  1010. if (!irq_may_run(desc))
  1011. goto out;
  1012. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  1013. /*
  1014. * If its disabled or no action available
  1015. * then mask it and get out of here:
  1016. */
  1017. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  1018. desc->istate |= IRQS_PENDING;
  1019. mask_irq(desc);
  1020. goto out;
  1021. }
  1022. kstat_incr_irqs_this_cpu(desc);
  1023. if (desc->istate & IRQS_ONESHOT)
  1024. mask_irq(desc);
  1025. preflow_handler(desc);
  1026. handle_irq_event(desc);
  1027. cond_unmask_eoi_irq(desc, chip);
  1028. raw_spin_unlock(&desc->lock);
  1029. return;
  1030. out:
  1031. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1032. chip->irq_eoi(&desc->irq_data);
  1033. raw_spin_unlock(&desc->lock);
  1034. }
  1035. EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
  1036. #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
  1037. /**
  1038. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  1039. * NULL)
  1040. * @data: Pointer to interrupt specific data
  1041. */
  1042. void irq_chip_enable_parent(struct irq_data *data)
  1043. {
  1044. data = data->parent_data;
  1045. if (data->chip->irq_enable)
  1046. data->chip->irq_enable(data);
  1047. else
  1048. data->chip->irq_unmask(data);
  1049. }
  1050. EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
  1051. /**
  1052. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  1053. * NULL)
  1054. * @data: Pointer to interrupt specific data
  1055. */
  1056. void irq_chip_disable_parent(struct irq_data *data)
  1057. {
  1058. data = data->parent_data;
  1059. if (data->chip->irq_disable)
  1060. data->chip->irq_disable(data);
  1061. else
  1062. data->chip->irq_mask(data);
  1063. }
  1064. EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
  1065. /**
  1066. * irq_chip_ack_parent - Acknowledge the parent interrupt
  1067. * @data: Pointer to interrupt specific data
  1068. */
  1069. void irq_chip_ack_parent(struct irq_data *data)
  1070. {
  1071. data = data->parent_data;
  1072. data->chip->irq_ack(data);
  1073. }
  1074. EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
  1075. /**
  1076. * irq_chip_mask_parent - Mask the parent interrupt
  1077. * @data: Pointer to interrupt specific data
  1078. */
  1079. void irq_chip_mask_parent(struct irq_data *data)
  1080. {
  1081. data = data->parent_data;
  1082. data->chip->irq_mask(data);
  1083. }
  1084. EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
  1085. /**
  1086. * irq_chip_unmask_parent - Unmask the parent interrupt
  1087. * @data: Pointer to interrupt specific data
  1088. */
  1089. void irq_chip_unmask_parent(struct irq_data *data)
  1090. {
  1091. data = data->parent_data;
  1092. data->chip->irq_unmask(data);
  1093. }
  1094. EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
  1095. /**
  1096. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  1097. * @data: Pointer to interrupt specific data
  1098. */
  1099. void irq_chip_eoi_parent(struct irq_data *data)
  1100. {
  1101. data = data->parent_data;
  1102. data->chip->irq_eoi(data);
  1103. }
  1104. EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
  1105. /**
  1106. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  1107. * @data: Pointer to interrupt specific data
  1108. * @dest: The affinity mask to set
  1109. * @force: Flag to enforce setting (disable online checks)
  1110. *
  1111. * Conditinal, as the underlying parent chip might not implement it.
  1112. */
  1113. int irq_chip_set_affinity_parent(struct irq_data *data,
  1114. const struct cpumask *dest, bool force)
  1115. {
  1116. data = data->parent_data;
  1117. if (data->chip->irq_set_affinity)
  1118. return data->chip->irq_set_affinity(data, dest, force);
  1119. return -ENOSYS;
  1120. }
  1121. EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
  1122. /**
  1123. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  1124. * @data: Pointer to interrupt specific data
  1125. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  1126. *
  1127. * Conditional, as the underlying parent chip might not implement it.
  1128. */
  1129. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  1130. {
  1131. data = data->parent_data;
  1132. if (data->chip->irq_set_type)
  1133. return data->chip->irq_set_type(data, type);
  1134. return -ENOSYS;
  1135. }
  1136. EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
  1137. /**
  1138. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  1139. * @data: Pointer to interrupt specific data
  1140. *
  1141. * Iterate through the domain hierarchy of the interrupt and check
  1142. * whether a hw retrigger function exists. If yes, invoke it.
  1143. */
  1144. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  1145. {
  1146. for (data = data->parent_data; data; data = data->parent_data)
  1147. if (data->chip && data->chip->irq_retrigger)
  1148. return data->chip->irq_retrigger(data);
  1149. return 0;
  1150. }
  1151. /**
  1152. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  1153. * @data: Pointer to interrupt specific data
  1154. * @vcpu_info: The vcpu affinity information
  1155. */
  1156. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  1157. {
  1158. data = data->parent_data;
  1159. if (data->chip->irq_set_vcpu_affinity)
  1160. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  1161. return -ENOSYS;
  1162. }
  1163. /**
  1164. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  1165. * @data: Pointer to interrupt specific data
  1166. * @on: Whether to set or reset the wake-up capability of this irq
  1167. *
  1168. * Conditional, as the underlying parent chip might not implement it.
  1169. */
  1170. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  1171. {
  1172. data = data->parent_data;
  1173. if (data->chip->irq_set_wake)
  1174. return data->chip->irq_set_wake(data, on);
  1175. return -ENOSYS;
  1176. }
  1177. #endif
  1178. /**
  1179. * irq_chip_compose_msi_msg - Componse msi message for a irq chip
  1180. * @data: Pointer to interrupt specific data
  1181. * @msg: Pointer to the MSI message
  1182. *
  1183. * For hierarchical domains we find the first chip in the hierarchy
  1184. * which implements the irq_compose_msi_msg callback. For non
  1185. * hierarchical we use the top level chip.
  1186. */
  1187. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  1188. {
  1189. struct irq_data *pos = NULL;
  1190. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  1191. for (; data; data = data->parent_data)
  1192. #endif
  1193. if (data->chip && data->chip->irq_compose_msi_msg)
  1194. pos = data;
  1195. if (!pos)
  1196. return -ENOSYS;
  1197. pos->chip->irq_compose_msi_msg(pos, msg);
  1198. return 0;
  1199. }
  1200. /**
  1201. * irq_chip_pm_get - Enable power for an IRQ chip
  1202. * @data: Pointer to interrupt specific data
  1203. *
  1204. * Enable the power to the IRQ chip referenced by the interrupt data
  1205. * structure.
  1206. */
  1207. int irq_chip_pm_get(struct irq_data *data)
  1208. {
  1209. int retval;
  1210. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
  1211. retval = pm_runtime_get_sync(data->chip->parent_device);
  1212. if (retval < 0) {
  1213. pm_runtime_put_noidle(data->chip->parent_device);
  1214. return retval;
  1215. }
  1216. }
  1217. return 0;
  1218. }
  1219. /**
  1220. * irq_chip_pm_put - Disable power for an IRQ chip
  1221. * @data: Pointer to interrupt specific data
  1222. *
  1223. * Disable the power to the IRQ chip referenced by the interrupt data
  1224. * structure, belongs. Note that power will only be disabled, once this
  1225. * function has been called for all IRQs that have called irq_chip_pm_get().
  1226. */
  1227. int irq_chip_pm_put(struct irq_data *data)
  1228. {
  1229. int retval = 0;
  1230. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
  1231. retval = pm_runtime_put(data->chip->parent_device);
  1232. return (retval < 0) ? retval : 0;
  1233. }