ar933x_uart.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Atheros AR933X SoC built-in UART driver
  4. *
  5. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  6. *
  7. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  8. */
  9. #include <linux/module.h>
  10. #include <linux/ioport.h>
  11. #include <linux/init.h>
  12. #include <linux/console.h>
  13. #include <linux/sysrq.h>
  14. #include <linux/delay.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/tty.h>
  19. #include <linux/tty_flip.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/serial.h>
  22. #include <linux/slab.h>
  23. #include <linux/io.h>
  24. #include <linux/irq.h>
  25. #include <linux/clk.h>
  26. #include <asm/div64.h>
  27. #include <asm/mach-ath79/ar933x_uart.h>
  28. #define DRIVER_NAME "ar933x-uart"
  29. #define AR933X_UART_MAX_SCALE 0xff
  30. #define AR933X_UART_MAX_STEP 0xffff
  31. #define AR933X_UART_MIN_BAUD 300
  32. #define AR933X_UART_MAX_BAUD 3000000
  33. #define AR933X_DUMMY_STATUS_RD 0x01
  34. static struct uart_driver ar933x_uart_driver;
  35. struct ar933x_uart_port {
  36. struct uart_port port;
  37. unsigned int ier; /* shadow Interrupt Enable Register */
  38. unsigned int min_baud;
  39. unsigned int max_baud;
  40. struct clk *clk;
  41. };
  42. static inline bool ar933x_uart_console_enabled(void)
  43. {
  44. return IS_ENABLED(CONFIG_SERIAL_AR933X_CONSOLE);
  45. }
  46. static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
  47. int offset)
  48. {
  49. return readl(up->port.membase + offset);
  50. }
  51. static inline void ar933x_uart_write(struct ar933x_uart_port *up,
  52. int offset, unsigned int value)
  53. {
  54. writel(value, up->port.membase + offset);
  55. }
  56. static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
  57. unsigned int offset,
  58. unsigned int mask,
  59. unsigned int val)
  60. {
  61. unsigned int t;
  62. t = ar933x_uart_read(up, offset);
  63. t &= ~mask;
  64. t |= val;
  65. ar933x_uart_write(up, offset, t);
  66. }
  67. static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
  68. unsigned int offset,
  69. unsigned int val)
  70. {
  71. ar933x_uart_rmw(up, offset, 0, val);
  72. }
  73. static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
  74. unsigned int offset,
  75. unsigned int val)
  76. {
  77. ar933x_uart_rmw(up, offset, val, 0);
  78. }
  79. static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
  80. {
  81. up->ier |= AR933X_UART_INT_TX_EMPTY;
  82. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  83. }
  84. static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
  85. {
  86. up->ier &= ~AR933X_UART_INT_TX_EMPTY;
  87. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  88. }
  89. static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
  90. {
  91. unsigned int rdata;
  92. rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
  93. rdata |= AR933X_UART_DATA_TX_CSR;
  94. ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
  95. }
  96. static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
  97. {
  98. struct ar933x_uart_port *up =
  99. container_of(port, struct ar933x_uart_port, port);
  100. unsigned long flags;
  101. unsigned int rdata;
  102. spin_lock_irqsave(&up->port.lock, flags);
  103. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  104. spin_unlock_irqrestore(&up->port.lock, flags);
  105. return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
  106. }
  107. static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
  108. {
  109. return TIOCM_CAR;
  110. }
  111. static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  112. {
  113. }
  114. static void ar933x_uart_start_tx(struct uart_port *port)
  115. {
  116. struct ar933x_uart_port *up =
  117. container_of(port, struct ar933x_uart_port, port);
  118. ar933x_uart_start_tx_interrupt(up);
  119. }
  120. static void ar933x_uart_stop_tx(struct uart_port *port)
  121. {
  122. struct ar933x_uart_port *up =
  123. container_of(port, struct ar933x_uart_port, port);
  124. ar933x_uart_stop_tx_interrupt(up);
  125. }
  126. static void ar933x_uart_stop_rx(struct uart_port *port)
  127. {
  128. struct ar933x_uart_port *up =
  129. container_of(port, struct ar933x_uart_port, port);
  130. up->ier &= ~AR933X_UART_INT_RX_VALID;
  131. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  132. }
  133. static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
  134. {
  135. struct ar933x_uart_port *up =
  136. container_of(port, struct ar933x_uart_port, port);
  137. unsigned long flags;
  138. spin_lock_irqsave(&up->port.lock, flags);
  139. if (break_state == -1)
  140. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  141. AR933X_UART_CS_TX_BREAK);
  142. else
  143. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  144. AR933X_UART_CS_TX_BREAK);
  145. spin_unlock_irqrestore(&up->port.lock, flags);
  146. }
  147. /*
  148. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  149. */
  150. static unsigned long ar933x_uart_get_baud(unsigned int clk,
  151. unsigned int scale,
  152. unsigned int step)
  153. {
  154. u64 t;
  155. u32 div;
  156. div = (2 << 16) * (scale + 1);
  157. t = clk;
  158. t *= step;
  159. t += (div / 2);
  160. do_div(t, div);
  161. return t;
  162. }
  163. static void ar933x_uart_get_scale_step(unsigned int clk,
  164. unsigned int baud,
  165. unsigned int *scale,
  166. unsigned int *step)
  167. {
  168. unsigned int tscale;
  169. long min_diff;
  170. *scale = 0;
  171. *step = 0;
  172. min_diff = baud;
  173. for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
  174. u64 tstep;
  175. int diff;
  176. tstep = baud * (tscale + 1);
  177. tstep *= (2 << 16);
  178. do_div(tstep, clk);
  179. if (tstep > AR933X_UART_MAX_STEP)
  180. break;
  181. diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
  182. if (diff < min_diff) {
  183. min_diff = diff;
  184. *scale = tscale;
  185. *step = tstep;
  186. }
  187. }
  188. }
  189. static void ar933x_uart_set_termios(struct uart_port *port,
  190. struct ktermios *new,
  191. struct ktermios *old)
  192. {
  193. struct ar933x_uart_port *up =
  194. container_of(port, struct ar933x_uart_port, port);
  195. unsigned int cs;
  196. unsigned long flags;
  197. unsigned int baud, scale, step;
  198. /* Only CS8 is supported */
  199. new->c_cflag &= ~CSIZE;
  200. new->c_cflag |= CS8;
  201. /* Only one stop bit is supported */
  202. new->c_cflag &= ~CSTOPB;
  203. cs = 0;
  204. if (new->c_cflag & PARENB) {
  205. if (!(new->c_cflag & PARODD))
  206. cs |= AR933X_UART_CS_PARITY_EVEN;
  207. else
  208. cs |= AR933X_UART_CS_PARITY_ODD;
  209. } else {
  210. cs |= AR933X_UART_CS_PARITY_NONE;
  211. }
  212. /* Mark/space parity is not supported */
  213. new->c_cflag &= ~CMSPAR;
  214. baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
  215. ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
  216. /*
  217. * Ok, we're now changing the port state. Do it with
  218. * interrupts disabled.
  219. */
  220. spin_lock_irqsave(&up->port.lock, flags);
  221. /* disable the UART */
  222. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  223. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
  224. /* Update the per-port timeout. */
  225. uart_update_timeout(port, new->c_cflag, baud);
  226. up->port.ignore_status_mask = 0;
  227. /* ignore all characters if CREAD is not set */
  228. if ((new->c_cflag & CREAD) == 0)
  229. up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
  230. ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
  231. scale << AR933X_UART_CLOCK_SCALE_S | step);
  232. /* setup configuration register */
  233. ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
  234. /* enable host interrupt */
  235. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  236. AR933X_UART_CS_HOST_INT_EN);
  237. /* reenable the UART */
  238. ar933x_uart_rmw(up, AR933X_UART_CS_REG,
  239. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
  240. AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
  241. spin_unlock_irqrestore(&up->port.lock, flags);
  242. if (tty_termios_baud_rate(new))
  243. tty_termios_encode_baud_rate(new, baud, baud);
  244. }
  245. static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
  246. {
  247. struct tty_port *port = &up->port.state->port;
  248. int max_count = 256;
  249. do {
  250. unsigned int rdata;
  251. unsigned char ch;
  252. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  253. if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
  254. break;
  255. /* remove the character from the FIFO */
  256. ar933x_uart_write(up, AR933X_UART_DATA_REG,
  257. AR933X_UART_DATA_RX_CSR);
  258. up->port.icount.rx++;
  259. ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
  260. if (uart_handle_sysrq_char(&up->port, ch))
  261. continue;
  262. if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
  263. tty_insert_flip_char(port, ch, TTY_NORMAL);
  264. } while (max_count-- > 0);
  265. spin_unlock(&up->port.lock);
  266. tty_flip_buffer_push(port);
  267. spin_lock(&up->port.lock);
  268. }
  269. static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
  270. {
  271. struct circ_buf *xmit = &up->port.state->xmit;
  272. int count;
  273. if (uart_tx_stopped(&up->port))
  274. return;
  275. count = up->port.fifosize;
  276. do {
  277. unsigned int rdata;
  278. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  279. if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
  280. break;
  281. if (up->port.x_char) {
  282. ar933x_uart_putc(up, up->port.x_char);
  283. up->port.icount.tx++;
  284. up->port.x_char = 0;
  285. continue;
  286. }
  287. if (uart_circ_empty(xmit))
  288. break;
  289. ar933x_uart_putc(up, xmit->buf[xmit->tail]);
  290. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  291. up->port.icount.tx++;
  292. } while (--count > 0);
  293. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  294. uart_write_wakeup(&up->port);
  295. if (!uart_circ_empty(xmit))
  296. ar933x_uart_start_tx_interrupt(up);
  297. }
  298. static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
  299. {
  300. struct ar933x_uart_port *up = dev_id;
  301. unsigned int status;
  302. status = ar933x_uart_read(up, AR933X_UART_CS_REG);
  303. if ((status & AR933X_UART_CS_HOST_INT) == 0)
  304. return IRQ_NONE;
  305. spin_lock(&up->port.lock);
  306. status = ar933x_uart_read(up, AR933X_UART_INT_REG);
  307. status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  308. if (status & AR933X_UART_INT_RX_VALID) {
  309. ar933x_uart_write(up, AR933X_UART_INT_REG,
  310. AR933X_UART_INT_RX_VALID);
  311. ar933x_uart_rx_chars(up);
  312. }
  313. if (status & AR933X_UART_INT_TX_EMPTY) {
  314. ar933x_uart_write(up, AR933X_UART_INT_REG,
  315. AR933X_UART_INT_TX_EMPTY);
  316. ar933x_uart_stop_tx_interrupt(up);
  317. ar933x_uart_tx_chars(up);
  318. }
  319. spin_unlock(&up->port.lock);
  320. return IRQ_HANDLED;
  321. }
  322. static int ar933x_uart_startup(struct uart_port *port)
  323. {
  324. struct ar933x_uart_port *up =
  325. container_of(port, struct ar933x_uart_port, port);
  326. unsigned long flags;
  327. int ret;
  328. ret = request_irq(up->port.irq, ar933x_uart_interrupt,
  329. up->port.irqflags, dev_name(up->port.dev), up);
  330. if (ret)
  331. return ret;
  332. spin_lock_irqsave(&up->port.lock, flags);
  333. /* Enable HOST interrupts */
  334. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  335. AR933X_UART_CS_HOST_INT_EN);
  336. /* Enable RX interrupts */
  337. up->ier = AR933X_UART_INT_RX_VALID;
  338. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  339. spin_unlock_irqrestore(&up->port.lock, flags);
  340. return 0;
  341. }
  342. static void ar933x_uart_shutdown(struct uart_port *port)
  343. {
  344. struct ar933x_uart_port *up =
  345. container_of(port, struct ar933x_uart_port, port);
  346. /* Disable all interrupts */
  347. up->ier = 0;
  348. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  349. /* Disable break condition */
  350. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  351. AR933X_UART_CS_TX_BREAK);
  352. free_irq(up->port.irq, up);
  353. }
  354. static const char *ar933x_uart_type(struct uart_port *port)
  355. {
  356. return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
  357. }
  358. static void ar933x_uart_release_port(struct uart_port *port)
  359. {
  360. /* Nothing to release ... */
  361. }
  362. static int ar933x_uart_request_port(struct uart_port *port)
  363. {
  364. /* UARTs always present */
  365. return 0;
  366. }
  367. static void ar933x_uart_config_port(struct uart_port *port, int flags)
  368. {
  369. if (flags & UART_CONFIG_TYPE)
  370. port->type = PORT_AR933X;
  371. }
  372. static int ar933x_uart_verify_port(struct uart_port *port,
  373. struct serial_struct *ser)
  374. {
  375. struct ar933x_uart_port *up =
  376. container_of(port, struct ar933x_uart_port, port);
  377. if (ser->type != PORT_UNKNOWN &&
  378. ser->type != PORT_AR933X)
  379. return -EINVAL;
  380. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  381. return -EINVAL;
  382. if (ser->baud_base < up->min_baud ||
  383. ser->baud_base > up->max_baud)
  384. return -EINVAL;
  385. return 0;
  386. }
  387. static const struct uart_ops ar933x_uart_ops = {
  388. .tx_empty = ar933x_uart_tx_empty,
  389. .set_mctrl = ar933x_uart_set_mctrl,
  390. .get_mctrl = ar933x_uart_get_mctrl,
  391. .stop_tx = ar933x_uart_stop_tx,
  392. .start_tx = ar933x_uart_start_tx,
  393. .stop_rx = ar933x_uart_stop_rx,
  394. .break_ctl = ar933x_uart_break_ctl,
  395. .startup = ar933x_uart_startup,
  396. .shutdown = ar933x_uart_shutdown,
  397. .set_termios = ar933x_uart_set_termios,
  398. .type = ar933x_uart_type,
  399. .release_port = ar933x_uart_release_port,
  400. .request_port = ar933x_uart_request_port,
  401. .config_port = ar933x_uart_config_port,
  402. .verify_port = ar933x_uart_verify_port,
  403. };
  404. static struct ar933x_uart_port *
  405. ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
  406. static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
  407. {
  408. unsigned int status;
  409. unsigned int timeout = 60000;
  410. /* Wait up to 60ms for the character(s) to be sent. */
  411. do {
  412. status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  413. if (--timeout == 0)
  414. break;
  415. udelay(1);
  416. } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
  417. }
  418. static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
  419. {
  420. struct ar933x_uart_port *up =
  421. container_of(port, struct ar933x_uart_port, port);
  422. ar933x_uart_wait_xmitr(up);
  423. ar933x_uart_putc(up, ch);
  424. }
  425. static void ar933x_uart_console_write(struct console *co, const char *s,
  426. unsigned int count)
  427. {
  428. struct ar933x_uart_port *up = ar933x_console_ports[co->index];
  429. unsigned long flags;
  430. unsigned int int_en;
  431. int locked = 1;
  432. local_irq_save(flags);
  433. if (up->port.sysrq)
  434. locked = 0;
  435. else if (oops_in_progress)
  436. locked = spin_trylock(&up->port.lock);
  437. else
  438. spin_lock(&up->port.lock);
  439. /*
  440. * First save the IER then disable the interrupts
  441. */
  442. int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  443. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
  444. uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
  445. /*
  446. * Finally, wait for transmitter to become empty
  447. * and restore the IER
  448. */
  449. ar933x_uart_wait_xmitr(up);
  450. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
  451. ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
  452. if (locked)
  453. spin_unlock(&up->port.lock);
  454. local_irq_restore(flags);
  455. }
  456. static int ar933x_uart_console_setup(struct console *co, char *options)
  457. {
  458. struct ar933x_uart_port *up;
  459. int baud = 115200;
  460. int bits = 8;
  461. int parity = 'n';
  462. int flow = 'n';
  463. if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
  464. return -EINVAL;
  465. up = ar933x_console_ports[co->index];
  466. if (!up)
  467. return -ENODEV;
  468. if (options)
  469. uart_parse_options(options, &baud, &parity, &bits, &flow);
  470. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  471. }
  472. static struct console ar933x_uart_console = {
  473. .name = "ttyATH",
  474. .write = ar933x_uart_console_write,
  475. .device = uart_console_device,
  476. .setup = ar933x_uart_console_setup,
  477. .flags = CON_PRINTBUFFER,
  478. .index = -1,
  479. .data = &ar933x_uart_driver,
  480. };
  481. static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
  482. {
  483. if (!ar933x_uart_console_enabled())
  484. return;
  485. ar933x_console_ports[up->port.line] = up;
  486. }
  487. static struct uart_driver ar933x_uart_driver = {
  488. .owner = THIS_MODULE,
  489. .driver_name = DRIVER_NAME,
  490. .dev_name = "ttyATH",
  491. .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
  492. .cons = NULL, /* filled in runtime */
  493. };
  494. static int ar933x_uart_probe(struct platform_device *pdev)
  495. {
  496. struct ar933x_uart_port *up;
  497. struct uart_port *port;
  498. struct resource *mem_res;
  499. struct resource *irq_res;
  500. struct device_node *np;
  501. unsigned int baud;
  502. int id;
  503. int ret;
  504. np = pdev->dev.of_node;
  505. if (IS_ENABLED(CONFIG_OF) && np) {
  506. id = of_alias_get_id(np, "serial");
  507. if (id < 0) {
  508. dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
  509. id);
  510. return id;
  511. }
  512. } else {
  513. id = pdev->id;
  514. if (id == -1)
  515. id = 0;
  516. }
  517. if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
  518. return -EINVAL;
  519. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  520. if (!irq_res) {
  521. dev_err(&pdev->dev, "no IRQ resource\n");
  522. return -EINVAL;
  523. }
  524. up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
  525. GFP_KERNEL);
  526. if (!up)
  527. return -ENOMEM;
  528. up->clk = devm_clk_get(&pdev->dev, "uart");
  529. if (IS_ERR(up->clk)) {
  530. dev_err(&pdev->dev, "unable to get UART clock\n");
  531. return PTR_ERR(up->clk);
  532. }
  533. port = &up->port;
  534. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  535. port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
  536. if (IS_ERR(port->membase))
  537. return PTR_ERR(port->membase);
  538. ret = clk_prepare_enable(up->clk);
  539. if (ret)
  540. return ret;
  541. port->uartclk = clk_get_rate(up->clk);
  542. if (!port->uartclk) {
  543. ret = -EINVAL;
  544. goto err_disable_clk;
  545. }
  546. port->mapbase = mem_res->start;
  547. port->line = id;
  548. port->irq = irq_res->start;
  549. port->dev = &pdev->dev;
  550. port->type = PORT_AR933X;
  551. port->iotype = UPIO_MEM32;
  552. port->regshift = 2;
  553. port->fifosize = AR933X_UART_FIFO_SIZE;
  554. port->ops = &ar933x_uart_ops;
  555. baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
  556. up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
  557. baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
  558. up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
  559. ar933x_uart_add_console_port(up);
  560. ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
  561. if (ret)
  562. goto err_disable_clk;
  563. platform_set_drvdata(pdev, up);
  564. return 0;
  565. err_disable_clk:
  566. clk_disable_unprepare(up->clk);
  567. return ret;
  568. }
  569. static int ar933x_uart_remove(struct platform_device *pdev)
  570. {
  571. struct ar933x_uart_port *up;
  572. up = platform_get_drvdata(pdev);
  573. if (up) {
  574. uart_remove_one_port(&ar933x_uart_driver, &up->port);
  575. clk_disable_unprepare(up->clk);
  576. }
  577. return 0;
  578. }
  579. #ifdef CONFIG_OF
  580. static const struct of_device_id ar933x_uart_of_ids[] = {
  581. { .compatible = "qca,ar9330-uart" },
  582. {},
  583. };
  584. MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
  585. #endif
  586. static struct platform_driver ar933x_uart_platform_driver = {
  587. .probe = ar933x_uart_probe,
  588. .remove = ar933x_uart_remove,
  589. .driver = {
  590. .name = DRIVER_NAME,
  591. .of_match_table = of_match_ptr(ar933x_uart_of_ids),
  592. },
  593. };
  594. static int __init ar933x_uart_init(void)
  595. {
  596. int ret;
  597. if (ar933x_uart_console_enabled())
  598. ar933x_uart_driver.cons = &ar933x_uart_console;
  599. ret = uart_register_driver(&ar933x_uart_driver);
  600. if (ret)
  601. goto err_out;
  602. ret = platform_driver_register(&ar933x_uart_platform_driver);
  603. if (ret)
  604. goto err_unregister_uart_driver;
  605. return 0;
  606. err_unregister_uart_driver:
  607. uart_unregister_driver(&ar933x_uart_driver);
  608. err_out:
  609. return ret;
  610. }
  611. static void __exit ar933x_uart_exit(void)
  612. {
  613. platform_driver_unregister(&ar933x_uart_platform_driver);
  614. uart_unregister_driver(&ar933x_uart_driver);
  615. }
  616. module_init(ar933x_uart_init);
  617. module_exit(ar933x_uart_exit);
  618. MODULE_DESCRIPTION("Atheros AR933X UART driver");
  619. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  620. MODULE_LICENSE("GPL v2");
  621. MODULE_ALIAS("platform:" DRIVER_NAME);