rcar_gen3_thermal.c 13 KB

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  1. /*
  2. * R-Car Gen3 THS thermal sensor driver
  3. * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
  4. *
  5. * Copyright (C) 2016 Renesas Electronics Corporation.
  6. * Copyright (C) 2016 Sang Engineering
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. */
  18. #include <linux/delay.h>
  19. #include <linux/err.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/io.h>
  22. #include <linux/module.h>
  23. #include <linux/of_device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/sys_soc.h>
  28. #include <linux/thermal.h>
  29. #include "thermal_core.h"
  30. /* Register offsets */
  31. #define REG_GEN3_IRQSTR 0x04
  32. #define REG_GEN3_IRQMSK 0x08
  33. #define REG_GEN3_IRQCTL 0x0C
  34. #define REG_GEN3_IRQEN 0x10
  35. #define REG_GEN3_IRQTEMP1 0x14
  36. #define REG_GEN3_IRQTEMP2 0x18
  37. #define REG_GEN3_IRQTEMP3 0x1C
  38. #define REG_GEN3_CTSR 0x20
  39. #define REG_GEN3_THCTR 0x20
  40. #define REG_GEN3_TEMP 0x28
  41. #define REG_GEN3_THCODE1 0x50
  42. #define REG_GEN3_THCODE2 0x54
  43. #define REG_GEN3_THCODE3 0x58
  44. /* IRQ{STR,MSK,EN} bits */
  45. #define IRQ_TEMP1 BIT(0)
  46. #define IRQ_TEMP2 BIT(1)
  47. #define IRQ_TEMP3 BIT(2)
  48. #define IRQ_TEMPD1 BIT(3)
  49. #define IRQ_TEMPD2 BIT(4)
  50. #define IRQ_TEMPD3 BIT(5)
  51. /* CTSR bits */
  52. #define CTSR_PONM BIT(8)
  53. #define CTSR_AOUT BIT(7)
  54. #define CTSR_THBGR BIT(5)
  55. #define CTSR_VMEN BIT(4)
  56. #define CTSR_VMST BIT(1)
  57. #define CTSR_THSST BIT(0)
  58. /* THCTR bits */
  59. #define THCTR_PONM BIT(6)
  60. #define THCTR_THSST BIT(0)
  61. #define CTEMP_MASK 0xFFF
  62. #define MCELSIUS(temp) ((temp) * 1000)
  63. #define GEN3_FUSE_MASK 0xFFF
  64. #define TSC_MAX_NUM 3
  65. /* Structure for thermal temperature calculation */
  66. struct equation_coefs {
  67. int a1;
  68. int b1;
  69. int a2;
  70. int b2;
  71. };
  72. struct rcar_gen3_thermal_tsc {
  73. void __iomem *base;
  74. struct thermal_zone_device *zone;
  75. struct equation_coefs coef;
  76. int low;
  77. int high;
  78. };
  79. struct rcar_gen3_thermal_priv {
  80. struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
  81. unsigned int num_tscs;
  82. spinlock_t lock; /* Protect interrupts on and off */
  83. void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
  84. };
  85. static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
  86. u32 reg)
  87. {
  88. return ioread32(tsc->base + reg);
  89. }
  90. static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
  91. u32 reg, u32 data)
  92. {
  93. iowrite32(data, tsc->base + reg);
  94. }
  95. /*
  96. * Linear approximation for temperature
  97. *
  98. * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
  99. *
  100. * The constants a and b are calculated using two triplets of int values PTAT
  101. * and THCODE. PTAT and THCODE can either be read from hardware or use hard
  102. * coded values from driver. The formula to calculate a and b are taken from
  103. * BSP and sparsely documented and understood.
  104. *
  105. * Examining the linear formula and the formula used to calculate constants a
  106. * and b while knowing that the span for PTAT and THCODE values are between
  107. * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
  108. * Integer also needs to be signed so that leaves 7 bits for binary
  109. * fixed point scaling.
  110. */
  111. #define FIXPT_SHIFT 7
  112. #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
  113. #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
  114. #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
  115. #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
  116. #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
  117. /* no idea where these constants come from */
  118. #define TJ_1 116
  119. #define TJ_3 -41
  120. static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
  121. int *ptat, int *thcode)
  122. {
  123. int tj_2;
  124. /* TODO: Find documentation and document constant calculation formula */
  125. /*
  126. * Division is not scaled in BSP and if scaled it might overflow
  127. * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
  128. */
  129. tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
  130. / (ptat[0] - ptat[2])) - FIXPT_INT(41);
  131. coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
  132. tj_2 - FIXPT_INT(TJ_3));
  133. coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
  134. coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
  135. tj_2 - FIXPT_INT(TJ_1));
  136. coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
  137. }
  138. static int rcar_gen3_thermal_round(int temp)
  139. {
  140. int result, round_offs;
  141. round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
  142. -RCAR3_THERMAL_GRAN / 2;
  143. result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
  144. return result * RCAR3_THERMAL_GRAN;
  145. }
  146. static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
  147. {
  148. struct rcar_gen3_thermal_tsc *tsc = devdata;
  149. int mcelsius, val1, val2;
  150. u32 reg;
  151. /* Read register and convert to mili Celsius */
  152. reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
  153. val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
  154. val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
  155. mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
  156. /* Make sure we are inside specifications */
  157. if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
  158. return -EIO;
  159. /* Round value to device granularity setting */
  160. *temp = rcar_gen3_thermal_round(mcelsius);
  161. return 0;
  162. }
  163. static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
  164. int mcelsius)
  165. {
  166. int celsius, val1, val2;
  167. celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
  168. val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
  169. val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
  170. return INT_FIXPT((val1 + val2) / 2);
  171. }
  172. static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
  173. {
  174. struct rcar_gen3_thermal_tsc *tsc = devdata;
  175. low = clamp_val(low, -40000, 120000);
  176. high = clamp_val(high, -40000, 120000);
  177. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
  178. rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
  179. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
  180. rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
  181. tsc->low = low;
  182. tsc->high = high;
  183. return 0;
  184. }
  185. static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
  186. .get_temp = rcar_gen3_thermal_get_temp,
  187. .set_trips = rcar_gen3_thermal_set_trips,
  188. };
  189. static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
  190. {
  191. unsigned int i;
  192. u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
  193. for (i = 0; i < priv->num_tscs; i++)
  194. rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
  195. }
  196. static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
  197. {
  198. struct rcar_gen3_thermal_priv *priv = data;
  199. u32 status;
  200. int i, ret = IRQ_HANDLED;
  201. spin_lock(&priv->lock);
  202. for (i = 0; i < priv->num_tscs; i++) {
  203. status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
  204. rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
  205. if (status)
  206. ret = IRQ_WAKE_THREAD;
  207. }
  208. if (ret == IRQ_WAKE_THREAD)
  209. rcar_thermal_irq_set(priv, false);
  210. spin_unlock(&priv->lock);
  211. return ret;
  212. }
  213. static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
  214. {
  215. struct rcar_gen3_thermal_priv *priv = data;
  216. unsigned long flags;
  217. int i;
  218. for (i = 0; i < priv->num_tscs; i++)
  219. thermal_zone_device_update(priv->tscs[i]->zone,
  220. THERMAL_EVENT_UNSPECIFIED);
  221. spin_lock_irqsave(&priv->lock, flags);
  222. rcar_thermal_irq_set(priv, true);
  223. spin_unlock_irqrestore(&priv->lock, flags);
  224. return IRQ_HANDLED;
  225. }
  226. static const struct soc_device_attribute r8a7795es1[] = {
  227. { .soc_id = "r8a7795", .revision = "ES1.*" },
  228. { /* sentinel */ }
  229. };
  230. static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
  231. {
  232. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
  233. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
  234. usleep_range(1000, 2000);
  235. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
  236. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
  237. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
  238. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
  239. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
  240. CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
  241. usleep_range(100, 200);
  242. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
  243. CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
  244. CTSR_VMST | CTSR_THSST);
  245. usleep_range(1000, 2000);
  246. }
  247. static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
  248. {
  249. u32 reg_val;
  250. reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
  251. reg_val &= ~THCTR_PONM;
  252. rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
  253. usleep_range(1000, 2000);
  254. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
  255. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
  256. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
  257. reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
  258. reg_val |= THCTR_THSST;
  259. rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
  260. usleep_range(1000, 2000);
  261. }
  262. static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
  263. { .compatible = "renesas,r8a7795-thermal", },
  264. { .compatible = "renesas,r8a7796-thermal", },
  265. { .compatible = "renesas,r8a77965-thermal", },
  266. {},
  267. };
  268. MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
  269. static int rcar_gen3_thermal_remove(struct platform_device *pdev)
  270. {
  271. struct device *dev = &pdev->dev;
  272. pm_runtime_put(dev);
  273. pm_runtime_disable(dev);
  274. return 0;
  275. }
  276. static int rcar_gen3_thermal_probe(struct platform_device *pdev)
  277. {
  278. struct rcar_gen3_thermal_priv *priv;
  279. struct device *dev = &pdev->dev;
  280. struct resource *res;
  281. struct thermal_zone_device *zone;
  282. int ret, irq, i;
  283. char *irqname;
  284. /* default values if FUSEs are missing */
  285. /* TODO: Read values from hardware on supported platforms */
  286. int ptat[3] = { 2631, 1509, 435 };
  287. int thcode[TSC_MAX_NUM][3] = {
  288. { 3397, 2800, 2221 },
  289. { 3393, 2795, 2216 },
  290. { 3389, 2805, 2237 },
  291. };
  292. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  293. if (!priv)
  294. return -ENOMEM;
  295. priv->thermal_init = rcar_gen3_thermal_init;
  296. if (soc_device_match(r8a7795es1))
  297. priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
  298. spin_lock_init(&priv->lock);
  299. platform_set_drvdata(pdev, priv);
  300. /*
  301. * Request 2 (of the 3 possible) IRQs, the driver only needs to
  302. * to trigger on the low and high trip points of the current
  303. * temp window at this point.
  304. */
  305. for (i = 0; i < 2; i++) {
  306. irq = platform_get_irq(pdev, i);
  307. if (irq < 0)
  308. return irq;
  309. irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
  310. dev_name(dev), i);
  311. if (!irqname)
  312. return -ENOMEM;
  313. ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
  314. rcar_gen3_thermal_irq_thread,
  315. IRQF_SHARED, irqname, priv);
  316. if (ret)
  317. return ret;
  318. }
  319. pm_runtime_enable(dev);
  320. pm_runtime_get_sync(dev);
  321. for (i = 0; i < TSC_MAX_NUM; i++) {
  322. struct rcar_gen3_thermal_tsc *tsc;
  323. res = platform_get_resource(pdev, IORESOURCE_MEM, i);
  324. if (!res)
  325. break;
  326. tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
  327. if (!tsc) {
  328. ret = -ENOMEM;
  329. goto error_unregister;
  330. }
  331. tsc->base = devm_ioremap_resource(dev, res);
  332. if (IS_ERR(tsc->base)) {
  333. ret = PTR_ERR(tsc->base);
  334. goto error_unregister;
  335. }
  336. priv->tscs[i] = tsc;
  337. priv->thermal_init(tsc);
  338. rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
  339. zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
  340. &rcar_gen3_tz_of_ops);
  341. if (IS_ERR(zone)) {
  342. dev_err(dev, "Can't register thermal zone\n");
  343. ret = PTR_ERR(zone);
  344. goto error_unregister;
  345. }
  346. tsc->zone = zone;
  347. ret = of_thermal_get_ntrips(tsc->zone);
  348. if (ret < 0)
  349. goto error_unregister;
  350. dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
  351. }
  352. priv->num_tscs = i;
  353. if (!priv->num_tscs) {
  354. ret = -ENODEV;
  355. goto error_unregister;
  356. }
  357. rcar_thermal_irq_set(priv, true);
  358. return 0;
  359. error_unregister:
  360. rcar_gen3_thermal_remove(pdev);
  361. return ret;
  362. }
  363. static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
  364. {
  365. struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
  366. rcar_thermal_irq_set(priv, false);
  367. return 0;
  368. }
  369. static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
  370. {
  371. struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
  372. unsigned int i;
  373. for (i = 0; i < priv->num_tscs; i++) {
  374. struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
  375. priv->thermal_init(tsc);
  376. rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
  377. }
  378. rcar_thermal_irq_set(priv, true);
  379. return 0;
  380. }
  381. static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
  382. rcar_gen3_thermal_resume);
  383. static struct platform_driver rcar_gen3_thermal_driver = {
  384. .driver = {
  385. .name = "rcar_gen3_thermal",
  386. .pm = &rcar_gen3_thermal_pm_ops,
  387. .of_match_table = rcar_gen3_thermal_dt_ids,
  388. },
  389. .probe = rcar_gen3_thermal_probe,
  390. .remove = rcar_gen3_thermal_remove,
  391. };
  392. module_platform_driver(rcar_gen3_thermal_driver);
  393. MODULE_LICENSE("GPL v2");
  394. MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
  395. MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");