armada_thermal.c 11 KB

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  1. /*
  2. * Marvell EBU Armada SoCs thermal sensor driver
  3. *
  4. * Copyright (C) 2013 Marvell
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #include <linux/device.h>
  17. #include <linux/err.h>
  18. #include <linux/io.h>
  19. #include <linux/kernel.h>
  20. #include <linux/of.h>
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_device.h>
  25. #include <linux/thermal.h>
  26. #include <linux/iopoll.h>
  27. /* Thermal Manager Control and Status Register */
  28. #define PMU_TDC0_SW_RST_MASK (0x1 << 1)
  29. #define PMU_TM_DISABLE_OFFS 0
  30. #define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS)
  31. #define PMU_TDC0_REF_CAL_CNT_OFFS 11
  32. #define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS)
  33. #define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
  34. #define PMU_TDC0_START_CAL_MASK (0x1 << 25)
  35. #define A375_UNIT_CONTROL_SHIFT 27
  36. #define A375_UNIT_CONTROL_MASK 0x7
  37. #define A375_READOUT_INVERT BIT(15)
  38. #define A375_HW_RESETn BIT(8)
  39. /* Legacy bindings */
  40. #define LEGACY_CONTROL_MEM_LEN 0x4
  41. /* Current bindings with the 2 control registers under the same memory area */
  42. #define LEGACY_CONTROL1_OFFSET 0x0
  43. #define CONTROL0_OFFSET 0x0
  44. #define CONTROL1_OFFSET 0x4
  45. /* Errata fields */
  46. #define CONTROL0_TSEN_TC_TRIM_MASK 0x7
  47. #define CONTROL0_TSEN_TC_TRIM_VAL 0x3
  48. /* TSEN refers to the temperature sensors within the AP */
  49. #define CONTROL0_TSEN_START BIT(0)
  50. #define CONTROL0_TSEN_RESET BIT(1)
  51. #define CONTROL0_TSEN_ENABLE BIT(2)
  52. /* EXT_TSEN refers to the external temperature sensors, out of the AP */
  53. #define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
  54. #define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
  55. #define STATUS_POLL_PERIOD_US 1000
  56. #define STATUS_POLL_TIMEOUT_US 100000
  57. struct armada_thermal_data;
  58. /* Marvell EBU Thermal Sensor Dev Structure */
  59. struct armada_thermal_priv {
  60. void __iomem *status;
  61. void __iomem *control0;
  62. void __iomem *control1;
  63. struct armada_thermal_data *data;
  64. };
  65. struct armada_thermal_data {
  66. /* Initialize the sensor */
  67. void (*init_sensor)(struct platform_device *pdev,
  68. struct armada_thermal_priv *);
  69. /* Test for a valid sensor value (optional) */
  70. bool (*is_valid)(struct armada_thermal_priv *);
  71. /* Formula coeficients: temp = (b - m * reg) / div */
  72. s64 coef_b;
  73. s64 coef_m;
  74. u32 coef_div;
  75. bool inverted;
  76. bool signed_sample;
  77. /* Register shift and mask to access the sensor temperature */
  78. unsigned int temp_shift;
  79. unsigned int temp_mask;
  80. u32 is_valid_bit;
  81. bool needs_control0;
  82. };
  83. static void armadaxp_init_sensor(struct platform_device *pdev,
  84. struct armada_thermal_priv *priv)
  85. {
  86. u32 reg;
  87. reg = readl_relaxed(priv->control1);
  88. reg |= PMU_TDC0_OTF_CAL_MASK;
  89. writel(reg, priv->control1);
  90. /* Reference calibration value */
  91. reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
  92. reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
  93. writel(reg, priv->control1);
  94. /* Reset the sensor */
  95. reg = readl_relaxed(priv->control1);
  96. writel((reg | PMU_TDC0_SW_RST_MASK), priv->control1);
  97. writel(reg, priv->control1);
  98. /* Enable the sensor */
  99. reg = readl_relaxed(priv->status);
  100. reg &= ~PMU_TM_DISABLE_MASK;
  101. writel(reg, priv->status);
  102. }
  103. static void armada370_init_sensor(struct platform_device *pdev,
  104. struct armada_thermal_priv *priv)
  105. {
  106. u32 reg;
  107. reg = readl_relaxed(priv->control1);
  108. reg |= PMU_TDC0_OTF_CAL_MASK;
  109. writel(reg, priv->control1);
  110. /* Reference calibration value */
  111. reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
  112. reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
  113. writel(reg, priv->control1);
  114. reg &= ~PMU_TDC0_START_CAL_MASK;
  115. writel(reg, priv->control1);
  116. msleep(10);
  117. }
  118. static void armada375_init_sensor(struct platform_device *pdev,
  119. struct armada_thermal_priv *priv)
  120. {
  121. u32 reg;
  122. reg = readl(priv->control1);
  123. reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
  124. reg &= ~A375_READOUT_INVERT;
  125. reg &= ~A375_HW_RESETn;
  126. writel(reg, priv->control1);
  127. msleep(20);
  128. reg |= A375_HW_RESETn;
  129. writel(reg, priv->control1);
  130. msleep(50);
  131. }
  132. static void armada_wait_sensor_validity(struct armada_thermal_priv *priv)
  133. {
  134. u32 reg;
  135. readl_relaxed_poll_timeout(priv->status, reg,
  136. reg & priv->data->is_valid_bit,
  137. STATUS_POLL_PERIOD_US,
  138. STATUS_POLL_TIMEOUT_US);
  139. }
  140. static void armada380_init_sensor(struct platform_device *pdev,
  141. struct armada_thermal_priv *priv)
  142. {
  143. u32 reg = readl_relaxed(priv->control1);
  144. /* Disable the HW/SW reset */
  145. reg |= CONTROL1_EXT_TSEN_HW_RESETn;
  146. reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
  147. writel(reg, priv->control1);
  148. /* Set Tsen Tc Trim to correct default value (errata #132698) */
  149. if (priv->control0) {
  150. reg = readl_relaxed(priv->control0);
  151. reg &= ~CONTROL0_TSEN_TC_TRIM_MASK;
  152. reg |= CONTROL0_TSEN_TC_TRIM_VAL;
  153. writel(reg, priv->control0);
  154. }
  155. /* Wait the sensors to be valid or the core will warn the user */
  156. armada_wait_sensor_validity(priv);
  157. }
  158. static void armada_ap806_init_sensor(struct platform_device *pdev,
  159. struct armada_thermal_priv *priv)
  160. {
  161. u32 reg;
  162. reg = readl_relaxed(priv->control0);
  163. reg &= ~CONTROL0_TSEN_RESET;
  164. reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
  165. writel(reg, priv->control0);
  166. /* Wait the sensors to be valid or the core will warn the user */
  167. armada_wait_sensor_validity(priv);
  168. }
  169. static bool armada_is_valid(struct armada_thermal_priv *priv)
  170. {
  171. u32 reg = readl_relaxed(priv->status);
  172. return reg & priv->data->is_valid_bit;
  173. }
  174. static int armada_get_temp(struct thermal_zone_device *thermal,
  175. int *temp)
  176. {
  177. struct armada_thermal_priv *priv = thermal->devdata;
  178. u32 reg, div;
  179. s64 sample, b, m;
  180. /* Valid check */
  181. if (priv->data->is_valid && !priv->data->is_valid(priv)) {
  182. dev_err(&thermal->device,
  183. "Temperature sensor reading not valid\n");
  184. return -EIO;
  185. }
  186. reg = readl_relaxed(priv->status);
  187. reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask;
  188. if (priv->data->signed_sample)
  189. /* The most significant bit is the sign bit */
  190. sample = sign_extend32(reg, fls(priv->data->temp_mask) - 1);
  191. else
  192. sample = reg;
  193. /* Get formula coeficients */
  194. b = priv->data->coef_b;
  195. m = priv->data->coef_m;
  196. div = priv->data->coef_div;
  197. if (priv->data->inverted)
  198. *temp = div_s64((m * sample) - b, div);
  199. else
  200. *temp = div_s64(b - (m * sample), div);
  201. return 0;
  202. }
  203. static struct thermal_zone_device_ops ops = {
  204. .get_temp = armada_get_temp,
  205. };
  206. static const struct armada_thermal_data armadaxp_data = {
  207. .init_sensor = armadaxp_init_sensor,
  208. .temp_shift = 10,
  209. .temp_mask = 0x1ff,
  210. .coef_b = 3153000000ULL,
  211. .coef_m = 10000000ULL,
  212. .coef_div = 13825,
  213. };
  214. static const struct armada_thermal_data armada370_data = {
  215. .is_valid = armada_is_valid,
  216. .init_sensor = armada370_init_sensor,
  217. .is_valid_bit = BIT(9),
  218. .temp_shift = 10,
  219. .temp_mask = 0x1ff,
  220. .coef_b = 3153000000ULL,
  221. .coef_m = 10000000ULL,
  222. .coef_div = 13825,
  223. };
  224. static const struct armada_thermal_data armada375_data = {
  225. .is_valid = armada_is_valid,
  226. .init_sensor = armada375_init_sensor,
  227. .is_valid_bit = BIT(10),
  228. .temp_shift = 0,
  229. .temp_mask = 0x1ff,
  230. .coef_b = 3171900000ULL,
  231. .coef_m = 10000000ULL,
  232. .coef_div = 13616,
  233. .needs_control0 = true,
  234. };
  235. static const struct armada_thermal_data armada380_data = {
  236. .is_valid = armada_is_valid,
  237. .init_sensor = armada380_init_sensor,
  238. .is_valid_bit = BIT(10),
  239. .temp_shift = 0,
  240. .temp_mask = 0x3ff,
  241. .coef_b = 1172499100ULL,
  242. .coef_m = 2000096ULL,
  243. .coef_div = 4201,
  244. .inverted = true,
  245. };
  246. static const struct armada_thermal_data armada_ap806_data = {
  247. .is_valid = armada_is_valid,
  248. .init_sensor = armada_ap806_init_sensor,
  249. .is_valid_bit = BIT(16),
  250. .temp_shift = 0,
  251. .temp_mask = 0x3ff,
  252. .coef_b = -150000LL,
  253. .coef_m = 423ULL,
  254. .coef_div = 1,
  255. .inverted = true,
  256. .signed_sample = true,
  257. .needs_control0 = true,
  258. };
  259. static const struct armada_thermal_data armada_cp110_data = {
  260. .is_valid = armada_is_valid,
  261. .init_sensor = armada380_init_sensor,
  262. .is_valid_bit = BIT(10),
  263. .temp_shift = 0,
  264. .temp_mask = 0x3ff,
  265. .coef_b = 1172499100ULL,
  266. .coef_m = 2000096ULL,
  267. .coef_div = 4201,
  268. .inverted = true,
  269. .needs_control0 = true,
  270. };
  271. static const struct of_device_id armada_thermal_id_table[] = {
  272. {
  273. .compatible = "marvell,armadaxp-thermal",
  274. .data = &armadaxp_data,
  275. },
  276. {
  277. .compatible = "marvell,armada370-thermal",
  278. .data = &armada370_data,
  279. },
  280. {
  281. .compatible = "marvell,armada375-thermal",
  282. .data = &armada375_data,
  283. },
  284. {
  285. .compatible = "marvell,armada380-thermal",
  286. .data = &armada380_data,
  287. },
  288. {
  289. .compatible = "marvell,armada-ap806-thermal",
  290. .data = &armada_ap806_data,
  291. },
  292. {
  293. .compatible = "marvell,armada-cp110-thermal",
  294. .data = &armada_cp110_data,
  295. },
  296. {
  297. /* sentinel */
  298. },
  299. };
  300. MODULE_DEVICE_TABLE(of, armada_thermal_id_table);
  301. static int armada_thermal_probe(struct platform_device *pdev)
  302. {
  303. void __iomem *control = NULL;
  304. struct thermal_zone_device *thermal;
  305. const struct of_device_id *match;
  306. struct armada_thermal_priv *priv;
  307. struct resource *res;
  308. match = of_match_device(armada_thermal_id_table, &pdev->dev);
  309. if (!match)
  310. return -ENODEV;
  311. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  312. if (!priv)
  313. return -ENOMEM;
  314. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  315. priv->status = devm_ioremap_resource(&pdev->dev, res);
  316. if (IS_ERR(priv->status))
  317. return PTR_ERR(priv->status);
  318. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  319. control = devm_ioremap_resource(&pdev->dev, res);
  320. if (IS_ERR(control))
  321. return PTR_ERR(control);
  322. priv->data = (struct armada_thermal_data *)match->data;
  323. /*
  324. * Legacy DT bindings only described "control1" register (also referred
  325. * as "control MSB" on old documentation). New bindings cover
  326. * "control0/control LSB" and "control1/control MSB" registers within
  327. * the same resource, which is then of size 8 instead of 4.
  328. */
  329. if (resource_size(res) == LEGACY_CONTROL_MEM_LEN) {
  330. /* ->control0 unavailable in this configuration */
  331. if (priv->data->needs_control0) {
  332. dev_err(&pdev->dev, "No access to control0 register\n");
  333. return -EINVAL;
  334. }
  335. priv->control1 = control + LEGACY_CONTROL1_OFFSET;
  336. } else {
  337. priv->control0 = control + CONTROL0_OFFSET;
  338. priv->control1 = control + CONTROL1_OFFSET;
  339. }
  340. priv->data->init_sensor(pdev, priv);
  341. thermal = thermal_zone_device_register(dev_name(&pdev->dev), 0, 0, priv,
  342. &ops, NULL, 0, 0);
  343. if (IS_ERR(thermal)) {
  344. dev_err(&pdev->dev,
  345. "Failed to register thermal zone device\n");
  346. return PTR_ERR(thermal);
  347. }
  348. platform_set_drvdata(pdev, thermal);
  349. return 0;
  350. }
  351. static int armada_thermal_exit(struct platform_device *pdev)
  352. {
  353. struct thermal_zone_device *armada_thermal =
  354. platform_get_drvdata(pdev);
  355. thermal_zone_device_unregister(armada_thermal);
  356. return 0;
  357. }
  358. static struct platform_driver armada_thermal_driver = {
  359. .probe = armada_thermal_probe,
  360. .remove = armada_thermal_exit,
  361. .driver = {
  362. .name = "armada_thermal",
  363. .of_match_table = armada_thermal_id_table,
  364. },
  365. };
  366. module_platform_driver(armada_thermal_driver);
  367. MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
  368. MODULE_DESCRIPTION("Marvell EBU Armada SoCs thermal driver");
  369. MODULE_LICENSE("GPL v2");