bus.c 23 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2. // Copyright(c) 2015-17 Intel Corporation.
  3. #include <linux/acpi.h>
  4. #include <linux/mod_devicetable.h>
  5. #include <linux/pm_runtime.h>
  6. #include <linux/soundwire/sdw_registers.h>
  7. #include <linux/soundwire/sdw.h>
  8. #include "bus.h"
  9. /**
  10. * sdw_add_bus_master() - add a bus Master instance
  11. * @bus: bus instance
  12. *
  13. * Initializes the bus instance, read properties and create child
  14. * devices.
  15. */
  16. int sdw_add_bus_master(struct sdw_bus *bus)
  17. {
  18. struct sdw_master_prop *prop = NULL;
  19. int ret;
  20. if (!bus->dev) {
  21. pr_err("SoundWire bus has no device");
  22. return -ENODEV;
  23. }
  24. if (!bus->ops) {
  25. dev_err(bus->dev, "SoundWire Bus ops are not set");
  26. return -EINVAL;
  27. }
  28. mutex_init(&bus->msg_lock);
  29. mutex_init(&bus->bus_lock);
  30. INIT_LIST_HEAD(&bus->slaves);
  31. INIT_LIST_HEAD(&bus->m_rt_list);
  32. if (bus->ops->read_prop) {
  33. ret = bus->ops->read_prop(bus);
  34. if (ret < 0) {
  35. dev_err(bus->dev, "Bus read properties failed:%d", ret);
  36. return ret;
  37. }
  38. }
  39. /*
  40. * Device numbers in SoundWire are 0 thru 15. Enumeration device
  41. * number (0), Broadcast device number (15), Group numbers (12 and
  42. * 13) and Master device number (14) are not used for assignment so
  43. * mask these and other higher bits.
  44. */
  45. /* Set higher order bits */
  46. *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
  47. /* Set enumuration device number and broadcast device number */
  48. set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
  49. set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
  50. /* Set group device numbers and master device number */
  51. set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
  52. set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
  53. set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
  54. /*
  55. * SDW is an enumerable bus, but devices can be powered off. So,
  56. * they won't be able to report as present.
  57. *
  58. * Create Slave devices based on Slaves described in
  59. * the respective firmware (ACPI/DT)
  60. */
  61. if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
  62. ret = sdw_acpi_find_slaves(bus);
  63. else
  64. ret = -ENOTSUPP; /* No ACPI/DT so error out */
  65. if (ret) {
  66. dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
  67. return ret;
  68. }
  69. /*
  70. * Initialize clock values based on Master properties. The max
  71. * frequency is read from max_freq property. Current assumption
  72. * is that the bus will start at highest clock frequency when
  73. * powered on.
  74. *
  75. * Default active bank will be 0 as out of reset the Slaves have
  76. * to start with bank 0 (Table 40 of Spec)
  77. */
  78. prop = &bus->prop;
  79. bus->params.max_dr_freq = prop->max_freq * SDW_DOUBLE_RATE_FACTOR;
  80. bus->params.curr_dr_freq = bus->params.max_dr_freq;
  81. bus->params.curr_bank = SDW_BANK0;
  82. bus->params.next_bank = SDW_BANK1;
  83. return 0;
  84. }
  85. EXPORT_SYMBOL(sdw_add_bus_master);
  86. static int sdw_delete_slave(struct device *dev, void *data)
  87. {
  88. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  89. struct sdw_bus *bus = slave->bus;
  90. mutex_lock(&bus->bus_lock);
  91. if (slave->dev_num) /* clear dev_num if assigned */
  92. clear_bit(slave->dev_num, bus->assigned);
  93. list_del_init(&slave->node);
  94. mutex_unlock(&bus->bus_lock);
  95. device_unregister(dev);
  96. return 0;
  97. }
  98. /**
  99. * sdw_delete_bus_master() - delete the bus master instance
  100. * @bus: bus to be deleted
  101. *
  102. * Remove the instance, delete the child devices.
  103. */
  104. void sdw_delete_bus_master(struct sdw_bus *bus)
  105. {
  106. device_for_each_child(bus->dev, NULL, sdw_delete_slave);
  107. }
  108. EXPORT_SYMBOL(sdw_delete_bus_master);
  109. /*
  110. * SDW IO Calls
  111. */
  112. static inline int find_response_code(enum sdw_command_response resp)
  113. {
  114. switch (resp) {
  115. case SDW_CMD_OK:
  116. return 0;
  117. case SDW_CMD_IGNORED:
  118. return -ENODATA;
  119. case SDW_CMD_TIMEOUT:
  120. return -ETIMEDOUT;
  121. default:
  122. return -EIO;
  123. }
  124. }
  125. static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  126. {
  127. int retry = bus->prop.err_threshold;
  128. enum sdw_command_response resp;
  129. int ret = 0, i;
  130. for (i = 0; i <= retry; i++) {
  131. resp = bus->ops->xfer_msg(bus, msg);
  132. ret = find_response_code(resp);
  133. /* if cmd is ok or ignored return */
  134. if (ret == 0 || ret == -ENODATA)
  135. return ret;
  136. }
  137. return ret;
  138. }
  139. static inline int do_transfer_defer(struct sdw_bus *bus,
  140. struct sdw_msg *msg, struct sdw_defer *defer)
  141. {
  142. int retry = bus->prop.err_threshold;
  143. enum sdw_command_response resp;
  144. int ret = 0, i;
  145. defer->msg = msg;
  146. defer->length = msg->len;
  147. for (i = 0; i <= retry; i++) {
  148. resp = bus->ops->xfer_msg_defer(bus, msg, defer);
  149. ret = find_response_code(resp);
  150. /* if cmd is ok or ignored return */
  151. if (ret == 0 || ret == -ENODATA)
  152. return ret;
  153. }
  154. return ret;
  155. }
  156. static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
  157. {
  158. int retry = bus->prop.err_threshold;
  159. enum sdw_command_response resp;
  160. int ret = 0, i;
  161. for (i = 0; i <= retry; i++) {
  162. resp = bus->ops->reset_page_addr(bus, dev_num);
  163. ret = find_response_code(resp);
  164. /* if cmd is ok or ignored return */
  165. if (ret == 0 || ret == -ENODATA)
  166. return ret;
  167. }
  168. return ret;
  169. }
  170. /**
  171. * sdw_transfer() - Synchronous transfer message to a SDW Slave device
  172. * @bus: SDW bus
  173. * @msg: SDW message to be xfered
  174. */
  175. int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  176. {
  177. int ret;
  178. mutex_lock(&bus->msg_lock);
  179. ret = do_transfer(bus, msg);
  180. if (ret != 0 && ret != -ENODATA)
  181. dev_err(bus->dev, "trf on Slave %d failed:%d\n",
  182. msg->dev_num, ret);
  183. if (msg->page)
  184. sdw_reset_page(bus, msg->dev_num);
  185. mutex_unlock(&bus->msg_lock);
  186. return ret;
  187. }
  188. /**
  189. * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
  190. * @bus: SDW bus
  191. * @msg: SDW message to be xfered
  192. * @defer: Defer block for signal completion
  193. *
  194. * Caller needs to hold the msg_lock lock while calling this
  195. */
  196. int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
  197. struct sdw_defer *defer)
  198. {
  199. int ret;
  200. if (!bus->ops->xfer_msg_defer)
  201. return -ENOTSUPP;
  202. ret = do_transfer_defer(bus, msg, defer);
  203. if (ret != 0 && ret != -ENODATA)
  204. dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
  205. msg->dev_num, ret);
  206. if (msg->page)
  207. sdw_reset_page(bus, msg->dev_num);
  208. return ret;
  209. }
  210. int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
  211. u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
  212. {
  213. memset(msg, 0, sizeof(*msg));
  214. msg->addr = addr; /* addr is 16 bit and truncated here */
  215. msg->len = count;
  216. msg->dev_num = dev_num;
  217. msg->flags = flags;
  218. msg->buf = buf;
  219. msg->ssp_sync = false;
  220. msg->page = false;
  221. if (addr < SDW_REG_NO_PAGE) { /* no paging area */
  222. return 0;
  223. } else if (addr >= SDW_REG_MAX) { /* illegal addr */
  224. pr_err("SDW: Invalid address %x passed\n", addr);
  225. return -EINVAL;
  226. }
  227. if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
  228. if (slave && !slave->prop.paging_support)
  229. return 0;
  230. /* no need for else as that will fall thru to paging */
  231. }
  232. /* paging mandatory */
  233. if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
  234. pr_err("SDW: Invalid device for paging :%d\n", dev_num);
  235. return -EINVAL;
  236. }
  237. if (!slave) {
  238. pr_err("SDW: No slave for paging addr\n");
  239. return -EINVAL;
  240. } else if (!slave->prop.paging_support) {
  241. dev_err(&slave->dev,
  242. "address %x needs paging but no support", addr);
  243. return -EINVAL;
  244. }
  245. msg->addr_page1 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE1_MASK));
  246. msg->addr_page2 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE2_MASK));
  247. msg->addr |= BIT(15);
  248. msg->page = true;
  249. return 0;
  250. }
  251. /**
  252. * sdw_nread() - Read "n" contiguous SDW Slave registers
  253. * @slave: SDW Slave
  254. * @addr: Register address
  255. * @count: length
  256. * @val: Buffer for values to be read
  257. */
  258. int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  259. {
  260. struct sdw_msg msg;
  261. int ret;
  262. ret = sdw_fill_msg(&msg, slave, addr, count,
  263. slave->dev_num, SDW_MSG_FLAG_READ, val);
  264. if (ret < 0)
  265. return ret;
  266. ret = pm_runtime_get_sync(slave->bus->dev);
  267. if (ret < 0)
  268. return ret;
  269. ret = sdw_transfer(slave->bus, &msg);
  270. pm_runtime_put(slave->bus->dev);
  271. return ret;
  272. }
  273. EXPORT_SYMBOL(sdw_nread);
  274. /**
  275. * sdw_nwrite() - Write "n" contiguous SDW Slave registers
  276. * @slave: SDW Slave
  277. * @addr: Register address
  278. * @count: length
  279. * @val: Buffer for values to be read
  280. */
  281. int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  282. {
  283. struct sdw_msg msg;
  284. int ret;
  285. ret = sdw_fill_msg(&msg, slave, addr, count,
  286. slave->dev_num, SDW_MSG_FLAG_WRITE, val);
  287. if (ret < 0)
  288. return ret;
  289. ret = pm_runtime_get_sync(slave->bus->dev);
  290. if (ret < 0)
  291. return ret;
  292. ret = sdw_transfer(slave->bus, &msg);
  293. pm_runtime_put(slave->bus->dev);
  294. return ret;
  295. }
  296. EXPORT_SYMBOL(sdw_nwrite);
  297. /**
  298. * sdw_read() - Read a SDW Slave register
  299. * @slave: SDW Slave
  300. * @addr: Register address
  301. */
  302. int sdw_read(struct sdw_slave *slave, u32 addr)
  303. {
  304. u8 buf;
  305. int ret;
  306. ret = sdw_nread(slave, addr, 1, &buf);
  307. if (ret < 0)
  308. return ret;
  309. else
  310. return buf;
  311. }
  312. EXPORT_SYMBOL(sdw_read);
  313. /**
  314. * sdw_write() - Write a SDW Slave register
  315. * @slave: SDW Slave
  316. * @addr: Register address
  317. * @value: Register value
  318. */
  319. int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
  320. {
  321. return sdw_nwrite(slave, addr, 1, &value);
  322. }
  323. EXPORT_SYMBOL(sdw_write);
  324. /*
  325. * SDW alert handling
  326. */
  327. /* called with bus_lock held */
  328. static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
  329. {
  330. struct sdw_slave *slave = NULL;
  331. list_for_each_entry(slave, &bus->slaves, node) {
  332. if (slave->dev_num == i)
  333. return slave;
  334. }
  335. return NULL;
  336. }
  337. static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
  338. {
  339. if ((slave->id.unique_id != id.unique_id) ||
  340. (slave->id.mfg_id != id.mfg_id) ||
  341. (slave->id.part_id != id.part_id) ||
  342. (slave->id.class_id != id.class_id))
  343. return -ENODEV;
  344. return 0;
  345. }
  346. /* called with bus_lock held */
  347. static int sdw_get_device_num(struct sdw_slave *slave)
  348. {
  349. int bit;
  350. bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
  351. if (bit == SDW_MAX_DEVICES) {
  352. bit = -ENODEV;
  353. goto err;
  354. }
  355. /*
  356. * Do not update dev_num in Slave data structure here,
  357. * Update once program dev_num is successful
  358. */
  359. set_bit(bit, slave->bus->assigned);
  360. err:
  361. return bit;
  362. }
  363. static int sdw_assign_device_num(struct sdw_slave *slave)
  364. {
  365. int ret, dev_num;
  366. /* check first if device number is assigned, if so reuse that */
  367. if (!slave->dev_num) {
  368. mutex_lock(&slave->bus->bus_lock);
  369. dev_num = sdw_get_device_num(slave);
  370. mutex_unlock(&slave->bus->bus_lock);
  371. if (dev_num < 0) {
  372. dev_err(slave->bus->dev, "Get dev_num failed: %d",
  373. dev_num);
  374. return dev_num;
  375. }
  376. } else {
  377. dev_info(slave->bus->dev,
  378. "Slave already registered dev_num:%d",
  379. slave->dev_num);
  380. /* Clear the slave->dev_num to transfer message on device 0 */
  381. dev_num = slave->dev_num;
  382. slave->dev_num = 0;
  383. }
  384. ret = sdw_write(slave, SDW_SCP_DEVNUMBER, dev_num);
  385. if (ret < 0) {
  386. dev_err(&slave->dev, "Program device_num failed: %d", ret);
  387. return ret;
  388. }
  389. /* After xfer of msg, restore dev_num */
  390. slave->dev_num = dev_num;
  391. return 0;
  392. }
  393. void sdw_extract_slave_id(struct sdw_bus *bus,
  394. u64 addr, struct sdw_slave_id *id)
  395. {
  396. dev_dbg(bus->dev, "SDW Slave Addr: %llx", addr);
  397. /*
  398. * Spec definition
  399. * Register Bit Contents
  400. * DevId_0 [7:4] 47:44 sdw_version
  401. * DevId_0 [3:0] 43:40 unique_id
  402. * DevId_1 39:32 mfg_id [15:8]
  403. * DevId_2 31:24 mfg_id [7:0]
  404. * DevId_3 23:16 part_id [15:8]
  405. * DevId_4 15:08 part_id [7:0]
  406. * DevId_5 07:00 class_id
  407. */
  408. id->sdw_version = (addr >> 44) & GENMASK(3, 0);
  409. id->unique_id = (addr >> 40) & GENMASK(3, 0);
  410. id->mfg_id = (addr >> 24) & GENMASK(15, 0);
  411. id->part_id = (addr >> 8) & GENMASK(15, 0);
  412. id->class_id = addr & GENMASK(7, 0);
  413. dev_dbg(bus->dev,
  414. "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x",
  415. id->class_id, id->part_id, id->mfg_id,
  416. id->unique_id, id->sdw_version);
  417. }
  418. static int sdw_program_device_num(struct sdw_bus *bus)
  419. {
  420. u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
  421. struct sdw_slave *slave, *_s;
  422. struct sdw_slave_id id;
  423. struct sdw_msg msg;
  424. bool found = false;
  425. int count = 0, ret;
  426. u64 addr;
  427. /* No Slave, so use raw xfer api */
  428. ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
  429. SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
  430. if (ret < 0)
  431. return ret;
  432. do {
  433. ret = sdw_transfer(bus, &msg);
  434. if (ret == -ENODATA) { /* end of device id reads */
  435. ret = 0;
  436. break;
  437. }
  438. if (ret < 0) {
  439. dev_err(bus->dev, "DEVID read fail:%d\n", ret);
  440. break;
  441. }
  442. /*
  443. * Construct the addr and extract. Cast the higher shift
  444. * bits to avoid truncation due to size limit.
  445. */
  446. addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
  447. ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
  448. ((u64)buf[0] << 40);
  449. sdw_extract_slave_id(bus, addr, &id);
  450. /* Now compare with entries */
  451. list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
  452. if (sdw_compare_devid(slave, id) == 0) {
  453. found = true;
  454. /*
  455. * Assign a new dev_num to this Slave and
  456. * not mark it present. It will be marked
  457. * present after it reports ATTACHED on new
  458. * dev_num
  459. */
  460. ret = sdw_assign_device_num(slave);
  461. if (ret) {
  462. dev_err(slave->bus->dev,
  463. "Assign dev_num failed:%d",
  464. ret);
  465. return ret;
  466. }
  467. break;
  468. }
  469. }
  470. if (found == false) {
  471. /* TODO: Park this device in Group 13 */
  472. dev_err(bus->dev, "Slave Entry not found");
  473. }
  474. count++;
  475. /*
  476. * Check till error out or retry (count) exhausts.
  477. * Device can drop off and rejoin during enumeration
  478. * so count till twice the bound.
  479. */
  480. } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
  481. return ret;
  482. }
  483. static void sdw_modify_slave_status(struct sdw_slave *slave,
  484. enum sdw_slave_status status)
  485. {
  486. mutex_lock(&slave->bus->bus_lock);
  487. slave->status = status;
  488. mutex_unlock(&slave->bus->bus_lock);
  489. }
  490. int sdw_configure_dpn_intr(struct sdw_slave *slave,
  491. int port, bool enable, int mask)
  492. {
  493. u32 addr;
  494. int ret;
  495. u8 val = 0;
  496. addr = SDW_DPN_INTMASK(port);
  497. /* Set/Clear port ready interrupt mask */
  498. if (enable) {
  499. val |= mask;
  500. val |= SDW_DPN_INT_PORT_READY;
  501. } else {
  502. val &= ~(mask);
  503. val &= ~SDW_DPN_INT_PORT_READY;
  504. }
  505. ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
  506. if (ret < 0)
  507. dev_err(slave->bus->dev,
  508. "SDW_DPN_INTMASK write failed:%d", val);
  509. return ret;
  510. }
  511. static int sdw_initialize_slave(struct sdw_slave *slave)
  512. {
  513. struct sdw_slave_prop *prop = &slave->prop;
  514. int ret;
  515. u8 val;
  516. /*
  517. * Set bus clash, parity and SCP implementation
  518. * defined interrupt mask
  519. * TODO: Read implementation defined interrupt mask
  520. * from Slave property
  521. */
  522. val = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
  523. SDW_SCP_INT1_PARITY;
  524. /* Enable SCP interrupts */
  525. ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
  526. if (ret < 0) {
  527. dev_err(slave->bus->dev,
  528. "SDW_SCP_INTMASK1 write failed:%d", ret);
  529. return ret;
  530. }
  531. /* No need to continue if DP0 is not present */
  532. if (!slave->prop.dp0_prop)
  533. return 0;
  534. /* Enable DP0 interrupts */
  535. val = prop->dp0_prop->device_interrupts;
  536. val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
  537. ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
  538. if (ret < 0) {
  539. dev_err(slave->bus->dev,
  540. "SDW_DP0_INTMASK read failed:%d", ret);
  541. return val;
  542. }
  543. return 0;
  544. }
  545. static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
  546. {
  547. u8 clear = 0, impl_int_mask;
  548. int status, status2, ret, count = 0;
  549. status = sdw_read(slave, SDW_DP0_INT);
  550. if (status < 0) {
  551. dev_err(slave->bus->dev,
  552. "SDW_DP0_INT read failed:%d", status);
  553. return status;
  554. }
  555. do {
  556. if (status & SDW_DP0_INT_TEST_FAIL) {
  557. dev_err(&slave->dev, "Test fail for port 0");
  558. clear |= SDW_DP0_INT_TEST_FAIL;
  559. }
  560. /*
  561. * Assumption: PORT_READY interrupt will be received only for
  562. * ports implementing Channel Prepare state machine (CP_SM)
  563. */
  564. if (status & SDW_DP0_INT_PORT_READY) {
  565. complete(&slave->port_ready[0]);
  566. clear |= SDW_DP0_INT_PORT_READY;
  567. }
  568. if (status & SDW_DP0_INT_BRA_FAILURE) {
  569. dev_err(&slave->dev, "BRA failed");
  570. clear |= SDW_DP0_INT_BRA_FAILURE;
  571. }
  572. impl_int_mask = SDW_DP0_INT_IMPDEF1 |
  573. SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
  574. if (status & impl_int_mask) {
  575. clear |= impl_int_mask;
  576. *slave_status = clear;
  577. }
  578. /* clear the interrupt */
  579. ret = sdw_write(slave, SDW_DP0_INT, clear);
  580. if (ret < 0) {
  581. dev_err(slave->bus->dev,
  582. "SDW_DP0_INT write failed:%d", ret);
  583. return ret;
  584. }
  585. /* Read DP0 interrupt again */
  586. status2 = sdw_read(slave, SDW_DP0_INT);
  587. if (status2 < 0) {
  588. dev_err(slave->bus->dev,
  589. "SDW_DP0_INT read failed:%d", status2);
  590. return status2;
  591. }
  592. status &= status2;
  593. count++;
  594. /* we can get alerts while processing so keep retrying */
  595. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  596. if (count == SDW_READ_INTR_CLEAR_RETRY)
  597. dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read");
  598. return ret;
  599. }
  600. static int sdw_handle_port_interrupt(struct sdw_slave *slave,
  601. int port, u8 *slave_status)
  602. {
  603. u8 clear = 0, impl_int_mask;
  604. int status, status2, ret, count = 0;
  605. u32 addr;
  606. if (port == 0)
  607. return sdw_handle_dp0_interrupt(slave, slave_status);
  608. addr = SDW_DPN_INT(port);
  609. status = sdw_read(slave, addr);
  610. if (status < 0) {
  611. dev_err(slave->bus->dev,
  612. "SDW_DPN_INT read failed:%d", status);
  613. return status;
  614. }
  615. do {
  616. if (status & SDW_DPN_INT_TEST_FAIL) {
  617. dev_err(&slave->dev, "Test fail for port:%d", port);
  618. clear |= SDW_DPN_INT_TEST_FAIL;
  619. }
  620. /*
  621. * Assumption: PORT_READY interrupt will be received only
  622. * for ports implementing CP_SM.
  623. */
  624. if (status & SDW_DPN_INT_PORT_READY) {
  625. complete(&slave->port_ready[port]);
  626. clear |= SDW_DPN_INT_PORT_READY;
  627. }
  628. impl_int_mask = SDW_DPN_INT_IMPDEF1 |
  629. SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
  630. if (status & impl_int_mask) {
  631. clear |= impl_int_mask;
  632. *slave_status = clear;
  633. }
  634. /* clear the interrupt */
  635. ret = sdw_write(slave, addr, clear);
  636. if (ret < 0) {
  637. dev_err(slave->bus->dev,
  638. "SDW_DPN_INT write failed:%d", ret);
  639. return ret;
  640. }
  641. /* Read DPN interrupt again */
  642. status2 = sdw_read(slave, addr);
  643. if (status2 < 0) {
  644. dev_err(slave->bus->dev,
  645. "SDW_DPN_INT read failed:%d", status2);
  646. return status2;
  647. }
  648. status &= status2;
  649. count++;
  650. /* we can get alerts while processing so keep retrying */
  651. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  652. if (count == SDW_READ_INTR_CLEAR_RETRY)
  653. dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
  654. return ret;
  655. }
  656. static int sdw_handle_slave_alerts(struct sdw_slave *slave)
  657. {
  658. struct sdw_slave_intr_status slave_intr;
  659. u8 clear = 0, bit, port_status[15];
  660. int port_num, stat, ret, count = 0;
  661. unsigned long port;
  662. bool slave_notify = false;
  663. u8 buf, buf2[2], _buf, _buf2[2];
  664. sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
  665. /* Read Instat 1, Instat 2 and Instat 3 registers */
  666. buf = ret = sdw_read(slave, SDW_SCP_INT1);
  667. if (ret < 0) {
  668. dev_err(slave->bus->dev,
  669. "SDW_SCP_INT1 read failed:%d", ret);
  670. return ret;
  671. }
  672. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
  673. if (ret < 0) {
  674. dev_err(slave->bus->dev,
  675. "SDW_SCP_INT2/3 read failed:%d", ret);
  676. return ret;
  677. }
  678. do {
  679. /*
  680. * Check parity, bus clash and Slave (impl defined)
  681. * interrupt
  682. */
  683. if (buf & SDW_SCP_INT1_PARITY) {
  684. dev_err(&slave->dev, "Parity error detected");
  685. clear |= SDW_SCP_INT1_PARITY;
  686. }
  687. if (buf & SDW_SCP_INT1_BUS_CLASH) {
  688. dev_err(&slave->dev, "Bus clash error detected");
  689. clear |= SDW_SCP_INT1_BUS_CLASH;
  690. }
  691. /*
  692. * When bus clash or parity errors are detected, such errors
  693. * are unlikely to be recoverable errors.
  694. * TODO: In such scenario, reset bus. Make this configurable
  695. * via sysfs property with bus reset being the default.
  696. */
  697. if (buf & SDW_SCP_INT1_IMPL_DEF) {
  698. dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
  699. clear |= SDW_SCP_INT1_IMPL_DEF;
  700. slave_notify = true;
  701. }
  702. /* Check port 0 - 3 interrupts */
  703. port = buf & SDW_SCP_INT1_PORT0_3;
  704. /* To get port number corresponding to bits, shift it */
  705. port = port >> SDW_REG_SHIFT(SDW_SCP_INT1_PORT0_3);
  706. for_each_set_bit(bit, &port, 8) {
  707. sdw_handle_port_interrupt(slave, bit,
  708. &port_status[bit]);
  709. }
  710. /* Check if cascade 2 interrupt is present */
  711. if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
  712. port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
  713. for_each_set_bit(bit, &port, 8) {
  714. /* scp2 ports start from 4 */
  715. port_num = bit + 3;
  716. sdw_handle_port_interrupt(slave,
  717. port_num,
  718. &port_status[port_num]);
  719. }
  720. }
  721. /* now check last cascade */
  722. if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
  723. port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
  724. for_each_set_bit(bit, &port, 8) {
  725. /* scp3 ports start from 11 */
  726. port_num = bit + 10;
  727. sdw_handle_port_interrupt(slave,
  728. port_num,
  729. &port_status[port_num]);
  730. }
  731. }
  732. /* Update the Slave driver */
  733. if (slave_notify && (slave->ops) &&
  734. (slave->ops->interrupt_callback)) {
  735. slave_intr.control_port = clear;
  736. memcpy(slave_intr.port, &port_status,
  737. sizeof(slave_intr.port));
  738. slave->ops->interrupt_callback(slave, &slave_intr);
  739. }
  740. /* Ack interrupt */
  741. ret = sdw_write(slave, SDW_SCP_INT1, clear);
  742. if (ret < 0) {
  743. dev_err(slave->bus->dev,
  744. "SDW_SCP_INT1 write failed:%d", ret);
  745. return ret;
  746. }
  747. /*
  748. * Read status again to ensure no new interrupts arrived
  749. * while servicing interrupts.
  750. */
  751. _buf = ret = sdw_read(slave, SDW_SCP_INT1);
  752. if (ret < 0) {
  753. dev_err(slave->bus->dev,
  754. "SDW_SCP_INT1 read failed:%d", ret);
  755. return ret;
  756. }
  757. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
  758. if (ret < 0) {
  759. dev_err(slave->bus->dev,
  760. "SDW_SCP_INT2/3 read failed:%d", ret);
  761. return ret;
  762. }
  763. /* Make sure no interrupts are pending */
  764. buf &= _buf;
  765. buf2[0] &= _buf2[0];
  766. buf2[1] &= _buf2[1];
  767. stat = buf || buf2[0] || buf2[1];
  768. /*
  769. * Exit loop if Slave is continuously in ALERT state even
  770. * after servicing the interrupt multiple times.
  771. */
  772. count++;
  773. /* we can get alerts while processing so keep retrying */
  774. } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  775. if (count == SDW_READ_INTR_CLEAR_RETRY)
  776. dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read");
  777. return ret;
  778. }
  779. static int sdw_update_slave_status(struct sdw_slave *slave,
  780. enum sdw_slave_status status)
  781. {
  782. if ((slave->ops) && (slave->ops->update_status))
  783. return slave->ops->update_status(slave, status);
  784. return 0;
  785. }
  786. /**
  787. * sdw_handle_slave_status() - Handle Slave status
  788. * @bus: SDW bus instance
  789. * @status: Status for all Slave(s)
  790. */
  791. int sdw_handle_slave_status(struct sdw_bus *bus,
  792. enum sdw_slave_status status[])
  793. {
  794. enum sdw_slave_status prev_status;
  795. struct sdw_slave *slave;
  796. int i, ret = 0;
  797. if (status[0] == SDW_SLAVE_ATTACHED) {
  798. ret = sdw_program_device_num(bus);
  799. if (ret)
  800. dev_err(bus->dev, "Slave attach failed: %d", ret);
  801. }
  802. /* Continue to check other slave statuses */
  803. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  804. mutex_lock(&bus->bus_lock);
  805. if (test_bit(i, bus->assigned) == false) {
  806. mutex_unlock(&bus->bus_lock);
  807. continue;
  808. }
  809. mutex_unlock(&bus->bus_lock);
  810. slave = sdw_get_slave(bus, i);
  811. if (!slave)
  812. continue;
  813. switch (status[i]) {
  814. case SDW_SLAVE_UNATTACHED:
  815. if (slave->status == SDW_SLAVE_UNATTACHED)
  816. break;
  817. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  818. break;
  819. case SDW_SLAVE_ALERT:
  820. ret = sdw_handle_slave_alerts(slave);
  821. if (ret)
  822. dev_err(bus->dev,
  823. "Slave %d alert handling failed: %d",
  824. i, ret);
  825. break;
  826. case SDW_SLAVE_ATTACHED:
  827. if (slave->status == SDW_SLAVE_ATTACHED)
  828. break;
  829. prev_status = slave->status;
  830. sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
  831. if (prev_status == SDW_SLAVE_ALERT)
  832. break;
  833. ret = sdw_initialize_slave(slave);
  834. if (ret)
  835. dev_err(bus->dev,
  836. "Slave %d initialization failed: %d",
  837. i, ret);
  838. break;
  839. default:
  840. dev_err(bus->dev, "Invalid slave %d status:%d",
  841. i, status[i]);
  842. break;
  843. }
  844. ret = sdw_update_slave_status(slave, status[i]);
  845. if (ret)
  846. dev_err(slave->bus->dev,
  847. "Update Slave status failed:%d", ret);
  848. }
  849. return ret;
  850. }
  851. EXPORT_SYMBOL(sdw_handle_slave_status);