rtc-cmos.c 36 KB

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  1. /*
  2. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  3. *
  4. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  5. * Copyright (C) 2006 David Brownell (convert to new framework)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  14. * That defined the register interface now provided by all PCs, some
  15. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  16. * integrate an MC146818 clone in their southbridge, and boards use
  17. * that instead of discrete clones like the DS12887 or M48T86. There
  18. * are also clones that connect using the LPC bus.
  19. *
  20. * That register API is also used directly by various other drivers
  21. * (notably for integrated NVRAM), infrastructure (x86 has code to
  22. * bypass the RTC framework, directly reading the RTC during boot
  23. * and updating minutes/seconds for systems using NTP synch) and
  24. * utilities (like userspace 'hwclock', if no /dev node exists).
  25. *
  26. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  27. * interrupts disabled, holding the global rtc_lock, to exclude those
  28. * other drivers and utilities on correctly configured systems.
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/kernel.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/platform_device.h>
  37. #include <linux/log2.h>
  38. #include <linux/pm.h>
  39. #include <linux/of.h>
  40. #include <linux/of_platform.h>
  41. #ifdef CONFIG_X86
  42. #include <asm/i8259.h>
  43. #include <asm/processor.h>
  44. #include <linux/dmi.h>
  45. #endif
  46. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  47. #include <linux/mc146818rtc.h>
  48. /*
  49. * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
  50. *
  51. * If cleared, ACPI SCI is only used to wake up the system from suspend
  52. *
  53. * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
  54. */
  55. static bool use_acpi_alarm;
  56. module_param(use_acpi_alarm, bool, 0444);
  57. struct cmos_rtc {
  58. struct rtc_device *rtc;
  59. struct device *dev;
  60. int irq;
  61. struct resource *iomem;
  62. time64_t alarm_expires;
  63. void (*wake_on)(struct device *);
  64. void (*wake_off)(struct device *);
  65. u8 enabled_wake;
  66. u8 suspend_ctrl;
  67. /* newer hardware extends the original register set */
  68. u8 day_alrm;
  69. u8 mon_alrm;
  70. u8 century;
  71. struct rtc_wkalrm saved_wkalrm;
  72. };
  73. /* both platform and pnp busses use negative numbers for invalid irqs */
  74. #define is_valid_irq(n) ((n) > 0)
  75. static const char driver_name[] = "rtc_cmos";
  76. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  77. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  78. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  79. */
  80. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  81. static inline int is_intr(u8 rtc_intr)
  82. {
  83. if (!(rtc_intr & RTC_IRQF))
  84. return 0;
  85. return rtc_intr & RTC_IRQMASK;
  86. }
  87. /*----------------------------------------------------------------*/
  88. /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  89. * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  90. * used in a broken "legacy replacement" mode. The breakage includes
  91. * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  92. * other (better) use.
  93. *
  94. * When that broken mode is in use, platform glue provides a partial
  95. * emulation of hardware RTC IRQ facilities using HPET #1. We don't
  96. * want to use HPET for anything except those IRQs though...
  97. */
  98. #ifdef CONFIG_HPET_EMULATE_RTC
  99. #include <asm/hpet.h>
  100. #else
  101. static inline int is_hpet_enabled(void)
  102. {
  103. return 0;
  104. }
  105. static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
  106. {
  107. return 0;
  108. }
  109. static inline int hpet_set_rtc_irq_bit(unsigned long mask)
  110. {
  111. return 0;
  112. }
  113. static inline int
  114. hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  115. {
  116. return 0;
  117. }
  118. static inline int hpet_set_periodic_freq(unsigned long freq)
  119. {
  120. return 0;
  121. }
  122. static inline int hpet_rtc_dropped_irq(void)
  123. {
  124. return 0;
  125. }
  126. static inline int hpet_rtc_timer_init(void)
  127. {
  128. return 0;
  129. }
  130. extern irq_handler_t hpet_rtc_interrupt;
  131. static inline int hpet_register_irq_handler(irq_handler_t handler)
  132. {
  133. return 0;
  134. }
  135. static inline int hpet_unregister_irq_handler(irq_handler_t handler)
  136. {
  137. return 0;
  138. }
  139. #endif
  140. /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
  141. static int use_hpet_alarm(void)
  142. {
  143. return is_hpet_enabled() && !use_acpi_alarm;
  144. }
  145. /*----------------------------------------------------------------*/
  146. #ifdef RTC_PORT
  147. /* Most newer x86 systems have two register banks, the first used
  148. * for RTC and NVRAM and the second only for NVRAM. Caller must
  149. * own rtc_lock ... and we won't worry about access during NMI.
  150. */
  151. #define can_bank2 true
  152. static inline unsigned char cmos_read_bank2(unsigned char addr)
  153. {
  154. outb(addr, RTC_PORT(2));
  155. return inb(RTC_PORT(3));
  156. }
  157. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  158. {
  159. outb(addr, RTC_PORT(2));
  160. outb(val, RTC_PORT(3));
  161. }
  162. #else
  163. #define can_bank2 false
  164. static inline unsigned char cmos_read_bank2(unsigned char addr)
  165. {
  166. return 0;
  167. }
  168. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  169. {
  170. }
  171. #endif
  172. /*----------------------------------------------------------------*/
  173. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  174. {
  175. /*
  176. * If pm_trace abused the RTC for storage, set the timespec to 0,
  177. * which tells the caller that this RTC value is unusable.
  178. */
  179. if (!pm_trace_rtc_valid())
  180. return -EIO;
  181. /* REVISIT: if the clock has a "century" register, use
  182. * that instead of the heuristic in mc146818_get_time().
  183. * That'll make Y3K compatility (year > 2070) easy!
  184. */
  185. mc146818_get_time(t);
  186. return 0;
  187. }
  188. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  189. {
  190. /* REVISIT: set the "century" register if available
  191. *
  192. * NOTE: this ignores the issue whereby updating the seconds
  193. * takes effect exactly 500ms after we write the register.
  194. * (Also queueing and other delays before we get this far.)
  195. */
  196. return mc146818_set_time(t);
  197. }
  198. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  199. {
  200. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  201. unsigned char rtc_control;
  202. if (!is_valid_irq(cmos->irq))
  203. return -EIO;
  204. /* Basic alarms only support hour, minute, and seconds fields.
  205. * Some also support day and month, for alarms up to a year in
  206. * the future.
  207. */
  208. spin_lock_irq(&rtc_lock);
  209. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  210. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  211. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  212. if (cmos->day_alrm) {
  213. /* ignore upper bits on readback per ACPI spec */
  214. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  215. if (!t->time.tm_mday)
  216. t->time.tm_mday = -1;
  217. if (cmos->mon_alrm) {
  218. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  219. if (!t->time.tm_mon)
  220. t->time.tm_mon = -1;
  221. }
  222. }
  223. rtc_control = CMOS_READ(RTC_CONTROL);
  224. spin_unlock_irq(&rtc_lock);
  225. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  226. if (((unsigned)t->time.tm_sec) < 0x60)
  227. t->time.tm_sec = bcd2bin(t->time.tm_sec);
  228. else
  229. t->time.tm_sec = -1;
  230. if (((unsigned)t->time.tm_min) < 0x60)
  231. t->time.tm_min = bcd2bin(t->time.tm_min);
  232. else
  233. t->time.tm_min = -1;
  234. if (((unsigned)t->time.tm_hour) < 0x24)
  235. t->time.tm_hour = bcd2bin(t->time.tm_hour);
  236. else
  237. t->time.tm_hour = -1;
  238. if (cmos->day_alrm) {
  239. if (((unsigned)t->time.tm_mday) <= 0x31)
  240. t->time.tm_mday = bcd2bin(t->time.tm_mday);
  241. else
  242. t->time.tm_mday = -1;
  243. if (cmos->mon_alrm) {
  244. if (((unsigned)t->time.tm_mon) <= 0x12)
  245. t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
  246. else
  247. t->time.tm_mon = -1;
  248. }
  249. }
  250. }
  251. t->enabled = !!(rtc_control & RTC_AIE);
  252. t->pending = 0;
  253. return 0;
  254. }
  255. static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
  256. {
  257. unsigned char rtc_intr;
  258. /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  259. * allegedly some older rtcs need that to handle irqs properly
  260. */
  261. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  262. if (use_hpet_alarm())
  263. return;
  264. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  265. if (is_intr(rtc_intr))
  266. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  267. }
  268. static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
  269. {
  270. unsigned char rtc_control;
  271. /* flush any pending IRQ status, notably for update irqs,
  272. * before we enable new IRQs
  273. */
  274. rtc_control = CMOS_READ(RTC_CONTROL);
  275. cmos_checkintr(cmos, rtc_control);
  276. rtc_control |= mask;
  277. CMOS_WRITE(rtc_control, RTC_CONTROL);
  278. if (use_hpet_alarm())
  279. hpet_set_rtc_irq_bit(mask);
  280. if ((mask & RTC_AIE) && use_acpi_alarm) {
  281. if (cmos->wake_on)
  282. cmos->wake_on(cmos->dev);
  283. }
  284. cmos_checkintr(cmos, rtc_control);
  285. }
  286. static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
  287. {
  288. unsigned char rtc_control;
  289. rtc_control = CMOS_READ(RTC_CONTROL);
  290. rtc_control &= ~mask;
  291. CMOS_WRITE(rtc_control, RTC_CONTROL);
  292. if (use_hpet_alarm())
  293. hpet_mask_rtc_irq_bit(mask);
  294. if ((mask & RTC_AIE) && use_acpi_alarm) {
  295. if (cmos->wake_off)
  296. cmos->wake_off(cmos->dev);
  297. }
  298. cmos_checkintr(cmos, rtc_control);
  299. }
  300. static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
  301. {
  302. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  303. struct rtc_time now;
  304. cmos_read_time(dev, &now);
  305. if (!cmos->day_alrm) {
  306. time64_t t_max_date;
  307. time64_t t_alrm;
  308. t_max_date = rtc_tm_to_time64(&now);
  309. t_max_date += 24 * 60 * 60 - 1;
  310. t_alrm = rtc_tm_to_time64(&t->time);
  311. if (t_alrm > t_max_date) {
  312. dev_err(dev,
  313. "Alarms can be up to one day in the future\n");
  314. return -EINVAL;
  315. }
  316. } else if (!cmos->mon_alrm) {
  317. struct rtc_time max_date = now;
  318. time64_t t_max_date;
  319. time64_t t_alrm;
  320. int max_mday;
  321. if (max_date.tm_mon == 11) {
  322. max_date.tm_mon = 0;
  323. max_date.tm_year += 1;
  324. } else {
  325. max_date.tm_mon += 1;
  326. }
  327. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  328. if (max_date.tm_mday > max_mday)
  329. max_date.tm_mday = max_mday;
  330. t_max_date = rtc_tm_to_time64(&max_date);
  331. t_max_date -= 1;
  332. t_alrm = rtc_tm_to_time64(&t->time);
  333. if (t_alrm > t_max_date) {
  334. dev_err(dev,
  335. "Alarms can be up to one month in the future\n");
  336. return -EINVAL;
  337. }
  338. } else {
  339. struct rtc_time max_date = now;
  340. time64_t t_max_date;
  341. time64_t t_alrm;
  342. int max_mday;
  343. max_date.tm_year += 1;
  344. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  345. if (max_date.tm_mday > max_mday)
  346. max_date.tm_mday = max_mday;
  347. t_max_date = rtc_tm_to_time64(&max_date);
  348. t_max_date -= 1;
  349. t_alrm = rtc_tm_to_time64(&t->time);
  350. if (t_alrm > t_max_date) {
  351. dev_err(dev,
  352. "Alarms can be up to one year in the future\n");
  353. return -EINVAL;
  354. }
  355. }
  356. return 0;
  357. }
  358. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  359. {
  360. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  361. unsigned char mon, mday, hrs, min, sec, rtc_control;
  362. int ret;
  363. if (!is_valid_irq(cmos->irq))
  364. return -EIO;
  365. ret = cmos_validate_alarm(dev, t);
  366. if (ret < 0)
  367. return ret;
  368. mon = t->time.tm_mon + 1;
  369. mday = t->time.tm_mday;
  370. hrs = t->time.tm_hour;
  371. min = t->time.tm_min;
  372. sec = t->time.tm_sec;
  373. rtc_control = CMOS_READ(RTC_CONTROL);
  374. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  375. /* Writing 0xff means "don't care" or "match all". */
  376. mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
  377. mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
  378. hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
  379. min = (min < 60) ? bin2bcd(min) : 0xff;
  380. sec = (sec < 60) ? bin2bcd(sec) : 0xff;
  381. }
  382. spin_lock_irq(&rtc_lock);
  383. /* next rtc irq must not be from previous alarm setting */
  384. cmos_irq_disable(cmos, RTC_AIE);
  385. /* update alarm */
  386. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  387. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  388. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  389. /* the system may support an "enhanced" alarm */
  390. if (cmos->day_alrm) {
  391. CMOS_WRITE(mday, cmos->day_alrm);
  392. if (cmos->mon_alrm)
  393. CMOS_WRITE(mon, cmos->mon_alrm);
  394. }
  395. if (use_hpet_alarm()) {
  396. /*
  397. * FIXME the HPET alarm glue currently ignores day_alrm
  398. * and mon_alrm ...
  399. */
  400. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
  401. t->time.tm_sec);
  402. }
  403. if (t->enabled)
  404. cmos_irq_enable(cmos, RTC_AIE);
  405. spin_unlock_irq(&rtc_lock);
  406. cmos->alarm_expires = rtc_tm_to_time64(&t->time);
  407. return 0;
  408. }
  409. static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
  410. {
  411. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  412. unsigned long flags;
  413. if (!is_valid_irq(cmos->irq))
  414. return -EINVAL;
  415. spin_lock_irqsave(&rtc_lock, flags);
  416. if (enabled)
  417. cmos_irq_enable(cmos, RTC_AIE);
  418. else
  419. cmos_irq_disable(cmos, RTC_AIE);
  420. spin_unlock_irqrestore(&rtc_lock, flags);
  421. return 0;
  422. }
  423. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  424. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  425. {
  426. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  427. unsigned char rtc_control, valid;
  428. spin_lock_irq(&rtc_lock);
  429. rtc_control = CMOS_READ(RTC_CONTROL);
  430. valid = CMOS_READ(RTC_VALID);
  431. spin_unlock_irq(&rtc_lock);
  432. /* NOTE: at least ICH6 reports battery status using a different
  433. * (non-RTC) bit; and SQWE is ignored on many current systems.
  434. */
  435. seq_printf(seq,
  436. "periodic_IRQ\t: %s\n"
  437. "update_IRQ\t: %s\n"
  438. "HPET_emulated\t: %s\n"
  439. // "square_wave\t: %s\n"
  440. "BCD\t\t: %s\n"
  441. "DST_enable\t: %s\n"
  442. "periodic_freq\t: %d\n"
  443. "batt_status\t: %s\n",
  444. (rtc_control & RTC_PIE) ? "yes" : "no",
  445. (rtc_control & RTC_UIE) ? "yes" : "no",
  446. use_hpet_alarm() ? "yes" : "no",
  447. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  448. (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  449. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  450. cmos->rtc->irq_freq,
  451. (valid & RTC_VRT) ? "okay" : "dead");
  452. return 0;
  453. }
  454. #else
  455. #define cmos_procfs NULL
  456. #endif
  457. static const struct rtc_class_ops cmos_rtc_ops = {
  458. .read_time = cmos_read_time,
  459. .set_time = cmos_set_time,
  460. .read_alarm = cmos_read_alarm,
  461. .set_alarm = cmos_set_alarm,
  462. .proc = cmos_procfs,
  463. .alarm_irq_enable = cmos_alarm_irq_enable,
  464. };
  465. /*----------------------------------------------------------------*/
  466. /*
  467. * All these chips have at least 64 bytes of address space, shared by
  468. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  469. * by boot firmware. Modern chips have 128 or 256 bytes.
  470. */
  471. #define NVRAM_OFFSET (RTC_REG_D + 1)
  472. static int cmos_nvram_read(void *priv, unsigned int off, void *val,
  473. size_t count)
  474. {
  475. unsigned char *buf = val;
  476. int retval;
  477. off += NVRAM_OFFSET;
  478. spin_lock_irq(&rtc_lock);
  479. for (retval = 0; count; count--, off++, retval++) {
  480. if (off < 128)
  481. *buf++ = CMOS_READ(off);
  482. else if (can_bank2)
  483. *buf++ = cmos_read_bank2(off);
  484. else
  485. break;
  486. }
  487. spin_unlock_irq(&rtc_lock);
  488. return retval;
  489. }
  490. static int cmos_nvram_write(void *priv, unsigned int off, void *val,
  491. size_t count)
  492. {
  493. struct cmos_rtc *cmos = priv;
  494. unsigned char *buf = val;
  495. int retval;
  496. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  497. * checksum on part of the NVRAM data. That's currently ignored
  498. * here. If userspace is smart enough to know what fields of
  499. * NVRAM to update, updating checksums is also part of its job.
  500. */
  501. off += NVRAM_OFFSET;
  502. spin_lock_irq(&rtc_lock);
  503. for (retval = 0; count; count--, off++, retval++) {
  504. /* don't trash RTC registers */
  505. if (off == cmos->day_alrm
  506. || off == cmos->mon_alrm
  507. || off == cmos->century)
  508. buf++;
  509. else if (off < 128)
  510. CMOS_WRITE(*buf++, off);
  511. else if (can_bank2)
  512. cmos_write_bank2(*buf++, off);
  513. else
  514. break;
  515. }
  516. spin_unlock_irq(&rtc_lock);
  517. return retval;
  518. }
  519. /*----------------------------------------------------------------*/
  520. static struct cmos_rtc cmos_rtc;
  521. static irqreturn_t cmos_interrupt(int irq, void *p)
  522. {
  523. u8 irqstat;
  524. u8 rtc_control;
  525. spin_lock(&rtc_lock);
  526. /* When the HPET interrupt handler calls us, the interrupt
  527. * status is passed as arg1 instead of the irq number. But
  528. * always clear irq status, even when HPET is in the way.
  529. *
  530. * Note that HPET and RTC are almost certainly out of phase,
  531. * giving different IRQ status ...
  532. */
  533. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  534. rtc_control = CMOS_READ(RTC_CONTROL);
  535. if (use_hpet_alarm())
  536. irqstat = (unsigned long)irq & 0xF0;
  537. /* If we were suspended, RTC_CONTROL may not be accurate since the
  538. * bios may have cleared it.
  539. */
  540. if (!cmos_rtc.suspend_ctrl)
  541. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  542. else
  543. irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  544. /* All Linux RTC alarms should be treated as if they were oneshot.
  545. * Similar code may be needed in system wakeup paths, in case the
  546. * alarm woke the system.
  547. */
  548. if (irqstat & RTC_AIE) {
  549. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  550. rtc_control &= ~RTC_AIE;
  551. CMOS_WRITE(rtc_control, RTC_CONTROL);
  552. if (use_hpet_alarm())
  553. hpet_mask_rtc_irq_bit(RTC_AIE);
  554. CMOS_READ(RTC_INTR_FLAGS);
  555. }
  556. spin_unlock(&rtc_lock);
  557. if (is_intr(irqstat)) {
  558. rtc_update_irq(p, 1, irqstat);
  559. return IRQ_HANDLED;
  560. } else
  561. return IRQ_NONE;
  562. }
  563. #ifdef CONFIG_PNP
  564. #define INITSECTION
  565. #else
  566. #define INITSECTION __init
  567. #endif
  568. static int INITSECTION
  569. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  570. {
  571. struct cmos_rtc_board_info *info = dev_get_platdata(dev);
  572. int retval = 0;
  573. unsigned char rtc_control;
  574. unsigned address_space;
  575. u32 flags = 0;
  576. struct nvmem_config nvmem_cfg = {
  577. .name = "cmos_nvram",
  578. .word_size = 1,
  579. .stride = 1,
  580. .reg_read = cmos_nvram_read,
  581. .reg_write = cmos_nvram_write,
  582. .priv = &cmos_rtc,
  583. };
  584. /* there can be only one ... */
  585. if (cmos_rtc.dev)
  586. return -EBUSY;
  587. if (!ports)
  588. return -ENODEV;
  589. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  590. *
  591. * REVISIT non-x86 systems may instead use memory space resources
  592. * (needing ioremap etc), not i/o space resources like this ...
  593. */
  594. if (RTC_IOMAPPED)
  595. ports = request_region(ports->start, resource_size(ports),
  596. driver_name);
  597. else
  598. ports = request_mem_region(ports->start, resource_size(ports),
  599. driver_name);
  600. if (!ports) {
  601. dev_dbg(dev, "i/o registers already in use\n");
  602. return -EBUSY;
  603. }
  604. cmos_rtc.irq = rtc_irq;
  605. cmos_rtc.iomem = ports;
  606. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  607. * driver did, but don't reject unknown configs. Old hardware
  608. * won't address 128 bytes. Newer chips have multiple banks,
  609. * though they may not be listed in one I/O resource.
  610. */
  611. #if defined(CONFIG_ATARI)
  612. address_space = 64;
  613. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
  614. || defined(__sparc__) || defined(__mips__) \
  615. || defined(__powerpc__)
  616. address_space = 128;
  617. #else
  618. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  619. address_space = 128;
  620. #endif
  621. if (can_bank2 && ports->end > (ports->start + 1))
  622. address_space = 256;
  623. /* For ACPI systems extension info comes from the FADT. On others,
  624. * board specific setup provides it as appropriate. Systems where
  625. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  626. * some almost-clones) can provide hooks to make that behave.
  627. *
  628. * Note that ACPI doesn't preclude putting these registers into
  629. * "extended" areas of the chip, including some that we won't yet
  630. * expect CMOS_READ and friends to handle.
  631. */
  632. if (info) {
  633. if (info->flags)
  634. flags = info->flags;
  635. if (info->address_space)
  636. address_space = info->address_space;
  637. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  638. cmos_rtc.day_alrm = info->rtc_day_alarm;
  639. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  640. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  641. if (info->rtc_century && info->rtc_century < 128)
  642. cmos_rtc.century = info->rtc_century;
  643. if (info->wake_on && info->wake_off) {
  644. cmos_rtc.wake_on = info->wake_on;
  645. cmos_rtc.wake_off = info->wake_off;
  646. }
  647. }
  648. cmos_rtc.dev = dev;
  649. dev_set_drvdata(dev, &cmos_rtc);
  650. cmos_rtc.rtc = devm_rtc_allocate_device(dev);
  651. if (IS_ERR(cmos_rtc.rtc)) {
  652. retval = PTR_ERR(cmos_rtc.rtc);
  653. goto cleanup0;
  654. }
  655. rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
  656. spin_lock_irq(&rtc_lock);
  657. if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
  658. /* force periodic irq to CMOS reset default of 1024Hz;
  659. *
  660. * REVISIT it's been reported that at least one x86_64 ALI
  661. * mobo doesn't use 32KHz here ... for portability we might
  662. * need to do something about other clock frequencies.
  663. */
  664. cmos_rtc.rtc->irq_freq = 1024;
  665. if (use_hpet_alarm())
  666. hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
  667. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  668. }
  669. /* disable irqs */
  670. if (is_valid_irq(rtc_irq))
  671. cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
  672. rtc_control = CMOS_READ(RTC_CONTROL);
  673. spin_unlock_irq(&rtc_lock);
  674. if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
  675. dev_warn(dev, "only 24-hr supported\n");
  676. retval = -ENXIO;
  677. goto cleanup1;
  678. }
  679. if (use_hpet_alarm())
  680. hpet_rtc_timer_init();
  681. if (is_valid_irq(rtc_irq)) {
  682. irq_handler_t rtc_cmos_int_handler;
  683. if (use_hpet_alarm()) {
  684. rtc_cmos_int_handler = hpet_rtc_interrupt;
  685. retval = hpet_register_irq_handler(cmos_interrupt);
  686. if (retval) {
  687. hpet_mask_rtc_irq_bit(RTC_IRQMASK);
  688. dev_warn(dev, "hpet_register_irq_handler "
  689. " failed in rtc_init().");
  690. goto cleanup1;
  691. }
  692. } else
  693. rtc_cmos_int_handler = cmos_interrupt;
  694. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  695. IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
  696. cmos_rtc.rtc);
  697. if (retval < 0) {
  698. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  699. goto cleanup1;
  700. }
  701. }
  702. cmos_rtc.rtc->ops = &cmos_rtc_ops;
  703. cmos_rtc.rtc->nvram_old_abi = true;
  704. retval = rtc_register_device(cmos_rtc.rtc);
  705. if (retval)
  706. goto cleanup2;
  707. /* export at least the first block of NVRAM */
  708. nvmem_cfg.size = address_space - NVRAM_OFFSET;
  709. if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
  710. dev_err(dev, "nvmem registration failed\n");
  711. dev_info(dev, "%s%s, %d bytes nvram%s\n",
  712. !is_valid_irq(rtc_irq) ? "no alarms" :
  713. cmos_rtc.mon_alrm ? "alarms up to one year" :
  714. cmos_rtc.day_alrm ? "alarms up to one month" :
  715. "alarms up to one day",
  716. cmos_rtc.century ? ", y3k" : "",
  717. nvmem_cfg.size,
  718. use_hpet_alarm() ? ", hpet irqs" : "");
  719. return 0;
  720. cleanup2:
  721. if (is_valid_irq(rtc_irq))
  722. free_irq(rtc_irq, cmos_rtc.rtc);
  723. cleanup1:
  724. cmos_rtc.dev = NULL;
  725. cleanup0:
  726. if (RTC_IOMAPPED)
  727. release_region(ports->start, resource_size(ports));
  728. else
  729. release_mem_region(ports->start, resource_size(ports));
  730. return retval;
  731. }
  732. static void cmos_do_shutdown(int rtc_irq)
  733. {
  734. spin_lock_irq(&rtc_lock);
  735. if (is_valid_irq(rtc_irq))
  736. cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
  737. spin_unlock_irq(&rtc_lock);
  738. }
  739. static void cmos_do_remove(struct device *dev)
  740. {
  741. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  742. struct resource *ports;
  743. cmos_do_shutdown(cmos->irq);
  744. if (is_valid_irq(cmos->irq)) {
  745. free_irq(cmos->irq, cmos->rtc);
  746. if (use_hpet_alarm())
  747. hpet_unregister_irq_handler(cmos_interrupt);
  748. }
  749. cmos->rtc = NULL;
  750. ports = cmos->iomem;
  751. if (RTC_IOMAPPED)
  752. release_region(ports->start, resource_size(ports));
  753. else
  754. release_mem_region(ports->start, resource_size(ports));
  755. cmos->iomem = NULL;
  756. cmos->dev = NULL;
  757. }
  758. static int cmos_aie_poweroff(struct device *dev)
  759. {
  760. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  761. struct rtc_time now;
  762. time64_t t_now;
  763. int retval = 0;
  764. unsigned char rtc_control;
  765. if (!cmos->alarm_expires)
  766. return -EINVAL;
  767. spin_lock_irq(&rtc_lock);
  768. rtc_control = CMOS_READ(RTC_CONTROL);
  769. spin_unlock_irq(&rtc_lock);
  770. /* We only care about the situation where AIE is disabled. */
  771. if (rtc_control & RTC_AIE)
  772. return -EBUSY;
  773. cmos_read_time(dev, &now);
  774. t_now = rtc_tm_to_time64(&now);
  775. /*
  776. * When enabling "RTC wake-up" in BIOS setup, the machine reboots
  777. * automatically right after shutdown on some buggy boxes.
  778. * This automatic rebooting issue won't happen when the alarm
  779. * time is larger than now+1 seconds.
  780. *
  781. * If the alarm time is equal to now+1 seconds, the issue can be
  782. * prevented by cancelling the alarm.
  783. */
  784. if (cmos->alarm_expires == t_now + 1) {
  785. struct rtc_wkalrm alarm;
  786. /* Cancel the AIE timer by configuring the past time. */
  787. rtc_time64_to_tm(t_now - 1, &alarm.time);
  788. alarm.enabled = 0;
  789. retval = cmos_set_alarm(dev, &alarm);
  790. } else if (cmos->alarm_expires > t_now + 1) {
  791. retval = -EBUSY;
  792. }
  793. return retval;
  794. }
  795. static int cmos_suspend(struct device *dev)
  796. {
  797. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  798. unsigned char tmp;
  799. /* only the alarm might be a wakeup event source */
  800. spin_lock_irq(&rtc_lock);
  801. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  802. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  803. unsigned char mask;
  804. if (device_may_wakeup(dev))
  805. mask = RTC_IRQMASK & ~RTC_AIE;
  806. else
  807. mask = RTC_IRQMASK;
  808. tmp &= ~mask;
  809. CMOS_WRITE(tmp, RTC_CONTROL);
  810. if (use_hpet_alarm())
  811. hpet_mask_rtc_irq_bit(mask);
  812. cmos_checkintr(cmos, tmp);
  813. }
  814. spin_unlock_irq(&rtc_lock);
  815. if ((tmp & RTC_AIE) && !use_acpi_alarm) {
  816. cmos->enabled_wake = 1;
  817. if (cmos->wake_on)
  818. cmos->wake_on(dev);
  819. else
  820. enable_irq_wake(cmos->irq);
  821. }
  822. cmos_read_alarm(dev, &cmos->saved_wkalrm);
  823. dev_dbg(dev, "suspend%s, ctrl %02x\n",
  824. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  825. tmp);
  826. return 0;
  827. }
  828. /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
  829. * after a detour through G3 "mechanical off", although the ACPI spec
  830. * says wakeup should only work from G1/S4 "hibernate". To most users,
  831. * distinctions between S4 and S5 are pointless. So when the hardware
  832. * allows, don't draw that distinction.
  833. */
  834. static inline int cmos_poweroff(struct device *dev)
  835. {
  836. if (!IS_ENABLED(CONFIG_PM))
  837. return -ENOSYS;
  838. return cmos_suspend(dev);
  839. }
  840. static void cmos_check_wkalrm(struct device *dev)
  841. {
  842. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  843. struct rtc_wkalrm current_alarm;
  844. time64_t t_now;
  845. time64_t t_current_expires;
  846. time64_t t_saved_expires;
  847. struct rtc_time now;
  848. /* Check if we have RTC Alarm armed */
  849. if (!(cmos->suspend_ctrl & RTC_AIE))
  850. return;
  851. cmos_read_time(dev, &now);
  852. t_now = rtc_tm_to_time64(&now);
  853. /*
  854. * ACPI RTC wake event is cleared after resume from STR,
  855. * ACK the rtc irq here
  856. */
  857. if (t_now >= cmos->alarm_expires && use_acpi_alarm) {
  858. cmos_interrupt(0, (void *)cmos->rtc);
  859. return;
  860. }
  861. cmos_read_alarm(dev, &current_alarm);
  862. t_current_expires = rtc_tm_to_time64(&current_alarm.time);
  863. t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
  864. if (t_current_expires != t_saved_expires ||
  865. cmos->saved_wkalrm.enabled != current_alarm.enabled) {
  866. cmos_set_alarm(dev, &cmos->saved_wkalrm);
  867. }
  868. }
  869. static void cmos_check_acpi_rtc_status(struct device *dev,
  870. unsigned char *rtc_control);
  871. static int __maybe_unused cmos_resume(struct device *dev)
  872. {
  873. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  874. unsigned char tmp;
  875. if (cmos->enabled_wake && !use_acpi_alarm) {
  876. if (cmos->wake_off)
  877. cmos->wake_off(dev);
  878. else
  879. disable_irq_wake(cmos->irq);
  880. cmos->enabled_wake = 0;
  881. }
  882. /* The BIOS might have changed the alarm, restore it */
  883. cmos_check_wkalrm(dev);
  884. spin_lock_irq(&rtc_lock);
  885. tmp = cmos->suspend_ctrl;
  886. cmos->suspend_ctrl = 0;
  887. /* re-enable any irqs previously active */
  888. if (tmp & RTC_IRQMASK) {
  889. unsigned char mask;
  890. if (device_may_wakeup(dev) && use_hpet_alarm())
  891. hpet_rtc_timer_init();
  892. do {
  893. CMOS_WRITE(tmp, RTC_CONTROL);
  894. if (use_hpet_alarm())
  895. hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
  896. mask = CMOS_READ(RTC_INTR_FLAGS);
  897. mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  898. if (!use_hpet_alarm() || !is_intr(mask))
  899. break;
  900. /* force one-shot behavior if HPET blocked
  901. * the wake alarm's irq
  902. */
  903. rtc_update_irq(cmos->rtc, 1, mask);
  904. tmp &= ~RTC_AIE;
  905. hpet_mask_rtc_irq_bit(RTC_AIE);
  906. } while (mask & RTC_AIE);
  907. if (tmp & RTC_AIE)
  908. cmos_check_acpi_rtc_status(dev, &tmp);
  909. }
  910. spin_unlock_irq(&rtc_lock);
  911. dev_dbg(dev, "resume, ctrl %02x\n", tmp);
  912. return 0;
  913. }
  914. static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
  915. /*----------------------------------------------------------------*/
  916. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  917. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  918. * probably list them in similar PNPBIOS tables; so PNP is more common.
  919. *
  920. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  921. * predate even PNPBIOS should set up platform_bus devices.
  922. */
  923. #ifdef CONFIG_ACPI
  924. #include <linux/acpi.h>
  925. static u32 rtc_handler(void *context)
  926. {
  927. struct device *dev = context;
  928. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  929. unsigned char rtc_control = 0;
  930. unsigned char rtc_intr;
  931. unsigned long flags;
  932. /*
  933. * Always update rtc irq when ACPI is used as RTC Alarm.
  934. * Or else, ACPI SCI is enabled during suspend/resume only,
  935. * update rtc irq in that case.
  936. */
  937. if (use_acpi_alarm)
  938. cmos_interrupt(0, (void *)cmos->rtc);
  939. else {
  940. /* Fix me: can we use cmos_interrupt() here as well? */
  941. spin_lock_irqsave(&rtc_lock, flags);
  942. if (cmos_rtc.suspend_ctrl)
  943. rtc_control = CMOS_READ(RTC_CONTROL);
  944. if (rtc_control & RTC_AIE) {
  945. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  946. CMOS_WRITE(rtc_control, RTC_CONTROL);
  947. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  948. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  949. }
  950. spin_unlock_irqrestore(&rtc_lock, flags);
  951. }
  952. pm_wakeup_hard_event(dev);
  953. acpi_clear_event(ACPI_EVENT_RTC);
  954. acpi_disable_event(ACPI_EVENT_RTC, 0);
  955. return ACPI_INTERRUPT_HANDLED;
  956. }
  957. static inline void rtc_wake_setup(struct device *dev)
  958. {
  959. acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
  960. /*
  961. * After the RTC handler is installed, the Fixed_RTC event should
  962. * be disabled. Only when the RTC alarm is set will it be enabled.
  963. */
  964. acpi_clear_event(ACPI_EVENT_RTC);
  965. acpi_disable_event(ACPI_EVENT_RTC, 0);
  966. }
  967. static void rtc_wake_on(struct device *dev)
  968. {
  969. acpi_clear_event(ACPI_EVENT_RTC);
  970. acpi_enable_event(ACPI_EVENT_RTC, 0);
  971. }
  972. static void rtc_wake_off(struct device *dev)
  973. {
  974. acpi_disable_event(ACPI_EVENT_RTC, 0);
  975. }
  976. #ifdef CONFIG_X86
  977. /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
  978. static void use_acpi_alarm_quirks(void)
  979. {
  980. int year;
  981. if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
  982. return;
  983. if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
  984. return;
  985. if (!is_hpet_enabled())
  986. return;
  987. if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year >= 2015)
  988. use_acpi_alarm = true;
  989. }
  990. #else
  991. static inline void use_acpi_alarm_quirks(void) { }
  992. #endif
  993. /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
  994. * its device node and pass extra config data. This helps its driver use
  995. * capabilities that the now-obsolete mc146818 didn't have, and informs it
  996. * that this board's RTC is wakeup-capable (per ACPI spec).
  997. */
  998. static struct cmos_rtc_board_info acpi_rtc_info;
  999. static void cmos_wake_setup(struct device *dev)
  1000. {
  1001. if (acpi_disabled)
  1002. return;
  1003. use_acpi_alarm_quirks();
  1004. rtc_wake_setup(dev);
  1005. acpi_rtc_info.wake_on = rtc_wake_on;
  1006. acpi_rtc_info.wake_off = rtc_wake_off;
  1007. /* workaround bug in some ACPI tables */
  1008. if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
  1009. dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
  1010. acpi_gbl_FADT.month_alarm);
  1011. acpi_gbl_FADT.month_alarm = 0;
  1012. }
  1013. acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
  1014. acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
  1015. acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
  1016. /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
  1017. if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
  1018. dev_info(dev, "RTC can wake from S4\n");
  1019. dev->platform_data = &acpi_rtc_info;
  1020. /* RTC always wakes from S1/S2/S3, and often S4/STD */
  1021. device_init_wakeup(dev, 1);
  1022. }
  1023. static void cmos_check_acpi_rtc_status(struct device *dev,
  1024. unsigned char *rtc_control)
  1025. {
  1026. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1027. acpi_event_status rtc_status;
  1028. acpi_status status;
  1029. if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
  1030. return;
  1031. status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
  1032. if (ACPI_FAILURE(status)) {
  1033. dev_err(dev, "Could not get RTC status\n");
  1034. } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
  1035. unsigned char mask;
  1036. *rtc_control &= ~RTC_AIE;
  1037. CMOS_WRITE(*rtc_control, RTC_CONTROL);
  1038. mask = CMOS_READ(RTC_INTR_FLAGS);
  1039. rtc_update_irq(cmos->rtc, 1, mask);
  1040. }
  1041. }
  1042. #else
  1043. static void cmos_wake_setup(struct device *dev)
  1044. {
  1045. }
  1046. static void cmos_check_acpi_rtc_status(struct device *dev,
  1047. unsigned char *rtc_control)
  1048. {
  1049. }
  1050. #endif
  1051. #ifdef CONFIG_PNP
  1052. #include <linux/pnp.h>
  1053. static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  1054. {
  1055. cmos_wake_setup(&pnp->dev);
  1056. if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
  1057. unsigned int irq = 0;
  1058. #ifdef CONFIG_X86
  1059. /* Some machines contain a PNP entry for the RTC, but
  1060. * don't define the IRQ. It should always be safe to
  1061. * hardcode it on systems with a legacy PIC.
  1062. */
  1063. if (nr_legacy_irqs())
  1064. irq = 8;
  1065. #endif
  1066. return cmos_do_probe(&pnp->dev,
  1067. pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
  1068. } else {
  1069. return cmos_do_probe(&pnp->dev,
  1070. pnp_get_resource(pnp, IORESOURCE_IO, 0),
  1071. pnp_irq(pnp, 0));
  1072. }
  1073. }
  1074. static void cmos_pnp_remove(struct pnp_dev *pnp)
  1075. {
  1076. cmos_do_remove(&pnp->dev);
  1077. }
  1078. static void cmos_pnp_shutdown(struct pnp_dev *pnp)
  1079. {
  1080. struct device *dev = &pnp->dev;
  1081. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1082. if (system_state == SYSTEM_POWER_OFF) {
  1083. int retval = cmos_poweroff(dev);
  1084. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1085. return;
  1086. }
  1087. cmos_do_shutdown(cmos->irq);
  1088. }
  1089. static const struct pnp_device_id rtc_ids[] = {
  1090. { .id = "PNP0b00", },
  1091. { .id = "PNP0b01", },
  1092. { .id = "PNP0b02", },
  1093. { },
  1094. };
  1095. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  1096. static struct pnp_driver cmos_pnp_driver = {
  1097. .name = (char *) driver_name,
  1098. .id_table = rtc_ids,
  1099. .probe = cmos_pnp_probe,
  1100. .remove = cmos_pnp_remove,
  1101. .shutdown = cmos_pnp_shutdown,
  1102. /* flag ensures resume() gets called, and stops syslog spam */
  1103. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  1104. .driver = {
  1105. .pm = &cmos_pm_ops,
  1106. },
  1107. };
  1108. #endif /* CONFIG_PNP */
  1109. #ifdef CONFIG_OF
  1110. static const struct of_device_id of_cmos_match[] = {
  1111. {
  1112. .compatible = "motorola,mc146818",
  1113. },
  1114. { },
  1115. };
  1116. MODULE_DEVICE_TABLE(of, of_cmos_match);
  1117. static __init void cmos_of_init(struct platform_device *pdev)
  1118. {
  1119. struct device_node *node = pdev->dev.of_node;
  1120. const __be32 *val;
  1121. if (!node)
  1122. return;
  1123. val = of_get_property(node, "ctrl-reg", NULL);
  1124. if (val)
  1125. CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
  1126. val = of_get_property(node, "freq-reg", NULL);
  1127. if (val)
  1128. CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
  1129. }
  1130. #else
  1131. static inline void cmos_of_init(struct platform_device *pdev) {}
  1132. #endif
  1133. /*----------------------------------------------------------------*/
  1134. /* Platform setup should have set up an RTC device, when PNP is
  1135. * unavailable ... this could happen even on (older) PCs.
  1136. */
  1137. static int __init cmos_platform_probe(struct platform_device *pdev)
  1138. {
  1139. struct resource *resource;
  1140. int irq;
  1141. cmos_of_init(pdev);
  1142. cmos_wake_setup(&pdev->dev);
  1143. if (RTC_IOMAPPED)
  1144. resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1145. else
  1146. resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1147. irq = platform_get_irq(pdev, 0);
  1148. if (irq < 0)
  1149. irq = -1;
  1150. return cmos_do_probe(&pdev->dev, resource, irq);
  1151. }
  1152. static int cmos_platform_remove(struct platform_device *pdev)
  1153. {
  1154. cmos_do_remove(&pdev->dev);
  1155. return 0;
  1156. }
  1157. static void cmos_platform_shutdown(struct platform_device *pdev)
  1158. {
  1159. struct device *dev = &pdev->dev;
  1160. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1161. if (system_state == SYSTEM_POWER_OFF) {
  1162. int retval = cmos_poweroff(dev);
  1163. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1164. return;
  1165. }
  1166. cmos_do_shutdown(cmos->irq);
  1167. }
  1168. /* work with hotplug and coldplug */
  1169. MODULE_ALIAS("platform:rtc_cmos");
  1170. static struct platform_driver cmos_platform_driver = {
  1171. .remove = cmos_platform_remove,
  1172. .shutdown = cmos_platform_shutdown,
  1173. .driver = {
  1174. .name = driver_name,
  1175. .pm = &cmos_pm_ops,
  1176. .of_match_table = of_match_ptr(of_cmos_match),
  1177. }
  1178. };
  1179. #ifdef CONFIG_PNP
  1180. static bool pnp_driver_registered;
  1181. #endif
  1182. static bool platform_driver_registered;
  1183. static int __init cmos_init(void)
  1184. {
  1185. int retval = 0;
  1186. #ifdef CONFIG_PNP
  1187. retval = pnp_register_driver(&cmos_pnp_driver);
  1188. if (retval == 0)
  1189. pnp_driver_registered = true;
  1190. #endif
  1191. if (!cmos_rtc.dev) {
  1192. retval = platform_driver_probe(&cmos_platform_driver,
  1193. cmos_platform_probe);
  1194. if (retval == 0)
  1195. platform_driver_registered = true;
  1196. }
  1197. if (retval == 0)
  1198. return 0;
  1199. #ifdef CONFIG_PNP
  1200. if (pnp_driver_registered)
  1201. pnp_unregister_driver(&cmos_pnp_driver);
  1202. #endif
  1203. return retval;
  1204. }
  1205. module_init(cmos_init);
  1206. static void __exit cmos_exit(void)
  1207. {
  1208. #ifdef CONFIG_PNP
  1209. if (pnp_driver_registered)
  1210. pnp_unregister_driver(&cmos_pnp_driver);
  1211. #endif
  1212. if (platform_driver_registered)
  1213. platform_driver_unregister(&cmos_platform_driver);
  1214. }
  1215. module_exit(cmos_exit);
  1216. MODULE_AUTHOR("David Brownell");
  1217. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  1218. MODULE_LICENSE("GPL");