phy-rcar-gen3-usb2.c 14 KB

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  1. /*
  2. * Renesas R-Car Gen3 for USB2.0 PHY driver
  3. *
  4. * Copyright (C) 2015-2017 Renesas Electronics Corporation
  5. *
  6. * This is based on the phy-rcar-gen2 driver:
  7. * Copyright (C) 2014 Renesas Solutions Corp.
  8. * Copyright (C) 2014 Cogent Embedded, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/extcon-provider.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_device.h>
  21. #include <linux/phy/phy.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/regulator/consumer.h>
  25. #include <linux/usb/of.h>
  26. #include <linux/workqueue.h>
  27. /******* USB2.0 Host registers (original offset is +0x200) *******/
  28. #define USB2_INT_ENABLE 0x000
  29. #define USB2_USBCTR 0x00c
  30. #define USB2_SPD_RSM_TIMSET 0x10c
  31. #define USB2_OC_TIMSET 0x110
  32. #define USB2_COMMCTRL 0x600
  33. #define USB2_OBINTSTA 0x604
  34. #define USB2_OBINTEN 0x608
  35. #define USB2_VBCTRL 0x60c
  36. #define USB2_LINECTRL1 0x610
  37. #define USB2_ADPCTRL 0x630
  38. /* INT_ENABLE */
  39. #define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
  40. #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
  41. #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
  42. #define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \
  43. USB2_INT_ENABLE_USBH_INTB_EN | \
  44. USB2_INT_ENABLE_USBH_INTA_EN)
  45. /* USBCTR */
  46. #define USB2_USBCTR_DIRPD BIT(2)
  47. #define USB2_USBCTR_PLL_RST BIT(1)
  48. /* SPD_RSM_TIMSET */
  49. #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
  50. /* OC_TIMSET */
  51. #define USB2_OC_TIMSET_INIT 0x000209ab
  52. /* COMMCTRL */
  53. #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
  54. /* OBINTSTA and OBINTEN */
  55. #define USB2_OBINT_SESSVLDCHG BIT(12)
  56. #define USB2_OBINT_IDDIGCHG BIT(11)
  57. #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
  58. USB2_OBINT_IDDIGCHG)
  59. /* VBCTRL */
  60. #define USB2_VBCTRL_DRVVBUSSEL BIT(8)
  61. /* LINECTRL1 */
  62. #define USB2_LINECTRL1_DPRPD_EN BIT(19)
  63. #define USB2_LINECTRL1_DP_RPD BIT(18)
  64. #define USB2_LINECTRL1_DMRPD_EN BIT(17)
  65. #define USB2_LINECTRL1_DM_RPD BIT(16)
  66. #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
  67. /* ADPCTRL */
  68. #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
  69. #define USB2_ADPCTRL_IDDIG BIT(19)
  70. #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
  71. #define USB2_ADPCTRL_DRVVBUS BIT(4)
  72. #define RCAR_GEN3_PHY_HAS_DEDICATED_PINS 1
  73. struct rcar_gen3_chan {
  74. void __iomem *base;
  75. struct extcon_dev *extcon;
  76. struct phy *phy;
  77. struct regulator *vbus;
  78. struct work_struct work;
  79. bool extcon_host;
  80. bool has_otg_pins;
  81. };
  82. static void rcar_gen3_phy_usb2_work(struct work_struct *work)
  83. {
  84. struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
  85. work);
  86. if (ch->extcon_host) {
  87. extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
  88. extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
  89. } else {
  90. extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
  91. extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
  92. }
  93. }
  94. static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
  95. {
  96. void __iomem *usb2_base = ch->base;
  97. u32 val = readl(usb2_base + USB2_COMMCTRL);
  98. dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
  99. if (host)
  100. val &= ~USB2_COMMCTRL_OTG_PERI;
  101. else
  102. val |= USB2_COMMCTRL_OTG_PERI;
  103. writel(val, usb2_base + USB2_COMMCTRL);
  104. }
  105. static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
  106. {
  107. void __iomem *usb2_base = ch->base;
  108. u32 val = readl(usb2_base + USB2_LINECTRL1);
  109. dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
  110. val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
  111. if (dp)
  112. val |= USB2_LINECTRL1_DP_RPD;
  113. if (dm)
  114. val |= USB2_LINECTRL1_DM_RPD;
  115. writel(val, usb2_base + USB2_LINECTRL1);
  116. }
  117. static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
  118. {
  119. void __iomem *usb2_base = ch->base;
  120. u32 val = readl(usb2_base + USB2_ADPCTRL);
  121. dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
  122. if (vbus)
  123. val |= USB2_ADPCTRL_DRVVBUS;
  124. else
  125. val &= ~USB2_ADPCTRL_DRVVBUS;
  126. writel(val, usb2_base + USB2_ADPCTRL);
  127. }
  128. static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
  129. {
  130. rcar_gen3_set_linectrl(ch, 1, 1);
  131. rcar_gen3_set_host_mode(ch, 1);
  132. rcar_gen3_enable_vbus_ctrl(ch, 1);
  133. ch->extcon_host = true;
  134. schedule_work(&ch->work);
  135. }
  136. static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
  137. {
  138. rcar_gen3_set_linectrl(ch, 0, 1);
  139. rcar_gen3_set_host_mode(ch, 0);
  140. rcar_gen3_enable_vbus_ctrl(ch, 0);
  141. ch->extcon_host = false;
  142. schedule_work(&ch->work);
  143. }
  144. static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
  145. {
  146. void __iomem *usb2_base = ch->base;
  147. u32 val;
  148. val = readl(usb2_base + USB2_LINECTRL1);
  149. writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
  150. rcar_gen3_set_linectrl(ch, 1, 1);
  151. rcar_gen3_set_host_mode(ch, 1);
  152. rcar_gen3_enable_vbus_ctrl(ch, 0);
  153. val = readl(usb2_base + USB2_LINECTRL1);
  154. writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
  155. }
  156. static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
  157. {
  158. rcar_gen3_set_linectrl(ch, 0, 1);
  159. rcar_gen3_set_host_mode(ch, 0);
  160. rcar_gen3_enable_vbus_ctrl(ch, 1);
  161. }
  162. static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
  163. {
  164. void __iomem *usb2_base = ch->base;
  165. u32 val;
  166. val = readl(usb2_base + USB2_OBINTEN);
  167. writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  168. rcar_gen3_enable_vbus_ctrl(ch, 0);
  169. rcar_gen3_init_for_host(ch);
  170. writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  171. }
  172. static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
  173. {
  174. return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
  175. }
  176. static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
  177. {
  178. if (!rcar_gen3_check_id(ch))
  179. rcar_gen3_init_for_host(ch);
  180. else
  181. rcar_gen3_init_for_peri(ch);
  182. }
  183. static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
  184. {
  185. return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
  186. }
  187. static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
  188. {
  189. if (rcar_gen3_is_host(ch))
  190. return PHY_MODE_USB_HOST;
  191. return PHY_MODE_USB_DEVICE;
  192. }
  193. static ssize_t role_store(struct device *dev, struct device_attribute *attr,
  194. const char *buf, size_t count)
  195. {
  196. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  197. bool is_b_device;
  198. enum phy_mode cur_mode, new_mode;
  199. if (!ch->has_otg_pins || !ch->phy->init_count)
  200. return -EIO;
  201. if (!strncmp(buf, "host", strlen("host")))
  202. new_mode = PHY_MODE_USB_HOST;
  203. else if (!strncmp(buf, "peripheral", strlen("peripheral")))
  204. new_mode = PHY_MODE_USB_DEVICE;
  205. else
  206. return -EINVAL;
  207. /* is_b_device: true is B-Device. false is A-Device. */
  208. is_b_device = rcar_gen3_check_id(ch);
  209. cur_mode = rcar_gen3_get_phy_mode(ch);
  210. /* If current and new mode is the same, this returns the error */
  211. if (cur_mode == new_mode)
  212. return -EINVAL;
  213. if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
  214. if (!is_b_device) /* A-Peripheral */
  215. rcar_gen3_init_from_a_peri_to_a_host(ch);
  216. else /* B-Peripheral */
  217. rcar_gen3_init_for_b_host(ch);
  218. } else { /* And is_host must be true */
  219. if (!is_b_device) /* A-Host */
  220. rcar_gen3_init_for_a_peri(ch);
  221. else /* B-Host */
  222. rcar_gen3_init_for_peri(ch);
  223. }
  224. return count;
  225. }
  226. static ssize_t role_show(struct device *dev, struct device_attribute *attr,
  227. char *buf)
  228. {
  229. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  230. if (!ch->has_otg_pins || !ch->phy->init_count)
  231. return -EIO;
  232. return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
  233. "peripheral");
  234. }
  235. static DEVICE_ATTR_RW(role);
  236. static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
  237. {
  238. void __iomem *usb2_base = ch->base;
  239. u32 val;
  240. val = readl(usb2_base + USB2_VBCTRL);
  241. writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
  242. writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
  243. val = readl(usb2_base + USB2_OBINTEN);
  244. writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  245. val = readl(usb2_base + USB2_ADPCTRL);
  246. writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
  247. val = readl(usb2_base + USB2_LINECTRL1);
  248. rcar_gen3_set_linectrl(ch, 0, 0);
  249. writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
  250. usb2_base + USB2_LINECTRL1);
  251. rcar_gen3_device_recognition(ch);
  252. }
  253. static int rcar_gen3_phy_usb2_init(struct phy *p)
  254. {
  255. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  256. void __iomem *usb2_base = channel->base;
  257. /* Initialize USB2 part */
  258. writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
  259. writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
  260. writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
  261. /* Initialize otg part */
  262. if (channel->has_otg_pins)
  263. rcar_gen3_init_otg(channel);
  264. return 0;
  265. }
  266. static int rcar_gen3_phy_usb2_exit(struct phy *p)
  267. {
  268. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  269. writel(0, channel->base + USB2_INT_ENABLE);
  270. return 0;
  271. }
  272. static int rcar_gen3_phy_usb2_power_on(struct phy *p)
  273. {
  274. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  275. void __iomem *usb2_base = channel->base;
  276. u32 val;
  277. int ret;
  278. if (channel->vbus) {
  279. ret = regulator_enable(channel->vbus);
  280. if (ret)
  281. return ret;
  282. }
  283. val = readl(usb2_base + USB2_USBCTR);
  284. val |= USB2_USBCTR_PLL_RST;
  285. writel(val, usb2_base + USB2_USBCTR);
  286. val &= ~USB2_USBCTR_PLL_RST;
  287. writel(val, usb2_base + USB2_USBCTR);
  288. return 0;
  289. }
  290. static int rcar_gen3_phy_usb2_power_off(struct phy *p)
  291. {
  292. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  293. int ret = 0;
  294. if (channel->vbus)
  295. ret = regulator_disable(channel->vbus);
  296. return ret;
  297. }
  298. static const struct phy_ops rcar_gen3_phy_usb2_ops = {
  299. .init = rcar_gen3_phy_usb2_init,
  300. .exit = rcar_gen3_phy_usb2_exit,
  301. .power_on = rcar_gen3_phy_usb2_power_on,
  302. .power_off = rcar_gen3_phy_usb2_power_off,
  303. .owner = THIS_MODULE,
  304. };
  305. static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
  306. {
  307. struct rcar_gen3_chan *ch = _ch;
  308. void __iomem *usb2_base = ch->base;
  309. u32 status = readl(usb2_base + USB2_OBINTSTA);
  310. irqreturn_t ret = IRQ_NONE;
  311. if (status & USB2_OBINT_BITS) {
  312. dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
  313. writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
  314. rcar_gen3_device_recognition(ch);
  315. ret = IRQ_HANDLED;
  316. }
  317. return ret;
  318. }
  319. static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
  320. {
  321. .compatible = "renesas,usb2-phy-r8a7795",
  322. .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
  323. },
  324. {
  325. .compatible = "renesas,usb2-phy-r8a7796",
  326. .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
  327. },
  328. {
  329. .compatible = "renesas,usb2-phy-r8a77965",
  330. .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
  331. },
  332. {
  333. .compatible = "renesas,rcar-gen3-usb2-phy",
  334. },
  335. { }
  336. };
  337. MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
  338. static const unsigned int rcar_gen3_phy_cable[] = {
  339. EXTCON_USB,
  340. EXTCON_USB_HOST,
  341. EXTCON_NONE,
  342. };
  343. static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
  344. {
  345. struct device *dev = &pdev->dev;
  346. struct rcar_gen3_chan *channel;
  347. struct phy_provider *provider;
  348. struct resource *res;
  349. int irq, ret = 0;
  350. if (!dev->of_node) {
  351. dev_err(dev, "This driver needs device tree\n");
  352. return -EINVAL;
  353. }
  354. channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
  355. if (!channel)
  356. return -ENOMEM;
  357. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  358. channel->base = devm_ioremap_resource(dev, res);
  359. if (IS_ERR(channel->base))
  360. return PTR_ERR(channel->base);
  361. /* call request_irq for OTG */
  362. irq = platform_get_irq(pdev, 0);
  363. if (irq >= 0) {
  364. INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
  365. irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
  366. IRQF_SHARED, dev_name(dev), channel);
  367. if (irq < 0)
  368. dev_err(dev, "No irq handler (%d)\n", irq);
  369. }
  370. if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
  371. int ret;
  372. channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev);
  373. channel->extcon = devm_extcon_dev_allocate(dev,
  374. rcar_gen3_phy_cable);
  375. if (IS_ERR(channel->extcon))
  376. return PTR_ERR(channel->extcon);
  377. ret = devm_extcon_dev_register(dev, channel->extcon);
  378. if (ret < 0) {
  379. dev_err(dev, "Failed to register extcon\n");
  380. return ret;
  381. }
  382. }
  383. /*
  384. * devm_phy_create() will call pm_runtime_enable(&phy->dev);
  385. * And then, phy-core will manage runtime pm for this device.
  386. */
  387. pm_runtime_enable(dev);
  388. channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
  389. if (IS_ERR(channel->phy)) {
  390. dev_err(dev, "Failed to create USB2 PHY\n");
  391. ret = PTR_ERR(channel->phy);
  392. goto error;
  393. }
  394. channel->vbus = devm_regulator_get_optional(dev, "vbus");
  395. if (IS_ERR(channel->vbus)) {
  396. if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
  397. ret = PTR_ERR(channel->vbus);
  398. goto error;
  399. }
  400. channel->vbus = NULL;
  401. }
  402. platform_set_drvdata(pdev, channel);
  403. phy_set_drvdata(channel->phy, channel);
  404. provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  405. if (IS_ERR(provider)) {
  406. dev_err(dev, "Failed to register PHY provider\n");
  407. ret = PTR_ERR(provider);
  408. goto error;
  409. } else if (channel->has_otg_pins) {
  410. int ret;
  411. ret = device_create_file(dev, &dev_attr_role);
  412. if (ret < 0)
  413. goto error;
  414. }
  415. return 0;
  416. error:
  417. pm_runtime_disable(dev);
  418. return ret;
  419. }
  420. static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
  421. {
  422. struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
  423. if (channel->has_otg_pins)
  424. device_remove_file(&pdev->dev, &dev_attr_role);
  425. pm_runtime_disable(&pdev->dev);
  426. return 0;
  427. };
  428. static struct platform_driver rcar_gen3_phy_usb2_driver = {
  429. .driver = {
  430. .name = "phy_rcar_gen3_usb2",
  431. .of_match_table = rcar_gen3_phy_usb2_match_table,
  432. },
  433. .probe = rcar_gen3_phy_usb2_probe,
  434. .remove = rcar_gen3_phy_usb2_remove,
  435. };
  436. module_platform_driver(rcar_gen3_phy_usb2_driver);
  437. MODULE_LICENSE("GPL v2");
  438. MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
  439. MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");