pci-sysfs.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  4. * (C) Copyright 2002-2004 IBM Corp.
  5. * (C) Copyright 2003 Matthew Wilcox
  6. * (C) Copyright 2003 Hewlett-Packard
  7. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  8. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  9. *
  10. * File attributes for PCI devices
  11. *
  12. * Modeled after usb's driverfs.c
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/pci.h>
  17. #include <linux/stat.h>
  18. #include <linux/export.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include <linux/fs.h>
  22. #include <linux/capability.h>
  23. #include <linux/security.h>
  24. #include <linux/pci-aspm.h>
  25. #include <linux/slab.h>
  26. #include <linux/vgaarb.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/of.h>
  29. #include "pci.h"
  30. static int sysfs_initialized; /* = 0 */
  31. /* show configuration fields */
  32. #define pci_config_attr(field, format_string) \
  33. static ssize_t \
  34. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  35. { \
  36. struct pci_dev *pdev; \
  37. \
  38. pdev = to_pci_dev(dev); \
  39. return sprintf(buf, format_string, pdev->field); \
  40. } \
  41. static DEVICE_ATTR_RO(field)
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(revision, "0x%02x\n");
  47. pci_config_attr(class, "0x%06x\n");
  48. pci_config_attr(irq, "%u\n");
  49. static ssize_t broken_parity_status_show(struct device *dev,
  50. struct device_attribute *attr,
  51. char *buf)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  55. }
  56. static ssize_t broken_parity_status_store(struct device *dev,
  57. struct device_attribute *attr,
  58. const char *buf, size_t count)
  59. {
  60. struct pci_dev *pdev = to_pci_dev(dev);
  61. unsigned long val;
  62. if (kstrtoul(buf, 0, &val) < 0)
  63. return -EINVAL;
  64. pdev->broken_parity_status = !!val;
  65. return count;
  66. }
  67. static DEVICE_ATTR_RW(broken_parity_status);
  68. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  69. struct device_attribute *attr, char *buf)
  70. {
  71. const struct cpumask *mask;
  72. #ifdef CONFIG_NUMA
  73. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  74. cpumask_of_node(dev_to_node(dev));
  75. #else
  76. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  77. #endif
  78. return cpumap_print_to_pagebuf(list, buf, mask);
  79. }
  80. static ssize_t local_cpus_show(struct device *dev,
  81. struct device_attribute *attr, char *buf)
  82. {
  83. return pci_dev_show_local_cpu(dev, false, attr, buf);
  84. }
  85. static DEVICE_ATTR_RO(local_cpus);
  86. static ssize_t local_cpulist_show(struct device *dev,
  87. struct device_attribute *attr, char *buf)
  88. {
  89. return pci_dev_show_local_cpu(dev, true, attr, buf);
  90. }
  91. static DEVICE_ATTR_RO(local_cpulist);
  92. /*
  93. * PCI Bus Class Devices
  94. */
  95. static ssize_t cpuaffinity_show(struct device *dev,
  96. struct device_attribute *attr, char *buf)
  97. {
  98. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  99. return cpumap_print_to_pagebuf(false, buf, cpumask);
  100. }
  101. static DEVICE_ATTR_RO(cpuaffinity);
  102. static ssize_t cpulistaffinity_show(struct device *dev,
  103. struct device_attribute *attr, char *buf)
  104. {
  105. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  106. return cpumap_print_to_pagebuf(true, buf, cpumask);
  107. }
  108. static DEVICE_ATTR_RO(cpulistaffinity);
  109. /* show resources */
  110. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  111. char *buf)
  112. {
  113. struct pci_dev *pci_dev = to_pci_dev(dev);
  114. char *str = buf;
  115. int i;
  116. int max;
  117. resource_size_t start, end;
  118. if (pci_dev->subordinate)
  119. max = DEVICE_COUNT_RESOURCE;
  120. else
  121. max = PCI_BRIDGE_RESOURCES;
  122. for (i = 0; i < max; i++) {
  123. struct resource *res = &pci_dev->resource[i];
  124. pci_resource_to_user(pci_dev, i, res, &start, &end);
  125. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  126. (unsigned long long)start,
  127. (unsigned long long)end,
  128. (unsigned long long)res->flags);
  129. }
  130. return (str - buf);
  131. }
  132. static DEVICE_ATTR_RO(resource);
  133. static ssize_t max_link_speed_show(struct device *dev,
  134. struct device_attribute *attr, char *buf)
  135. {
  136. struct pci_dev *pdev = to_pci_dev(dev);
  137. return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
  138. }
  139. static DEVICE_ATTR_RO(max_link_speed);
  140. static ssize_t max_link_width_show(struct device *dev,
  141. struct device_attribute *attr, char *buf)
  142. {
  143. struct pci_dev *pdev = to_pci_dev(dev);
  144. return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
  145. }
  146. static DEVICE_ATTR_RO(max_link_width);
  147. static ssize_t current_link_speed_show(struct device *dev,
  148. struct device_attribute *attr, char *buf)
  149. {
  150. struct pci_dev *pci_dev = to_pci_dev(dev);
  151. u16 linkstat;
  152. int err;
  153. const char *speed;
  154. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  155. if (err)
  156. return -EINVAL;
  157. switch (linkstat & PCI_EXP_LNKSTA_CLS) {
  158. case PCI_EXP_LNKSTA_CLS_16_0GB:
  159. speed = "16 GT/s";
  160. break;
  161. case PCI_EXP_LNKSTA_CLS_8_0GB:
  162. speed = "8 GT/s";
  163. break;
  164. case PCI_EXP_LNKSTA_CLS_5_0GB:
  165. speed = "5 GT/s";
  166. break;
  167. case PCI_EXP_LNKSTA_CLS_2_5GB:
  168. speed = "2.5 GT/s";
  169. break;
  170. default:
  171. speed = "Unknown speed";
  172. }
  173. return sprintf(buf, "%s\n", speed);
  174. }
  175. static DEVICE_ATTR_RO(current_link_speed);
  176. static ssize_t current_link_width_show(struct device *dev,
  177. struct device_attribute *attr, char *buf)
  178. {
  179. struct pci_dev *pci_dev = to_pci_dev(dev);
  180. u16 linkstat;
  181. int err;
  182. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  183. if (err)
  184. return -EINVAL;
  185. return sprintf(buf, "%u\n",
  186. (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
  187. }
  188. static DEVICE_ATTR_RO(current_link_width);
  189. static ssize_t secondary_bus_number_show(struct device *dev,
  190. struct device_attribute *attr,
  191. char *buf)
  192. {
  193. struct pci_dev *pci_dev = to_pci_dev(dev);
  194. u8 sec_bus;
  195. int err;
  196. err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
  197. if (err)
  198. return -EINVAL;
  199. return sprintf(buf, "%u\n", sec_bus);
  200. }
  201. static DEVICE_ATTR_RO(secondary_bus_number);
  202. static ssize_t subordinate_bus_number_show(struct device *dev,
  203. struct device_attribute *attr,
  204. char *buf)
  205. {
  206. struct pci_dev *pci_dev = to_pci_dev(dev);
  207. u8 sub_bus;
  208. int err;
  209. err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
  210. if (err)
  211. return -EINVAL;
  212. return sprintf(buf, "%u\n", sub_bus);
  213. }
  214. static DEVICE_ATTR_RO(subordinate_bus_number);
  215. static ssize_t ari_enabled_show(struct device *dev,
  216. struct device_attribute *attr,
  217. char *buf)
  218. {
  219. struct pci_dev *pci_dev = to_pci_dev(dev);
  220. return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
  221. }
  222. static DEVICE_ATTR_RO(ari_enabled);
  223. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  224. char *buf)
  225. {
  226. struct pci_dev *pci_dev = to_pci_dev(dev);
  227. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  228. pci_dev->vendor, pci_dev->device,
  229. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  230. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  231. (u8)(pci_dev->class));
  232. }
  233. static DEVICE_ATTR_RO(modalias);
  234. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  235. const char *buf, size_t count)
  236. {
  237. struct pci_dev *pdev = to_pci_dev(dev);
  238. unsigned long val;
  239. ssize_t result = kstrtoul(buf, 0, &val);
  240. if (result < 0)
  241. return result;
  242. /* this can crash the machine when done on the "wrong" device */
  243. if (!capable(CAP_SYS_ADMIN))
  244. return -EPERM;
  245. device_lock(dev);
  246. if (dev->driver)
  247. result = -EBUSY;
  248. else if (val)
  249. result = pci_enable_device(pdev);
  250. else if (pci_is_enabled(pdev))
  251. pci_disable_device(pdev);
  252. else
  253. result = -EIO;
  254. device_unlock(dev);
  255. return result < 0 ? result : count;
  256. }
  257. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  258. char *buf)
  259. {
  260. struct pci_dev *pdev;
  261. pdev = to_pci_dev(dev);
  262. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  263. }
  264. static DEVICE_ATTR_RW(enable);
  265. #ifdef CONFIG_NUMA
  266. static ssize_t numa_node_store(struct device *dev,
  267. struct device_attribute *attr, const char *buf,
  268. size_t count)
  269. {
  270. struct pci_dev *pdev = to_pci_dev(dev);
  271. int node, ret;
  272. if (!capable(CAP_SYS_ADMIN))
  273. return -EPERM;
  274. ret = kstrtoint(buf, 0, &node);
  275. if (ret)
  276. return ret;
  277. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  278. return -EINVAL;
  279. if (node != NUMA_NO_NODE && !node_online(node))
  280. return -EINVAL;
  281. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  282. pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  283. node);
  284. dev->numa_node = node;
  285. return count;
  286. }
  287. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  288. char *buf)
  289. {
  290. return sprintf(buf, "%d\n", dev->numa_node);
  291. }
  292. static DEVICE_ATTR_RW(numa_node);
  293. #endif
  294. static ssize_t dma_mask_bits_show(struct device *dev,
  295. struct device_attribute *attr, char *buf)
  296. {
  297. struct pci_dev *pdev = to_pci_dev(dev);
  298. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  299. }
  300. static DEVICE_ATTR_RO(dma_mask_bits);
  301. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  302. struct device_attribute *attr,
  303. char *buf)
  304. {
  305. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  306. }
  307. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  308. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  309. char *buf)
  310. {
  311. struct pci_dev *pdev = to_pci_dev(dev);
  312. struct pci_bus *subordinate = pdev->subordinate;
  313. return sprintf(buf, "%u\n", subordinate ?
  314. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  315. : !pdev->no_msi);
  316. }
  317. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  318. const char *buf, size_t count)
  319. {
  320. struct pci_dev *pdev = to_pci_dev(dev);
  321. struct pci_bus *subordinate = pdev->subordinate;
  322. unsigned long val;
  323. if (kstrtoul(buf, 0, &val) < 0)
  324. return -EINVAL;
  325. if (!capable(CAP_SYS_ADMIN))
  326. return -EPERM;
  327. /*
  328. * "no_msi" and "bus_flags" only affect what happens when a driver
  329. * requests MSI or MSI-X. They don't affect any drivers that have
  330. * already requested MSI or MSI-X.
  331. */
  332. if (!subordinate) {
  333. pdev->no_msi = !val;
  334. pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
  335. val ? "allowed" : "disallowed");
  336. return count;
  337. }
  338. if (val)
  339. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  340. else
  341. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  342. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  343. val ? "allowed" : "disallowed");
  344. return count;
  345. }
  346. static DEVICE_ATTR_RW(msi_bus);
  347. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  348. size_t count)
  349. {
  350. unsigned long val;
  351. struct pci_bus *b = NULL;
  352. if (kstrtoul(buf, 0, &val) < 0)
  353. return -EINVAL;
  354. if (val) {
  355. pci_lock_rescan_remove();
  356. while ((b = pci_find_next_bus(b)) != NULL)
  357. pci_rescan_bus(b);
  358. pci_unlock_rescan_remove();
  359. }
  360. return count;
  361. }
  362. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  363. static struct attribute *pci_bus_attrs[] = {
  364. &bus_attr_rescan.attr,
  365. NULL,
  366. };
  367. static const struct attribute_group pci_bus_group = {
  368. .attrs = pci_bus_attrs,
  369. };
  370. const struct attribute_group *pci_bus_groups[] = {
  371. &pci_bus_group,
  372. NULL,
  373. };
  374. static ssize_t dev_rescan_store(struct device *dev,
  375. struct device_attribute *attr, const char *buf,
  376. size_t count)
  377. {
  378. unsigned long val;
  379. struct pci_dev *pdev = to_pci_dev(dev);
  380. if (kstrtoul(buf, 0, &val) < 0)
  381. return -EINVAL;
  382. if (val) {
  383. pci_lock_rescan_remove();
  384. pci_rescan_bus(pdev->bus);
  385. pci_unlock_rescan_remove();
  386. }
  387. return count;
  388. }
  389. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  390. (S_IWUSR|S_IWGRP),
  391. NULL, dev_rescan_store);
  392. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  393. const char *buf, size_t count)
  394. {
  395. unsigned long val;
  396. if (kstrtoul(buf, 0, &val) < 0)
  397. return -EINVAL;
  398. if (val && device_remove_file_self(dev, attr))
  399. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  400. return count;
  401. }
  402. static struct device_attribute dev_remove_attr = __ATTR(remove,
  403. (S_IWUSR|S_IWGRP),
  404. NULL, remove_store);
  405. static ssize_t dev_bus_rescan_store(struct device *dev,
  406. struct device_attribute *attr,
  407. const char *buf, size_t count)
  408. {
  409. unsigned long val;
  410. struct pci_bus *bus = to_pci_bus(dev);
  411. if (kstrtoul(buf, 0, &val) < 0)
  412. return -EINVAL;
  413. if (val) {
  414. pci_lock_rescan_remove();
  415. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  416. pci_rescan_bus_bridge_resize(bus->self);
  417. else
  418. pci_rescan_bus(bus);
  419. pci_unlock_rescan_remove();
  420. }
  421. return count;
  422. }
  423. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  424. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  425. static ssize_t d3cold_allowed_store(struct device *dev,
  426. struct device_attribute *attr,
  427. const char *buf, size_t count)
  428. {
  429. struct pci_dev *pdev = to_pci_dev(dev);
  430. unsigned long val;
  431. if (kstrtoul(buf, 0, &val) < 0)
  432. return -EINVAL;
  433. pdev->d3cold_allowed = !!val;
  434. if (pdev->d3cold_allowed)
  435. pci_d3cold_enable(pdev);
  436. else
  437. pci_d3cold_disable(pdev);
  438. pm_runtime_resume(dev);
  439. return count;
  440. }
  441. static ssize_t d3cold_allowed_show(struct device *dev,
  442. struct device_attribute *attr, char *buf)
  443. {
  444. struct pci_dev *pdev = to_pci_dev(dev);
  445. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  446. }
  447. static DEVICE_ATTR_RW(d3cold_allowed);
  448. #endif
  449. #ifdef CONFIG_OF
  450. static ssize_t devspec_show(struct device *dev,
  451. struct device_attribute *attr, char *buf)
  452. {
  453. struct pci_dev *pdev = to_pci_dev(dev);
  454. struct device_node *np = pci_device_to_OF_node(pdev);
  455. if (np == NULL)
  456. return 0;
  457. return sprintf(buf, "%pOF", np);
  458. }
  459. static DEVICE_ATTR_RO(devspec);
  460. #endif
  461. #ifdef CONFIG_PCI_IOV
  462. static ssize_t sriov_totalvfs_show(struct device *dev,
  463. struct device_attribute *attr,
  464. char *buf)
  465. {
  466. struct pci_dev *pdev = to_pci_dev(dev);
  467. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  468. }
  469. static ssize_t sriov_numvfs_show(struct device *dev,
  470. struct device_attribute *attr,
  471. char *buf)
  472. {
  473. struct pci_dev *pdev = to_pci_dev(dev);
  474. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  475. }
  476. /*
  477. * num_vfs > 0; number of VFs to enable
  478. * num_vfs = 0; disable all VFs
  479. *
  480. * Note: SRIOV spec doesn't allow partial VF
  481. * disable, so it's all or none.
  482. */
  483. static ssize_t sriov_numvfs_store(struct device *dev,
  484. struct device_attribute *attr,
  485. const char *buf, size_t count)
  486. {
  487. struct pci_dev *pdev = to_pci_dev(dev);
  488. int ret;
  489. u16 num_vfs;
  490. ret = kstrtou16(buf, 0, &num_vfs);
  491. if (ret < 0)
  492. return ret;
  493. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  494. return -ERANGE;
  495. device_lock(&pdev->dev);
  496. if (num_vfs == pdev->sriov->num_VFs)
  497. goto exit;
  498. /* is PF driver loaded w/callback */
  499. if (!pdev->driver || !pdev->driver->sriov_configure) {
  500. pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
  501. ret = -ENOENT;
  502. goto exit;
  503. }
  504. if (num_vfs == 0) {
  505. /* disable VFs */
  506. ret = pdev->driver->sriov_configure(pdev, 0);
  507. goto exit;
  508. }
  509. /* enable VFs */
  510. if (pdev->sriov->num_VFs) {
  511. pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  512. pdev->sriov->num_VFs, num_vfs);
  513. ret = -EBUSY;
  514. goto exit;
  515. }
  516. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  517. if (ret < 0)
  518. goto exit;
  519. if (ret != num_vfs)
  520. pci_warn(pdev, "%d VFs requested; only %d enabled\n",
  521. num_vfs, ret);
  522. exit:
  523. device_unlock(&pdev->dev);
  524. if (ret < 0)
  525. return ret;
  526. return count;
  527. }
  528. static ssize_t sriov_offset_show(struct device *dev,
  529. struct device_attribute *attr,
  530. char *buf)
  531. {
  532. struct pci_dev *pdev = to_pci_dev(dev);
  533. return sprintf(buf, "%u\n", pdev->sriov->offset);
  534. }
  535. static ssize_t sriov_stride_show(struct device *dev,
  536. struct device_attribute *attr,
  537. char *buf)
  538. {
  539. struct pci_dev *pdev = to_pci_dev(dev);
  540. return sprintf(buf, "%u\n", pdev->sriov->stride);
  541. }
  542. static ssize_t sriov_vf_device_show(struct device *dev,
  543. struct device_attribute *attr,
  544. char *buf)
  545. {
  546. struct pci_dev *pdev = to_pci_dev(dev);
  547. return sprintf(buf, "%x\n", pdev->sriov->vf_device);
  548. }
  549. static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
  550. struct device_attribute *attr,
  551. char *buf)
  552. {
  553. struct pci_dev *pdev = to_pci_dev(dev);
  554. return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
  555. }
  556. static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
  557. struct device_attribute *attr,
  558. const char *buf, size_t count)
  559. {
  560. struct pci_dev *pdev = to_pci_dev(dev);
  561. bool drivers_autoprobe;
  562. if (kstrtobool(buf, &drivers_autoprobe) < 0)
  563. return -EINVAL;
  564. pdev->sriov->drivers_autoprobe = drivers_autoprobe;
  565. return count;
  566. }
  567. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  568. static struct device_attribute sriov_numvfs_attr =
  569. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  570. sriov_numvfs_show, sriov_numvfs_store);
  571. static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
  572. static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
  573. static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
  574. static struct device_attribute sriov_drivers_autoprobe_attr =
  575. __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
  576. sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
  577. #endif /* CONFIG_PCI_IOV */
  578. static ssize_t driver_override_store(struct device *dev,
  579. struct device_attribute *attr,
  580. const char *buf, size_t count)
  581. {
  582. struct pci_dev *pdev = to_pci_dev(dev);
  583. char *driver_override, *old, *cp;
  584. /* We need to keep extra room for a newline */
  585. if (count >= (PAGE_SIZE - 1))
  586. return -EINVAL;
  587. driver_override = kstrndup(buf, count, GFP_KERNEL);
  588. if (!driver_override)
  589. return -ENOMEM;
  590. cp = strchr(driver_override, '\n');
  591. if (cp)
  592. *cp = '\0';
  593. device_lock(dev);
  594. old = pdev->driver_override;
  595. if (strlen(driver_override)) {
  596. pdev->driver_override = driver_override;
  597. } else {
  598. kfree(driver_override);
  599. pdev->driver_override = NULL;
  600. }
  601. device_unlock(dev);
  602. kfree(old);
  603. return count;
  604. }
  605. static ssize_t driver_override_show(struct device *dev,
  606. struct device_attribute *attr, char *buf)
  607. {
  608. struct pci_dev *pdev = to_pci_dev(dev);
  609. ssize_t len;
  610. device_lock(dev);
  611. len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  612. device_unlock(dev);
  613. return len;
  614. }
  615. static DEVICE_ATTR_RW(driver_override);
  616. static struct attribute *pci_dev_attrs[] = {
  617. &dev_attr_resource.attr,
  618. &dev_attr_vendor.attr,
  619. &dev_attr_device.attr,
  620. &dev_attr_subsystem_vendor.attr,
  621. &dev_attr_subsystem_device.attr,
  622. &dev_attr_revision.attr,
  623. &dev_attr_class.attr,
  624. &dev_attr_irq.attr,
  625. &dev_attr_local_cpus.attr,
  626. &dev_attr_local_cpulist.attr,
  627. &dev_attr_modalias.attr,
  628. #ifdef CONFIG_NUMA
  629. &dev_attr_numa_node.attr,
  630. #endif
  631. &dev_attr_dma_mask_bits.attr,
  632. &dev_attr_consistent_dma_mask_bits.attr,
  633. &dev_attr_enable.attr,
  634. &dev_attr_broken_parity_status.attr,
  635. &dev_attr_msi_bus.attr,
  636. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  637. &dev_attr_d3cold_allowed.attr,
  638. #endif
  639. #ifdef CONFIG_OF
  640. &dev_attr_devspec.attr,
  641. #endif
  642. &dev_attr_driver_override.attr,
  643. &dev_attr_ari_enabled.attr,
  644. NULL,
  645. };
  646. static struct attribute *pci_bridge_attrs[] = {
  647. &dev_attr_subordinate_bus_number.attr,
  648. &dev_attr_secondary_bus_number.attr,
  649. NULL,
  650. };
  651. static struct attribute *pcie_dev_attrs[] = {
  652. &dev_attr_current_link_speed.attr,
  653. &dev_attr_current_link_width.attr,
  654. &dev_attr_max_link_width.attr,
  655. &dev_attr_max_link_speed.attr,
  656. NULL,
  657. };
  658. static struct attribute *pcibus_attrs[] = {
  659. &dev_attr_rescan.attr,
  660. &dev_attr_cpuaffinity.attr,
  661. &dev_attr_cpulistaffinity.attr,
  662. NULL,
  663. };
  664. static const struct attribute_group pcibus_group = {
  665. .attrs = pcibus_attrs,
  666. };
  667. const struct attribute_group *pcibus_groups[] = {
  668. &pcibus_group,
  669. NULL,
  670. };
  671. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  672. char *buf)
  673. {
  674. struct pci_dev *pdev = to_pci_dev(dev);
  675. struct pci_dev *vga_dev = vga_default_device();
  676. if (vga_dev)
  677. return sprintf(buf, "%u\n", (pdev == vga_dev));
  678. return sprintf(buf, "%u\n",
  679. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  680. IORESOURCE_ROM_SHADOW));
  681. }
  682. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  683. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  684. struct bin_attribute *bin_attr, char *buf,
  685. loff_t off, size_t count)
  686. {
  687. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  688. unsigned int size = 64;
  689. loff_t init_off = off;
  690. u8 *data = (u8 *) buf;
  691. /* Several chips lock up trying to read undefined config space */
  692. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  693. size = dev->cfg_size;
  694. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  695. size = 128;
  696. if (off > size)
  697. return 0;
  698. if (off + count > size) {
  699. size -= off;
  700. count = size;
  701. } else {
  702. size = count;
  703. }
  704. pci_config_pm_runtime_get(dev);
  705. if ((off & 1) && size) {
  706. u8 val;
  707. pci_user_read_config_byte(dev, off, &val);
  708. data[off - init_off] = val;
  709. off++;
  710. size--;
  711. }
  712. if ((off & 3) && size > 2) {
  713. u16 val;
  714. pci_user_read_config_word(dev, off, &val);
  715. data[off - init_off] = val & 0xff;
  716. data[off - init_off + 1] = (val >> 8) & 0xff;
  717. off += 2;
  718. size -= 2;
  719. }
  720. while (size > 3) {
  721. u32 val;
  722. pci_user_read_config_dword(dev, off, &val);
  723. data[off - init_off] = val & 0xff;
  724. data[off - init_off + 1] = (val >> 8) & 0xff;
  725. data[off - init_off + 2] = (val >> 16) & 0xff;
  726. data[off - init_off + 3] = (val >> 24) & 0xff;
  727. off += 4;
  728. size -= 4;
  729. }
  730. if (size >= 2) {
  731. u16 val;
  732. pci_user_read_config_word(dev, off, &val);
  733. data[off - init_off] = val & 0xff;
  734. data[off - init_off + 1] = (val >> 8) & 0xff;
  735. off += 2;
  736. size -= 2;
  737. }
  738. if (size > 0) {
  739. u8 val;
  740. pci_user_read_config_byte(dev, off, &val);
  741. data[off - init_off] = val;
  742. off++;
  743. --size;
  744. }
  745. pci_config_pm_runtime_put(dev);
  746. return count;
  747. }
  748. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  749. struct bin_attribute *bin_attr, char *buf,
  750. loff_t off, size_t count)
  751. {
  752. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  753. unsigned int size = count;
  754. loff_t init_off = off;
  755. u8 *data = (u8 *) buf;
  756. if (off > dev->cfg_size)
  757. return 0;
  758. if (off + count > dev->cfg_size) {
  759. size = dev->cfg_size - off;
  760. count = size;
  761. }
  762. pci_config_pm_runtime_get(dev);
  763. if ((off & 1) && size) {
  764. pci_user_write_config_byte(dev, off, data[off - init_off]);
  765. off++;
  766. size--;
  767. }
  768. if ((off & 3) && size > 2) {
  769. u16 val = data[off - init_off];
  770. val |= (u16) data[off - init_off + 1] << 8;
  771. pci_user_write_config_word(dev, off, val);
  772. off += 2;
  773. size -= 2;
  774. }
  775. while (size > 3) {
  776. u32 val = data[off - init_off];
  777. val |= (u32) data[off - init_off + 1] << 8;
  778. val |= (u32) data[off - init_off + 2] << 16;
  779. val |= (u32) data[off - init_off + 3] << 24;
  780. pci_user_write_config_dword(dev, off, val);
  781. off += 4;
  782. size -= 4;
  783. }
  784. if (size >= 2) {
  785. u16 val = data[off - init_off];
  786. val |= (u16) data[off - init_off + 1] << 8;
  787. pci_user_write_config_word(dev, off, val);
  788. off += 2;
  789. size -= 2;
  790. }
  791. if (size) {
  792. pci_user_write_config_byte(dev, off, data[off - init_off]);
  793. off++;
  794. --size;
  795. }
  796. pci_config_pm_runtime_put(dev);
  797. return count;
  798. }
  799. #ifdef HAVE_PCI_LEGACY
  800. /**
  801. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  802. * @filp: open sysfs file
  803. * @kobj: kobject corresponding to file to read from
  804. * @bin_attr: struct bin_attribute for this file
  805. * @buf: buffer to store results
  806. * @off: offset into legacy I/O port space
  807. * @count: number of bytes to read
  808. *
  809. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  810. * callback routine (pci_legacy_read).
  811. */
  812. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  813. struct bin_attribute *bin_attr, char *buf,
  814. loff_t off, size_t count)
  815. {
  816. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  817. /* Only support 1, 2 or 4 byte accesses */
  818. if (count != 1 && count != 2 && count != 4)
  819. return -EINVAL;
  820. return pci_legacy_read(bus, off, (u32 *)buf, count);
  821. }
  822. /**
  823. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  824. * @filp: open sysfs file
  825. * @kobj: kobject corresponding to file to read from
  826. * @bin_attr: struct bin_attribute for this file
  827. * @buf: buffer containing value to be written
  828. * @off: offset into legacy I/O port space
  829. * @count: number of bytes to write
  830. *
  831. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  832. * callback routine (pci_legacy_write).
  833. */
  834. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  835. struct bin_attribute *bin_attr, char *buf,
  836. loff_t off, size_t count)
  837. {
  838. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  839. /* Only support 1, 2 or 4 byte accesses */
  840. if (count != 1 && count != 2 && count != 4)
  841. return -EINVAL;
  842. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  843. }
  844. /**
  845. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  846. * @filp: open sysfs file
  847. * @kobj: kobject corresponding to device to be mapped
  848. * @attr: struct bin_attribute for this file
  849. * @vma: struct vm_area_struct passed to mmap
  850. *
  851. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  852. * legacy memory space (first meg of bus space) into application virtual
  853. * memory space.
  854. */
  855. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  856. struct bin_attribute *attr,
  857. struct vm_area_struct *vma)
  858. {
  859. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  860. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  861. }
  862. /**
  863. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  864. * @filp: open sysfs file
  865. * @kobj: kobject corresponding to device to be mapped
  866. * @attr: struct bin_attribute for this file
  867. * @vma: struct vm_area_struct passed to mmap
  868. *
  869. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  870. * legacy IO space (first meg of bus space) into application virtual
  871. * memory space. Returns -ENOSYS if the operation isn't supported
  872. */
  873. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  874. struct bin_attribute *attr,
  875. struct vm_area_struct *vma)
  876. {
  877. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  878. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  879. }
  880. /**
  881. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  882. * @b: bus to create files under
  883. * @mmap_type: I/O port or memory
  884. *
  885. * Stub implementation. Can be overridden by arch if necessary.
  886. */
  887. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  888. enum pci_mmap_state mmap_type)
  889. {
  890. }
  891. /**
  892. * pci_create_legacy_files - create legacy I/O port and memory files
  893. * @b: bus to create files under
  894. *
  895. * Some platforms allow access to legacy I/O port and ISA memory space on
  896. * a per-bus basis. This routine creates the files and ties them into
  897. * their associated read, write and mmap files from pci-sysfs.c
  898. *
  899. * On error unwind, but don't propagate the error to the caller
  900. * as it is ok to set up the PCI bus without these files.
  901. */
  902. void pci_create_legacy_files(struct pci_bus *b)
  903. {
  904. int error;
  905. b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
  906. GFP_ATOMIC);
  907. if (!b->legacy_io)
  908. goto kzalloc_err;
  909. sysfs_bin_attr_init(b->legacy_io);
  910. b->legacy_io->attr.name = "legacy_io";
  911. b->legacy_io->size = 0xffff;
  912. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  913. b->legacy_io->read = pci_read_legacy_io;
  914. b->legacy_io->write = pci_write_legacy_io;
  915. b->legacy_io->mmap = pci_mmap_legacy_io;
  916. pci_adjust_legacy_attr(b, pci_mmap_io);
  917. error = device_create_bin_file(&b->dev, b->legacy_io);
  918. if (error)
  919. goto legacy_io_err;
  920. /* Allocated above after the legacy_io struct */
  921. b->legacy_mem = b->legacy_io + 1;
  922. sysfs_bin_attr_init(b->legacy_mem);
  923. b->legacy_mem->attr.name = "legacy_mem";
  924. b->legacy_mem->size = 1024*1024;
  925. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  926. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  927. pci_adjust_legacy_attr(b, pci_mmap_mem);
  928. error = device_create_bin_file(&b->dev, b->legacy_mem);
  929. if (error)
  930. goto legacy_mem_err;
  931. return;
  932. legacy_mem_err:
  933. device_remove_bin_file(&b->dev, b->legacy_io);
  934. legacy_io_err:
  935. kfree(b->legacy_io);
  936. b->legacy_io = NULL;
  937. kzalloc_err:
  938. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  939. return;
  940. }
  941. void pci_remove_legacy_files(struct pci_bus *b)
  942. {
  943. if (b->legacy_io) {
  944. device_remove_bin_file(&b->dev, b->legacy_io);
  945. device_remove_bin_file(&b->dev, b->legacy_mem);
  946. kfree(b->legacy_io); /* both are allocated here */
  947. }
  948. }
  949. #endif /* HAVE_PCI_LEGACY */
  950. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  951. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  952. enum pci_mmap_api mmap_api)
  953. {
  954. unsigned long nr, start, size;
  955. resource_size_t pci_start = 0, pci_end;
  956. if (pci_resource_len(pdev, resno) == 0)
  957. return 0;
  958. nr = vma_pages(vma);
  959. start = vma->vm_pgoff;
  960. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  961. if (mmap_api == PCI_MMAP_PROCFS) {
  962. pci_resource_to_user(pdev, resno, &pdev->resource[resno],
  963. &pci_start, &pci_end);
  964. pci_start >>= PAGE_SHIFT;
  965. }
  966. if (start >= pci_start && start < pci_start + size &&
  967. start + nr <= pci_start + size)
  968. return 1;
  969. return 0;
  970. }
  971. /**
  972. * pci_mmap_resource - map a PCI resource into user memory space
  973. * @kobj: kobject for mapping
  974. * @attr: struct bin_attribute for the file being mapped
  975. * @vma: struct vm_area_struct passed into the mmap
  976. * @write_combine: 1 for write_combine mapping
  977. *
  978. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  979. */
  980. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  981. struct vm_area_struct *vma, int write_combine)
  982. {
  983. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  984. int bar = (unsigned long)attr->private;
  985. enum pci_mmap_state mmap_type;
  986. struct resource *res = &pdev->resource[bar];
  987. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  988. return -EINVAL;
  989. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
  990. return -EINVAL;
  991. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  992. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  993. }
  994. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  995. struct bin_attribute *attr,
  996. struct vm_area_struct *vma)
  997. {
  998. return pci_mmap_resource(kobj, attr, vma, 0);
  999. }
  1000. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  1001. struct bin_attribute *attr,
  1002. struct vm_area_struct *vma)
  1003. {
  1004. return pci_mmap_resource(kobj, attr, vma, 1);
  1005. }
  1006. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  1007. struct bin_attribute *attr, char *buf,
  1008. loff_t off, size_t count, bool write)
  1009. {
  1010. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1011. int bar = (unsigned long)attr->private;
  1012. unsigned long port = off;
  1013. port += pci_resource_start(pdev, bar);
  1014. if (port > pci_resource_end(pdev, bar))
  1015. return 0;
  1016. if (port + count - 1 > pci_resource_end(pdev, bar))
  1017. return -EINVAL;
  1018. switch (count) {
  1019. case 1:
  1020. if (write)
  1021. outb(*(u8 *)buf, port);
  1022. else
  1023. *(u8 *)buf = inb(port);
  1024. return 1;
  1025. case 2:
  1026. if (write)
  1027. outw(*(u16 *)buf, port);
  1028. else
  1029. *(u16 *)buf = inw(port);
  1030. return 2;
  1031. case 4:
  1032. if (write)
  1033. outl(*(u32 *)buf, port);
  1034. else
  1035. *(u32 *)buf = inl(port);
  1036. return 4;
  1037. }
  1038. return -EINVAL;
  1039. }
  1040. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  1041. struct bin_attribute *attr, char *buf,
  1042. loff_t off, size_t count)
  1043. {
  1044. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  1045. }
  1046. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  1047. struct bin_attribute *attr, char *buf,
  1048. loff_t off, size_t count)
  1049. {
  1050. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  1051. }
  1052. /**
  1053. * pci_remove_resource_files - cleanup resource files
  1054. * @pdev: dev to cleanup
  1055. *
  1056. * If we created resource files for @pdev, remove them from sysfs and
  1057. * free their resources.
  1058. */
  1059. static void pci_remove_resource_files(struct pci_dev *pdev)
  1060. {
  1061. int i;
  1062. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1063. struct bin_attribute *res_attr;
  1064. res_attr = pdev->res_attr[i];
  1065. if (res_attr) {
  1066. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1067. kfree(res_attr);
  1068. }
  1069. res_attr = pdev->res_attr_wc[i];
  1070. if (res_attr) {
  1071. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1072. kfree(res_attr);
  1073. }
  1074. }
  1075. }
  1076. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  1077. {
  1078. /* allocate attribute structure, piggyback attribute name */
  1079. int name_len = write_combine ? 13 : 10;
  1080. struct bin_attribute *res_attr;
  1081. char *res_attr_name;
  1082. int retval;
  1083. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  1084. if (!res_attr)
  1085. return -ENOMEM;
  1086. res_attr_name = (char *)(res_attr + 1);
  1087. sysfs_bin_attr_init(res_attr);
  1088. if (write_combine) {
  1089. pdev->res_attr_wc[num] = res_attr;
  1090. sprintf(res_attr_name, "resource%d_wc", num);
  1091. res_attr->mmap = pci_mmap_resource_wc;
  1092. } else {
  1093. pdev->res_attr[num] = res_attr;
  1094. sprintf(res_attr_name, "resource%d", num);
  1095. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  1096. res_attr->read = pci_read_resource_io;
  1097. res_attr->write = pci_write_resource_io;
  1098. if (arch_can_pci_mmap_io())
  1099. res_attr->mmap = pci_mmap_resource_uc;
  1100. } else {
  1101. res_attr->mmap = pci_mmap_resource_uc;
  1102. }
  1103. }
  1104. res_attr->attr.name = res_attr_name;
  1105. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  1106. res_attr->size = pci_resource_len(pdev, num);
  1107. res_attr->private = (void *)(unsigned long)num;
  1108. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  1109. if (retval)
  1110. kfree(res_attr);
  1111. return retval;
  1112. }
  1113. /**
  1114. * pci_create_resource_files - create resource files in sysfs for @dev
  1115. * @pdev: dev in question
  1116. *
  1117. * Walk the resources in @pdev creating files for each resource available.
  1118. */
  1119. static int pci_create_resource_files(struct pci_dev *pdev)
  1120. {
  1121. int i;
  1122. int retval;
  1123. /* Expose the PCI resources from this device as files */
  1124. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1125. /* skip empty resources */
  1126. if (!pci_resource_len(pdev, i))
  1127. continue;
  1128. retval = pci_create_attr(pdev, i, 0);
  1129. /* for prefetchable resources, create a WC mappable file */
  1130. if (!retval && arch_can_pci_mmap_wc() &&
  1131. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1132. retval = pci_create_attr(pdev, i, 1);
  1133. if (retval) {
  1134. pci_remove_resource_files(pdev);
  1135. return retval;
  1136. }
  1137. }
  1138. return 0;
  1139. }
  1140. #else /* !HAVE_PCI_MMAP */
  1141. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1142. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1143. #endif /* HAVE_PCI_MMAP */
  1144. /**
  1145. * pci_write_rom - used to enable access to the PCI ROM display
  1146. * @filp: sysfs file
  1147. * @kobj: kernel object handle
  1148. * @bin_attr: struct bin_attribute for this file
  1149. * @buf: user input
  1150. * @off: file offset
  1151. * @count: number of byte in input
  1152. *
  1153. * writing anything except 0 enables it
  1154. */
  1155. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1156. struct bin_attribute *bin_attr, char *buf,
  1157. loff_t off, size_t count)
  1158. {
  1159. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1160. if ((off == 0) && (*buf == '0') && (count == 2))
  1161. pdev->rom_attr_enabled = 0;
  1162. else
  1163. pdev->rom_attr_enabled = 1;
  1164. return count;
  1165. }
  1166. /**
  1167. * pci_read_rom - read a PCI ROM
  1168. * @filp: sysfs file
  1169. * @kobj: kernel object handle
  1170. * @bin_attr: struct bin_attribute for this file
  1171. * @buf: where to put the data we read from the ROM
  1172. * @off: file offset
  1173. * @count: number of bytes to read
  1174. *
  1175. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1176. * device corresponding to @kobj.
  1177. */
  1178. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1179. struct bin_attribute *bin_attr, char *buf,
  1180. loff_t off, size_t count)
  1181. {
  1182. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1183. void __iomem *rom;
  1184. size_t size;
  1185. if (!pdev->rom_attr_enabled)
  1186. return -EINVAL;
  1187. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1188. if (!rom || !size)
  1189. return -EIO;
  1190. if (off >= size)
  1191. count = 0;
  1192. else {
  1193. if (off + count > size)
  1194. count = size - off;
  1195. memcpy_fromio(buf, rom + off, count);
  1196. }
  1197. pci_unmap_rom(pdev, rom);
  1198. return count;
  1199. }
  1200. static const struct bin_attribute pci_config_attr = {
  1201. .attr = {
  1202. .name = "config",
  1203. .mode = S_IRUGO | S_IWUSR,
  1204. },
  1205. .size = PCI_CFG_SPACE_SIZE,
  1206. .read = pci_read_config,
  1207. .write = pci_write_config,
  1208. };
  1209. static const struct bin_attribute pcie_config_attr = {
  1210. .attr = {
  1211. .name = "config",
  1212. .mode = S_IRUGO | S_IWUSR,
  1213. },
  1214. .size = PCI_CFG_SPACE_EXP_SIZE,
  1215. .read = pci_read_config,
  1216. .write = pci_write_config,
  1217. };
  1218. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1219. const char *buf, size_t count)
  1220. {
  1221. struct pci_dev *pdev = to_pci_dev(dev);
  1222. unsigned long val;
  1223. ssize_t result = kstrtoul(buf, 0, &val);
  1224. if (result < 0)
  1225. return result;
  1226. if (val != 1)
  1227. return -EINVAL;
  1228. result = pci_reset_function(pdev);
  1229. if (result < 0)
  1230. return result;
  1231. return count;
  1232. }
  1233. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1234. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1235. {
  1236. int retval;
  1237. pcie_vpd_create_sysfs_dev_files(dev);
  1238. pcie_aspm_create_sysfs_dev_files(dev);
  1239. if (dev->reset_fn) {
  1240. retval = device_create_file(&dev->dev, &reset_attr);
  1241. if (retval)
  1242. goto error;
  1243. }
  1244. return 0;
  1245. error:
  1246. pcie_aspm_remove_sysfs_dev_files(dev);
  1247. pcie_vpd_remove_sysfs_dev_files(dev);
  1248. return retval;
  1249. }
  1250. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1251. {
  1252. int retval;
  1253. int rom_size;
  1254. struct bin_attribute *attr;
  1255. if (!sysfs_initialized)
  1256. return -EACCES;
  1257. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1258. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1259. else
  1260. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1261. if (retval)
  1262. goto err;
  1263. retval = pci_create_resource_files(pdev);
  1264. if (retval)
  1265. goto err_config_file;
  1266. /* If the device has a ROM, try to expose it in sysfs. */
  1267. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1268. if (rom_size) {
  1269. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1270. if (!attr) {
  1271. retval = -ENOMEM;
  1272. goto err_resource_files;
  1273. }
  1274. sysfs_bin_attr_init(attr);
  1275. attr->size = rom_size;
  1276. attr->attr.name = "rom";
  1277. attr->attr.mode = S_IRUSR | S_IWUSR;
  1278. attr->read = pci_read_rom;
  1279. attr->write = pci_write_rom;
  1280. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1281. if (retval) {
  1282. kfree(attr);
  1283. goto err_resource_files;
  1284. }
  1285. pdev->rom_attr = attr;
  1286. }
  1287. /* add sysfs entries for various capabilities */
  1288. retval = pci_create_capabilities_sysfs(pdev);
  1289. if (retval)
  1290. goto err_rom_file;
  1291. pci_create_firmware_label_files(pdev);
  1292. return 0;
  1293. err_rom_file:
  1294. if (pdev->rom_attr) {
  1295. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1296. kfree(pdev->rom_attr);
  1297. pdev->rom_attr = NULL;
  1298. }
  1299. err_resource_files:
  1300. pci_remove_resource_files(pdev);
  1301. err_config_file:
  1302. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1303. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1304. else
  1305. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1306. err:
  1307. return retval;
  1308. }
  1309. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1310. {
  1311. pcie_vpd_remove_sysfs_dev_files(dev);
  1312. pcie_aspm_remove_sysfs_dev_files(dev);
  1313. if (dev->reset_fn) {
  1314. device_remove_file(&dev->dev, &reset_attr);
  1315. dev->reset_fn = 0;
  1316. }
  1317. }
  1318. /**
  1319. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1320. * @pdev: device whose entries we should free
  1321. *
  1322. * Cleanup when @pdev is removed from sysfs.
  1323. */
  1324. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1325. {
  1326. if (!sysfs_initialized)
  1327. return;
  1328. pci_remove_capabilities_sysfs(pdev);
  1329. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1330. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1331. else
  1332. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1333. pci_remove_resource_files(pdev);
  1334. if (pdev->rom_attr) {
  1335. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1336. kfree(pdev->rom_attr);
  1337. pdev->rom_attr = NULL;
  1338. }
  1339. pci_remove_firmware_label_files(pdev);
  1340. }
  1341. static int __init pci_sysfs_init(void)
  1342. {
  1343. struct pci_dev *pdev = NULL;
  1344. int retval;
  1345. sysfs_initialized = 1;
  1346. for_each_pci_dev(pdev) {
  1347. retval = pci_create_sysfs_dev_files(pdev);
  1348. if (retval) {
  1349. pci_dev_put(pdev);
  1350. return retval;
  1351. }
  1352. }
  1353. return 0;
  1354. }
  1355. late_initcall(pci_sysfs_init);
  1356. static struct attribute *pci_dev_dev_attrs[] = {
  1357. &vga_attr.attr,
  1358. NULL,
  1359. };
  1360. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1361. struct attribute *a, int n)
  1362. {
  1363. struct device *dev = kobj_to_dev(kobj);
  1364. struct pci_dev *pdev = to_pci_dev(dev);
  1365. if (a == &vga_attr.attr)
  1366. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1367. return 0;
  1368. return a->mode;
  1369. }
  1370. static struct attribute *pci_dev_hp_attrs[] = {
  1371. &dev_remove_attr.attr,
  1372. &dev_rescan_attr.attr,
  1373. NULL,
  1374. };
  1375. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1376. struct attribute *a, int n)
  1377. {
  1378. struct device *dev = kobj_to_dev(kobj);
  1379. struct pci_dev *pdev = to_pci_dev(dev);
  1380. if (pdev->is_virtfn)
  1381. return 0;
  1382. return a->mode;
  1383. }
  1384. static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
  1385. struct attribute *a, int n)
  1386. {
  1387. struct device *dev = kobj_to_dev(kobj);
  1388. struct pci_dev *pdev = to_pci_dev(dev);
  1389. if (pci_is_bridge(pdev))
  1390. return a->mode;
  1391. return 0;
  1392. }
  1393. static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
  1394. struct attribute *a, int n)
  1395. {
  1396. struct device *dev = kobj_to_dev(kobj);
  1397. struct pci_dev *pdev = to_pci_dev(dev);
  1398. if (pci_is_pcie(pdev))
  1399. return a->mode;
  1400. return 0;
  1401. }
  1402. static const struct attribute_group pci_dev_group = {
  1403. .attrs = pci_dev_attrs,
  1404. };
  1405. const struct attribute_group *pci_dev_groups[] = {
  1406. &pci_dev_group,
  1407. NULL,
  1408. };
  1409. static const struct attribute_group pci_bridge_group = {
  1410. .attrs = pci_bridge_attrs,
  1411. };
  1412. const struct attribute_group *pci_bridge_groups[] = {
  1413. &pci_bridge_group,
  1414. NULL,
  1415. };
  1416. static const struct attribute_group pcie_dev_group = {
  1417. .attrs = pcie_dev_attrs,
  1418. };
  1419. const struct attribute_group *pcie_dev_groups[] = {
  1420. &pcie_dev_group,
  1421. NULL,
  1422. };
  1423. static const struct attribute_group pci_dev_hp_attr_group = {
  1424. .attrs = pci_dev_hp_attrs,
  1425. .is_visible = pci_dev_hp_attrs_are_visible,
  1426. };
  1427. #ifdef CONFIG_PCI_IOV
  1428. static struct attribute *sriov_dev_attrs[] = {
  1429. &sriov_totalvfs_attr.attr,
  1430. &sriov_numvfs_attr.attr,
  1431. &sriov_offset_attr.attr,
  1432. &sriov_stride_attr.attr,
  1433. &sriov_vf_device_attr.attr,
  1434. &sriov_drivers_autoprobe_attr.attr,
  1435. NULL,
  1436. };
  1437. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1438. struct attribute *a, int n)
  1439. {
  1440. struct device *dev = kobj_to_dev(kobj);
  1441. if (!dev_is_pf(dev))
  1442. return 0;
  1443. return a->mode;
  1444. }
  1445. static const struct attribute_group sriov_dev_attr_group = {
  1446. .attrs = sriov_dev_attrs,
  1447. .is_visible = sriov_attrs_are_visible,
  1448. };
  1449. #endif /* CONFIG_PCI_IOV */
  1450. static const struct attribute_group pci_dev_attr_group = {
  1451. .attrs = pci_dev_dev_attrs,
  1452. .is_visible = pci_dev_attrs_are_visible,
  1453. };
  1454. static const struct attribute_group pci_bridge_attr_group = {
  1455. .attrs = pci_bridge_attrs,
  1456. .is_visible = pci_bridge_attrs_are_visible,
  1457. };
  1458. static const struct attribute_group pcie_dev_attr_group = {
  1459. .attrs = pcie_dev_attrs,
  1460. .is_visible = pcie_dev_attrs_are_visible,
  1461. };
  1462. static const struct attribute_group *pci_dev_attr_groups[] = {
  1463. &pci_dev_attr_group,
  1464. &pci_dev_hp_attr_group,
  1465. #ifdef CONFIG_PCI_IOV
  1466. &sriov_dev_attr_group,
  1467. #endif
  1468. &pci_bridge_attr_group,
  1469. &pcie_dev_attr_group,
  1470. NULL,
  1471. };
  1472. const struct device_type pci_dev_type = {
  1473. .groups = pci_dev_attr_groups,
  1474. };