Kconfig 5.9 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. menu "DesignWare PCI Core Support"
  3. depends on PCI
  4. config PCIE_DW
  5. bool
  6. config PCIE_DW_HOST
  7. bool
  8. depends on PCI_MSI_IRQ_DOMAIN
  9. select PCIE_DW
  10. config PCIE_DW_EP
  11. bool
  12. depends on PCI_ENDPOINT
  13. select PCIE_DW
  14. config PCI_DRA7XX
  15. bool
  16. config PCI_DRA7XX_HOST
  17. bool "TI DRA7xx PCIe controller Host Mode"
  18. depends on SOC_DRA7XX || COMPILE_TEST
  19. depends on PCI_MSI_IRQ_DOMAIN
  20. depends on OF && HAS_IOMEM && TI_PIPE3
  21. select PCIE_DW_HOST
  22. select PCI_DRA7XX
  23. default y
  24. help
  25. Enables support for the PCIe controller in the DRA7xx SoC to work in
  26. host mode. There are two instances of PCIe controller in DRA7xx.
  27. This controller can work either as EP or RC. In order to enable
  28. host-specific features PCI_DRA7XX_HOST must be selected and in order
  29. to enable device-specific features PCI_DRA7XX_EP must be selected.
  30. This uses the DesignWare core.
  31. config PCI_DRA7XX_EP
  32. bool "TI DRA7xx PCIe controller Endpoint Mode"
  33. depends on SOC_DRA7XX || COMPILE_TEST
  34. depends on PCI_ENDPOINT
  35. depends on OF && HAS_IOMEM && TI_PIPE3
  36. select PCIE_DW_EP
  37. select PCI_DRA7XX
  38. help
  39. Enables support for the PCIe controller in the DRA7xx SoC to work in
  40. endpoint mode. There are two instances of PCIe controller in DRA7xx.
  41. This controller can work either as EP or RC. In order to enable
  42. host-specific features PCI_DRA7XX_HOST must be selected and in order
  43. to enable device-specific features PCI_DRA7XX_EP must be selected.
  44. This uses the DesignWare core.
  45. config PCIE_DW_PLAT
  46. bool
  47. config PCIE_DW_PLAT_HOST
  48. bool "Platform bus based DesignWare PCIe Controller - Host mode"
  49. depends on PCI && PCI_MSI_IRQ_DOMAIN
  50. select PCIE_DW_HOST
  51. select PCIE_DW_PLAT
  52. default y
  53. help
  54. Enables support for the PCIe controller in the Designware IP to
  55. work in host mode. There are two instances of PCIe controller in
  56. Designware IP.
  57. This controller can work either as EP or RC. In order to enable
  58. host-specific features PCIE_DW_PLAT_HOST must be selected and in
  59. order to enable device-specific features PCI_DW_PLAT_EP must be
  60. selected.
  61. config PCIE_DW_PLAT_EP
  62. bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
  63. depends on PCI && PCI_MSI_IRQ_DOMAIN
  64. depends on PCI_ENDPOINT
  65. select PCIE_DW_EP
  66. select PCIE_DW_PLAT
  67. help
  68. Enables support for the PCIe controller in the Designware IP to
  69. work in endpoint mode. There are two instances of PCIe controller
  70. in Designware IP.
  71. This controller can work either as EP or RC. In order to enable
  72. host-specific features PCIE_DW_PLAT_HOST must be selected and in
  73. order to enable device-specific features PCI_DW_PLAT_EP must be
  74. selected.
  75. config PCI_EXYNOS
  76. bool "Samsung Exynos PCIe controller"
  77. depends on SOC_EXYNOS5440 || COMPILE_TEST
  78. depends on PCI_MSI_IRQ_DOMAIN
  79. select PCIE_DW_HOST
  80. config PCI_IMX6
  81. bool "Freescale i.MX6 PCIe controller"
  82. depends on SOC_IMX6Q || (ARM && COMPILE_TEST)
  83. depends on PCI_MSI_IRQ_DOMAIN
  84. select PCIE_DW_HOST
  85. config PCIE_SPEAR13XX
  86. bool "STMicroelectronics SPEAr PCIe controller"
  87. depends on ARCH_SPEAR13XX || COMPILE_TEST
  88. depends on PCI_MSI_IRQ_DOMAIN
  89. select PCIE_DW_HOST
  90. help
  91. Say Y here if you want PCIe support on SPEAr13XX SoCs.
  92. config PCI_KEYSTONE
  93. bool "TI Keystone PCIe controller"
  94. depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
  95. depends on PCI_MSI_IRQ_DOMAIN
  96. select PCIE_DW_HOST
  97. help
  98. Say Y here if you want to enable PCI controller support on Keystone
  99. SoCs. The PCI controller on Keystone is based on DesignWare hardware
  100. and therefore the driver re-uses the DesignWare core functions to
  101. implement the driver.
  102. config PCI_LAYERSCAPE
  103. bool "Freescale Layerscape PCIe controller"
  104. depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
  105. depends on PCI_MSI_IRQ_DOMAIN
  106. select MFD_SYSCON
  107. select PCIE_DW_HOST
  108. help
  109. Say Y here if you want PCIe controller support on Layerscape SoCs.
  110. config PCI_HISI
  111. depends on OF && (ARM64 || COMPILE_TEST)
  112. bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
  113. depends on PCI_MSI_IRQ_DOMAIN
  114. select PCIE_DW_HOST
  115. select PCI_HOST_COMMON
  116. help
  117. Say Y here if you want PCIe controller support on HiSilicon
  118. Hip05 and Hip06 SoCs
  119. config PCIE_QCOM
  120. bool "Qualcomm PCIe controller"
  121. depends on OF && (ARCH_QCOM || COMPILE_TEST)
  122. depends on PCI_MSI_IRQ_DOMAIN
  123. select PCIE_DW_HOST
  124. help
  125. Say Y here to enable PCIe controller support on Qualcomm SoCs. The
  126. PCIe controller uses the DesignWare core plus Qualcomm-specific
  127. hardware wrappers.
  128. config PCIE_ARMADA_8K
  129. bool "Marvell Armada-8K PCIe controller"
  130. depends on ARCH_MVEBU || COMPILE_TEST
  131. depends on PCI_MSI_IRQ_DOMAIN
  132. select PCIE_DW_HOST
  133. help
  134. Say Y here if you want to enable PCIe controller support on
  135. Armada-8K SoCs. The PCIe controller on Armada-8K is based on
  136. DesignWare hardware and therefore the driver re-uses the
  137. DesignWare core functions to implement the driver.
  138. config PCIE_ARTPEC6
  139. bool
  140. config PCIE_ARTPEC6_HOST
  141. bool "Axis ARTPEC-6 PCIe controller Host Mode"
  142. depends on MACH_ARTPEC6 || COMPILE_TEST
  143. depends on PCI_MSI_IRQ_DOMAIN
  144. select PCIE_DW_HOST
  145. select PCIE_ARTPEC6
  146. help
  147. Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
  148. host mode. This uses the DesignWare core.
  149. config PCIE_ARTPEC6_EP
  150. bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
  151. depends on MACH_ARTPEC6 || COMPILE_TEST
  152. depends on PCI_ENDPOINT
  153. select PCIE_DW_EP
  154. select PCIE_ARTPEC6
  155. help
  156. Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
  157. endpoint mode. This uses the DesignWare core.
  158. config PCIE_KIRIN
  159. depends on OF && (ARM64 || COMPILE_TEST)
  160. bool "HiSilicon Kirin series SoCs PCIe controllers"
  161. depends on PCI_MSI_IRQ_DOMAIN
  162. select PCIE_DW_HOST
  163. help
  164. Say Y here if you want PCIe controller support
  165. on HiSilicon Kirin series SoCs.
  166. config PCIE_HISI_STB
  167. bool "HiSilicon STB SoCs PCIe controllers"
  168. depends on ARCH_HISI || COMPILE_TEST
  169. depends on PCI_MSI_IRQ_DOMAIN
  170. select PCIE_DW_HOST
  171. help
  172. Say Y here if you want PCIe controller support on HiSilicon STB SoCs
  173. endmenu