rs.h 20 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2017 Intel Deutschland GmbH
  10. * Copyright(c) 2018 Intel Corporation
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called COPYING.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <linuxwifi@intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. * BSD LICENSE
  29. *
  30. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  31. * Copyright(c) 2017 Intel Deutschland GmbH
  32. * Copyright(c) 2018 Intel Corporation
  33. * All rights reserved.
  34. *
  35. * Redistribution and use in source and binary forms, with or without
  36. * modification, are permitted provided that the following conditions
  37. * are met:
  38. *
  39. * * Redistributions of source code must retain the above copyright
  40. * notice, this list of conditions and the following disclaimer.
  41. * * Redistributions in binary form must reproduce the above copyright
  42. * notice, this list of conditions and the following disclaimer in
  43. * the documentation and/or other materials provided with the
  44. * distribution.
  45. * * Neither the name Intel Corporation nor the names of its
  46. * contributors may be used to endorse or promote products derived
  47. * from this software without specific prior written permission.
  48. *
  49. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  50. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  51. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  52. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  53. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  54. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  55. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  56. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  57. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  58. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  59. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60. *****************************************************************************/
  61. #ifndef __iwl_fw_api_rs_h__
  62. #define __iwl_fw_api_rs_h__
  63. #include "mac.h"
  64. /**
  65. * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
  66. * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC
  67. * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC
  68. */
  69. enum iwl_tlc_mng_cfg_flags {
  70. IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0),
  71. IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1),
  72. };
  73. /**
  74. * enum iwl_tlc_mng_cfg_cw - channel width options
  75. * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
  76. * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
  77. * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
  78. * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
  79. * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value
  80. */
  81. enum iwl_tlc_mng_cfg_cw {
  82. IWL_TLC_MNG_CH_WIDTH_20MHZ,
  83. IWL_TLC_MNG_CH_WIDTH_40MHZ,
  84. IWL_TLC_MNG_CH_WIDTH_80MHZ,
  85. IWL_TLC_MNG_CH_WIDTH_160MHZ,
  86. IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ,
  87. };
  88. /**
  89. * enum iwl_tlc_mng_cfg_chains - possible chains
  90. * @IWL_TLC_MNG_CHAIN_A_MSK: chain A
  91. * @IWL_TLC_MNG_CHAIN_B_MSK: chain B
  92. */
  93. enum iwl_tlc_mng_cfg_chains {
  94. IWL_TLC_MNG_CHAIN_A_MSK = BIT(0),
  95. IWL_TLC_MNG_CHAIN_B_MSK = BIT(1),
  96. };
  97. /**
  98. * enum iwl_tlc_mng_cfg_mode - supported modes
  99. * @IWL_TLC_MNG_MODE_CCK: enable CCK
  100. * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT)
  101. * @IWL_TLC_MNG_MODE_NON_HT: enable non HT
  102. * @IWL_TLC_MNG_MODE_HT: enable HT
  103. * @IWL_TLC_MNG_MODE_VHT: enable VHT
  104. * @IWL_TLC_MNG_MODE_HE: enable HE
  105. * @IWL_TLC_MNG_MODE_INVALID: invalid value
  106. * @IWL_TLC_MNG_MODE_NUM: a count of possible modes
  107. */
  108. enum iwl_tlc_mng_cfg_mode {
  109. IWL_TLC_MNG_MODE_CCK = 0,
  110. IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK,
  111. IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK,
  112. IWL_TLC_MNG_MODE_HT,
  113. IWL_TLC_MNG_MODE_VHT,
  114. IWL_TLC_MNG_MODE_HE,
  115. IWL_TLC_MNG_MODE_INVALID,
  116. IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID,
  117. };
  118. /**
  119. * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates
  120. * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0
  121. * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1
  122. * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2
  123. * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3
  124. * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4
  125. * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5
  126. * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6
  127. * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7
  128. * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8
  129. * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9
  130. * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10
  131. * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11
  132. * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT
  133. */
  134. enum iwl_tlc_mng_ht_rates {
  135. IWL_TLC_MNG_HT_RATE_MCS0 = 0,
  136. IWL_TLC_MNG_HT_RATE_MCS1,
  137. IWL_TLC_MNG_HT_RATE_MCS2,
  138. IWL_TLC_MNG_HT_RATE_MCS3,
  139. IWL_TLC_MNG_HT_RATE_MCS4,
  140. IWL_TLC_MNG_HT_RATE_MCS5,
  141. IWL_TLC_MNG_HT_RATE_MCS6,
  142. IWL_TLC_MNG_HT_RATE_MCS7,
  143. IWL_TLC_MNG_HT_RATE_MCS8,
  144. IWL_TLC_MNG_HT_RATE_MCS9,
  145. IWL_TLC_MNG_HT_RATE_MCS10,
  146. IWL_TLC_MNG_HT_RATE_MCS11,
  147. IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11,
  148. };
  149. /* Maximum supported tx antennas number */
  150. #define MAX_NSS 2
  151. /**
  152. * struct tlc_config_cmd - TLC configuration
  153. * @sta_id: station id
  154. * @reserved1: reserved
  155. * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw
  156. * @mode: &enum iwl_tlc_mng_cfg_mode
  157. * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains
  158. * @amsdu: TX amsdu is supported
  159. * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags
  160. * @non_ht_rates: bitmap of supported legacy rates
  161. * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width>
  162. * pair (0 - 80mhz width and below, 1 - 160mhz).
  163. * @max_mpdu_len: max MPDU length, in bytes
  164. * @sgi_ch_width_supp: bitmap of SGI support per channel width
  165. * use BIT(@enum iwl_tlc_mng_cfg_cw)
  166. * @reserved2: reserved
  167. */
  168. struct iwl_tlc_config_cmd {
  169. u8 sta_id;
  170. u8 reserved1[3];
  171. u8 max_ch_width;
  172. u8 mode;
  173. u8 chains;
  174. u8 amsdu;
  175. __le16 flags;
  176. __le16 non_ht_rates;
  177. __le16 ht_rates[MAX_NSS][2];
  178. __le16 max_mpdu_len;
  179. u8 sgi_ch_width_supp;
  180. u8 reserved2[1];
  181. } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_2 */
  182. /**
  183. * enum iwl_tlc_update_flags - updated fields
  184. * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update
  185. * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update
  186. */
  187. enum iwl_tlc_update_flags {
  188. IWL_TLC_NOTIF_FLAG_RATE = BIT(0),
  189. IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1),
  190. };
  191. /**
  192. * struct iwl_tlc_update_notif - TLC notification from FW
  193. * @sta_id: station id
  194. * @reserved: reserved
  195. * @flags: bitmap of notifications reported
  196. * @rate: current initial rate
  197. * @amsdu_size: Max AMSDU size, in bytes
  198. * @amsdu_enabled: bitmap for per-TID AMSDU enablement
  199. */
  200. struct iwl_tlc_update_notif {
  201. u8 sta_id;
  202. u8 reserved[3];
  203. __le32 flags;
  204. __le32 rate;
  205. __le32 amsdu_size;
  206. __le32 amsdu_enabled;
  207. } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */
  208. /**
  209. * enum iwl_tlc_debug_flags - debug options
  210. * @IWL_TLC_DEBUG_FIXED_RATE: set fixed rate for rate scaling
  211. * @IWL_TLC_DEBUG_STATS_TH: threshold for sending statistics to the driver, in
  212. * frames
  213. * @IWL_TLC_DEBUG_STATS_TIME_TH: threshold for sending statistics to the
  214. * driver, in msec
  215. * @IWL_TLC_DEBUG_AGG_TIME_LIM: time limit for a BA session
  216. * @IWL_TLC_DEBUG_AGG_DIS_START_TH: frame with try-count greater than this
  217. * threshold should not start an aggregation session
  218. * @IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM: set max number of frames in an aggregation
  219. * @IWL_TLC_DEBUG_RENEW_ADDBA_DELAY: delay between retries of ADD BA
  220. * @IWL_TLC_DEBUG_START_AC_RATE_IDX: frames per second to start a BA session
  221. * @IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK: disable BW scaling
  222. */
  223. enum iwl_tlc_debug_flags {
  224. IWL_TLC_DEBUG_FIXED_RATE,
  225. IWL_TLC_DEBUG_STATS_TH,
  226. IWL_TLC_DEBUG_STATS_TIME_TH,
  227. IWL_TLC_DEBUG_AGG_TIME_LIM,
  228. IWL_TLC_DEBUG_AGG_DIS_START_TH,
  229. IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM,
  230. IWL_TLC_DEBUG_RENEW_ADDBA_DELAY,
  231. IWL_TLC_DEBUG_START_AC_RATE_IDX,
  232. IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK,
  233. }; /* TLC_MNG_DEBUG_FLAGS_API_E_VER_1 */
  234. /**
  235. * struct iwl_dhc_tlc_dbg - fixed debug config
  236. * @sta_id: bit 0 - enable/disable, bits 1 - 7 hold station id
  237. * @reserved1: reserved
  238. * @flags: bitmap of %IWL_TLC_DEBUG_\*
  239. * @fixed_rate: rate value
  240. * @stats_threshold: if number of tx-ed frames is greater, send statistics
  241. * @time_threshold: statistics threshold in usec
  242. * @agg_time_lim: max agg time
  243. * @agg_dis_start_threshold: frames with try-cont greater than this count will
  244. * not be aggregated
  245. * @agg_frame_count_lim: agg size
  246. * @addba_retry_delay: delay between retries of ADD BA
  247. * @start_ac_rate_idx: frames per second to start a BA session
  248. * @no_far_range_tweak: disable BW scaling
  249. * @reserved2: reserved
  250. */
  251. struct iwl_dhc_tlc_cmd {
  252. u8 sta_id;
  253. u8 reserved1[3];
  254. __le32 flags;
  255. __le32 fixed_rate;
  256. __le16 stats_threshold;
  257. __le16 time_threshold;
  258. __le16 agg_time_lim;
  259. __le16 agg_dis_start_threshold;
  260. __le16 agg_frame_count_lim;
  261. __le16 addba_retry_delay;
  262. u8 start_ac_rate_idx[IEEE80211_NUM_ACS];
  263. u8 no_far_range_tweak;
  264. u8 reserved2[3];
  265. } __packed;
  266. /*
  267. * These serve as indexes into
  268. * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
  269. * TODO: avoid overlap between legacy and HT rates
  270. */
  271. enum {
  272. IWL_RATE_1M_INDEX = 0,
  273. IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
  274. IWL_RATE_2M_INDEX,
  275. IWL_RATE_5M_INDEX,
  276. IWL_RATE_11M_INDEX,
  277. IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
  278. IWL_RATE_6M_INDEX,
  279. IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
  280. IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
  281. IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
  282. IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
  283. IWL_RATE_9M_INDEX,
  284. IWL_RATE_12M_INDEX,
  285. IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
  286. IWL_RATE_18M_INDEX,
  287. IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
  288. IWL_RATE_24M_INDEX,
  289. IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
  290. IWL_RATE_36M_INDEX,
  291. IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
  292. IWL_RATE_48M_INDEX,
  293. IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
  294. IWL_RATE_54M_INDEX,
  295. IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
  296. IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
  297. IWL_RATE_60M_INDEX,
  298. IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
  299. IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
  300. IWL_RATE_MCS_8_INDEX,
  301. IWL_RATE_MCS_9_INDEX,
  302. IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
  303. IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
  304. IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1,
  305. };
  306. #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
  307. /* fw API values for legacy bit rates, both OFDM and CCK */
  308. enum {
  309. IWL_RATE_6M_PLCP = 13,
  310. IWL_RATE_9M_PLCP = 15,
  311. IWL_RATE_12M_PLCP = 5,
  312. IWL_RATE_18M_PLCP = 7,
  313. IWL_RATE_24M_PLCP = 9,
  314. IWL_RATE_36M_PLCP = 11,
  315. IWL_RATE_48M_PLCP = 1,
  316. IWL_RATE_54M_PLCP = 3,
  317. IWL_RATE_1M_PLCP = 10,
  318. IWL_RATE_2M_PLCP = 20,
  319. IWL_RATE_5M_PLCP = 55,
  320. IWL_RATE_11M_PLCP = 110,
  321. IWL_RATE_INVM_PLCP = -1,
  322. };
  323. /*
  324. * rate_n_flags bit fields
  325. *
  326. * The 32-bit value has different layouts in the low 8 bites depending on the
  327. * format. There are three formats, HT, VHT and legacy (11abg, with subformats
  328. * for CCK and OFDM).
  329. *
  330. * High-throughput (HT) rate format
  331. * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
  332. * Very High-throughput (VHT) rate format
  333. * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
  334. * Legacy OFDM rate format for bits 7:0
  335. * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
  336. * Legacy CCK rate format for bits 7:0:
  337. * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
  338. */
  339. /* Bit 8: (1) HT format, (0) legacy or VHT format */
  340. #define RATE_MCS_HT_POS 8
  341. #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)
  342. /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
  343. #define RATE_MCS_CCK_POS 9
  344. #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)
  345. /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
  346. #define RATE_MCS_VHT_POS 26
  347. #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)
  348. /*
  349. * High-throughput (HT) rate format for bits 7:0
  350. *
  351. * 2-0: MCS rate base
  352. * 0) 6 Mbps
  353. * 1) 12 Mbps
  354. * 2) 18 Mbps
  355. * 3) 24 Mbps
  356. * 4) 36 Mbps
  357. * 5) 48 Mbps
  358. * 6) 54 Mbps
  359. * 7) 60 Mbps
  360. * 4-3: 0) Single stream (SISO)
  361. * 1) Dual stream (MIMO)
  362. * 2) Triple stream (MIMO)
  363. * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
  364. * (bits 7-6 are zero)
  365. *
  366. * Together the low 5 bits work out to the MCS index because we don't
  367. * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
  368. * streams and 16-23 have three streams. We could also support MCS 32
  369. * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
  370. */
  371. #define RATE_HT_MCS_RATE_CODE_MSK 0x7
  372. #define RATE_HT_MCS_NSS_POS 3
  373. #define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS)
  374. /* Bit 10: (1) Use Green Field preamble */
  375. #define RATE_HT_MCS_GF_POS 10
  376. #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS)
  377. #define RATE_HT_MCS_INDEX_MSK 0x3f
  378. /*
  379. * Very High-throughput (VHT) rate format for bits 7:0
  380. *
  381. * 3-0: VHT MCS (0-9)
  382. * 5-4: number of streams - 1:
  383. * 0) Single stream (SISO)
  384. * 1) Dual stream (MIMO)
  385. * 2) Triple stream (MIMO)
  386. */
  387. /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
  388. #define RATE_VHT_MCS_RATE_CODE_MSK 0xf
  389. #define RATE_VHT_MCS_NSS_POS 4
  390. #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS)
  391. /*
  392. * Legacy OFDM rate format for bits 7:0
  393. *
  394. * 3-0: 0xD) 6 Mbps
  395. * 0xF) 9 Mbps
  396. * 0x5) 12 Mbps
  397. * 0x7) 18 Mbps
  398. * 0x9) 24 Mbps
  399. * 0xB) 36 Mbps
  400. * 0x1) 48 Mbps
  401. * 0x3) 54 Mbps
  402. * (bits 7-4 are 0)
  403. *
  404. * Legacy CCK rate format for bits 7:0:
  405. * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
  406. *
  407. * 6-0: 10) 1 Mbps
  408. * 20) 2 Mbps
  409. * 55) 5.5 Mbps
  410. * 110) 11 Mbps
  411. * (bit 7 is 0)
  412. */
  413. #define RATE_LEGACY_RATE_MSK 0xff
  414. /* Bit 10 - OFDM HE */
  415. #define RATE_MCS_OFDM_HE_POS 10
  416. #define RATE_MCS_OFDM_HE_MSK BIT(RATE_MCS_OFDM_HE_POS)
  417. /*
  418. * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
  419. * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
  420. */
  421. #define RATE_MCS_CHAN_WIDTH_POS 11
  422. #define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS)
  423. #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS)
  424. #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS)
  425. #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS)
  426. #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS)
  427. /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
  428. #define RATE_MCS_SGI_POS 13
  429. #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
  430. /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
  431. #define RATE_MCS_ANT_POS 14
  432. #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS)
  433. #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
  434. #define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS)
  435. #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \
  436. RATE_MCS_ANT_B_MSK)
  437. #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \
  438. RATE_MCS_ANT_C_MSK)
  439. #define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK
  440. /* Bit 17: (0) SS, (1) SS*2 */
  441. #define RATE_MCS_STBC_POS 17
  442. #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS)
  443. /* Bit 18: OFDM-HE dual carrier mode */
  444. #define RATE_HE_DUAL_CARRIER_MODE 18
  445. #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE)
  446. /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
  447. #define RATE_MCS_BF_POS 19
  448. #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS)
  449. /*
  450. * Bit 20-21: HE guard interval and LTF type.
  451. * (0) 1xLTF+1.6us, (1) 2xLTF+0.8us,
  452. * (2) 2xLTF+1.6us, (3) 4xLTF+3.2us
  453. */
  454. #define RATE_MCS_HE_GI_LTF_POS 20
  455. #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS)
  456. /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
  457. #define RATE_MCS_HE_TYPE_POS 22
  458. #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS)
  459. /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
  460. #define RATE_MCS_DUP_POS 24
  461. #define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS)
  462. /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
  463. #define RATE_MCS_LDPC_POS 27
  464. #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
  465. /* Link Quality definitions */
  466. /* # entries in rate scale table to support Tx retries */
  467. #define LQ_MAX_RETRY_NUM 16
  468. /* Link quality command flags bit fields */
  469. /* Bit 0: (0) Don't use RTS (1) Use RTS */
  470. #define LQ_FLAG_USE_RTS_POS 0
  471. #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS)
  472. /* Bit 1-3: LQ command color. Used to match responses to LQ commands */
  473. #define LQ_FLAG_COLOR_POS 1
  474. #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS)
  475. #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\
  476. LQ_FLAG_COLOR_POS)
  477. #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
  478. LQ_FLAG_COLOR_MSK)
  479. #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK))
  480. /* Bit 4-5: Tx RTS BW Signalling
  481. * (0) No RTS BW signalling
  482. * (1) Static BW signalling
  483. * (2) Dynamic BW signalling
  484. */
  485. #define LQ_FLAG_RTS_BW_SIG_POS 4
  486. #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS)
  487. #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS)
  488. #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS)
  489. /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
  490. * Dyanmic BW selection allows Tx with narrower BW then requested in rates
  491. */
  492. #define LQ_FLAG_DYNAMIC_BW_POS 6
  493. #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS)
  494. /* Single Stream Tx Parameters (lq_cmd->ss_params)
  495. * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
  496. * used for single stream Tx.
  497. */
  498. /* Bit 0-1: Max STBC streams allowed. Can be 0-3.
  499. * (0) - No STBC allowed
  500. * (1) - 2x1 STBC allowed (HT/VHT)
  501. * (2) - 4x2 STBC allowed (HT/VHT)
  502. * (3) - 3x2 STBC allowed (HT only)
  503. * All our chips are at most 2 antennas so only (1) is valid for now.
  504. */
  505. #define LQ_SS_STBC_ALLOWED_POS 0
  506. #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK)
  507. /* 2x1 STBC is allowed */
  508. #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS)
  509. /* Bit 2: Beamformer (VHT only) is allowed */
  510. #define LQ_SS_BFER_ALLOWED_POS 2
  511. #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS)
  512. /* Bit 3: Force BFER or STBC for testing
  513. * If this is set:
  514. * If BFER is allowed then force the ucode to choose BFER else
  515. * If STBC is allowed then force the ucode to choose STBC over SISO
  516. */
  517. #define LQ_SS_FORCE_POS 3
  518. #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS)
  519. /* Bit 31: ss_params field is valid. Used for FW backward compatibility
  520. * with other drivers which don't support the ss_params API yet
  521. */
  522. #define LQ_SS_PARAMS_VALID_POS 31
  523. #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS)
  524. /**
  525. * struct iwl_lq_cmd - link quality command
  526. * @sta_id: station to update
  527. * @reduced_tpc: reduced transmit power control value
  528. * @control: not used
  529. * @flags: combination of LQ_FLAG_*
  530. * @mimo_delim: the first SISO index in rs_table, which separates MIMO
  531. * and SISO rates
  532. * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
  533. * Should be ANT_[ABC]
  534. * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
  535. * @initial_rate_index: first index from rs_table per AC category
  536. * @agg_time_limit: aggregation max time threshold in usec/100, meaning
  537. * value of 100 is one usec. Range is 100 to 8000
  538. * @agg_disable_start_th: try-count threshold for starting aggregation.
  539. * If a frame has higher try-count, it should not be selected for
  540. * starting an aggregation sequence.
  541. * @agg_frame_cnt_limit: max frame count in an aggregation.
  542. * 0: no limit
  543. * 1: no aggregation (one frame per aggregation)
  544. * 2 - 0x3f: maximal number of frames (up to 3f == 63)
  545. * @reserved2: reserved
  546. * @rs_table: array of rates for each TX try, each is rate_n_flags,
  547. * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
  548. * @ss_params: single stream features. declare whether STBC or BFER are allowed.
  549. */
  550. struct iwl_lq_cmd {
  551. u8 sta_id;
  552. u8 reduced_tpc;
  553. __le16 control;
  554. /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
  555. u8 flags;
  556. u8 mimo_delim;
  557. u8 single_stream_ant_msk;
  558. u8 dual_stream_ant_msk;
  559. u8 initial_rate_index[AC_NUM];
  560. /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
  561. __le16 agg_time_limit;
  562. u8 agg_disable_start_th;
  563. u8 agg_frame_cnt_limit;
  564. __le32 reserved2;
  565. __le32 rs_table[LQ_MAX_RETRY_NUM];
  566. __le32 ss_params;
  567. }; /* LINK_QUALITY_CMD_API_S_VER_1 */
  568. #endif /* __iwl_fw_api_rs_h__ */