wil6210.h 39 KB

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  1. /*
  2. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef __WIL6210_H__
  18. #define __WIL6210_H__
  19. #include <linux/etherdevice.h>
  20. #include <linux/netdevice.h>
  21. #include <linux/wireless.h>
  22. #include <net/cfg80211.h>
  23. #include <linux/timex.h>
  24. #include <linux/types.h>
  25. #include "wmi.h"
  26. #include "wil_platform.h"
  27. #include "fw.h"
  28. extern bool no_fw_recovery;
  29. extern unsigned int mtu_max;
  30. extern unsigned short rx_ring_overflow_thrsh;
  31. extern int agg_wsize;
  32. extern bool rx_align_2;
  33. extern bool rx_large_buf;
  34. extern bool debug_fw;
  35. extern bool disable_ap_sme;
  36. #define WIL_NAME "wil6210"
  37. #define WIL_FW_NAME_DEFAULT "wil6210.fw"
  38. #define WIL_FW_NAME_FTM_DEFAULT "wil6210_ftm.fw"
  39. #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw"
  40. #define WIL_FW_NAME_FTM_SPARROW_PLUS "wil6210_sparrow_plus_ftm.fw"
  41. #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */
  42. #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */
  43. #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
  44. /* maximum number of virtual interfaces the driver supports
  45. * (including the main interface)
  46. */
  47. #define WIL_MAX_VIFS 4
  48. /**
  49. * extract bits [@b0:@b1] (inclusive) from the value @x
  50. * it should be @b0 <= @b1, or result is incorrect
  51. */
  52. static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
  53. {
  54. return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
  55. }
  56. #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL)
  57. #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL)
  58. #define WIL_TX_Q_LEN_DEFAULT (4000)
  59. #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
  60. #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
  61. #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7)
  62. #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */
  63. /* limit ring size in range [32..32k] */
  64. #define WIL_RING_SIZE_ORDER_MIN (5)
  65. #define WIL_RING_SIZE_ORDER_MAX (15)
  66. #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
  67. #define WIL6210_MAX_CID (8) /* HW limit */
  68. #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
  69. #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */
  70. #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */
  71. /* Hardware offload block adds the following:
  72. * 26 bytes - 3-address QoS data header
  73. * 8 bytes - IV + EIV (for GCMP)
  74. * 8 bytes - SNAP
  75. * 16 bytes - MIC (for GCMP)
  76. * 4 bytes - CRC
  77. */
  78. #define WIL_MAX_MPDU_OVERHEAD (62)
  79. struct wil_suspend_count_stats {
  80. unsigned long successful_suspends;
  81. unsigned long successful_resumes;
  82. unsigned long failed_suspends;
  83. unsigned long failed_resumes;
  84. };
  85. struct wil_suspend_stats {
  86. struct wil_suspend_count_stats r_off;
  87. struct wil_suspend_count_stats r_on;
  88. unsigned long rejected_by_device; /* only radio on */
  89. unsigned long rejected_by_host;
  90. };
  91. /* Calculate MAC buffer size for the firmware. It includes all overhead,
  92. * as it will go over the air, and need to be 8 byte aligned
  93. */
  94. static inline u32 wil_mtu2macbuf(u32 mtu)
  95. {
  96. return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8);
  97. }
  98. /* MTU for Ethernet need to take into account 8-byte SNAP header
  99. * to be added when encapsulating Ethernet frame into 802.11
  100. */
  101. #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8)
  102. /* Max supported by wil6210 value for interrupt threshold is 5sec. */
  103. #define WIL6210_ITR_TRSH_MAX (5000000)
  104. #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
  105. #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
  106. #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
  107. #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
  108. #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
  109. #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
  110. #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
  111. #define WIL6210_DISCONNECT_TO_MS (2000)
  112. #define WIL6210_RX_HIGH_TRSH_INIT (0)
  113. #define WIL6210_RX_HIGH_TRSH_DEFAULT \
  114. (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3))
  115. #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see
  116. * 802.11REVmc/D5.0, section 9.4.1.8)
  117. */
  118. /* Hardware definitions begin */
  119. /*
  120. * Mapping
  121. * RGF File | Host addr | FW addr
  122. * | |
  123. * user_rgf | 0x000000 | 0x880000
  124. * dma_rgf | 0x001000 | 0x881000
  125. * pcie_rgf | 0x002000 | 0x882000
  126. * | |
  127. */
  128. /* Where various structures placed in host address space */
  129. #define WIL6210_FW_HOST_OFF (0x880000UL)
  130. #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
  131. /*
  132. * Interrupt control registers block
  133. *
  134. * each interrupt controlled by the same bit in all registers
  135. */
  136. struct RGF_ICR {
  137. u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
  138. u32 ICR; /* Cause, W1C/COR depending on ICC */
  139. u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
  140. u32 ICS; /* Cause Set, WO */
  141. u32 IMV; /* Mask, RW+S/C */
  142. u32 IMS; /* Mask Set, write 1 to set */
  143. u32 IMC; /* Mask Clear, write 1 to clear */
  144. } __packed;
  145. /* registers - FW addresses */
  146. #define RGF_USER_USAGE_1 (0x880004)
  147. #define RGF_USER_USAGE_6 (0x880018)
  148. #define BIT_USER_OOB_MODE BIT(31)
  149. #define BIT_USER_OOB_R2_MODE BIT(30)
  150. #define RGF_USER_USAGE_8 (0x880020)
  151. #define BIT_USER_PREVENT_DEEP_SLEEP BIT(0)
  152. #define BIT_USER_SUPPORT_T_POWER_ON_0 BIT(1)
  153. #define BIT_USER_EXT_CLK BIT(2)
  154. #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
  155. #define HW_MACHINE_BOOT_DONE (0x3fffffd)
  156. #define RGF_USER_USER_CPU_0 (0x8801e0)
  157. #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
  158. #define RGF_USER_CPU_PC (0x8801e8)
  159. #define RGF_USER_MAC_CPU_0 (0x8801fc)
  160. #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
  161. #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
  162. #define RGF_USER_BL (0x880A3C) /* Boot Loader */
  163. #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
  164. #define RGF_USER_FW_CALIB_RESULT (0x880a90) /* b0-7:result
  165. * b8-15:signature
  166. */
  167. #define CALIB_RESULT_SIGNATURE (0x11)
  168. #define RGF_USER_CLKS_CTL_0 (0x880abc)
  169. #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
  170. #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
  171. #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
  172. #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
  173. #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
  174. #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
  175. #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
  176. #define BIT_HPAL_PERST_FROM_PAD BIT(6)
  177. #define BIT_CAR_PERST_RST BIT(7)
  178. #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
  179. #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
  180. #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
  181. #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
  182. #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
  183. #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
  184. #define RGF_USER_OTP_HW_RD_MACHINE_1 (0x880ce0)
  185. #define BIT_NO_FLASH_INDICATION BIT(8)
  186. #define RGF_USER_XPM_IFC_RD_TIME1 (0x880cec)
  187. #define RGF_USER_XPM_IFC_RD_TIME2 (0x880cf0)
  188. #define RGF_USER_XPM_IFC_RD_TIME3 (0x880cf4)
  189. #define RGF_USER_XPM_IFC_RD_TIME4 (0x880cf8)
  190. #define RGF_USER_XPM_IFC_RD_TIME5 (0x880cfc)
  191. #define RGF_USER_XPM_IFC_RD_TIME6 (0x880d00)
  192. #define RGF_USER_XPM_IFC_RD_TIME7 (0x880d04)
  193. #define RGF_USER_XPM_IFC_RD_TIME8 (0x880d08)
  194. #define RGF_USER_XPM_IFC_RD_TIME9 (0x880d0c)
  195. #define RGF_USER_XPM_IFC_RD_TIME10 (0x880d10)
  196. #define RGF_USER_XPM_RD_DOUT_SAMPLE_TIME (0x880d64)
  197. #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
  198. #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
  199. #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
  200. #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
  201. #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
  202. #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
  203. #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
  204. #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
  205. #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
  206. #define BIT_DMA_EP_MISC_ICR_HALP BIT(27)
  207. #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
  208. /* Legacy interrupt moderation control (before Sparrow v2)*/
  209. #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
  210. #define RGF_DMA_ITR_CNT_DATA (0x881c60)
  211. #define RGF_DMA_ITR_CNT_CRL (0x881c64)
  212. #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
  213. #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
  214. #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
  215. #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
  216. #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
  217. /* Offload control (Sparrow B0+) */
  218. #define RGF_DMA_OFUL_NID_0 (0x881cd4)
  219. #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0)
  220. #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1)
  221. #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2)
  222. #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3)
  223. /* New (sparrow v2+) interrupt moderation control */
  224. #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40)
  225. #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34)
  226. #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38)
  227. #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c)
  228. #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0)
  229. #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1)
  230. #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2)
  231. #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3)
  232. #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4)
  233. #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5)
  234. #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6)
  235. #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60)
  236. #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64)
  237. #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68)
  238. #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0)
  239. #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
  240. #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2)
  241. #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3)
  242. #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
  243. #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50)
  244. #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44)
  245. #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48)
  246. #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c)
  247. #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0)
  248. #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1)
  249. #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2)
  250. #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3)
  251. #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4)
  252. #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5)
  253. #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6)
  254. #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54)
  255. #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58)
  256. #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c)
  257. #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0)
  258. #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
  259. #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2)
  260. #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3)
  261. #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
  262. #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
  263. #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
  264. #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
  265. #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
  266. #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
  267. #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
  268. #define RGF_HP_CTRL (0x88265c)
  269. #define RGF_PAL_UNIT_ICR (0x88266c) /* struct RGF_ICR */
  270. #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
  271. /* MAC timer, usec, for packet lifetime */
  272. #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
  273. #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
  274. #define RGF_CAF_OSC_CONTROL (0x88afa4)
  275. #define BIT_CAF_OSC_XTAL_EN BIT(0)
  276. #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
  277. #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
  278. #define USER_EXT_USER_PMU_3 (0x88d00c)
  279. #define BIT_PMU_DEVICE_RDY BIT(0)
  280. #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
  281. #define JTAG_DEV_ID_SPARROW (0x2632072f)
  282. #define JTAG_DEV_ID_TALYN (0x7e0e1)
  283. #define RGF_USER_REVISION_ID (0x88afe4)
  284. #define RGF_USER_REVISION_ID_MASK (3)
  285. #define REVISION_ID_SPARROW_B0 (0x0)
  286. #define REVISION_ID_SPARROW_D0 (0x3)
  287. #define RGF_OTP_MAC (0x8a0620)
  288. /* crash codes for FW/Ucode stored here */
  289. /* ASSERT RGFs */
  290. #define SPARROW_RGF_FW_ASSERT_CODE (0x91f020)
  291. #define SPARROW_RGF_UCODE_ASSERT_CODE (0x91f028)
  292. #define TALYN_RGF_FW_ASSERT_CODE (0xa37020)
  293. #define TALYN_RGF_UCODE_ASSERT_CODE (0xa37028)
  294. enum {
  295. HW_VER_UNKNOWN,
  296. HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */
  297. HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */
  298. HW_VER_TALYN, /* JTAG_DEV_ID_TALYN */
  299. };
  300. /* popular locations */
  301. #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD
  302. #define HOST_MBOX HOSTADDR(RGF_MBOX)
  303. #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
  304. /* ISR register bits */
  305. #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
  306. #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
  307. #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
  308. #define WIL_DATA_COMPLETION_TO_MS 200
  309. /* Hardware definitions end */
  310. #define SPARROW_FW_MAPPING_TABLE_SIZE 10
  311. #define TALYN_FW_MAPPING_TABLE_SIZE 13
  312. #define MAX_FW_MAPPING_TABLE_SIZE 13
  313. struct fw_map {
  314. u32 from; /* linker address - from, inclusive */
  315. u32 to; /* linker address - to, exclusive */
  316. u32 host; /* PCI/Host address - BAR0 + 0x880000 */
  317. const char *name; /* for debugfs */
  318. bool fw; /* true if FW mapping, false if UCODE mapping */
  319. };
  320. /* array size should be in sync with actual definition in the wmi.c */
  321. extern const struct fw_map sparrow_fw_mapping[SPARROW_FW_MAPPING_TABLE_SIZE];
  322. extern const struct fw_map sparrow_d0_mac_rgf_ext;
  323. extern const struct fw_map talyn_fw_mapping[TALYN_FW_MAPPING_TABLE_SIZE];
  324. extern struct fw_map fw_mapping[MAX_FW_MAPPING_TABLE_SIZE];
  325. /**
  326. * mk_cidxtid - construct @cidxtid field
  327. * @cid: CID value
  328. * @tid: TID value
  329. *
  330. * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
  331. */
  332. static inline u8 mk_cidxtid(u8 cid, u8 tid)
  333. {
  334. return ((tid & 0xf) << 4) | (cid & 0xf);
  335. }
  336. /**
  337. * parse_cidxtid - parse @cidxtid field
  338. * @cid: store CID value here
  339. * @tid: store TID value here
  340. *
  341. * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
  342. */
  343. static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
  344. {
  345. *cid = cidxtid & 0xf;
  346. *tid = (cidxtid >> 4) & 0xf;
  347. }
  348. struct wil6210_mbox_ring {
  349. u32 base;
  350. u16 entry_size; /* max. size of mbox entry, incl. all headers */
  351. u16 size;
  352. u32 tail;
  353. u32 head;
  354. } __packed;
  355. struct wil6210_mbox_ring_desc {
  356. __le32 sync;
  357. __le32 addr;
  358. } __packed;
  359. /* at HOST_OFF_WIL6210_MBOX_CTL */
  360. struct wil6210_mbox_ctl {
  361. struct wil6210_mbox_ring tx;
  362. struct wil6210_mbox_ring rx;
  363. } __packed;
  364. struct wil6210_mbox_hdr {
  365. __le16 seq;
  366. __le16 len; /* payload, bytes after this header */
  367. __le16 type;
  368. u8 flags;
  369. u8 reserved;
  370. } __packed;
  371. #define WIL_MBOX_HDR_TYPE_WMI (0)
  372. /* max. value for wil6210_mbox_hdr.len */
  373. #define MAX_MBOXITEM_SIZE (240)
  374. struct pending_wmi_event {
  375. struct list_head list;
  376. struct {
  377. struct wil6210_mbox_hdr hdr;
  378. struct wmi_cmd_hdr wmi;
  379. u8 data[0];
  380. } __packed event;
  381. };
  382. enum { /* for wil_ctx.mapped_as */
  383. wil_mapped_as_none = 0,
  384. wil_mapped_as_single = 1,
  385. wil_mapped_as_page = 2,
  386. };
  387. /**
  388. * struct wil_ctx - software context for Vring descriptor
  389. */
  390. struct wil_ctx {
  391. struct sk_buff *skb;
  392. u8 nr_frags;
  393. u8 mapped_as;
  394. };
  395. union vring_desc;
  396. struct vring {
  397. dma_addr_t pa;
  398. volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
  399. u16 size; /* number of vring_desc elements */
  400. u32 swtail;
  401. u32 swhead;
  402. u32 hwtail; /* write here to inform hw */
  403. struct wil_ctx *ctx; /* ctx[size] - software context */
  404. };
  405. /**
  406. * Additional data for Tx Vring
  407. */
  408. struct vring_tx_data {
  409. bool dot1x_open;
  410. int enabled;
  411. cycles_t idle, last_idle, begin;
  412. u8 agg_wsize; /* agreed aggregation window, 0 - no agg */
  413. u16 agg_timeout;
  414. u8 agg_amsdu;
  415. bool addba_in_progress; /* if set, agg_xxx is for request in progress */
  416. u8 mid;
  417. spinlock_t lock;
  418. };
  419. enum { /* for wil6210_priv.status */
  420. wil_status_fwready = 0, /* FW operational */
  421. wil_status_dontscan,
  422. wil_status_mbox_ready, /* MBOX structures ready */
  423. wil_status_irqen, /* interrupts enabled - for debug */
  424. wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
  425. wil_status_resetting, /* reset in progress */
  426. wil_status_suspending, /* suspend in progress */
  427. wil_status_suspended, /* suspend completed, device is suspended */
  428. wil_status_resuming, /* resume in progress */
  429. wil_status_collecting_dumps, /* crashdump collection in progress */
  430. wil_status_last /* keep last */
  431. };
  432. struct pci_dev;
  433. /**
  434. * struct tid_ampdu_rx - TID aggregation information (Rx).
  435. *
  436. * @reorder_buf: buffer to reorder incoming aggregated MPDUs
  437. * @last_rx: jiffies of last rx activity
  438. * @head_seq_num: head sequence number in reordering buffer.
  439. * @stored_mpdu_num: number of MPDUs in reordering buffer
  440. * @ssn: Starting Sequence Number expected to be aggregated.
  441. * @buf_size: buffer size for incoming A-MPDUs
  442. * @ssn_last_drop: SSN of the last dropped frame
  443. * @total: total number of processed incoming frames
  444. * @drop_dup: duplicate frames dropped for this reorder buffer
  445. * @drop_old: old frames dropped for this reorder buffer
  446. * @first_time: true when this buffer used 1-st time
  447. */
  448. struct wil_tid_ampdu_rx {
  449. struct sk_buff **reorder_buf;
  450. unsigned long last_rx;
  451. u16 head_seq_num;
  452. u16 stored_mpdu_num;
  453. u16 ssn;
  454. u16 buf_size;
  455. u16 ssn_last_drop;
  456. unsigned long long total; /* frames processed */
  457. unsigned long long drop_dup;
  458. unsigned long long drop_old;
  459. bool first_time; /* is it 1-st time this buffer used? */
  460. };
  461. /**
  462. * struct wil_tid_crypto_rx_single - TID crypto information (Rx).
  463. *
  464. * @pn: GCMP PN for the session
  465. * @key_set: valid key present
  466. */
  467. struct wil_tid_crypto_rx_single {
  468. u8 pn[IEEE80211_GCMP_PN_LEN];
  469. bool key_set;
  470. };
  471. struct wil_tid_crypto_rx {
  472. struct wil_tid_crypto_rx_single key_id[4];
  473. };
  474. struct wil_p2p_info {
  475. struct ieee80211_channel listen_chan;
  476. u8 discovery_started;
  477. u64 cookie;
  478. struct wireless_dev *pending_listen_wdev;
  479. unsigned int listen_duration;
  480. struct timer_list discovery_timer; /* listen/search duration */
  481. struct work_struct discovery_expired_work; /* listen/search expire */
  482. struct work_struct delayed_listen_work; /* listen after scan done */
  483. };
  484. enum wil_sta_status {
  485. wil_sta_unused = 0,
  486. wil_sta_conn_pending = 1,
  487. wil_sta_connected = 2,
  488. };
  489. #define WIL_STA_TID_NUM (16)
  490. #define WIL_MCS_MAX (12) /* Maximum MCS supported */
  491. struct wil_net_stats {
  492. unsigned long rx_packets;
  493. unsigned long tx_packets;
  494. unsigned long rx_bytes;
  495. unsigned long tx_bytes;
  496. unsigned long tx_errors;
  497. unsigned long rx_dropped;
  498. unsigned long rx_non_data_frame;
  499. unsigned long rx_short_frame;
  500. unsigned long rx_large_frame;
  501. unsigned long rx_replay;
  502. u16 last_mcs_rx;
  503. u64 rx_per_mcs[WIL_MCS_MAX + 1];
  504. };
  505. /**
  506. * struct wil_sta_info - data for peer
  507. *
  508. * Peer identified by its CID (connection ID)
  509. * NIC performs beam forming for each peer;
  510. * if no beam forming done, frame exchange is not
  511. * possible.
  512. */
  513. struct wil_sta_info {
  514. u8 addr[ETH_ALEN];
  515. u8 mid;
  516. enum wil_sta_status status;
  517. struct wil_net_stats stats;
  518. /* Rx BACK */
  519. struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
  520. spinlock_t tid_rx_lock; /* guarding tid_rx array */
  521. unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
  522. unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
  523. struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM];
  524. struct wil_tid_crypto_rx group_crypto_rx;
  525. u8 aid; /* 1-254; 0 if unknown/not reported */
  526. };
  527. enum {
  528. fw_recovery_idle = 0,
  529. fw_recovery_pending = 1,
  530. fw_recovery_running = 2,
  531. };
  532. enum {
  533. hw_capa_no_flash,
  534. hw_capa_last
  535. };
  536. struct wil_probe_client_req {
  537. struct list_head list;
  538. u64 cookie;
  539. u8 cid;
  540. };
  541. struct pmc_ctx {
  542. /* alloc, free, and read operations must own the lock */
  543. struct mutex lock;
  544. struct vring_tx_desc *pring_va;
  545. dma_addr_t pring_pa;
  546. struct desc_alloc_info *descriptors;
  547. int last_cmd_status;
  548. int num_descriptors;
  549. int descriptor_size;
  550. };
  551. struct wil_halp {
  552. struct mutex lock; /* protect halp ref_cnt */
  553. unsigned int ref_cnt;
  554. struct completion comp;
  555. };
  556. struct wil_blob_wrapper {
  557. struct wil6210_priv *wil;
  558. struct debugfs_blob_wrapper blob;
  559. };
  560. #define WIL_LED_MAX_ID (2)
  561. #define WIL_LED_INVALID_ID (0xF)
  562. #define WIL_LED_BLINK_ON_SLOW_MS (300)
  563. #define WIL_LED_BLINK_OFF_SLOW_MS (300)
  564. #define WIL_LED_BLINK_ON_MED_MS (200)
  565. #define WIL_LED_BLINK_OFF_MED_MS (200)
  566. #define WIL_LED_BLINK_ON_FAST_MS (100)
  567. #define WIL_LED_BLINK_OFF_FAST_MS (100)
  568. enum {
  569. WIL_LED_TIME_SLOW = 0,
  570. WIL_LED_TIME_MED,
  571. WIL_LED_TIME_FAST,
  572. WIL_LED_TIME_LAST,
  573. };
  574. struct blink_on_off_time {
  575. u32 on_ms;
  576. u32 off_ms;
  577. };
  578. struct wil_debugfs_iomem_data {
  579. void *offset;
  580. struct wil6210_priv *wil;
  581. };
  582. struct wil_debugfs_data {
  583. struct wil_debugfs_iomem_data *data_arr;
  584. int iomem_data_count;
  585. };
  586. extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST];
  587. extern u8 led_id;
  588. extern u8 led_polarity;
  589. enum wil6210_vif_status {
  590. wil_vif_fwconnecting,
  591. wil_vif_fwconnected,
  592. wil_vif_status_last /* keep last */
  593. };
  594. struct wil6210_vif {
  595. struct wireless_dev wdev;
  596. struct net_device *ndev;
  597. struct wil6210_priv *wil;
  598. u8 mid;
  599. DECLARE_BITMAP(status, wil_vif_status_last);
  600. u32 privacy; /* secure connection? */
  601. u16 channel; /* relevant in AP mode */
  602. u8 hidden_ssid; /* relevant in AP mode */
  603. u32 ap_isolate; /* no intra-BSS communication */
  604. bool pbss;
  605. int bcast_vring;
  606. struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */
  607. int locally_generated_disc; /* relevant in STA mode */
  608. struct timer_list connect_timer;
  609. struct work_struct disconnect_worker;
  610. /* scan */
  611. struct cfg80211_scan_request *scan_request;
  612. struct timer_list scan_timer; /* detect scan timeout */
  613. struct wil_p2p_info p2p;
  614. /* keep alive */
  615. struct list_head probe_client_pending;
  616. struct mutex probe_client_mutex; /* protect @probe_client_pending */
  617. struct work_struct probe_client_worker;
  618. int net_queue_stopped; /* netif_tx_stop_all_queues invoked */
  619. };
  620. struct wil6210_priv {
  621. struct pci_dev *pdev;
  622. u32 bar_size;
  623. struct wiphy *wiphy;
  624. struct net_device *main_ndev;
  625. void __iomem *csr;
  626. DECLARE_BITMAP(status, wil_status_last);
  627. u8 fw_version[ETHTOOL_FWVERS_LEN];
  628. u32 hw_version;
  629. u8 chip_revision;
  630. const char *hw_name;
  631. const char *wil_fw_name;
  632. char *board_file;
  633. u32 brd_file_addr;
  634. u32 brd_file_max_size;
  635. DECLARE_BITMAP(hw_capa, hw_capa_last);
  636. DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX);
  637. DECLARE_BITMAP(platform_capa, WIL_PLATFORM_CAPA_MAX);
  638. u32 recovery_count; /* num of FW recovery attempts in a short time */
  639. u32 recovery_state; /* FW recovery state machine */
  640. unsigned long last_fw_recovery; /* jiffies of last fw recovery */
  641. wait_queue_head_t wq; /* for all wait_event() use */
  642. u8 max_vifs; /* maximum number of interfaces, including main */
  643. struct wil6210_vif *vifs[WIL_MAX_VIFS];
  644. struct mutex vif_mutex; /* protects access to VIF entries */
  645. atomic_t connected_vifs;
  646. /* profile */
  647. struct cfg80211_chan_def monitor_chandef;
  648. u32 monitor_flags;
  649. int sinfo_gen;
  650. /* interrupt moderation */
  651. u32 tx_max_burst_duration;
  652. u32 tx_interframe_timeout;
  653. u32 rx_max_burst_duration;
  654. u32 rx_interframe_timeout;
  655. /* cached ISR registers */
  656. u32 isr_misc;
  657. /* mailbox related */
  658. struct mutex wmi_mutex;
  659. struct wil6210_mbox_ctl mbox_ctl;
  660. struct completion wmi_ready;
  661. struct completion wmi_call;
  662. u16 wmi_seq;
  663. u16 reply_id; /**< wait for this WMI event */
  664. u8 reply_mid;
  665. void *reply_buf;
  666. u16 reply_size;
  667. struct workqueue_struct *wmi_wq; /* for deferred calls */
  668. struct work_struct wmi_event_worker;
  669. struct workqueue_struct *wq_service;
  670. struct work_struct fw_error_worker; /* for FW error recovery */
  671. struct list_head pending_wmi_ev;
  672. /*
  673. * protect pending_wmi_ev
  674. * - fill in IRQ from wil6210_irq_misc,
  675. * - consumed in thread by wmi_event_worker
  676. */
  677. spinlock_t wmi_ev_lock;
  678. spinlock_t net_queue_lock; /* guarding stop/wake netif queue */
  679. struct napi_struct napi_rx;
  680. struct napi_struct napi_tx;
  681. struct net_device napi_ndev; /* dummy net_device serving all VIFs */
  682. /* DMA related */
  683. struct vring vring_rx;
  684. unsigned int rx_buf_len;
  685. struct vring vring_tx[WIL6210_MAX_TX_RINGS];
  686. struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
  687. u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
  688. struct wil_sta_info sta[WIL6210_MAX_CID];
  689. u32 vring_idle_trsh; /* HW fetches up to 16 descriptors at once */
  690. u32 dma_addr_size; /* indicates dma addr size */
  691. struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
  692. /* statistics */
  693. atomic_t isr_count_rx, isr_count_tx;
  694. /* debugfs */
  695. struct dentry *debug;
  696. struct wil_blob_wrapper blobs[MAX_FW_MAPPING_TABLE_SIZE];
  697. u8 discovery_mode;
  698. u8 abft_len;
  699. u8 wakeup_trigger;
  700. struct wil_suspend_stats suspend_stats;
  701. struct wil_debugfs_data dbg_data;
  702. void *platform_handle;
  703. struct wil_platform_ops platform_ops;
  704. bool keep_radio_on_during_sleep;
  705. struct pmc_ctx pmc;
  706. u8 p2p_dev_started;
  707. /* P2P_DEVICE vif */
  708. struct wireless_dev *p2p_wdev;
  709. struct wireless_dev *radio_wdev;
  710. /* High Access Latency Policy voting */
  711. struct wil_halp halp;
  712. enum wmi_ps_profile_type ps_profile;
  713. int fw_calib_result;
  714. struct notifier_block pm_notify;
  715. bool suspend_resp_rcvd;
  716. bool suspend_resp_comp;
  717. u32 bus_request_kbps;
  718. u32 bus_request_kbps_pre_suspend;
  719. u32 rgf_fw_assert_code_addr;
  720. u32 rgf_ucode_assert_code_addr;
  721. u32 iccm_base;
  722. };
  723. #define wil_to_wiphy(i) (i->wiphy)
  724. #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
  725. #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
  726. #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
  727. #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
  728. #define ndev_to_vif(n) (struct wil6210_vif *)(netdev_priv(n))
  729. #define vif_to_wil(v) (v->wil)
  730. #define vif_to_ndev(v) (v->ndev)
  731. #define vif_to_wdev(v) (&v->wdev)
  732. static inline struct wil6210_vif *wdev_to_vif(struct wil6210_priv *wil,
  733. struct wireless_dev *wdev)
  734. {
  735. /* main interface is shared with P2P device */
  736. if (wdev == wil->p2p_wdev)
  737. return ndev_to_vif(wil->main_ndev);
  738. else
  739. return container_of(wdev, struct wil6210_vif, wdev);
  740. }
  741. static inline struct wireless_dev *
  742. vif_to_radio_wdev(struct wil6210_priv *wil, struct wil6210_vif *vif)
  743. {
  744. /* main interface is shared with P2P device */
  745. if (vif->mid)
  746. return vif_to_wdev(vif);
  747. else
  748. return wil->radio_wdev;
  749. }
  750. __printf(2, 3)
  751. void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
  752. __printf(2, 3)
  753. void __wil_err(struct wil6210_priv *wil, const char *fmt, ...);
  754. __printf(2, 3)
  755. void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...);
  756. __printf(2, 3)
  757. void __wil_info(struct wil6210_priv *wil, const char *fmt, ...);
  758. __printf(2, 3)
  759. void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...);
  760. #define wil_dbg(wil, fmt, arg...) do { \
  761. netdev_dbg(wil->main_ndev, fmt, ##arg); \
  762. wil_dbg_trace(wil, fmt, ##arg); \
  763. } while (0)
  764. #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
  765. #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
  766. #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
  767. #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
  768. #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg)
  769. #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg)
  770. #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg)
  771. #define wil_err_ratelimited(wil, fmt, arg...) \
  772. __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg)
  773. /* target operations */
  774. /* register read */
  775. static inline u32 wil_r(struct wil6210_priv *wil, u32 reg)
  776. {
  777. return readl(wil->csr + HOSTADDR(reg));
  778. }
  779. /* register write. wmb() to make sure it is completed */
  780. static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val)
  781. {
  782. writel(val, wil->csr + HOSTADDR(reg));
  783. wmb(); /* wait for write to propagate to the HW */
  784. }
  785. /* register set = read, OR, write */
  786. static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val)
  787. {
  788. wil_w(wil, reg, wil_r(wil, reg) | val);
  789. }
  790. /* register clear = read, AND with inverted, write */
  791. static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val)
  792. {
  793. wil_w(wil, reg, wil_r(wil, reg) & ~val);
  794. }
  795. #if defined(CONFIG_DYNAMIC_DEBUG)
  796. #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
  797. groupsize, buf, len, ascii) \
  798. print_hex_dump_debug("DBG[TXRX]" prefix_str,\
  799. prefix_type, rowsize, \
  800. groupsize, buf, len, ascii)
  801. #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
  802. groupsize, buf, len, ascii) \
  803. print_hex_dump_debug("DBG[ WMI]" prefix_str,\
  804. prefix_type, rowsize, \
  805. groupsize, buf, len, ascii)
  806. #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \
  807. groupsize, buf, len, ascii) \
  808. print_hex_dump_debug("DBG[MISC]" prefix_str,\
  809. prefix_type, rowsize, \
  810. groupsize, buf, len, ascii)
  811. #else /* defined(CONFIG_DYNAMIC_DEBUG) */
  812. static inline
  813. void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
  814. int groupsize, const void *buf, size_t len, bool ascii)
  815. {
  816. }
  817. static inline
  818. void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize,
  819. int groupsize, const void *buf, size_t len, bool ascii)
  820. {
  821. }
  822. static inline
  823. void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize,
  824. int groupsize, const void *buf, size_t len, bool ascii)
  825. {
  826. }
  827. #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
  828. void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
  829. size_t count);
  830. void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
  831. size_t count);
  832. struct wil6210_vif *
  833. wil_vif_alloc(struct wil6210_priv *wil, const char *name,
  834. unsigned char name_assign_type, enum nl80211_iftype iftype);
  835. void wil_vif_free(struct wil6210_vif *vif);
  836. void *wil_if_alloc(struct device *dev);
  837. bool wil_has_other_active_ifaces(struct wil6210_priv *wil,
  838. struct net_device *ndev, bool up, bool ok);
  839. bool wil_has_active_ifaces(struct wil6210_priv *wil, bool up, bool ok);
  840. void wil_if_free(struct wil6210_priv *wil);
  841. int wil_vif_add(struct wil6210_priv *wil, struct wil6210_vif *vif);
  842. int wil_if_add(struct wil6210_priv *wil);
  843. void wil_vif_remove(struct wil6210_priv *wil, u8 mid);
  844. void wil_if_remove(struct wil6210_priv *wil);
  845. int wil_priv_init(struct wil6210_priv *wil);
  846. void wil_priv_deinit(struct wil6210_priv *wil);
  847. int wil_ps_update(struct wil6210_priv *wil,
  848. enum wmi_ps_profile_type ps_profile);
  849. int wil_reset(struct wil6210_priv *wil, bool no_fw);
  850. void wil_fw_error_recovery(struct wil6210_priv *wil);
  851. void wil_set_recovery_state(struct wil6210_priv *wil, int state);
  852. bool wil_is_recovery_blocked(struct wil6210_priv *wil);
  853. int wil_up(struct wil6210_priv *wil);
  854. int __wil_up(struct wil6210_priv *wil);
  855. int wil_down(struct wil6210_priv *wil);
  856. int __wil_down(struct wil6210_priv *wil);
  857. void wil_refresh_fw_capabilities(struct wil6210_priv *wil);
  858. void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
  859. int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac);
  860. void wil_set_ethtoolops(struct net_device *ndev);
  861. struct fw_map *wil_find_fw_mapping(const char *section);
  862. void __iomem *wmi_buffer_block(struct wil6210_priv *wil, __le32 ptr, u32 size);
  863. void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
  864. void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
  865. int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
  866. struct wil6210_mbox_hdr *hdr);
  867. int wmi_send(struct wil6210_priv *wil, u16 cmdid, u8 mid, void *buf, u16 len);
  868. void wmi_recv_cmd(struct wil6210_priv *wil);
  869. int wmi_call(struct wil6210_priv *wil, u16 cmdid, u8 mid, void *buf, u16 len,
  870. u16 reply_id, void *reply, u16 reply_size, int to_msec);
  871. void wmi_event_worker(struct work_struct *work);
  872. void wmi_event_flush(struct wil6210_priv *wil);
  873. int wmi_set_ssid(struct wil6210_vif *vif, u8 ssid_len, const void *ssid);
  874. int wmi_get_ssid(struct wil6210_vif *vif, u8 *ssid_len, void *ssid);
  875. int wmi_set_channel(struct wil6210_priv *wil, int channel);
  876. int wmi_get_channel(struct wil6210_priv *wil, int *channel);
  877. int wmi_del_cipher_key(struct wil6210_vif *vif, u8 key_index,
  878. const void *mac_addr, int key_usage);
  879. int wmi_add_cipher_key(struct wil6210_vif *vif, u8 key_index,
  880. const void *mac_addr, int key_len, const void *key,
  881. int key_usage);
  882. int wmi_echo(struct wil6210_priv *wil);
  883. int wmi_set_ie(struct wil6210_vif *vif, u8 type, u16 ie_len, const void *ie);
  884. int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
  885. int wmi_rxon(struct wil6210_priv *wil, bool on);
  886. int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
  887. int wmi_disconnect_sta(struct wil6210_vif *vif, const u8 *mac,
  888. u16 reason, bool full_disconnect, bool del_sta);
  889. int wmi_addba(struct wil6210_priv *wil, u8 mid,
  890. u8 ringid, u8 size, u16 timeout);
  891. int wmi_delba_tx(struct wil6210_priv *wil, u8 mid, u8 ringid, u16 reason);
  892. int wmi_delba_rx(struct wil6210_priv *wil, u8 mid, u8 cidxtid, u16 reason);
  893. int wmi_addba_rx_resp(struct wil6210_priv *wil,
  894. u8 mid, u8 cid, u8 tid, u8 token,
  895. u16 status, bool amsdu, u16 agg_wsize, u16 timeout);
  896. int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil,
  897. enum wmi_ps_profile_type ps_profile);
  898. int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short);
  899. int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short);
  900. int wmi_new_sta(struct wil6210_vif *vif, const u8 *mac, u8 aid);
  901. int wmi_port_allocate(struct wil6210_priv *wil, u8 mid,
  902. const u8 *mac, enum nl80211_iftype iftype);
  903. int wmi_port_delete(struct wil6210_priv *wil, u8 mid);
  904. int wil_addba_rx_request(struct wil6210_priv *wil, u8 mid,
  905. u8 cidxtid, u8 dialog_token, __le16 ba_param_set,
  906. __le16 ba_timeout, __le16 ba_seq_ctrl);
  907. int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize);
  908. void wil6210_clear_irq(struct wil6210_priv *wil);
  909. int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi);
  910. void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
  911. void wil_mask_irq(struct wil6210_priv *wil);
  912. void wil_unmask_irq(struct wil6210_priv *wil);
  913. void wil_configure_interrupt_moderation(struct wil6210_priv *wil);
  914. void wil_disable_irq(struct wil6210_priv *wil);
  915. void wil_enable_irq(struct wil6210_priv *wil);
  916. void wil6210_mask_halp(struct wil6210_priv *wil);
  917. /* P2P */
  918. bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request);
  919. int wil_p2p_search(struct wil6210_vif *vif,
  920. struct cfg80211_scan_request *request);
  921. int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev,
  922. unsigned int duration, struct ieee80211_channel *chan,
  923. u64 *cookie);
  924. u8 wil_p2p_stop_discovery(struct wil6210_vif *vif);
  925. int wil_p2p_cancel_listen(struct wil6210_vif *vif, u64 cookie);
  926. void wil_p2p_listen_expired(struct work_struct *work);
  927. void wil_p2p_search_expired(struct work_struct *work);
  928. void wil_p2p_stop_radio_operations(struct wil6210_priv *wil);
  929. void wil_p2p_delayed_listen_work(struct work_struct *work);
  930. /* WMI for P2P */
  931. int wmi_p2p_cfg(struct wil6210_vif *vif, int channel, int bi);
  932. int wmi_start_listen(struct wil6210_vif *vif);
  933. int wmi_start_search(struct wil6210_vif *vif);
  934. int wmi_stop_discovery(struct wil6210_vif *vif);
  935. int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
  936. struct cfg80211_mgmt_tx_params *params,
  937. u64 *cookie);
  938. int wil_cfg80211_iface_combinations_from_fw(
  939. struct wil6210_priv *wil,
  940. const struct wil_fw_record_concurrency *conc);
  941. int wil_vif_prepare_stop(struct wil6210_vif *vif);
  942. #if defined(CONFIG_WIL6210_DEBUGFS)
  943. int wil6210_debugfs_init(struct wil6210_priv *wil);
  944. void wil6210_debugfs_remove(struct wil6210_priv *wil);
  945. #else
  946. static inline int wil6210_debugfs_init(struct wil6210_priv *wil) { return 0; }
  947. static inline void wil6210_debugfs_remove(struct wil6210_priv *wil) {}
  948. #endif
  949. int wil_cid_fill_sinfo(struct wil6210_vif *vif, int cid,
  950. struct station_info *sinfo);
  951. struct wil6210_priv *wil_cfg80211_init(struct device *dev);
  952. void wil_cfg80211_deinit(struct wil6210_priv *wil);
  953. void wil_p2p_wdev_free(struct wil6210_priv *wil);
  954. int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
  955. int wmi_pcp_start(struct wil6210_vif *vif, int bi, u8 wmi_nettype, u8 chan,
  956. u8 hidden_ssid, u8 is_go);
  957. int wmi_pcp_stop(struct wil6210_vif *vif);
  958. int wmi_led_cfg(struct wil6210_priv *wil, bool enable);
  959. int wmi_abort_scan(struct wil6210_vif *vif);
  960. void wil_abort_scan(struct wil6210_vif *vif, bool sync);
  961. void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync);
  962. void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps);
  963. void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  964. u16 reason_code, bool from_event);
  965. void wil_probe_client_flush(struct wil6210_vif *vif);
  966. void wil_probe_client_worker(struct work_struct *work);
  967. void wil_disconnect_worker(struct work_struct *work);
  968. int wil_rx_init(struct wil6210_priv *wil, u16 size);
  969. void wil_rx_fini(struct wil6210_priv *wil);
  970. /* TX API */
  971. int wil_vring_init_tx(struct wil6210_vif *vif, int id, int size,
  972. int cid, int tid);
  973. void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
  974. int wil_tx_init(struct wil6210_vif *vif, int cid);
  975. int wil_vring_init_bcast(struct wil6210_vif *vif, int id, int size);
  976. int wil_bcast_init(struct wil6210_vif *vif);
  977. void wil_bcast_fini(struct wil6210_vif *vif);
  978. void wil_bcast_fini_all(struct wil6210_priv *wil);
  979. void wil_update_net_queues(struct wil6210_priv *wil, struct wil6210_vif *vif,
  980. struct vring *vring, bool should_stop);
  981. void wil_update_net_queues_bh(struct wil6210_priv *wil, struct wil6210_vif *vif,
  982. struct vring *vring, bool check_stop);
  983. netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
  984. int wil_tx_complete(struct wil6210_vif *vif, int ringid);
  985. void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
  986. /* RX API */
  987. void wil_rx_handle(struct wil6210_priv *wil, int *quota);
  988. void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
  989. int wil_iftype_nl2wmi(enum nl80211_iftype type);
  990. int wil_request_firmware(struct wil6210_priv *wil, const char *name,
  991. bool load);
  992. int wil_request_board(struct wil6210_priv *wil, const char *name);
  993. bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name);
  994. void wil_pm_runtime_allow(struct wil6210_priv *wil);
  995. void wil_pm_runtime_forbid(struct wil6210_priv *wil);
  996. int wil_pm_runtime_get(struct wil6210_priv *wil);
  997. void wil_pm_runtime_put(struct wil6210_priv *wil);
  998. int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime);
  999. int wil_suspend(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on);
  1000. int wil_resume(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on);
  1001. bool wil_is_wmi_idle(struct wil6210_priv *wil);
  1002. int wmi_resume(struct wil6210_priv *wil);
  1003. int wmi_suspend(struct wil6210_priv *wil);
  1004. bool wil_is_tx_idle(struct wil6210_priv *wil);
  1005. bool wil_is_rx_idle(struct wil6210_priv *wil);
  1006. int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size);
  1007. void wil_fw_core_dump(struct wil6210_priv *wil);
  1008. void wil_halp_vote(struct wil6210_priv *wil);
  1009. void wil_halp_unvote(struct wil6210_priv *wil);
  1010. void wil6210_set_halp(struct wil6210_priv *wil);
  1011. void wil6210_clear_halp(struct wil6210_priv *wil);
  1012. int wmi_start_sched_scan(struct wil6210_priv *wil,
  1013. struct cfg80211_sched_scan_request *request);
  1014. int wmi_stop_sched_scan(struct wil6210_priv *wil);
  1015. int wmi_mgmt_tx(struct wil6210_vif *vif, const u8 *buf, size_t len);
  1016. #endif /* __WIL6210_H__ */