pcie_bus.c 16 KB

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  1. /*
  2. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/pci.h>
  19. #include <linux/moduleparam.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/suspend.h>
  22. #include "wil6210.h"
  23. #include <linux/rtnetlink.h>
  24. #include <linux/pm_runtime.h>
  25. static bool use_msi = true;
  26. module_param(use_msi, bool, 0444);
  27. MODULE_PARM_DESC(use_msi, " Use MSI interrupt, default - true");
  28. static bool ftm_mode;
  29. module_param(ftm_mode, bool, 0444);
  30. MODULE_PARM_DESC(ftm_mode, " Set factory test mode, default - false");
  31. static int wil6210_pm_notify(struct notifier_block *notify_block,
  32. unsigned long mode, void *unused);
  33. static
  34. int wil_set_capabilities(struct wil6210_priv *wil)
  35. {
  36. const char *wil_fw_name;
  37. u32 jtag_id = wil_r(wil, RGF_USER_JTAG_DEV_ID);
  38. u8 chip_revision = (wil_r(wil, RGF_USER_REVISION_ID) &
  39. RGF_USER_REVISION_ID_MASK);
  40. int platform_capa;
  41. struct fw_map *iccm_section, *sct;
  42. bitmap_zero(wil->hw_capa, hw_capa_last);
  43. bitmap_zero(wil->fw_capabilities, WMI_FW_CAPABILITY_MAX);
  44. bitmap_zero(wil->platform_capa, WIL_PLATFORM_CAPA_MAX);
  45. wil->wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_DEFAULT :
  46. WIL_FW_NAME_DEFAULT;
  47. wil->chip_revision = chip_revision;
  48. switch (jtag_id) {
  49. case JTAG_DEV_ID_SPARROW:
  50. memcpy(fw_mapping, sparrow_fw_mapping,
  51. sizeof(sparrow_fw_mapping));
  52. switch (chip_revision) {
  53. case REVISION_ID_SPARROW_D0:
  54. wil->hw_name = "Sparrow D0";
  55. wil->hw_version = HW_VER_SPARROW_D0;
  56. wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_SPARROW_PLUS :
  57. WIL_FW_NAME_SPARROW_PLUS;
  58. if (wil_fw_verify_file_exists(wil, wil_fw_name))
  59. wil->wil_fw_name = wil_fw_name;
  60. sct = wil_find_fw_mapping("mac_rgf_ext");
  61. if (!sct) {
  62. wil_err(wil, "mac_rgf_ext section not found in fw_mapping\n");
  63. return -EINVAL;
  64. }
  65. memcpy(sct, &sparrow_d0_mac_rgf_ext, sizeof(*sct));
  66. break;
  67. case REVISION_ID_SPARROW_B0:
  68. wil->hw_name = "Sparrow B0";
  69. wil->hw_version = HW_VER_SPARROW_B0;
  70. break;
  71. default:
  72. wil->hw_name = "Unknown";
  73. wil->hw_version = HW_VER_UNKNOWN;
  74. break;
  75. }
  76. wil->rgf_fw_assert_code_addr = SPARROW_RGF_FW_ASSERT_CODE;
  77. wil->rgf_ucode_assert_code_addr = SPARROW_RGF_UCODE_ASSERT_CODE;
  78. break;
  79. case JTAG_DEV_ID_TALYN:
  80. wil->hw_name = "Talyn";
  81. wil->hw_version = HW_VER_TALYN;
  82. memcpy(fw_mapping, talyn_fw_mapping, sizeof(talyn_fw_mapping));
  83. wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE;
  84. wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE;
  85. if (wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1) &
  86. BIT_NO_FLASH_INDICATION)
  87. set_bit(hw_capa_no_flash, wil->hw_capa);
  88. break;
  89. default:
  90. wil_err(wil, "Unknown board hardware, chip_id 0x%08x, chip_revision 0x%08x\n",
  91. jtag_id, chip_revision);
  92. wil->hw_name = "Unknown";
  93. wil->hw_version = HW_VER_UNKNOWN;
  94. return -EINVAL;
  95. }
  96. iccm_section = wil_find_fw_mapping("fw_code");
  97. if (!iccm_section) {
  98. wil_err(wil, "fw_code section not found in fw_mapping\n");
  99. return -EINVAL;
  100. }
  101. wil->iccm_base = iccm_section->host;
  102. wil_info(wil, "Board hardware is %s, flash %sexist\n", wil->hw_name,
  103. test_bit(hw_capa_no_flash, wil->hw_capa) ? "doesn't " : "");
  104. /* Get platform capabilities */
  105. if (wil->platform_ops.get_capa) {
  106. platform_capa =
  107. wil->platform_ops.get_capa(wil->platform_handle);
  108. memcpy(wil->platform_capa, &platform_capa,
  109. min(sizeof(wil->platform_capa), sizeof(platform_capa)));
  110. }
  111. /* extract FW capabilities from file without loading the FW */
  112. wil_request_firmware(wil, wil->wil_fw_name, false);
  113. wil_refresh_fw_capabilities(wil);
  114. return 0;
  115. }
  116. void wil_disable_irq(struct wil6210_priv *wil)
  117. {
  118. disable_irq(wil->pdev->irq);
  119. }
  120. void wil_enable_irq(struct wil6210_priv *wil)
  121. {
  122. enable_irq(wil->pdev->irq);
  123. }
  124. static void wil_remove_all_additional_vifs(struct wil6210_priv *wil)
  125. {
  126. struct wil6210_vif *vif;
  127. int i;
  128. for (i = 1; i < wil->max_vifs; i++) {
  129. vif = wil->vifs[i];
  130. if (vif) {
  131. wil_vif_prepare_stop(vif);
  132. wil_vif_remove(wil, vif->mid);
  133. }
  134. }
  135. }
  136. /* Bus ops */
  137. static int wil_if_pcie_enable(struct wil6210_priv *wil)
  138. {
  139. struct pci_dev *pdev = wil->pdev;
  140. int rc;
  141. /* on platforms with buggy ACPI, pdev->msi_enabled may be set to
  142. * allow pci_enable_device to work. This indicates INTx was not routed
  143. * and only MSI should be used
  144. */
  145. int msi_only = pdev->msi_enabled;
  146. bool _use_msi = use_msi;
  147. wil_dbg_misc(wil, "if_pcie_enable\n");
  148. pci_set_master(pdev);
  149. wil_dbg_misc(wil, "Setup %s interrupt\n", use_msi ? "MSI" : "INTx");
  150. if (use_msi && pci_enable_msi(pdev)) {
  151. wil_err(wil, "pci_enable_msi failed, use INTx\n");
  152. _use_msi = false;
  153. }
  154. if (!_use_msi && msi_only) {
  155. wil_err(wil, "Interrupt pin not routed, unable to use INTx\n");
  156. rc = -ENODEV;
  157. goto stop_master;
  158. }
  159. rc = wil6210_init_irq(wil, pdev->irq, _use_msi);
  160. if (rc)
  161. goto stop_master;
  162. /* need reset here to obtain MAC */
  163. mutex_lock(&wil->mutex);
  164. rc = wil_reset(wil, false);
  165. mutex_unlock(&wil->mutex);
  166. if (rc)
  167. goto release_irq;
  168. return 0;
  169. release_irq:
  170. wil6210_fini_irq(wil, pdev->irq);
  171. /* safe to call if no MSI */
  172. pci_disable_msi(pdev);
  173. stop_master:
  174. pci_clear_master(pdev);
  175. return rc;
  176. }
  177. static int wil_if_pcie_disable(struct wil6210_priv *wil)
  178. {
  179. struct pci_dev *pdev = wil->pdev;
  180. wil_dbg_misc(wil, "if_pcie_disable\n");
  181. pci_clear_master(pdev);
  182. /* disable and release IRQ */
  183. wil6210_fini_irq(wil, pdev->irq);
  184. /* safe to call if no MSI */
  185. pci_disable_msi(pdev);
  186. /* TODO: disable HW */
  187. return 0;
  188. }
  189. static int wil_platform_rop_ramdump(void *wil_handle, void *buf, uint32_t size)
  190. {
  191. struct wil6210_priv *wil = wil_handle;
  192. if (!wil)
  193. return -EINVAL;
  194. return wil_fw_copy_crash_dump(wil, buf, size);
  195. }
  196. static int wil_platform_rop_fw_recovery(void *wil_handle)
  197. {
  198. struct wil6210_priv *wil = wil_handle;
  199. if (!wil)
  200. return -EINVAL;
  201. wil_fw_error_recovery(wil);
  202. return 0;
  203. }
  204. static void wil_platform_ops_uninit(struct wil6210_priv *wil)
  205. {
  206. if (wil->platform_ops.uninit)
  207. wil->platform_ops.uninit(wil->platform_handle);
  208. memset(&wil->platform_ops, 0, sizeof(wil->platform_ops));
  209. }
  210. static int wil_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  211. {
  212. struct wil6210_priv *wil;
  213. struct device *dev = &pdev->dev;
  214. int rc;
  215. const struct wil_platform_rops rops = {
  216. .ramdump = wil_platform_rop_ramdump,
  217. .fw_recovery = wil_platform_rop_fw_recovery,
  218. };
  219. u32 bar_size = pci_resource_len(pdev, 0);
  220. int dma_addr_size[] = {48, 40, 32}; /* keep descending order */
  221. int i;
  222. /* check HW */
  223. dev_info(&pdev->dev, WIL_NAME
  224. " device found [%04x:%04x] (rev %x) bar size 0x%x\n",
  225. (int)pdev->vendor, (int)pdev->device, (int)pdev->revision,
  226. bar_size);
  227. if ((bar_size < WIL6210_MIN_MEM_SIZE) ||
  228. (bar_size > WIL6210_MAX_MEM_SIZE)) {
  229. dev_err(&pdev->dev, "Unexpected BAR0 size 0x%x\n",
  230. bar_size);
  231. return -ENODEV;
  232. }
  233. wil = wil_if_alloc(dev);
  234. if (IS_ERR(wil)) {
  235. rc = (int)PTR_ERR(wil);
  236. dev_err(dev, "wil_if_alloc failed: %d\n", rc);
  237. return rc;
  238. }
  239. wil->pdev = pdev;
  240. pci_set_drvdata(pdev, wil);
  241. wil->bar_size = bar_size;
  242. /* rollback to if_free */
  243. wil->platform_handle =
  244. wil_platform_init(&pdev->dev, &wil->platform_ops, &rops, wil);
  245. if (!wil->platform_handle) {
  246. rc = -ENODEV;
  247. wil_err(wil, "wil_platform_init failed\n");
  248. goto if_free;
  249. }
  250. /* rollback to err_plat */
  251. /* device supports >32bit addresses */
  252. for (i = 0; i < ARRAY_SIZE(dma_addr_size); i++) {
  253. rc = dma_set_mask_and_coherent(dev,
  254. DMA_BIT_MASK(dma_addr_size[i]));
  255. if (rc) {
  256. dev_err(dev, "dma_set_mask_and_coherent(%d) failed: %d\n",
  257. dma_addr_size[i], rc);
  258. continue;
  259. }
  260. dev_info(dev, "using dma mask %d", dma_addr_size[i]);
  261. wil->dma_addr_size = dma_addr_size[i];
  262. break;
  263. }
  264. if (wil->dma_addr_size == 0)
  265. goto err_plat;
  266. rc = pci_enable_device(pdev);
  267. if (rc && pdev->msi_enabled == 0) {
  268. wil_err(wil,
  269. "pci_enable_device failed, retry with MSI only\n");
  270. /* Work around for platforms that can't allocate IRQ:
  271. * retry with MSI only
  272. */
  273. pdev->msi_enabled = 1;
  274. rc = pci_enable_device(pdev);
  275. }
  276. if (rc) {
  277. wil_err(wil,
  278. "pci_enable_device failed, even with MSI only\n");
  279. goto err_plat;
  280. }
  281. /* rollback to err_disable_pdev */
  282. pci_set_power_state(pdev, PCI_D0);
  283. rc = pci_request_region(pdev, 0, WIL_NAME);
  284. if (rc) {
  285. wil_err(wil, "pci_request_region failed\n");
  286. goto err_disable_pdev;
  287. }
  288. /* rollback to err_release_reg */
  289. wil->csr = pci_ioremap_bar(pdev, 0);
  290. if (!wil->csr) {
  291. wil_err(wil, "pci_ioremap_bar failed\n");
  292. rc = -ENODEV;
  293. goto err_release_reg;
  294. }
  295. /* rollback to err_iounmap */
  296. wil_info(wil, "CSR at %pR -> 0x%p\n", &pdev->resource[0], wil->csr);
  297. rc = wil_set_capabilities(wil);
  298. if (rc) {
  299. wil_err(wil, "wil_set_capabilities failed, rc %d\n", rc);
  300. goto err_iounmap;
  301. }
  302. wil6210_clear_irq(wil);
  303. /* FW should raise IRQ when ready */
  304. rc = wil_if_pcie_enable(wil);
  305. if (rc) {
  306. wil_err(wil, "Enable device failed\n");
  307. goto err_iounmap;
  308. }
  309. /* rollback to bus_disable */
  310. rc = wil_if_add(wil);
  311. if (rc) {
  312. wil_err(wil, "wil_if_add failed: %d\n", rc);
  313. goto bus_disable;
  314. }
  315. /* in case of WMI-only FW, perform full reset and FW loading */
  316. if (test_bit(WMI_FW_CAPABILITY_WMI_ONLY, wil->fw_capabilities)) {
  317. wil_dbg_misc(wil, "Loading WMI only FW\n");
  318. mutex_lock(&wil->mutex);
  319. rc = wil_reset(wil, true);
  320. mutex_unlock(&wil->mutex);
  321. if (rc) {
  322. wil_err(wil, "failed to load WMI only FW\n");
  323. goto if_remove;
  324. }
  325. }
  326. if (IS_ENABLED(CONFIG_PM))
  327. wil->pm_notify.notifier_call = wil6210_pm_notify;
  328. rc = register_pm_notifier(&wil->pm_notify);
  329. if (rc)
  330. /* Do not fail the driver initialization, as suspend can
  331. * be prevented in a later phase if needed
  332. */
  333. wil_err(wil, "register_pm_notifier failed: %d\n", rc);
  334. wil6210_debugfs_init(wil);
  335. wil_pm_runtime_allow(wil);
  336. return 0;
  337. if_remove:
  338. wil_if_remove(wil);
  339. bus_disable:
  340. wil_if_pcie_disable(wil);
  341. err_iounmap:
  342. pci_iounmap(pdev, wil->csr);
  343. err_release_reg:
  344. pci_release_region(pdev, 0);
  345. err_disable_pdev:
  346. pci_disable_device(pdev);
  347. err_plat:
  348. wil_platform_ops_uninit(wil);
  349. if_free:
  350. wil_if_free(wil);
  351. return rc;
  352. }
  353. static void wil_pcie_remove(struct pci_dev *pdev)
  354. {
  355. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  356. void __iomem *csr = wil->csr;
  357. wil_dbg_misc(wil, "pcie_remove\n");
  358. unregister_pm_notifier(&wil->pm_notify);
  359. wil_pm_runtime_forbid(wil);
  360. wil6210_debugfs_remove(wil);
  361. rtnl_lock();
  362. wil_p2p_wdev_free(wil);
  363. wil_remove_all_additional_vifs(wil);
  364. rtnl_unlock();
  365. wil_if_remove(wil);
  366. wil_if_pcie_disable(wil);
  367. pci_iounmap(pdev, csr);
  368. pci_release_region(pdev, 0);
  369. pci_disable_device(pdev);
  370. wil_platform_ops_uninit(wil);
  371. wil_if_free(wil);
  372. }
  373. static const struct pci_device_id wil6210_pcie_ids[] = {
  374. { PCI_DEVICE(0x1ae9, 0x0310) },
  375. { PCI_DEVICE(0x1ae9, 0x0302) }, /* same as above, firmware broken */
  376. { PCI_DEVICE(0x17cb, 0x1201) }, /* Talyn */
  377. { /* end: all zeroes */ },
  378. };
  379. MODULE_DEVICE_TABLE(pci, wil6210_pcie_ids);
  380. static int wil6210_suspend(struct device *dev, bool is_runtime)
  381. {
  382. int rc = 0;
  383. struct pci_dev *pdev = to_pci_dev(dev);
  384. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  385. bool keep_radio_on, active_ifaces;
  386. wil_dbg_pm(wil, "suspend: %s\n", is_runtime ? "runtime" : "system");
  387. mutex_lock(&wil->vif_mutex);
  388. active_ifaces = wil_has_active_ifaces(wil, true, false);
  389. mutex_unlock(&wil->vif_mutex);
  390. keep_radio_on = active_ifaces && wil->keep_radio_on_during_sleep;
  391. rc = wil_can_suspend(wil, is_runtime);
  392. if (rc)
  393. goto out;
  394. rc = wil_suspend(wil, is_runtime, keep_radio_on);
  395. if (!rc) {
  396. /* In case radio stays on, platform device will control
  397. * PCIe master
  398. */
  399. if (!keep_radio_on) {
  400. /* disable bus mastering */
  401. pci_clear_master(pdev);
  402. wil->suspend_stats.r_off.successful_suspends++;
  403. } else {
  404. wil->suspend_stats.r_on.successful_suspends++;
  405. }
  406. }
  407. out:
  408. return rc;
  409. }
  410. static int wil6210_resume(struct device *dev, bool is_runtime)
  411. {
  412. int rc = 0;
  413. struct pci_dev *pdev = to_pci_dev(dev);
  414. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  415. bool keep_radio_on, active_ifaces;
  416. wil_dbg_pm(wil, "resume: %s\n", is_runtime ? "runtime" : "system");
  417. mutex_lock(&wil->vif_mutex);
  418. active_ifaces = wil_has_active_ifaces(wil, true, false);
  419. mutex_unlock(&wil->vif_mutex);
  420. keep_radio_on = active_ifaces && wil->keep_radio_on_during_sleep;
  421. /* In case radio stays on, platform device will control
  422. * PCIe master
  423. */
  424. if (!keep_radio_on)
  425. /* allow master */
  426. pci_set_master(pdev);
  427. rc = wil_resume(wil, is_runtime, keep_radio_on);
  428. if (rc) {
  429. wil_err(wil, "device failed to resume (%d)\n", rc);
  430. if (!keep_radio_on) {
  431. pci_clear_master(pdev);
  432. wil->suspend_stats.r_off.failed_resumes++;
  433. } else {
  434. wil->suspend_stats.r_on.failed_resumes++;
  435. }
  436. } else {
  437. if (keep_radio_on)
  438. wil->suspend_stats.r_on.successful_resumes++;
  439. else
  440. wil->suspend_stats.r_off.successful_resumes++;
  441. }
  442. return rc;
  443. }
  444. static int wil6210_pm_notify(struct notifier_block *notify_block,
  445. unsigned long mode, void *unused)
  446. {
  447. struct wil6210_priv *wil = container_of(
  448. notify_block, struct wil6210_priv, pm_notify);
  449. int rc = 0;
  450. enum wil_platform_event evt;
  451. wil_dbg_pm(wil, "pm_notify: mode (%ld)\n", mode);
  452. switch (mode) {
  453. case PM_HIBERNATION_PREPARE:
  454. case PM_SUSPEND_PREPARE:
  455. case PM_RESTORE_PREPARE:
  456. rc = wil_can_suspend(wil, false);
  457. if (rc)
  458. break;
  459. evt = WIL_PLATFORM_EVT_PRE_SUSPEND;
  460. if (wil->platform_ops.notify)
  461. rc = wil->platform_ops.notify(wil->platform_handle,
  462. evt);
  463. break;
  464. case PM_POST_SUSPEND:
  465. case PM_POST_HIBERNATION:
  466. case PM_POST_RESTORE:
  467. evt = WIL_PLATFORM_EVT_POST_SUSPEND;
  468. if (wil->platform_ops.notify)
  469. rc = wil->platform_ops.notify(wil->platform_handle,
  470. evt);
  471. break;
  472. default:
  473. wil_dbg_pm(wil, "unhandled notify mode %ld\n", mode);
  474. break;
  475. }
  476. wil_dbg_pm(wil, "notification mode %ld: rc (%d)\n", mode, rc);
  477. return rc;
  478. }
  479. static int __maybe_unused wil6210_pm_suspend(struct device *dev)
  480. {
  481. return wil6210_suspend(dev, false);
  482. }
  483. static int __maybe_unused wil6210_pm_resume(struct device *dev)
  484. {
  485. return wil6210_resume(dev, false);
  486. }
  487. static int __maybe_unused wil6210_pm_runtime_idle(struct device *dev)
  488. {
  489. struct pci_dev *pdev = to_pci_dev(dev);
  490. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  491. wil_dbg_pm(wil, "Runtime idle\n");
  492. return wil_can_suspend(wil, true);
  493. }
  494. static int __maybe_unused wil6210_pm_runtime_resume(struct device *dev)
  495. {
  496. return wil6210_resume(dev, true);
  497. }
  498. static int __maybe_unused wil6210_pm_runtime_suspend(struct device *dev)
  499. {
  500. struct pci_dev *pdev = to_pci_dev(dev);
  501. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  502. if (test_bit(wil_status_suspended, wil->status)) {
  503. wil_dbg_pm(wil, "trying to suspend while suspended\n");
  504. return 1;
  505. }
  506. return wil6210_suspend(dev, true);
  507. }
  508. static const struct dev_pm_ops wil6210_pm_ops = {
  509. SET_SYSTEM_SLEEP_PM_OPS(wil6210_pm_suspend, wil6210_pm_resume)
  510. SET_RUNTIME_PM_OPS(wil6210_pm_runtime_suspend,
  511. wil6210_pm_runtime_resume,
  512. wil6210_pm_runtime_idle)
  513. };
  514. static struct pci_driver wil6210_driver = {
  515. .probe = wil_pcie_probe,
  516. .remove = wil_pcie_remove,
  517. .id_table = wil6210_pcie_ids,
  518. .name = WIL_NAME,
  519. .driver = {
  520. .pm = &wil6210_pm_ops,
  521. },
  522. };
  523. static int __init wil6210_driver_init(void)
  524. {
  525. int rc;
  526. rc = wil_platform_modinit();
  527. if (rc)
  528. return rc;
  529. rc = pci_register_driver(&wil6210_driver);
  530. if (rc)
  531. wil_platform_modexit();
  532. return rc;
  533. }
  534. module_init(wil6210_driver_init);
  535. static void __exit wil6210_driver_exit(void)
  536. {
  537. pci_unregister_driver(&wil6210_driver);
  538. wil_platform_modexit();
  539. }
  540. module_exit(wil6210_driver_exit);
  541. MODULE_LICENSE("Dual BSD/GPL");
  542. MODULE_AUTHOR("Qualcomm Atheros <wil6210@qca.qualcomm.com>");
  543. MODULE_DESCRIPTION("Driver for 60g WiFi WIL6210 card");