main.c 40 KB

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  1. /*
  2. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/moduleparam.h>
  18. #include <linux/if_arp.h>
  19. #include <linux/etherdevice.h>
  20. #include "wil6210.h"
  21. #include "txrx.h"
  22. #include "wmi.h"
  23. #include "boot_loader.h"
  24. #define WAIT_FOR_HALP_VOTE_MS 100
  25. #define WAIT_FOR_SCAN_ABORT_MS 1000
  26. bool debug_fw; /* = false; */
  27. module_param(debug_fw, bool, 0444);
  28. MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
  29. static u8 oob_mode;
  30. module_param(oob_mode, byte, 0444);
  31. MODULE_PARM_DESC(oob_mode,
  32. " enable out of the box (OOB) mode in FW, for diagnostics and certification");
  33. bool no_fw_recovery;
  34. module_param(no_fw_recovery, bool, 0644);
  35. MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
  36. /* if not set via modparam, will be set to default value of 1/8 of
  37. * rx ring size during init flow
  38. */
  39. unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
  40. module_param(rx_ring_overflow_thrsh, ushort, 0444);
  41. MODULE_PARM_DESC(rx_ring_overflow_thrsh,
  42. " RX ring overflow threshold in descriptors.");
  43. /* We allow allocation of more than 1 page buffers to support large packets.
  44. * It is suboptimal behavior performance wise in case MTU above page size.
  45. */
  46. unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
  47. static int mtu_max_set(const char *val, const struct kernel_param *kp)
  48. {
  49. int ret;
  50. /* sets mtu_max directly. no need to restore it in case of
  51. * illegal value since we assume this will fail insmod
  52. */
  53. ret = param_set_uint(val, kp);
  54. if (ret)
  55. return ret;
  56. if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
  57. ret = -EINVAL;
  58. return ret;
  59. }
  60. static const struct kernel_param_ops mtu_max_ops = {
  61. .set = mtu_max_set,
  62. .get = param_get_uint,
  63. };
  64. module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
  65. MODULE_PARM_DESC(mtu_max, " Max MTU value.");
  66. static uint rx_ring_order = WIL_RX_RING_SIZE_ORDER_DEFAULT;
  67. static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
  68. static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
  69. static int ring_order_set(const char *val, const struct kernel_param *kp)
  70. {
  71. int ret;
  72. uint x;
  73. ret = kstrtouint(val, 0, &x);
  74. if (ret)
  75. return ret;
  76. if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
  77. return -EINVAL;
  78. *((uint *)kp->arg) = x;
  79. return 0;
  80. }
  81. static const struct kernel_param_ops ring_order_ops = {
  82. .set = ring_order_set,
  83. .get = param_get_uint,
  84. };
  85. module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
  86. MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
  87. module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
  88. MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
  89. module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
  90. MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
  91. #define RST_DELAY (20) /* msec, for loop in @wil_target_reset */
  92. #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
  93. /*
  94. * Due to a hardware issue,
  95. * one has to read/write to/from NIC in 32-bit chunks;
  96. * regular memcpy_fromio and siblings will
  97. * not work on 64-bit platform - it uses 64-bit transactions
  98. *
  99. * Force 32-bit transactions to enable NIC on 64-bit platforms
  100. *
  101. * To avoid byte swap on big endian host, __raw_{read|write}l
  102. * should be used - {read|write}l would swap bytes to provide
  103. * little endian on PCI value in host endianness.
  104. */
  105. void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
  106. size_t count)
  107. {
  108. u32 *d = dst;
  109. const volatile u32 __iomem *s = src;
  110. for (; count >= 4; count -= 4)
  111. *d++ = __raw_readl(s++);
  112. if (unlikely(count)) {
  113. /* count can be 1..3 */
  114. u32 tmp = __raw_readl(s);
  115. memcpy(d, &tmp, count);
  116. }
  117. }
  118. void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
  119. size_t count)
  120. {
  121. volatile u32 __iomem *d = dst;
  122. const u32 *s = src;
  123. for (; count >= 4; count -= 4)
  124. __raw_writel(*s++, d++);
  125. if (unlikely(count)) {
  126. /* count can be 1..3 */
  127. u32 tmp = 0;
  128. memcpy(&tmp, s, count);
  129. __raw_writel(tmp, d);
  130. }
  131. }
  132. static void wil_disconnect_cid(struct wil6210_vif *vif, int cid,
  133. u16 reason_code, bool from_event)
  134. __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
  135. {
  136. uint i;
  137. struct wil6210_priv *wil = vif_to_wil(vif);
  138. struct net_device *ndev = vif_to_ndev(vif);
  139. struct wireless_dev *wdev = vif_to_wdev(vif);
  140. struct wil_sta_info *sta = &wil->sta[cid];
  141. might_sleep();
  142. wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
  143. cid, sta->mid, sta->status);
  144. /* inform upper/lower layers */
  145. if (sta->status != wil_sta_unused) {
  146. if (vif->mid != sta->mid) {
  147. wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
  148. vif->mid);
  149. /* let FW override sta->mid but be more strict with
  150. * user space requests
  151. */
  152. if (!from_event)
  153. return;
  154. }
  155. if (!from_event) {
  156. bool del_sta = (wdev->iftype == NL80211_IFTYPE_AP) ?
  157. disable_ap_sme : false;
  158. wmi_disconnect_sta(vif, sta->addr, reason_code,
  159. true, del_sta);
  160. }
  161. switch (wdev->iftype) {
  162. case NL80211_IFTYPE_AP:
  163. case NL80211_IFTYPE_P2P_GO:
  164. /* AP-like interface */
  165. cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
  166. break;
  167. default:
  168. break;
  169. }
  170. sta->status = wil_sta_unused;
  171. sta->mid = U8_MAX;
  172. }
  173. /* reorder buffers */
  174. for (i = 0; i < WIL_STA_TID_NUM; i++) {
  175. struct wil_tid_ampdu_rx *r;
  176. spin_lock_bh(&sta->tid_rx_lock);
  177. r = sta->tid_rx[i];
  178. sta->tid_rx[i] = NULL;
  179. wil_tid_ampdu_rx_free(wil, r);
  180. spin_unlock_bh(&sta->tid_rx_lock);
  181. }
  182. /* crypto context */
  183. memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
  184. memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
  185. /* release vrings */
  186. for (i = 0; i < ARRAY_SIZE(wil->vring_tx); i++) {
  187. if (wil->vring2cid_tid[i][0] == cid)
  188. wil_vring_fini_tx(wil, i);
  189. }
  190. /* statistics */
  191. memset(&sta->stats, 0, sizeof(sta->stats));
  192. }
  193. static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
  194. {
  195. int i;
  196. for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
  197. if (wil->sta[i].mid == mid &&
  198. wil->sta[i].status == wil_sta_connected)
  199. return true;
  200. }
  201. return false;
  202. }
  203. static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  204. u16 reason_code, bool from_event)
  205. {
  206. struct wil6210_priv *wil = vif_to_wil(vif);
  207. int cid = -ENOENT;
  208. struct net_device *ndev;
  209. struct wireless_dev *wdev;
  210. if (unlikely(!vif))
  211. return;
  212. ndev = vif_to_ndev(vif);
  213. wdev = vif_to_wdev(vif);
  214. might_sleep();
  215. wil_info(wil, "bssid=%pM, reason=%d, ev%s\n", bssid,
  216. reason_code, from_event ? "+" : "-");
  217. /* Cases are:
  218. * - disconnect single STA, still connected
  219. * - disconnect single STA, already disconnected
  220. * - disconnect all
  221. *
  222. * For "disconnect all", there are 3 options:
  223. * - bssid == NULL
  224. * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
  225. * - bssid is our MAC address
  226. */
  227. if (bssid && !is_broadcast_ether_addr(bssid) &&
  228. !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
  229. cid = wil_find_cid(wil, vif->mid, bssid);
  230. wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
  231. bssid, cid, reason_code);
  232. if (cid >= 0) /* disconnect 1 peer */
  233. wil_disconnect_cid(vif, cid, reason_code, from_event);
  234. } else { /* all */
  235. wil_dbg_misc(wil, "Disconnect all\n");
  236. for (cid = 0; cid < WIL6210_MAX_CID; cid++)
  237. wil_disconnect_cid(vif, cid, reason_code, from_event);
  238. }
  239. /* link state */
  240. switch (wdev->iftype) {
  241. case NL80211_IFTYPE_STATION:
  242. case NL80211_IFTYPE_P2P_CLIENT:
  243. wil_bcast_fini(vif);
  244. wil_update_net_queues_bh(wil, vif, NULL, true);
  245. netif_carrier_off(ndev);
  246. if (!wil_has_other_active_ifaces(wil, ndev, false, true))
  247. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  248. if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
  249. atomic_dec(&wil->connected_vifs);
  250. cfg80211_disconnected(ndev, reason_code,
  251. NULL, 0,
  252. vif->locally_generated_disc,
  253. GFP_KERNEL);
  254. vif->locally_generated_disc = false;
  255. } else if (test_bit(wil_vif_fwconnecting, vif->status)) {
  256. cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
  257. WLAN_STATUS_UNSPECIFIED_FAILURE,
  258. GFP_KERNEL);
  259. vif->bss = NULL;
  260. }
  261. clear_bit(wil_vif_fwconnecting, vif->status);
  262. break;
  263. case NL80211_IFTYPE_AP:
  264. case NL80211_IFTYPE_P2P_GO:
  265. if (!wil_vif_is_connected(wil, vif->mid)) {
  266. wil_update_net_queues_bh(wil, vif, NULL, true);
  267. if (test_and_clear_bit(wil_vif_fwconnected,
  268. vif->status))
  269. atomic_dec(&wil->connected_vifs);
  270. } else {
  271. wil_update_net_queues_bh(wil, vif, NULL, false);
  272. }
  273. break;
  274. default:
  275. break;
  276. }
  277. }
  278. void wil_disconnect_worker(struct work_struct *work)
  279. {
  280. struct wil6210_vif *vif = container_of(work,
  281. struct wil6210_vif, disconnect_worker);
  282. struct wil6210_priv *wil = vif_to_wil(vif);
  283. struct net_device *ndev = vif_to_ndev(vif);
  284. int rc;
  285. struct {
  286. struct wmi_cmd_hdr wmi;
  287. struct wmi_disconnect_event evt;
  288. } __packed reply;
  289. if (test_bit(wil_vif_fwconnected, vif->status))
  290. /* connect succeeded after all */
  291. return;
  292. if (!test_bit(wil_vif_fwconnecting, vif->status))
  293. /* already disconnected */
  294. return;
  295. memset(&reply, 0, sizeof(reply));
  296. rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
  297. WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
  298. WIL6210_DISCONNECT_TO_MS);
  299. if (rc) {
  300. wil_err(wil, "disconnect error %d\n", rc);
  301. return;
  302. }
  303. wil_update_net_queues_bh(wil, vif, NULL, true);
  304. netif_carrier_off(ndev);
  305. cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
  306. WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
  307. clear_bit(wil_vif_fwconnecting, vif->status);
  308. }
  309. static int wil_wait_for_recovery(struct wil6210_priv *wil)
  310. {
  311. if (wait_event_interruptible(wil->wq, wil->recovery_state !=
  312. fw_recovery_pending)) {
  313. wil_err(wil, "Interrupt, canceling recovery\n");
  314. return -ERESTARTSYS;
  315. }
  316. if (wil->recovery_state != fw_recovery_running) {
  317. wil_info(wil, "Recovery cancelled\n");
  318. return -EINTR;
  319. }
  320. wil_info(wil, "Proceed with recovery\n");
  321. return 0;
  322. }
  323. void wil_set_recovery_state(struct wil6210_priv *wil, int state)
  324. {
  325. wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
  326. wil->recovery_state, state);
  327. wil->recovery_state = state;
  328. wake_up_interruptible(&wil->wq);
  329. }
  330. bool wil_is_recovery_blocked(struct wil6210_priv *wil)
  331. {
  332. return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
  333. }
  334. static void wil_fw_error_worker(struct work_struct *work)
  335. {
  336. struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
  337. fw_error_worker);
  338. struct net_device *ndev = wil->main_ndev;
  339. struct wireless_dev *wdev;
  340. wil_dbg_misc(wil, "fw error worker\n");
  341. if (!ndev || !(ndev->flags & IFF_UP)) {
  342. wil_info(wil, "No recovery - interface is down\n");
  343. return;
  344. }
  345. wdev = ndev->ieee80211_ptr;
  346. /* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
  347. * passed since last recovery attempt
  348. */
  349. if (time_is_after_jiffies(wil->last_fw_recovery +
  350. WIL6210_FW_RECOVERY_TO))
  351. wil->recovery_count++;
  352. else
  353. wil->recovery_count = 1; /* fw was alive for a long time */
  354. if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
  355. wil_err(wil, "too many recovery attempts (%d), giving up\n",
  356. wil->recovery_count);
  357. return;
  358. }
  359. wil->last_fw_recovery = jiffies;
  360. wil_info(wil, "fw error recovery requested (try %d)...\n",
  361. wil->recovery_count);
  362. if (!no_fw_recovery)
  363. wil->recovery_state = fw_recovery_running;
  364. if (wil_wait_for_recovery(wil) != 0)
  365. return;
  366. mutex_lock(&wil->mutex);
  367. /* Needs adaptation for multiple VIFs
  368. * need to go over all VIFs and consider the appropriate
  369. * recovery.
  370. */
  371. switch (wdev->iftype) {
  372. case NL80211_IFTYPE_STATION:
  373. case NL80211_IFTYPE_P2P_CLIENT:
  374. case NL80211_IFTYPE_MONITOR:
  375. /* silent recovery, upper layers will see disconnect */
  376. __wil_down(wil);
  377. __wil_up(wil);
  378. break;
  379. case NL80211_IFTYPE_AP:
  380. case NL80211_IFTYPE_P2P_GO:
  381. wil_info(wil, "No recovery for AP-like interface\n");
  382. /* recovery in these modes is done by upper layers */
  383. break;
  384. default:
  385. wil_err(wil, "No recovery - unknown interface type %d\n",
  386. wdev->iftype);
  387. break;
  388. }
  389. mutex_unlock(&wil->mutex);
  390. }
  391. static int wil_find_free_vring(struct wil6210_priv *wil)
  392. {
  393. int i;
  394. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
  395. if (!wil->vring_tx[i].va)
  396. return i;
  397. }
  398. return -EINVAL;
  399. }
  400. int wil_tx_init(struct wil6210_vif *vif, int cid)
  401. {
  402. struct wil6210_priv *wil = vif_to_wil(vif);
  403. int rc = -EINVAL, ringid;
  404. if (cid < 0) {
  405. wil_err(wil, "No connection pending\n");
  406. goto out;
  407. }
  408. ringid = wil_find_free_vring(wil);
  409. if (ringid < 0) {
  410. wil_err(wil, "No free vring found\n");
  411. goto out;
  412. }
  413. wil_dbg_wmi(wil, "Configure for connection CID %d MID %d vring %d\n",
  414. cid, vif->mid, ringid);
  415. rc = wil_vring_init_tx(vif, ringid, 1 << tx_ring_order, cid, 0);
  416. if (rc)
  417. wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
  418. cid, vif->mid, ringid);
  419. out:
  420. return rc;
  421. }
  422. int wil_bcast_init(struct wil6210_vif *vif)
  423. {
  424. struct wil6210_priv *wil = vif_to_wil(vif);
  425. int ri = vif->bcast_vring, rc;
  426. if ((ri >= 0) && wil->vring_tx[ri].va)
  427. return 0;
  428. ri = wil_find_free_vring(wil);
  429. if (ri < 0)
  430. return ri;
  431. vif->bcast_vring = ri;
  432. rc = wil_vring_init_bcast(vif, ri, 1 << bcast_ring_order);
  433. if (rc)
  434. vif->bcast_vring = -1;
  435. return rc;
  436. }
  437. void wil_bcast_fini(struct wil6210_vif *vif)
  438. {
  439. struct wil6210_priv *wil = vif_to_wil(vif);
  440. int ri = vif->bcast_vring;
  441. if (ri < 0)
  442. return;
  443. vif->bcast_vring = -1;
  444. wil_vring_fini_tx(wil, ri);
  445. }
  446. void wil_bcast_fini_all(struct wil6210_priv *wil)
  447. {
  448. int i;
  449. struct wil6210_vif *vif;
  450. for (i = 0; i < wil->max_vifs; i++) {
  451. vif = wil->vifs[i];
  452. if (vif)
  453. wil_bcast_fini(vif);
  454. }
  455. }
  456. int wil_priv_init(struct wil6210_priv *wil)
  457. {
  458. uint i;
  459. wil_dbg_misc(wil, "priv_init\n");
  460. memset(wil->sta, 0, sizeof(wil->sta));
  461. for (i = 0; i < WIL6210_MAX_CID; i++) {
  462. spin_lock_init(&wil->sta[i].tid_rx_lock);
  463. wil->sta[i].mid = U8_MAX;
  464. }
  465. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++)
  466. spin_lock_init(&wil->vring_tx_data[i].lock);
  467. mutex_init(&wil->mutex);
  468. mutex_init(&wil->vif_mutex);
  469. mutex_init(&wil->wmi_mutex);
  470. mutex_init(&wil->halp.lock);
  471. init_completion(&wil->wmi_ready);
  472. init_completion(&wil->wmi_call);
  473. init_completion(&wil->halp.comp);
  474. INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
  475. INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
  476. INIT_LIST_HEAD(&wil->pending_wmi_ev);
  477. spin_lock_init(&wil->wmi_ev_lock);
  478. spin_lock_init(&wil->net_queue_lock);
  479. init_waitqueue_head(&wil->wq);
  480. wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
  481. if (!wil->wmi_wq)
  482. return -EAGAIN;
  483. wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
  484. if (!wil->wq_service)
  485. goto out_wmi_wq;
  486. wil->last_fw_recovery = jiffies;
  487. wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
  488. wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
  489. wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
  490. wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
  491. if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
  492. rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
  493. wil->ps_profile = WMI_PS_PROFILE_TYPE_DEFAULT;
  494. wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
  495. WMI_WAKEUP_TRIGGER_BCAST;
  496. memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
  497. wil->vring_idle_trsh = 16;
  498. wil->reply_mid = U8_MAX;
  499. wil->max_vifs = 1;
  500. return 0;
  501. out_wmi_wq:
  502. destroy_workqueue(wil->wmi_wq);
  503. return -EAGAIN;
  504. }
  505. void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
  506. {
  507. if (wil->platform_ops.bus_request) {
  508. wil->bus_request_kbps = kbps;
  509. wil->platform_ops.bus_request(wil->platform_handle, kbps);
  510. }
  511. }
  512. /**
  513. * wil6210_disconnect - disconnect one connection
  514. * @vif: virtual interface context
  515. * @bssid: peer to disconnect, NULL to disconnect all
  516. * @reason_code: Reason code for the Disassociation frame
  517. * @from_event: whether is invoked from FW event handler
  518. *
  519. * Disconnect and release associated resources. If invoked not from the
  520. * FW event handler, issue WMI command(s) to trigger MAC disconnect.
  521. */
  522. void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  523. u16 reason_code, bool from_event)
  524. {
  525. struct wil6210_priv *wil = vif_to_wil(vif);
  526. wil_dbg_misc(wil, "disconnect\n");
  527. del_timer_sync(&vif->connect_timer);
  528. _wil6210_disconnect(vif, bssid, reason_code, from_event);
  529. }
  530. void wil_priv_deinit(struct wil6210_priv *wil)
  531. {
  532. wil_dbg_misc(wil, "priv_deinit\n");
  533. wil_set_recovery_state(wil, fw_recovery_idle);
  534. cancel_work_sync(&wil->fw_error_worker);
  535. wmi_event_flush(wil);
  536. destroy_workqueue(wil->wq_service);
  537. destroy_workqueue(wil->wmi_wq);
  538. }
  539. static void wil_shutdown_bl(struct wil6210_priv *wil)
  540. {
  541. u32 val;
  542. wil_s(wil, RGF_USER_BL +
  543. offsetof(struct bl_dedicated_registers_v1,
  544. bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
  545. usleep_range(100, 150);
  546. val = wil_r(wil, RGF_USER_BL +
  547. offsetof(struct bl_dedicated_registers_v1,
  548. bl_shutdown_handshake));
  549. if (val & BL_SHUTDOWN_HS_RTD) {
  550. wil_dbg_misc(wil, "BL is ready for halt\n");
  551. return;
  552. }
  553. wil_err(wil, "BL did not report ready for halt\n");
  554. }
  555. /* this format is used by ARC embedded CPU for instruction memory */
  556. static inline u32 ARC_me_imm32(u32 d)
  557. {
  558. return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
  559. }
  560. /* defines access to interrupt vectors for wil_freeze_bl */
  561. #define ARC_IRQ_VECTOR_OFFSET(N) ((N) * 8)
  562. /* ARC long jump instruction */
  563. #define ARC_JAL_INST (0x20200f80)
  564. static void wil_freeze_bl(struct wil6210_priv *wil)
  565. {
  566. u32 jal, upc, saved;
  567. u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
  568. jal = wil_r(wil, wil->iccm_base + ivt3);
  569. if (jal != ARC_me_imm32(ARC_JAL_INST)) {
  570. wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
  571. return;
  572. }
  573. /* prevent the target from entering deep sleep
  574. * and disabling memory access
  575. */
  576. saved = wil_r(wil, RGF_USER_USAGE_8);
  577. wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
  578. usleep_range(20, 25); /* let the BL process the bit */
  579. /* redirect to endless loop in the INT_L1 context and let it trap */
  580. wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
  581. usleep_range(20, 25); /* let the BL get into the trap */
  582. /* verify the BL is frozen */
  583. upc = wil_r(wil, RGF_USER_CPU_PC);
  584. if (upc < ivt3 || (upc > (ivt3 + 8)))
  585. wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
  586. wil_w(wil, RGF_USER_USAGE_8, saved);
  587. }
  588. static void wil_bl_prepare_halt(struct wil6210_priv *wil)
  589. {
  590. u32 tmp, ver;
  591. /* before halting device CPU driver must make sure BL is not accessing
  592. * host memory. This is done differently depending on BL version:
  593. * 1. For very old BL versions the procedure is skipped
  594. * (not supported).
  595. * 2. For old BL version we use a special trick to freeze the BL
  596. * 3. For new BL versions we shutdown the BL using handshake procedure.
  597. */
  598. tmp = wil_r(wil, RGF_USER_BL +
  599. offsetof(struct bl_dedicated_registers_v0,
  600. boot_loader_struct_version));
  601. if (!tmp) {
  602. wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
  603. return;
  604. }
  605. tmp = wil_r(wil, RGF_USER_BL +
  606. offsetof(struct bl_dedicated_registers_v1,
  607. bl_shutdown_handshake));
  608. ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
  609. if (ver > 0)
  610. wil_shutdown_bl(wil);
  611. else
  612. wil_freeze_bl(wil);
  613. }
  614. static inline void wil_halt_cpu(struct wil6210_priv *wil)
  615. {
  616. wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
  617. wil_w(wil, RGF_USER_MAC_CPU_0, BIT_USER_MAC_CPU_MAN_RST);
  618. }
  619. static inline void wil_release_cpu(struct wil6210_priv *wil)
  620. {
  621. /* Start CPU */
  622. wil_w(wil, RGF_USER_USER_CPU_0, 1);
  623. }
  624. static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
  625. {
  626. wil_info(wil, "oob_mode to %d\n", mode);
  627. switch (mode) {
  628. case 0:
  629. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
  630. BIT_USER_OOB_R2_MODE);
  631. break;
  632. case 1:
  633. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  634. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  635. break;
  636. case 2:
  637. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  638. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  639. break;
  640. default:
  641. wil_err(wil, "invalid oob_mode: %d\n", mode);
  642. }
  643. }
  644. static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
  645. {
  646. int delay = 0;
  647. u32 x, x1 = 0;
  648. wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
  649. /* Clear MAC link up */
  650. wil_s(wil, RGF_HP_CTRL, BIT(15));
  651. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_HPAL_PERST_FROM_PAD);
  652. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
  653. wil_halt_cpu(wil);
  654. if (!no_flash) {
  655. /* clear all boot loader "ready" bits */
  656. wil_w(wil, RGF_USER_BL +
  657. offsetof(struct bl_dedicated_registers_v0,
  658. boot_loader_ready), 0);
  659. /* this should be safe to write even with old BLs */
  660. wil_w(wil, RGF_USER_BL +
  661. offsetof(struct bl_dedicated_registers_v1,
  662. bl_shutdown_handshake), 0);
  663. }
  664. /* Clear Fw Download notification */
  665. wil_c(wil, RGF_USER_USAGE_6, BIT(0));
  666. wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
  667. /* XTAL stabilization should take about 3ms */
  668. usleep_range(5000, 7000);
  669. x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
  670. if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
  671. wil_err(wil, "Xtal stabilization timeout\n"
  672. "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
  673. return -ETIME;
  674. }
  675. /* switch 10k to XTAL*/
  676. wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
  677. /* 40 MHz */
  678. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
  679. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
  680. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
  681. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xFE000000);
  682. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003F);
  683. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
  684. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xFFE7FE00);
  685. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
  686. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
  687. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
  688. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
  689. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
  690. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  691. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
  692. /* reset A2 PCIE AHB */
  693. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
  694. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  695. /* wait until device ready. typical time is 20..80 msec */
  696. if (no_flash)
  697. do {
  698. msleep(RST_DELAY);
  699. x = wil_r(wil, USER_EXT_USER_PMU_3);
  700. if (delay++ > RST_COUNT) {
  701. wil_err(wil, "Reset not completed, PMU_3 0x%08x\n",
  702. x);
  703. return -ETIME;
  704. }
  705. } while ((x & BIT_PMU_DEVICE_RDY) == 0);
  706. else
  707. do {
  708. msleep(RST_DELAY);
  709. x = wil_r(wil, RGF_USER_BL +
  710. offsetof(struct bl_dedicated_registers_v0,
  711. boot_loader_ready));
  712. if (x1 != x) {
  713. wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
  714. x1, x);
  715. x1 = x;
  716. }
  717. if (delay++ > RST_COUNT) {
  718. wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
  719. x);
  720. return -ETIME;
  721. }
  722. } while (x != BL_READY);
  723. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
  724. /* enable fix for HW bug related to the SA/DA swap in AP Rx */
  725. wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
  726. BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
  727. if (no_flash) {
  728. /* Reset OTP HW vectors to fit 40MHz */
  729. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
  730. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
  731. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
  732. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
  733. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
  734. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
  735. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
  736. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
  737. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
  738. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
  739. wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
  740. }
  741. wil_dbg_misc(wil, "Reset completed in %d ms\n", delay * RST_DELAY);
  742. return 0;
  743. }
  744. static void wil_collect_fw_info(struct wil6210_priv *wil)
  745. {
  746. struct wiphy *wiphy = wil_to_wiphy(wil);
  747. u8 retry_short;
  748. int rc;
  749. wil_refresh_fw_capabilities(wil);
  750. rc = wmi_get_mgmt_retry(wil, &retry_short);
  751. if (!rc) {
  752. wiphy->retry_short = retry_short;
  753. wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
  754. }
  755. }
  756. void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
  757. {
  758. struct wiphy *wiphy = wil_to_wiphy(wil);
  759. int features;
  760. wil->keep_radio_on_during_sleep =
  761. test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
  762. wil->platform_capa) &&
  763. test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
  764. wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
  765. wil->keep_radio_on_during_sleep);
  766. if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
  767. wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
  768. else
  769. wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
  770. if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
  771. wiphy->max_sched_scan_reqs = 1;
  772. wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
  773. wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
  774. wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
  775. wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
  776. }
  777. if (wil->platform_ops.set_features) {
  778. features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
  779. wil->fw_capabilities) &&
  780. test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
  781. wil->platform_capa)) ?
  782. BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
  783. wil->platform_ops.set_features(wil->platform_handle, features);
  784. }
  785. }
  786. void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
  787. {
  788. le32_to_cpus(&r->base);
  789. le16_to_cpus(&r->entry_size);
  790. le16_to_cpus(&r->size);
  791. le32_to_cpus(&r->tail);
  792. le32_to_cpus(&r->head);
  793. }
  794. static int wil_get_bl_info(struct wil6210_priv *wil)
  795. {
  796. struct net_device *ndev = wil->main_ndev;
  797. struct wiphy *wiphy = wil_to_wiphy(wil);
  798. union {
  799. struct bl_dedicated_registers_v0 bl0;
  800. struct bl_dedicated_registers_v1 bl1;
  801. } bl;
  802. u32 bl_ver;
  803. u8 *mac;
  804. u16 rf_status;
  805. wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
  806. sizeof(bl));
  807. bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
  808. mac = bl.bl0.mac_address;
  809. if (bl_ver == 0) {
  810. le32_to_cpus(&bl.bl0.rf_type);
  811. le32_to_cpus(&bl.bl0.baseband_type);
  812. rf_status = 0; /* actually, unknown */
  813. wil_info(wil,
  814. "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
  815. bl_ver, mac,
  816. bl.bl0.rf_type, bl.bl0.baseband_type);
  817. wil_info(wil, "Boot Loader build unknown for struct v0\n");
  818. } else {
  819. le16_to_cpus(&bl.bl1.rf_type);
  820. rf_status = le16_to_cpu(bl.bl1.rf_status);
  821. le32_to_cpus(&bl.bl1.baseband_type);
  822. le16_to_cpus(&bl.bl1.bl_version_subminor);
  823. le16_to_cpus(&bl.bl1.bl_version_build);
  824. wil_info(wil,
  825. "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
  826. bl_ver, mac,
  827. bl.bl1.rf_type, rf_status,
  828. bl.bl1.baseband_type);
  829. wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
  830. bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
  831. bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
  832. }
  833. if (!is_valid_ether_addr(mac)) {
  834. wil_err(wil, "BL: Invalid MAC %pM\n", mac);
  835. return -EINVAL;
  836. }
  837. ether_addr_copy(ndev->perm_addr, mac);
  838. ether_addr_copy(wiphy->perm_addr, mac);
  839. if (!is_valid_ether_addr(ndev->dev_addr))
  840. ether_addr_copy(ndev->dev_addr, mac);
  841. if (rf_status) {/* bad RF cable? */
  842. wil_err(wil, "RF communication error 0x%04x",
  843. rf_status);
  844. return -EAGAIN;
  845. }
  846. return 0;
  847. }
  848. static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
  849. {
  850. u32 bl_assert_code, bl_assert_blink, bl_magic_number;
  851. u32 bl_ver = wil_r(wil, RGF_USER_BL +
  852. offsetof(struct bl_dedicated_registers_v0,
  853. boot_loader_struct_version));
  854. if (bl_ver < 2)
  855. return;
  856. bl_assert_code = wil_r(wil, RGF_USER_BL +
  857. offsetof(struct bl_dedicated_registers_v1,
  858. bl_assert_code));
  859. bl_assert_blink = wil_r(wil, RGF_USER_BL +
  860. offsetof(struct bl_dedicated_registers_v1,
  861. bl_assert_blink));
  862. bl_magic_number = wil_r(wil, RGF_USER_BL +
  863. offsetof(struct bl_dedicated_registers_v1,
  864. bl_magic_number));
  865. if (is_err) {
  866. wil_err(wil,
  867. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  868. bl_assert_code, bl_assert_blink, bl_magic_number);
  869. } else {
  870. wil_dbg_misc(wil,
  871. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  872. bl_assert_code, bl_assert_blink, bl_magic_number);
  873. }
  874. }
  875. static int wil_get_otp_info(struct wil6210_priv *wil)
  876. {
  877. struct net_device *ndev = wil->main_ndev;
  878. struct wiphy *wiphy = wil_to_wiphy(wil);
  879. u8 mac[8];
  880. wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(RGF_OTP_MAC),
  881. sizeof(mac));
  882. if (!is_valid_ether_addr(mac)) {
  883. wil_err(wil, "Invalid MAC %pM\n", mac);
  884. return -EINVAL;
  885. }
  886. ether_addr_copy(ndev->perm_addr, mac);
  887. ether_addr_copy(wiphy->perm_addr, mac);
  888. if (!is_valid_ether_addr(ndev->dev_addr))
  889. ether_addr_copy(ndev->dev_addr, mac);
  890. return 0;
  891. }
  892. static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
  893. {
  894. ulong to = msecs_to_jiffies(1000);
  895. ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
  896. if (0 == left) {
  897. wil_err(wil, "Firmware not ready\n");
  898. return -ETIME;
  899. } else {
  900. wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
  901. jiffies_to_msecs(to-left), wil->hw_version);
  902. }
  903. return 0;
  904. }
  905. void wil_abort_scan(struct wil6210_vif *vif, bool sync)
  906. {
  907. struct wil6210_priv *wil = vif_to_wil(vif);
  908. int rc;
  909. struct cfg80211_scan_info info = {
  910. .aborted = true,
  911. };
  912. lockdep_assert_held(&wil->vif_mutex);
  913. if (!vif->scan_request)
  914. return;
  915. wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
  916. del_timer_sync(&vif->scan_timer);
  917. mutex_unlock(&wil->vif_mutex);
  918. rc = wmi_abort_scan(vif);
  919. if (!rc && sync)
  920. wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
  921. msecs_to_jiffies(
  922. WAIT_FOR_SCAN_ABORT_MS));
  923. mutex_lock(&wil->vif_mutex);
  924. if (vif->scan_request) {
  925. cfg80211_scan_done(vif->scan_request, &info);
  926. vif->scan_request = NULL;
  927. }
  928. }
  929. void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
  930. {
  931. int i;
  932. lockdep_assert_held(&wil->vif_mutex);
  933. for (i = 0; i < wil->max_vifs; i++) {
  934. struct wil6210_vif *vif = wil->vifs[i];
  935. if (vif)
  936. wil_abort_scan(vif, sync);
  937. }
  938. }
  939. int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
  940. {
  941. int rc;
  942. if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
  943. wil_err(wil, "set_power_mgmt not supported\n");
  944. return -EOPNOTSUPP;
  945. }
  946. rc = wmi_ps_dev_profile_cfg(wil, ps_profile);
  947. if (rc)
  948. wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
  949. else
  950. wil->ps_profile = ps_profile;
  951. return rc;
  952. }
  953. static void wil_pre_fw_config(struct wil6210_priv *wil)
  954. {
  955. /* Mark FW as loaded from host */
  956. wil_s(wil, RGF_USER_USAGE_6, 1);
  957. /* clear any interrupts which on-card-firmware
  958. * may have set
  959. */
  960. wil6210_clear_irq(wil);
  961. /* CAF_ICR - clear and mask */
  962. /* it is W1C, clear by writing back same value */
  963. wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
  964. wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
  965. /* clear PAL_UNIT_ICR (potential D0->D3 leftover) */
  966. wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR), 0);
  967. if (wil->fw_calib_result > 0) {
  968. __le32 val = cpu_to_le32(wil->fw_calib_result |
  969. (CALIB_RESULT_SIGNATURE << 8));
  970. wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
  971. }
  972. }
  973. static int wil_restore_vifs(struct wil6210_priv *wil)
  974. {
  975. struct wil6210_vif *vif;
  976. struct net_device *ndev;
  977. struct wireless_dev *wdev;
  978. int i, rc;
  979. for (i = 0; i < wil->max_vifs; i++) {
  980. vif = wil->vifs[i];
  981. if (!vif)
  982. continue;
  983. vif->ap_isolate = 0;
  984. if (vif->mid) {
  985. ndev = vif_to_ndev(vif);
  986. wdev = vif_to_wdev(vif);
  987. rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
  988. wdev->iftype);
  989. if (rc) {
  990. wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
  991. i, wdev->iftype, rc);
  992. return rc;
  993. }
  994. }
  995. }
  996. return 0;
  997. }
  998. /*
  999. * We reset all the structures, and we reset the UMAC.
  1000. * After calling this routine, you're expected to reload
  1001. * the firmware.
  1002. */
  1003. int wil_reset(struct wil6210_priv *wil, bool load_fw)
  1004. {
  1005. int rc, i;
  1006. unsigned long status_flags = BIT(wil_status_resetting);
  1007. int no_flash;
  1008. struct wil6210_vif *vif;
  1009. wil_dbg_misc(wil, "reset\n");
  1010. WARN_ON(!mutex_is_locked(&wil->mutex));
  1011. WARN_ON(test_bit(wil_status_napi_en, wil->status));
  1012. if (debug_fw) {
  1013. static const u8 mac[ETH_ALEN] = {
  1014. 0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
  1015. };
  1016. struct net_device *ndev = wil->main_ndev;
  1017. ether_addr_copy(ndev->perm_addr, mac);
  1018. ether_addr_copy(ndev->dev_addr, ndev->perm_addr);
  1019. return 0;
  1020. }
  1021. if (wil->hw_version == HW_VER_UNKNOWN)
  1022. return -ENODEV;
  1023. if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa)) {
  1024. wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
  1025. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
  1026. }
  1027. if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
  1028. wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
  1029. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
  1030. }
  1031. if (wil->platform_ops.notify) {
  1032. rc = wil->platform_ops.notify(wil->platform_handle,
  1033. WIL_PLATFORM_EVT_PRE_RESET);
  1034. if (rc)
  1035. wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
  1036. rc);
  1037. }
  1038. set_bit(wil_status_resetting, wil->status);
  1039. if (test_bit(wil_status_collecting_dumps, wil->status)) {
  1040. /* Device collects crash dump, cancel the reset.
  1041. * following crash dump collection, reset would take place.
  1042. */
  1043. wil_dbg_misc(wil, "reject reset while collecting crash dump\n");
  1044. rc = -EBUSY;
  1045. goto out;
  1046. }
  1047. mutex_lock(&wil->vif_mutex);
  1048. wil_abort_scan_all_vifs(wil, false);
  1049. mutex_unlock(&wil->vif_mutex);
  1050. for (i = 0; i < wil->max_vifs; i++) {
  1051. vif = wil->vifs[i];
  1052. if (vif) {
  1053. cancel_work_sync(&vif->disconnect_worker);
  1054. wil6210_disconnect(vif, NULL,
  1055. WLAN_REASON_DEAUTH_LEAVING, false);
  1056. }
  1057. }
  1058. wil_bcast_fini_all(wil);
  1059. /* Disable device led before reset*/
  1060. wmi_led_cfg(wil, false);
  1061. /* prevent NAPI from being scheduled and prevent wmi commands */
  1062. mutex_lock(&wil->wmi_mutex);
  1063. if (test_bit(wil_status_suspending, wil->status))
  1064. status_flags |= BIT(wil_status_suspending);
  1065. bitmap_and(wil->status, wil->status, &status_flags,
  1066. wil_status_last);
  1067. wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
  1068. mutex_unlock(&wil->wmi_mutex);
  1069. wil_mask_irq(wil);
  1070. wmi_event_flush(wil);
  1071. flush_workqueue(wil->wq_service);
  1072. flush_workqueue(wil->wmi_wq);
  1073. no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
  1074. if (!no_flash)
  1075. wil_bl_crash_info(wil, false);
  1076. wil_disable_irq(wil);
  1077. rc = wil_target_reset(wil, no_flash);
  1078. wil6210_clear_irq(wil);
  1079. wil_enable_irq(wil);
  1080. wil_rx_fini(wil);
  1081. if (rc) {
  1082. if (!no_flash)
  1083. wil_bl_crash_info(wil, true);
  1084. goto out;
  1085. }
  1086. if (no_flash) {
  1087. rc = wil_get_otp_info(wil);
  1088. } else {
  1089. rc = wil_get_bl_info(wil);
  1090. if (rc == -EAGAIN && !load_fw)
  1091. /* ignore RF error if not going up */
  1092. rc = 0;
  1093. }
  1094. if (rc)
  1095. goto out;
  1096. wil_set_oob_mode(wil, oob_mode);
  1097. if (load_fw) {
  1098. wil_info(wil, "Use firmware <%s> + board <%s>\n",
  1099. wil->wil_fw_name, WIL_BOARD_FILE_NAME);
  1100. if (!no_flash)
  1101. wil_bl_prepare_halt(wil);
  1102. wil_halt_cpu(wil);
  1103. memset(wil->fw_version, 0, sizeof(wil->fw_version));
  1104. /* Loading f/w from the file */
  1105. rc = wil_request_firmware(wil, wil->wil_fw_name, true);
  1106. if (rc)
  1107. goto out;
  1108. if (wil->brd_file_addr)
  1109. rc = wil_request_board(wil, WIL_BOARD_FILE_NAME);
  1110. else
  1111. rc = wil_request_firmware(wil,
  1112. WIL_BOARD_FILE_NAME,
  1113. true);
  1114. if (rc)
  1115. goto out;
  1116. wil_pre_fw_config(wil);
  1117. wil_release_cpu(wil);
  1118. }
  1119. /* init after reset */
  1120. reinit_completion(&wil->wmi_ready);
  1121. reinit_completion(&wil->wmi_call);
  1122. reinit_completion(&wil->halp.comp);
  1123. clear_bit(wil_status_resetting, wil->status);
  1124. if (load_fw) {
  1125. wil_configure_interrupt_moderation(wil);
  1126. wil_unmask_irq(wil);
  1127. /* we just started MAC, wait for FW ready */
  1128. rc = wil_wait_for_fw_ready(wil);
  1129. if (rc)
  1130. return rc;
  1131. /* check FW is responsive */
  1132. rc = wmi_echo(wil);
  1133. if (rc) {
  1134. wil_err(wil, "wmi_echo failed, rc %d\n", rc);
  1135. return rc;
  1136. }
  1137. rc = wil_restore_vifs(wil);
  1138. if (rc) {
  1139. wil_err(wil, "failed to restore vifs, rc %d\n", rc);
  1140. return rc;
  1141. }
  1142. wil_collect_fw_info(wil);
  1143. if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
  1144. wil_ps_update(wil, wil->ps_profile);
  1145. if (wil->platform_ops.notify) {
  1146. rc = wil->platform_ops.notify(wil->platform_handle,
  1147. WIL_PLATFORM_EVT_FW_RDY);
  1148. if (rc) {
  1149. wil_err(wil, "FW_RDY notify failed, rc %d\n",
  1150. rc);
  1151. rc = 0;
  1152. }
  1153. }
  1154. }
  1155. return rc;
  1156. out:
  1157. clear_bit(wil_status_resetting, wil->status);
  1158. return rc;
  1159. }
  1160. void wil_fw_error_recovery(struct wil6210_priv *wil)
  1161. {
  1162. wil_dbg_misc(wil, "starting fw error recovery\n");
  1163. if (test_bit(wil_status_resetting, wil->status)) {
  1164. wil_info(wil, "Reset already in progress\n");
  1165. return;
  1166. }
  1167. wil->recovery_state = fw_recovery_pending;
  1168. schedule_work(&wil->fw_error_worker);
  1169. }
  1170. int __wil_up(struct wil6210_priv *wil)
  1171. {
  1172. struct net_device *ndev = wil->main_ndev;
  1173. struct wireless_dev *wdev = ndev->ieee80211_ptr;
  1174. int rc;
  1175. WARN_ON(!mutex_is_locked(&wil->mutex));
  1176. rc = wil_reset(wil, true);
  1177. if (rc)
  1178. return rc;
  1179. /* Rx VRING. After MAC and beacon */
  1180. rc = wil_rx_init(wil, 1 << rx_ring_order);
  1181. if (rc)
  1182. return rc;
  1183. switch (wdev->iftype) {
  1184. case NL80211_IFTYPE_STATION:
  1185. wil_dbg_misc(wil, "type: STATION\n");
  1186. ndev->type = ARPHRD_ETHER;
  1187. break;
  1188. case NL80211_IFTYPE_AP:
  1189. wil_dbg_misc(wil, "type: AP\n");
  1190. ndev->type = ARPHRD_ETHER;
  1191. break;
  1192. case NL80211_IFTYPE_P2P_CLIENT:
  1193. wil_dbg_misc(wil, "type: P2P_CLIENT\n");
  1194. ndev->type = ARPHRD_ETHER;
  1195. break;
  1196. case NL80211_IFTYPE_P2P_GO:
  1197. wil_dbg_misc(wil, "type: P2P_GO\n");
  1198. ndev->type = ARPHRD_ETHER;
  1199. break;
  1200. case NL80211_IFTYPE_MONITOR:
  1201. wil_dbg_misc(wil, "type: Monitor\n");
  1202. ndev->type = ARPHRD_IEEE80211_RADIOTAP;
  1203. /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
  1204. break;
  1205. default:
  1206. return -EOPNOTSUPP;
  1207. }
  1208. /* MAC address - pre-requisite for other commands */
  1209. wmi_set_mac_address(wil, ndev->dev_addr);
  1210. wil_dbg_misc(wil, "NAPI enable\n");
  1211. napi_enable(&wil->napi_rx);
  1212. napi_enable(&wil->napi_tx);
  1213. set_bit(wil_status_napi_en, wil->status);
  1214. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  1215. return 0;
  1216. }
  1217. int wil_up(struct wil6210_priv *wil)
  1218. {
  1219. int rc;
  1220. wil_dbg_misc(wil, "up\n");
  1221. mutex_lock(&wil->mutex);
  1222. rc = __wil_up(wil);
  1223. mutex_unlock(&wil->mutex);
  1224. return rc;
  1225. }
  1226. int __wil_down(struct wil6210_priv *wil)
  1227. {
  1228. WARN_ON(!mutex_is_locked(&wil->mutex));
  1229. set_bit(wil_status_resetting, wil->status);
  1230. wil6210_bus_request(wil, 0);
  1231. wil_disable_irq(wil);
  1232. if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
  1233. napi_disable(&wil->napi_rx);
  1234. napi_disable(&wil->napi_tx);
  1235. wil_dbg_misc(wil, "NAPI disable\n");
  1236. }
  1237. wil_enable_irq(wil);
  1238. mutex_lock(&wil->vif_mutex);
  1239. wil_p2p_stop_radio_operations(wil);
  1240. wil_abort_scan_all_vifs(wil, false);
  1241. mutex_unlock(&wil->vif_mutex);
  1242. return wil_reset(wil, false);
  1243. }
  1244. int wil_down(struct wil6210_priv *wil)
  1245. {
  1246. int rc;
  1247. wil_dbg_misc(wil, "down\n");
  1248. wil_set_recovery_state(wil, fw_recovery_idle);
  1249. mutex_lock(&wil->mutex);
  1250. rc = __wil_down(wil);
  1251. mutex_unlock(&wil->mutex);
  1252. return rc;
  1253. }
  1254. int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
  1255. {
  1256. int i;
  1257. int rc = -ENOENT;
  1258. for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
  1259. if (wil->sta[i].mid == mid &&
  1260. wil->sta[i].status != wil_sta_unused &&
  1261. ether_addr_equal(wil->sta[i].addr, mac)) {
  1262. rc = i;
  1263. break;
  1264. }
  1265. }
  1266. return rc;
  1267. }
  1268. void wil_halp_vote(struct wil6210_priv *wil)
  1269. {
  1270. unsigned long rc;
  1271. unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
  1272. mutex_lock(&wil->halp.lock);
  1273. wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
  1274. wil->halp.ref_cnt);
  1275. if (++wil->halp.ref_cnt == 1) {
  1276. reinit_completion(&wil->halp.comp);
  1277. wil6210_set_halp(wil);
  1278. rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
  1279. if (!rc) {
  1280. wil_err(wil, "HALP vote timed out\n");
  1281. /* Mask HALP as done in case the interrupt is raised */
  1282. wil6210_mask_halp(wil);
  1283. } else {
  1284. wil_dbg_irq(wil,
  1285. "halp_vote: HALP vote completed after %d ms\n",
  1286. jiffies_to_msecs(to_jiffies - rc));
  1287. }
  1288. }
  1289. wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
  1290. wil->halp.ref_cnt);
  1291. mutex_unlock(&wil->halp.lock);
  1292. }
  1293. void wil_halp_unvote(struct wil6210_priv *wil)
  1294. {
  1295. WARN_ON(wil->halp.ref_cnt == 0);
  1296. mutex_lock(&wil->halp.lock);
  1297. wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
  1298. wil->halp.ref_cnt);
  1299. if (--wil->halp.ref_cnt == 0) {
  1300. wil6210_clear_halp(wil);
  1301. wil_dbg_irq(wil, "HALP unvote\n");
  1302. }
  1303. wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
  1304. wil->halp.ref_cnt);
  1305. mutex_unlock(&wil->halp.lock);
  1306. }