htt_rx.c 80 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "core.h"
  19. #include "htc.h"
  20. #include "htt.h"
  21. #include "txrx.h"
  22. #include "debug.h"
  23. #include "trace.h"
  24. #include "mac.h"
  25. #include <linux/log2.h>
  26. #include <linux/bitfield.h>
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. #define HTT_RX_RING_REFILL_RESCHED_MS 5
  30. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt)
  74. {
  75. return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32);
  76. }
  77. static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt)
  78. {
  79. return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64);
  80. }
  81. static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt,
  82. void *vaddr)
  83. {
  84. htt->rx_ring.paddrs_ring_32 = vaddr;
  85. }
  86. static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt,
  87. void *vaddr)
  88. {
  89. htt->rx_ring.paddrs_ring_64 = vaddr;
  90. }
  91. static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt,
  92. dma_addr_t paddr, int idx)
  93. {
  94. htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr);
  95. }
  96. static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt,
  97. dma_addr_t paddr, int idx)
  98. {
  99. htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr);
  100. }
  101. static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx)
  102. {
  103. htt->rx_ring.paddrs_ring_32[idx] = 0;
  104. }
  105. static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx)
  106. {
  107. htt->rx_ring.paddrs_ring_64[idx] = 0;
  108. }
  109. static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt)
  110. {
  111. return (void *)htt->rx_ring.paddrs_ring_32;
  112. }
  113. static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt)
  114. {
  115. return (void *)htt->rx_ring.paddrs_ring_64;
  116. }
  117. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  118. {
  119. struct htt_rx_desc *rx_desc;
  120. struct ath10k_skb_rxcb *rxcb;
  121. struct sk_buff *skb;
  122. dma_addr_t paddr;
  123. int ret = 0, idx;
  124. /* The Full Rx Reorder firmware has no way of telling the host
  125. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  126. * To keep things simple make sure ring is always half empty. This
  127. * guarantees there'll be no replenishment overruns possible.
  128. */
  129. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  130. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  131. while (num > 0) {
  132. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  133. if (!skb) {
  134. ret = -ENOMEM;
  135. goto fail;
  136. }
  137. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  138. skb_pull(skb,
  139. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  140. skb->data);
  141. /* Clear rx_desc attention word before posting to Rx ring */
  142. rx_desc = (struct htt_rx_desc *)skb->data;
  143. rx_desc->attention.flags = __cpu_to_le32(0);
  144. paddr = dma_map_single(htt->ar->dev, skb->data,
  145. skb->len + skb_tailroom(skb),
  146. DMA_FROM_DEVICE);
  147. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  148. dev_kfree_skb_any(skb);
  149. ret = -ENOMEM;
  150. goto fail;
  151. }
  152. rxcb = ATH10K_SKB_RXCB(skb);
  153. rxcb->paddr = paddr;
  154. htt->rx_ring.netbufs_ring[idx] = skb;
  155. ath10k_htt_set_paddrs_ring(htt, paddr, idx);
  156. htt->rx_ring.fill_cnt++;
  157. if (htt->rx_ring.in_ord_rx) {
  158. hash_add(htt->rx_ring.skb_table,
  159. &ATH10K_SKB_RXCB(skb)->hlist,
  160. paddr);
  161. }
  162. num--;
  163. idx++;
  164. idx &= htt->rx_ring.size_mask;
  165. }
  166. fail:
  167. /*
  168. * Make sure the rx buffer is updated before available buffer
  169. * index to avoid any potential rx ring corruption.
  170. */
  171. mb();
  172. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  173. return ret;
  174. }
  175. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  176. {
  177. lockdep_assert_held(&htt->rx_ring.lock);
  178. return __ath10k_htt_rx_ring_fill_n(htt, num);
  179. }
  180. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  181. {
  182. int ret, num_deficit, num_to_fill;
  183. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  184. * reason is RX may take up significant amount of CPU cycles and starve
  185. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  186. * with ath10k wlan interface. This ended up with very poor performance
  187. * once CPU the host system was overwhelmed with RX on ath10k.
  188. *
  189. * By limiting the number of refills the replenishing occurs
  190. * progressively. This in turns makes use of the fact tasklets are
  191. * processed in FIFO order. This means actual RX processing can starve
  192. * out refilling. If there's not enough buffers on RX ring FW will not
  193. * report RX until it is refilled with enough buffers. This
  194. * automatically balances load wrt to CPU power.
  195. *
  196. * This probably comes at a cost of lower maximum throughput but
  197. * improves the average and stability.
  198. */
  199. spin_lock_bh(&htt->rx_ring.lock);
  200. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  201. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  202. num_deficit -= num_to_fill;
  203. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  204. if (ret == -ENOMEM) {
  205. /*
  206. * Failed to fill it to the desired level -
  207. * we'll start a timer and try again next time.
  208. * As long as enough buffers are left in the ring for
  209. * another A-MPDU rx, no special recovery is needed.
  210. */
  211. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  212. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  213. } else if (num_deficit > 0) {
  214. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  215. msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
  216. }
  217. spin_unlock_bh(&htt->rx_ring.lock);
  218. }
  219. static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)
  220. {
  221. struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer);
  222. ath10k_htt_rx_msdu_buff_replenish(htt);
  223. }
  224. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  225. {
  226. struct ath10k_htt *htt = &ar->htt;
  227. int ret;
  228. spin_lock_bh(&htt->rx_ring.lock);
  229. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  230. htt->rx_ring.fill_cnt));
  231. spin_unlock_bh(&htt->rx_ring.lock);
  232. if (ret)
  233. ath10k_htt_rx_ring_free(htt);
  234. return ret;
  235. }
  236. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  237. {
  238. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  239. skb_queue_purge(&htt->rx_msdus_q);
  240. skb_queue_purge(&htt->rx_in_ord_compl_q);
  241. skb_queue_purge(&htt->tx_fetch_ind_q);
  242. ath10k_htt_rx_ring_free(htt);
  243. dma_free_coherent(htt->ar->dev,
  244. ath10k_htt_get_rx_ring_size(htt),
  245. ath10k_htt_get_vaddr_ring(htt),
  246. htt->rx_ring.base_paddr);
  247. dma_free_coherent(htt->ar->dev,
  248. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  249. htt->rx_ring.alloc_idx.vaddr,
  250. htt->rx_ring.alloc_idx.paddr);
  251. kfree(htt->rx_ring.netbufs_ring);
  252. }
  253. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  254. {
  255. struct ath10k *ar = htt->ar;
  256. int idx;
  257. struct sk_buff *msdu;
  258. lockdep_assert_held(&htt->rx_ring.lock);
  259. if (htt->rx_ring.fill_cnt == 0) {
  260. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  261. return NULL;
  262. }
  263. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  264. msdu = htt->rx_ring.netbufs_ring[idx];
  265. htt->rx_ring.netbufs_ring[idx] = NULL;
  266. ath10k_htt_reset_paddrs_ring(htt, idx);
  267. idx++;
  268. idx &= htt->rx_ring.size_mask;
  269. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  270. htt->rx_ring.fill_cnt--;
  271. dma_unmap_single(htt->ar->dev,
  272. ATH10K_SKB_RXCB(msdu)->paddr,
  273. msdu->len + skb_tailroom(msdu),
  274. DMA_FROM_DEVICE);
  275. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  276. msdu->data, msdu->len + skb_tailroom(msdu));
  277. return msdu;
  278. }
  279. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  280. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  281. struct sk_buff_head *amsdu)
  282. {
  283. struct ath10k *ar = htt->ar;
  284. int msdu_len, msdu_chaining = 0;
  285. struct sk_buff *msdu;
  286. struct htt_rx_desc *rx_desc;
  287. lockdep_assert_held(&htt->rx_ring.lock);
  288. for (;;) {
  289. int last_msdu, msdu_len_invalid, msdu_chained;
  290. msdu = ath10k_htt_rx_netbuf_pop(htt);
  291. if (!msdu) {
  292. __skb_queue_purge(amsdu);
  293. return -ENOENT;
  294. }
  295. __skb_queue_tail(amsdu, msdu);
  296. rx_desc = (struct htt_rx_desc *)msdu->data;
  297. /* FIXME: we must report msdu payload since this is what caller
  298. * expects now
  299. */
  300. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  301. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  302. /*
  303. * Sanity check - confirm the HW is finished filling in the
  304. * rx data.
  305. * If the HW and SW are working correctly, then it's guaranteed
  306. * that the HW's MAC DMA is done before this point in the SW.
  307. * To prevent the case that we handle a stale Rx descriptor,
  308. * just assert for now until we have a way to recover.
  309. */
  310. if (!(__le32_to_cpu(rx_desc->attention.flags)
  311. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  312. __skb_queue_purge(amsdu);
  313. return -EIO;
  314. }
  315. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  316. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  317. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  318. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  319. RX_MSDU_START_INFO0_MSDU_LENGTH);
  320. msdu_chained = rx_desc->frag_info.ring2_more_count;
  321. if (msdu_len_invalid)
  322. msdu_len = 0;
  323. skb_trim(msdu, 0);
  324. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  325. msdu_len -= msdu->len;
  326. /* Note: Chained buffers do not contain rx descriptor */
  327. while (msdu_chained--) {
  328. msdu = ath10k_htt_rx_netbuf_pop(htt);
  329. if (!msdu) {
  330. __skb_queue_purge(amsdu);
  331. return -ENOENT;
  332. }
  333. __skb_queue_tail(amsdu, msdu);
  334. skb_trim(msdu, 0);
  335. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  336. msdu_len -= msdu->len;
  337. msdu_chaining = 1;
  338. }
  339. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  340. RX_MSDU_END_INFO0_LAST_MSDU;
  341. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  342. sizeof(*rx_desc) - sizeof(u32));
  343. if (last_msdu)
  344. break;
  345. }
  346. if (skb_queue_empty(amsdu))
  347. msdu_chaining = -1;
  348. /*
  349. * Don't refill the ring yet.
  350. *
  351. * First, the elements popped here are still in use - it is not
  352. * safe to overwrite them until the matching call to
  353. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  354. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  355. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  356. * (something like 3 buffers). Consequently, we'll rely on the txrx
  357. * SW to tell us when it is done pulling all the PPDU's rx buffers
  358. * out of the rx ring, and then refill it just once.
  359. */
  360. return msdu_chaining;
  361. }
  362. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  363. u64 paddr)
  364. {
  365. struct ath10k *ar = htt->ar;
  366. struct ath10k_skb_rxcb *rxcb;
  367. struct sk_buff *msdu;
  368. lockdep_assert_held(&htt->rx_ring.lock);
  369. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  370. if (!msdu)
  371. return NULL;
  372. rxcb = ATH10K_SKB_RXCB(msdu);
  373. hash_del(&rxcb->hlist);
  374. htt->rx_ring.fill_cnt--;
  375. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  376. msdu->len + skb_tailroom(msdu),
  377. DMA_FROM_DEVICE);
  378. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  379. msdu->data, msdu->len + skb_tailroom(msdu));
  380. return msdu;
  381. }
  382. static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt,
  383. struct htt_rx_in_ord_ind *ev,
  384. struct sk_buff_head *list)
  385. {
  386. struct ath10k *ar = htt->ar;
  387. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32;
  388. struct htt_rx_desc *rxd;
  389. struct sk_buff *msdu;
  390. int msdu_count;
  391. bool is_offload;
  392. u32 paddr;
  393. lockdep_assert_held(&htt->rx_ring.lock);
  394. msdu_count = __le16_to_cpu(ev->msdu_count);
  395. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  396. while (msdu_count--) {
  397. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  398. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  399. if (!msdu) {
  400. __skb_queue_purge(list);
  401. return -ENOENT;
  402. }
  403. __skb_queue_tail(list, msdu);
  404. if (!is_offload) {
  405. rxd = (void *)msdu->data;
  406. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  407. skb_put(msdu, sizeof(*rxd));
  408. skb_pull(msdu, sizeof(*rxd));
  409. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  410. if (!(__le32_to_cpu(rxd->attention.flags) &
  411. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  412. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  413. return -EIO;
  414. }
  415. }
  416. msdu_desc++;
  417. }
  418. return 0;
  419. }
  420. static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt,
  421. struct htt_rx_in_ord_ind *ev,
  422. struct sk_buff_head *list)
  423. {
  424. struct ath10k *ar = htt->ar;
  425. struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64;
  426. struct htt_rx_desc *rxd;
  427. struct sk_buff *msdu;
  428. int msdu_count;
  429. bool is_offload;
  430. u64 paddr;
  431. lockdep_assert_held(&htt->rx_ring.lock);
  432. msdu_count = __le16_to_cpu(ev->msdu_count);
  433. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  434. while (msdu_count--) {
  435. paddr = __le64_to_cpu(msdu_desc->msdu_paddr);
  436. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  437. if (!msdu) {
  438. __skb_queue_purge(list);
  439. return -ENOENT;
  440. }
  441. __skb_queue_tail(list, msdu);
  442. if (!is_offload) {
  443. rxd = (void *)msdu->data;
  444. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  445. skb_put(msdu, sizeof(*rxd));
  446. skb_pull(msdu, sizeof(*rxd));
  447. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  448. if (!(__le32_to_cpu(rxd->attention.flags) &
  449. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  450. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  451. return -EIO;
  452. }
  453. }
  454. msdu_desc++;
  455. }
  456. return 0;
  457. }
  458. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  459. {
  460. struct ath10k *ar = htt->ar;
  461. dma_addr_t paddr;
  462. void *vaddr, *vaddr_ring;
  463. size_t size;
  464. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  465. htt->rx_confused = false;
  466. /* XXX: The fill level could be changed during runtime in response to
  467. * the host processing latency. Is this really worth it?
  468. */
  469. htt->rx_ring.size = HTT_RX_RING_SIZE;
  470. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  471. htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;
  472. if (!is_power_of_2(htt->rx_ring.size)) {
  473. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  474. return -EINVAL;
  475. }
  476. htt->rx_ring.netbufs_ring =
  477. kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *),
  478. GFP_KERNEL);
  479. if (!htt->rx_ring.netbufs_ring)
  480. goto err_netbuf;
  481. size = ath10k_htt_get_rx_ring_size(htt);
  482. vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  483. if (!vaddr_ring)
  484. goto err_dma_ring;
  485. ath10k_htt_config_paddrs_ring(htt, vaddr_ring);
  486. htt->rx_ring.base_paddr = paddr;
  487. vaddr = dma_alloc_coherent(htt->ar->dev,
  488. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  489. &paddr, GFP_KERNEL);
  490. if (!vaddr)
  491. goto err_dma_idx;
  492. htt->rx_ring.alloc_idx.vaddr = vaddr;
  493. htt->rx_ring.alloc_idx.paddr = paddr;
  494. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  495. *htt->rx_ring.alloc_idx.vaddr = 0;
  496. /* Initialize the Rx refill retry timer */
  497. timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0);
  498. spin_lock_init(&htt->rx_ring.lock);
  499. htt->rx_ring.fill_cnt = 0;
  500. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  501. hash_init(htt->rx_ring.skb_table);
  502. skb_queue_head_init(&htt->rx_msdus_q);
  503. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  504. skb_queue_head_init(&htt->tx_fetch_ind_q);
  505. atomic_set(&htt->num_mpdus_ready, 0);
  506. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  507. htt->rx_ring.size, htt->rx_ring.fill_level);
  508. return 0;
  509. err_dma_idx:
  510. dma_free_coherent(htt->ar->dev,
  511. ath10k_htt_get_rx_ring_size(htt),
  512. vaddr_ring,
  513. htt->rx_ring.base_paddr);
  514. err_dma_ring:
  515. kfree(htt->rx_ring.netbufs_ring);
  516. err_netbuf:
  517. return -ENOMEM;
  518. }
  519. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  520. enum htt_rx_mpdu_encrypt_type type)
  521. {
  522. switch (type) {
  523. case HTT_RX_MPDU_ENCRYPT_NONE:
  524. return 0;
  525. case HTT_RX_MPDU_ENCRYPT_WEP40:
  526. case HTT_RX_MPDU_ENCRYPT_WEP104:
  527. return IEEE80211_WEP_IV_LEN;
  528. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  529. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  530. return IEEE80211_TKIP_IV_LEN;
  531. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  532. return IEEE80211_CCMP_HDR_LEN;
  533. case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
  534. return IEEE80211_CCMP_256_HDR_LEN;
  535. case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
  536. case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
  537. return IEEE80211_GCMP_HDR_LEN;
  538. case HTT_RX_MPDU_ENCRYPT_WEP128:
  539. case HTT_RX_MPDU_ENCRYPT_WAPI:
  540. break;
  541. }
  542. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  543. return 0;
  544. }
  545. #define MICHAEL_MIC_LEN 8
  546. static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar,
  547. enum htt_rx_mpdu_encrypt_type type)
  548. {
  549. switch (type) {
  550. case HTT_RX_MPDU_ENCRYPT_NONE:
  551. case HTT_RX_MPDU_ENCRYPT_WEP40:
  552. case HTT_RX_MPDU_ENCRYPT_WEP104:
  553. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  554. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  555. return 0;
  556. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  557. return IEEE80211_CCMP_MIC_LEN;
  558. case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
  559. return IEEE80211_CCMP_256_MIC_LEN;
  560. case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
  561. case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
  562. return IEEE80211_GCMP_MIC_LEN;
  563. case HTT_RX_MPDU_ENCRYPT_WEP128:
  564. case HTT_RX_MPDU_ENCRYPT_WAPI:
  565. break;
  566. }
  567. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  568. return 0;
  569. }
  570. static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar,
  571. enum htt_rx_mpdu_encrypt_type type)
  572. {
  573. switch (type) {
  574. case HTT_RX_MPDU_ENCRYPT_NONE:
  575. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  576. case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
  577. case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
  578. case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
  579. return 0;
  580. case HTT_RX_MPDU_ENCRYPT_WEP40:
  581. case HTT_RX_MPDU_ENCRYPT_WEP104:
  582. return IEEE80211_WEP_ICV_LEN;
  583. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  584. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  585. return IEEE80211_TKIP_ICV_LEN;
  586. case HTT_RX_MPDU_ENCRYPT_WEP128:
  587. case HTT_RX_MPDU_ENCRYPT_WAPI:
  588. break;
  589. }
  590. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  591. return 0;
  592. }
  593. struct amsdu_subframe_hdr {
  594. u8 dst[ETH_ALEN];
  595. u8 src[ETH_ALEN];
  596. __be16 len;
  597. } __packed;
  598. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  599. static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
  600. {
  601. u8 ret = 0;
  602. switch (bw) {
  603. case 0:
  604. ret = RATE_INFO_BW_20;
  605. break;
  606. case 1:
  607. ret = RATE_INFO_BW_40;
  608. break;
  609. case 2:
  610. ret = RATE_INFO_BW_80;
  611. break;
  612. case 3:
  613. ret = RATE_INFO_BW_160;
  614. break;
  615. }
  616. return ret;
  617. }
  618. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  619. struct ieee80211_rx_status *status,
  620. struct htt_rx_desc *rxd)
  621. {
  622. struct ieee80211_supported_band *sband;
  623. u8 cck, rate, bw, sgi, mcs, nss;
  624. u8 preamble = 0;
  625. u8 group_id;
  626. u32 info1, info2, info3;
  627. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  628. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  629. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  630. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  631. switch (preamble) {
  632. case HTT_RX_LEGACY:
  633. /* To get legacy rate index band is required. Since band can't
  634. * be undefined check if freq is non-zero.
  635. */
  636. if (!status->freq)
  637. return;
  638. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  639. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  640. rate &= ~RX_PPDU_START_RATE_FLAG;
  641. sband = &ar->mac.sbands[status->band];
  642. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  643. break;
  644. case HTT_RX_HT:
  645. case HTT_RX_HT_WITH_TXBF:
  646. /* HT-SIG - Table 20-11 in info2 and info3 */
  647. mcs = info2 & 0x1F;
  648. nss = mcs >> 3;
  649. bw = (info2 >> 7) & 1;
  650. sgi = (info3 >> 7) & 1;
  651. status->rate_idx = mcs;
  652. status->encoding = RX_ENC_HT;
  653. if (sgi)
  654. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  655. if (bw)
  656. status->bw = RATE_INFO_BW_40;
  657. break;
  658. case HTT_RX_VHT:
  659. case HTT_RX_VHT_WITH_TXBF:
  660. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  661. * TODO check this
  662. */
  663. bw = info2 & 3;
  664. sgi = info3 & 1;
  665. group_id = (info2 >> 4) & 0x3F;
  666. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  667. mcs = (info3 >> 4) & 0x0F;
  668. nss = ((info2 >> 10) & 0x07) + 1;
  669. } else {
  670. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  671. * so it's impossible to decode MCS. Also since
  672. * firmware consumes Group Id Management frames host
  673. * has no knowledge regarding group/user position
  674. * mapping so it's impossible to pick the correct Nsts
  675. * from VHT-SIG-A1.
  676. *
  677. * Bandwidth and SGI are valid so report the rateinfo
  678. * on best-effort basis.
  679. */
  680. mcs = 0;
  681. nss = 1;
  682. }
  683. if (mcs > 0x09) {
  684. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  685. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  686. __le32_to_cpu(rxd->attention.flags),
  687. __le32_to_cpu(rxd->mpdu_start.info0),
  688. __le32_to_cpu(rxd->mpdu_start.info1),
  689. __le32_to_cpu(rxd->msdu_start.common.info0),
  690. __le32_to_cpu(rxd->msdu_start.common.info1),
  691. rxd->ppdu_start.info0,
  692. __le32_to_cpu(rxd->ppdu_start.info1),
  693. __le32_to_cpu(rxd->ppdu_start.info2),
  694. __le32_to_cpu(rxd->ppdu_start.info3),
  695. __le32_to_cpu(rxd->ppdu_start.info4));
  696. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  697. __le32_to_cpu(rxd->msdu_end.common.info0),
  698. __le32_to_cpu(rxd->mpdu_end.info0));
  699. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  700. "rx desc msdu payload: ",
  701. rxd->msdu_payload, 50);
  702. }
  703. status->rate_idx = mcs;
  704. status->nss = nss;
  705. if (sgi)
  706. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  707. status->bw = ath10k_bw_to_mac80211_bw(bw);
  708. status->encoding = RX_ENC_VHT;
  709. break;
  710. default:
  711. break;
  712. }
  713. }
  714. static struct ieee80211_channel *
  715. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  716. {
  717. struct ath10k_peer *peer;
  718. struct ath10k_vif *arvif;
  719. struct cfg80211_chan_def def;
  720. u16 peer_id;
  721. lockdep_assert_held(&ar->data_lock);
  722. if (!rxd)
  723. return NULL;
  724. if (rxd->attention.flags &
  725. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  726. return NULL;
  727. if (!(rxd->msdu_end.common.info0 &
  728. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  729. return NULL;
  730. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  731. RX_MPDU_START_INFO0_PEER_IDX);
  732. peer = ath10k_peer_find_by_id(ar, peer_id);
  733. if (!peer)
  734. return NULL;
  735. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  736. if (WARN_ON_ONCE(!arvif))
  737. return NULL;
  738. if (ath10k_mac_vif_chan(arvif->vif, &def))
  739. return NULL;
  740. return def.chan;
  741. }
  742. static struct ieee80211_channel *
  743. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  744. {
  745. struct ath10k_vif *arvif;
  746. struct cfg80211_chan_def def;
  747. lockdep_assert_held(&ar->data_lock);
  748. list_for_each_entry(arvif, &ar->arvifs, list) {
  749. if (arvif->vdev_id == vdev_id &&
  750. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  751. return def.chan;
  752. }
  753. return NULL;
  754. }
  755. static void
  756. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  757. struct ieee80211_chanctx_conf *conf,
  758. void *data)
  759. {
  760. struct cfg80211_chan_def *def = data;
  761. *def = conf->def;
  762. }
  763. static struct ieee80211_channel *
  764. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  765. {
  766. struct cfg80211_chan_def def = {};
  767. ieee80211_iter_chan_contexts_atomic(ar->hw,
  768. ath10k_htt_rx_h_any_chan_iter,
  769. &def);
  770. return def.chan;
  771. }
  772. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  773. struct ieee80211_rx_status *status,
  774. struct htt_rx_desc *rxd,
  775. u32 vdev_id)
  776. {
  777. struct ieee80211_channel *ch;
  778. spin_lock_bh(&ar->data_lock);
  779. ch = ar->scan_channel;
  780. if (!ch)
  781. ch = ar->rx_channel;
  782. if (!ch)
  783. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  784. if (!ch)
  785. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  786. if (!ch)
  787. ch = ath10k_htt_rx_h_any_channel(ar);
  788. if (!ch)
  789. ch = ar->tgt_oper_chan;
  790. spin_unlock_bh(&ar->data_lock);
  791. if (!ch)
  792. return false;
  793. status->band = ch->band;
  794. status->freq = ch->center_freq;
  795. return true;
  796. }
  797. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  798. struct ieee80211_rx_status *status,
  799. struct htt_rx_desc *rxd)
  800. {
  801. int i;
  802. for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) {
  803. status->chains &= ~BIT(i);
  804. if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) {
  805. status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR +
  806. rxd->ppdu_start.rssi_chains[i].pri20_mhz;
  807. status->chains |= BIT(i);
  808. }
  809. }
  810. /* FIXME: Get real NF */
  811. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  812. rxd->ppdu_start.rssi_comb;
  813. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  814. }
  815. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  816. struct ieee80211_rx_status *status,
  817. struct htt_rx_desc *rxd)
  818. {
  819. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  820. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  821. * TSF. Is it worth holding frames until end of PPDU is known?
  822. *
  823. * FIXME: Can we get/compute 64bit TSF?
  824. */
  825. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  826. status->flag |= RX_FLAG_MACTIME_END;
  827. }
  828. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  829. struct sk_buff_head *amsdu,
  830. struct ieee80211_rx_status *status,
  831. u32 vdev_id)
  832. {
  833. struct sk_buff *first;
  834. struct htt_rx_desc *rxd;
  835. bool is_first_ppdu;
  836. bool is_last_ppdu;
  837. if (skb_queue_empty(amsdu))
  838. return;
  839. first = skb_peek(amsdu);
  840. rxd = (void *)first->data - sizeof(*rxd);
  841. is_first_ppdu = !!(rxd->attention.flags &
  842. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  843. is_last_ppdu = !!(rxd->attention.flags &
  844. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  845. if (is_first_ppdu) {
  846. /* New PPDU starts so clear out the old per-PPDU status. */
  847. status->freq = 0;
  848. status->rate_idx = 0;
  849. status->nss = 0;
  850. status->encoding = RX_ENC_LEGACY;
  851. status->bw = RATE_INFO_BW_20;
  852. status->flag &= ~RX_FLAG_MACTIME_END;
  853. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  854. status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
  855. status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
  856. status->ampdu_reference = ar->ampdu_reference;
  857. ath10k_htt_rx_h_signal(ar, status, rxd);
  858. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  859. ath10k_htt_rx_h_rates(ar, status, rxd);
  860. }
  861. if (is_last_ppdu) {
  862. ath10k_htt_rx_h_mactime(ar, status, rxd);
  863. /* set ampdu last segment flag */
  864. status->flag |= RX_FLAG_AMPDU_IS_LAST;
  865. ar->ampdu_reference++;
  866. }
  867. }
  868. static const char * const tid_to_ac[] = {
  869. "BE",
  870. "BK",
  871. "BK",
  872. "BE",
  873. "VI",
  874. "VI",
  875. "VO",
  876. "VO",
  877. };
  878. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  879. {
  880. u8 *qc;
  881. int tid;
  882. if (!ieee80211_is_data_qos(hdr->frame_control))
  883. return "";
  884. qc = ieee80211_get_qos_ctl(hdr);
  885. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  886. if (tid < 8)
  887. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  888. else
  889. snprintf(out, size, "tid %d", tid);
  890. return out;
  891. }
  892. static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar,
  893. struct ieee80211_rx_status *rx_status,
  894. struct sk_buff *skb)
  895. {
  896. struct ieee80211_rx_status *status;
  897. status = IEEE80211_SKB_RXCB(skb);
  898. *status = *rx_status;
  899. __skb_queue_tail(&ar->htt.rx_msdus_q, skb);
  900. }
  901. static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)
  902. {
  903. struct ieee80211_rx_status *status;
  904. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  905. char tid[32];
  906. status = IEEE80211_SKB_RXCB(skb);
  907. ath10k_dbg(ar, ATH10K_DBG_DATA,
  908. "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  909. skb,
  910. skb->len,
  911. ieee80211_get_SA(hdr),
  912. ath10k_get_tid(hdr, tid, sizeof(tid)),
  913. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  914. "mcast" : "ucast",
  915. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  916. (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
  917. (status->encoding == RX_ENC_HT) ? "ht" : "",
  918. (status->encoding == RX_ENC_VHT) ? "vht" : "",
  919. (status->bw == RATE_INFO_BW_40) ? "40" : "",
  920. (status->bw == RATE_INFO_BW_80) ? "80" : "",
  921. (status->bw == RATE_INFO_BW_160) ? "160" : "",
  922. status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
  923. status->rate_idx,
  924. status->nss,
  925. status->freq,
  926. status->band, status->flag,
  927. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  928. !!(status->flag & RX_FLAG_MMIC_ERROR),
  929. !!(status->flag & RX_FLAG_AMSDU_MORE));
  930. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  931. skb->data, skb->len);
  932. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  933. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  934. ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
  935. }
  936. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  937. struct ieee80211_hdr *hdr)
  938. {
  939. int len = ieee80211_hdrlen(hdr->frame_control);
  940. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  941. ar->running_fw->fw_file.fw_features))
  942. len = round_up(len, 4);
  943. return len;
  944. }
  945. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  946. struct sk_buff *msdu,
  947. struct ieee80211_rx_status *status,
  948. enum htt_rx_mpdu_encrypt_type enctype,
  949. bool is_decrypted)
  950. {
  951. struct ieee80211_hdr *hdr;
  952. struct htt_rx_desc *rxd;
  953. size_t hdr_len;
  954. size_t crypto_len;
  955. bool is_first;
  956. bool is_last;
  957. rxd = (void *)msdu->data - sizeof(*rxd);
  958. is_first = !!(rxd->msdu_end.common.info0 &
  959. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  960. is_last = !!(rxd->msdu_end.common.info0 &
  961. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  962. /* Delivered decapped frame:
  963. * [802.11 header]
  964. * [crypto param] <-- can be trimmed if !fcs_err &&
  965. * !decrypt_err && !peer_idx_invalid
  966. * [amsdu header] <-- only if A-MSDU
  967. * [rfc1042/llc]
  968. * [payload]
  969. * [FCS] <-- at end, needs to be trimmed
  970. */
  971. /* This probably shouldn't happen but warn just in case */
  972. if (unlikely(WARN_ON_ONCE(!is_first)))
  973. return;
  974. /* This probably shouldn't happen but warn just in case */
  975. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  976. return;
  977. skb_trim(msdu, msdu->len - FCS_LEN);
  978. /* In most cases this will be true for sniffed frames. It makes sense
  979. * to deliver them as-is without stripping the crypto param. This is
  980. * necessary for software based decryption.
  981. *
  982. * If there's no error then the frame is decrypted. At least that is
  983. * the case for frames that come in via fragmented rx indication.
  984. */
  985. if (!is_decrypted)
  986. return;
  987. /* The payload is decrypted so strip crypto params. Start from tail
  988. * since hdr is used to compute some stuff.
  989. */
  990. hdr = (void *)msdu->data;
  991. /* Tail */
  992. if (status->flag & RX_FLAG_IV_STRIPPED) {
  993. skb_trim(msdu, msdu->len -
  994. ath10k_htt_rx_crypto_mic_len(ar, enctype));
  995. skb_trim(msdu, msdu->len -
  996. ath10k_htt_rx_crypto_icv_len(ar, enctype));
  997. } else {
  998. /* MIC */
  999. if (status->flag & RX_FLAG_MIC_STRIPPED)
  1000. skb_trim(msdu, msdu->len -
  1001. ath10k_htt_rx_crypto_mic_len(ar, enctype));
  1002. /* ICV */
  1003. if (status->flag & RX_FLAG_ICV_STRIPPED)
  1004. skb_trim(msdu, msdu->len -
  1005. ath10k_htt_rx_crypto_icv_len(ar, enctype));
  1006. }
  1007. /* MMIC */
  1008. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  1009. !ieee80211_has_morefrags(hdr->frame_control) &&
  1010. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1011. skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN);
  1012. /* Head */
  1013. if (status->flag & RX_FLAG_IV_STRIPPED) {
  1014. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1015. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1016. memmove((void *)msdu->data + crypto_len,
  1017. (void *)msdu->data, hdr_len);
  1018. skb_pull(msdu, crypto_len);
  1019. }
  1020. }
  1021. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  1022. struct sk_buff *msdu,
  1023. struct ieee80211_rx_status *status,
  1024. const u8 first_hdr[64],
  1025. enum htt_rx_mpdu_encrypt_type enctype)
  1026. {
  1027. struct ieee80211_hdr *hdr;
  1028. struct htt_rx_desc *rxd;
  1029. size_t hdr_len;
  1030. u8 da[ETH_ALEN];
  1031. u8 sa[ETH_ALEN];
  1032. int l3_pad_bytes;
  1033. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1034. /* Delivered decapped frame:
  1035. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  1036. * [rfc1042/llc]
  1037. *
  1038. * Note: The nwifi header doesn't have QoS Control and is
  1039. * (always?) a 3addr frame.
  1040. *
  1041. * Note2: There's no A-MSDU subframe header. Even if it's part
  1042. * of an A-MSDU.
  1043. */
  1044. /* pull decapped header and copy SA & DA */
  1045. rxd = (void *)msdu->data - sizeof(*rxd);
  1046. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1047. skb_put(msdu, l3_pad_bytes);
  1048. hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
  1049. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  1050. ether_addr_copy(da, ieee80211_get_DA(hdr));
  1051. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  1052. skb_pull(msdu, hdr_len);
  1053. /* push original 802.11 header */
  1054. hdr = (struct ieee80211_hdr *)first_hdr;
  1055. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1056. if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
  1057. memcpy(skb_push(msdu,
  1058. ath10k_htt_rx_crypto_param_len(ar, enctype)),
  1059. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1060. ath10k_htt_rx_crypto_param_len(ar, enctype));
  1061. }
  1062. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1063. /* original 802.11 header has a different DA and in
  1064. * case of 4addr it may also have different SA
  1065. */
  1066. hdr = (struct ieee80211_hdr *)msdu->data;
  1067. ether_addr_copy(ieee80211_get_DA(hdr), da);
  1068. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  1069. }
  1070. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  1071. struct sk_buff *msdu,
  1072. enum htt_rx_mpdu_encrypt_type enctype)
  1073. {
  1074. struct ieee80211_hdr *hdr;
  1075. struct htt_rx_desc *rxd;
  1076. size_t hdr_len, crypto_len;
  1077. void *rfc1042;
  1078. bool is_first, is_last, is_amsdu;
  1079. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1080. rxd = (void *)msdu->data - sizeof(*rxd);
  1081. hdr = (void *)rxd->rx_hdr_status;
  1082. is_first = !!(rxd->msdu_end.common.info0 &
  1083. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  1084. is_last = !!(rxd->msdu_end.common.info0 &
  1085. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  1086. is_amsdu = !(is_first && is_last);
  1087. rfc1042 = hdr;
  1088. if (is_first) {
  1089. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1090. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1091. rfc1042 += round_up(hdr_len, bytes_aligned) +
  1092. round_up(crypto_len, bytes_aligned);
  1093. }
  1094. if (is_amsdu)
  1095. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  1096. return rfc1042;
  1097. }
  1098. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  1099. struct sk_buff *msdu,
  1100. struct ieee80211_rx_status *status,
  1101. const u8 first_hdr[64],
  1102. enum htt_rx_mpdu_encrypt_type enctype)
  1103. {
  1104. struct ieee80211_hdr *hdr;
  1105. struct ethhdr *eth;
  1106. size_t hdr_len;
  1107. void *rfc1042;
  1108. u8 da[ETH_ALEN];
  1109. u8 sa[ETH_ALEN];
  1110. int l3_pad_bytes;
  1111. struct htt_rx_desc *rxd;
  1112. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1113. /* Delivered decapped frame:
  1114. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  1115. * [payload]
  1116. */
  1117. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  1118. if (WARN_ON_ONCE(!rfc1042))
  1119. return;
  1120. rxd = (void *)msdu->data - sizeof(*rxd);
  1121. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1122. skb_put(msdu, l3_pad_bytes);
  1123. skb_pull(msdu, l3_pad_bytes);
  1124. /* pull decapped header and copy SA & DA */
  1125. eth = (struct ethhdr *)msdu->data;
  1126. ether_addr_copy(da, eth->h_dest);
  1127. ether_addr_copy(sa, eth->h_source);
  1128. skb_pull(msdu, sizeof(struct ethhdr));
  1129. /* push rfc1042/llc/snap */
  1130. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  1131. sizeof(struct rfc1042_hdr));
  1132. /* push original 802.11 header */
  1133. hdr = (struct ieee80211_hdr *)first_hdr;
  1134. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1135. if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
  1136. memcpy(skb_push(msdu,
  1137. ath10k_htt_rx_crypto_param_len(ar, enctype)),
  1138. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1139. ath10k_htt_rx_crypto_param_len(ar, enctype));
  1140. }
  1141. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1142. /* original 802.11 header has a different DA and in
  1143. * case of 4addr it may also have different SA
  1144. */
  1145. hdr = (struct ieee80211_hdr *)msdu->data;
  1146. ether_addr_copy(ieee80211_get_DA(hdr), da);
  1147. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  1148. }
  1149. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  1150. struct sk_buff *msdu,
  1151. struct ieee80211_rx_status *status,
  1152. const u8 first_hdr[64],
  1153. enum htt_rx_mpdu_encrypt_type enctype)
  1154. {
  1155. struct ieee80211_hdr *hdr;
  1156. size_t hdr_len;
  1157. int l3_pad_bytes;
  1158. struct htt_rx_desc *rxd;
  1159. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1160. /* Delivered decapped frame:
  1161. * [amsdu header] <-- replaced with 802.11 hdr
  1162. * [rfc1042/llc]
  1163. * [payload]
  1164. */
  1165. rxd = (void *)msdu->data - sizeof(*rxd);
  1166. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1167. skb_put(msdu, l3_pad_bytes);
  1168. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
  1169. hdr = (struct ieee80211_hdr *)first_hdr;
  1170. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1171. if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
  1172. memcpy(skb_push(msdu,
  1173. ath10k_htt_rx_crypto_param_len(ar, enctype)),
  1174. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1175. ath10k_htt_rx_crypto_param_len(ar, enctype));
  1176. }
  1177. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1178. }
  1179. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1180. struct sk_buff *msdu,
  1181. struct ieee80211_rx_status *status,
  1182. u8 first_hdr[64],
  1183. enum htt_rx_mpdu_encrypt_type enctype,
  1184. bool is_decrypted)
  1185. {
  1186. struct htt_rx_desc *rxd;
  1187. enum rx_msdu_decap_format decap;
  1188. /* First msdu's decapped header:
  1189. * [802.11 header] <-- padded to 4 bytes long
  1190. * [crypto param] <-- padded to 4 bytes long
  1191. * [amsdu header] <-- only if A-MSDU
  1192. * [rfc1042/llc]
  1193. *
  1194. * Other (2nd, 3rd, ..) msdu's decapped header:
  1195. * [amsdu header] <-- only if A-MSDU
  1196. * [rfc1042/llc]
  1197. */
  1198. rxd = (void *)msdu->data - sizeof(*rxd);
  1199. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1200. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1201. switch (decap) {
  1202. case RX_MSDU_DECAP_RAW:
  1203. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1204. is_decrypted);
  1205. break;
  1206. case RX_MSDU_DECAP_NATIVE_WIFI:
  1207. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr,
  1208. enctype);
  1209. break;
  1210. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1211. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1212. break;
  1213. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1214. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr,
  1215. enctype);
  1216. break;
  1217. }
  1218. }
  1219. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1220. {
  1221. struct htt_rx_desc *rxd;
  1222. u32 flags, info;
  1223. bool is_ip4, is_ip6;
  1224. bool is_tcp, is_udp;
  1225. bool ip_csum_ok, tcpudp_csum_ok;
  1226. rxd = (void *)skb->data - sizeof(*rxd);
  1227. flags = __le32_to_cpu(rxd->attention.flags);
  1228. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1229. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1230. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1231. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1232. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1233. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1234. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1235. if (!is_ip4 && !is_ip6)
  1236. return CHECKSUM_NONE;
  1237. if (!is_tcp && !is_udp)
  1238. return CHECKSUM_NONE;
  1239. if (!ip_csum_ok)
  1240. return CHECKSUM_NONE;
  1241. if (!tcpudp_csum_ok)
  1242. return CHECKSUM_NONE;
  1243. return CHECKSUM_UNNECESSARY;
  1244. }
  1245. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1246. {
  1247. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1248. }
  1249. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1250. struct sk_buff_head *amsdu,
  1251. struct ieee80211_rx_status *status,
  1252. bool fill_crypt_header,
  1253. u8 *rx_hdr,
  1254. enum ath10k_pkt_rx_err *err)
  1255. {
  1256. struct sk_buff *first;
  1257. struct sk_buff *last;
  1258. struct sk_buff *msdu;
  1259. struct htt_rx_desc *rxd;
  1260. struct ieee80211_hdr *hdr;
  1261. enum htt_rx_mpdu_encrypt_type enctype;
  1262. u8 first_hdr[64];
  1263. u8 *qos;
  1264. bool has_fcs_err;
  1265. bool has_crypto_err;
  1266. bool has_tkip_err;
  1267. bool has_peer_idx_invalid;
  1268. bool is_decrypted;
  1269. bool is_mgmt;
  1270. u32 attention;
  1271. if (skb_queue_empty(amsdu))
  1272. return;
  1273. first = skb_peek(amsdu);
  1274. rxd = (void *)first->data - sizeof(*rxd);
  1275. is_mgmt = !!(rxd->attention.flags &
  1276. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1277. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1278. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1279. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1280. * decapped header. It'll be used for undecapping of each MSDU.
  1281. */
  1282. hdr = (void *)rxd->rx_hdr_status;
  1283. memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
  1284. if (rx_hdr)
  1285. memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
  1286. /* Each A-MSDU subframe will use the original header as the base and be
  1287. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1288. */
  1289. hdr = (void *)first_hdr;
  1290. if (ieee80211_is_data_qos(hdr->frame_control)) {
  1291. qos = ieee80211_get_qos_ctl(hdr);
  1292. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1293. }
  1294. /* Some attention flags are valid only in the last MSDU. */
  1295. last = skb_peek_tail(amsdu);
  1296. rxd = (void *)last->data - sizeof(*rxd);
  1297. attention = __le32_to_cpu(rxd->attention.flags);
  1298. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1299. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1300. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1301. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1302. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1303. * e.g. due to fcs error, missing peer or invalid key data it will
  1304. * report the frame as raw.
  1305. */
  1306. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1307. !has_fcs_err &&
  1308. !has_crypto_err &&
  1309. !has_peer_idx_invalid);
  1310. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1311. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1312. RX_FLAG_MMIC_ERROR |
  1313. RX_FLAG_DECRYPTED |
  1314. RX_FLAG_IV_STRIPPED |
  1315. RX_FLAG_ONLY_MONITOR |
  1316. RX_FLAG_MMIC_STRIPPED);
  1317. if (has_fcs_err)
  1318. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1319. if (has_tkip_err)
  1320. status->flag |= RX_FLAG_MMIC_ERROR;
  1321. if (err) {
  1322. if (has_fcs_err)
  1323. *err = ATH10K_PKT_RX_ERR_FCS;
  1324. else if (has_tkip_err)
  1325. *err = ATH10K_PKT_RX_ERR_TKIP;
  1326. else if (has_crypto_err)
  1327. *err = ATH10K_PKT_RX_ERR_CRYPT;
  1328. else if (has_peer_idx_invalid)
  1329. *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL;
  1330. }
  1331. /* Firmware reports all necessary management frames via WMI already.
  1332. * They are not reported to monitor interfaces at all so pass the ones
  1333. * coming via HTT to monitor interfaces instead. This simplifies
  1334. * matters a lot.
  1335. */
  1336. if (is_mgmt)
  1337. status->flag |= RX_FLAG_ONLY_MONITOR;
  1338. if (is_decrypted) {
  1339. status->flag |= RX_FLAG_DECRYPTED;
  1340. if (likely(!is_mgmt))
  1341. status->flag |= RX_FLAG_MMIC_STRIPPED;
  1342. if (fill_crypt_header)
  1343. status->flag |= RX_FLAG_MIC_STRIPPED |
  1344. RX_FLAG_ICV_STRIPPED;
  1345. else
  1346. status->flag |= RX_FLAG_IV_STRIPPED;
  1347. }
  1348. skb_queue_walk(amsdu, msdu) {
  1349. ath10k_htt_rx_h_csum_offload(msdu);
  1350. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1351. is_decrypted);
  1352. /* Undecapping involves copying the original 802.11 header back
  1353. * to sk_buff. If frame is protected and hardware has decrypted
  1354. * it then remove the protected bit.
  1355. */
  1356. if (!is_decrypted)
  1357. continue;
  1358. if (is_mgmt)
  1359. continue;
  1360. if (fill_crypt_header)
  1361. continue;
  1362. hdr = (void *)msdu->data;
  1363. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1364. }
  1365. }
  1366. static void ath10k_htt_rx_h_enqueue(struct ath10k *ar,
  1367. struct sk_buff_head *amsdu,
  1368. struct ieee80211_rx_status *status)
  1369. {
  1370. struct sk_buff *msdu;
  1371. struct sk_buff *first_subframe;
  1372. first_subframe = skb_peek(amsdu);
  1373. while ((msdu = __skb_dequeue(amsdu))) {
  1374. /* Setup per-MSDU flags */
  1375. if (skb_queue_empty(amsdu))
  1376. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1377. else
  1378. status->flag |= RX_FLAG_AMSDU_MORE;
  1379. if (msdu == first_subframe) {
  1380. first_subframe = NULL;
  1381. status->flag &= ~RX_FLAG_ALLOW_SAME_PN;
  1382. } else {
  1383. status->flag |= RX_FLAG_ALLOW_SAME_PN;
  1384. }
  1385. ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
  1386. }
  1387. }
  1388. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu,
  1389. unsigned long int *unchain_cnt)
  1390. {
  1391. struct sk_buff *skb, *first;
  1392. int space;
  1393. int total_len = 0;
  1394. int amsdu_len = skb_queue_len(amsdu);
  1395. /* TODO: Might could optimize this by using
  1396. * skb_try_coalesce or similar method to
  1397. * decrease copying, or maybe get mac80211 to
  1398. * provide a way to just receive a list of
  1399. * skb?
  1400. */
  1401. first = __skb_dequeue(amsdu);
  1402. /* Allocate total length all at once. */
  1403. skb_queue_walk(amsdu, skb)
  1404. total_len += skb->len;
  1405. space = total_len - skb_tailroom(first);
  1406. if ((space > 0) &&
  1407. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1408. /* TODO: bump some rx-oom error stat */
  1409. /* put it back together so we can free the
  1410. * whole list at once.
  1411. */
  1412. __skb_queue_head(amsdu, first);
  1413. return -1;
  1414. }
  1415. /* Walk list again, copying contents into
  1416. * msdu_head
  1417. */
  1418. while ((skb = __skb_dequeue(amsdu))) {
  1419. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1420. skb->len);
  1421. dev_kfree_skb_any(skb);
  1422. }
  1423. __skb_queue_head(amsdu, first);
  1424. *unchain_cnt += amsdu_len - 1;
  1425. return 0;
  1426. }
  1427. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1428. struct sk_buff_head *amsdu,
  1429. unsigned long int *drop_cnt,
  1430. unsigned long int *unchain_cnt)
  1431. {
  1432. struct sk_buff *first;
  1433. struct htt_rx_desc *rxd;
  1434. enum rx_msdu_decap_format decap;
  1435. first = skb_peek(amsdu);
  1436. rxd = (void *)first->data - sizeof(*rxd);
  1437. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1438. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1439. /* FIXME: Current unchaining logic can only handle simple case of raw
  1440. * msdu chaining. If decapping is other than raw the chaining may be
  1441. * more complex and this isn't handled by the current code. Don't even
  1442. * try re-constructing such frames - it'll be pretty much garbage.
  1443. */
  1444. if (decap != RX_MSDU_DECAP_RAW ||
  1445. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1446. *drop_cnt += skb_queue_len(amsdu);
  1447. __skb_queue_purge(amsdu);
  1448. return;
  1449. }
  1450. ath10k_unchain_msdu(amsdu, unchain_cnt);
  1451. }
  1452. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1453. struct sk_buff_head *amsdu,
  1454. struct ieee80211_rx_status *rx_status)
  1455. {
  1456. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1457. * invalid/dangerous frames.
  1458. */
  1459. if (!rx_status->freq) {
  1460. ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n");
  1461. return false;
  1462. }
  1463. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1464. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1465. return false;
  1466. }
  1467. return true;
  1468. }
  1469. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1470. struct sk_buff_head *amsdu,
  1471. struct ieee80211_rx_status *rx_status,
  1472. unsigned long int *drop_cnt)
  1473. {
  1474. if (skb_queue_empty(amsdu))
  1475. return;
  1476. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1477. return;
  1478. if (drop_cnt)
  1479. *drop_cnt += skb_queue_len(amsdu);
  1480. __skb_queue_purge(amsdu);
  1481. }
  1482. static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
  1483. {
  1484. struct ath10k *ar = htt->ar;
  1485. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1486. struct sk_buff_head amsdu;
  1487. int ret;
  1488. unsigned long int drop_cnt = 0;
  1489. unsigned long int unchain_cnt = 0;
  1490. unsigned long int drop_cnt_filter = 0;
  1491. unsigned long int msdus_to_queue, num_msdus;
  1492. enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX;
  1493. u8 first_hdr[RX_HTT_HDR_STATUS_LEN];
  1494. __skb_queue_head_init(&amsdu);
  1495. spin_lock_bh(&htt->rx_ring.lock);
  1496. if (htt->rx_confused) {
  1497. spin_unlock_bh(&htt->rx_ring.lock);
  1498. return -EIO;
  1499. }
  1500. ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
  1501. spin_unlock_bh(&htt->rx_ring.lock);
  1502. if (ret < 0) {
  1503. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1504. __skb_queue_purge(&amsdu);
  1505. /* FIXME: It's probably a good idea to reboot the
  1506. * device instead of leaving it inoperable.
  1507. */
  1508. htt->rx_confused = true;
  1509. return ret;
  1510. }
  1511. num_msdus = skb_queue_len(&amsdu);
  1512. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1513. /* only for ret = 1 indicates chained msdus */
  1514. if (ret > 0)
  1515. ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt);
  1516. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter);
  1517. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err);
  1518. msdus_to_queue = skb_queue_len(&amsdu);
  1519. ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status);
  1520. ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err,
  1521. unchain_cnt, drop_cnt, drop_cnt_filter,
  1522. msdus_to_queue);
  1523. return 0;
  1524. }
  1525. static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
  1526. struct htt_rx_indication *rx)
  1527. {
  1528. struct ath10k *ar = htt->ar;
  1529. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1530. int num_mpdu_ranges;
  1531. int i, mpdu_count = 0;
  1532. u16 peer_id;
  1533. u8 tid;
  1534. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1535. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1536. peer_id = __le16_to_cpu(rx->hdr.peer_id);
  1537. tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
  1538. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1539. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1540. rx, sizeof(*rx) +
  1541. (sizeof(struct htt_rx_indication_mpdu_range) *
  1542. num_mpdu_ranges));
  1543. for (i = 0; i < num_mpdu_ranges; i++)
  1544. mpdu_count += mpdu_ranges[i].mpdu_count;
  1545. atomic_add(mpdu_count, &htt->num_mpdus_ready);
  1546. ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges,
  1547. num_mpdu_ranges);
  1548. }
  1549. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  1550. struct sk_buff *skb)
  1551. {
  1552. struct ath10k_htt *htt = &ar->htt;
  1553. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1554. struct htt_tx_done tx_done = {};
  1555. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1556. __le16 msdu_id;
  1557. int i;
  1558. switch (status) {
  1559. case HTT_DATA_TX_STATUS_NO_ACK:
  1560. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1561. break;
  1562. case HTT_DATA_TX_STATUS_OK:
  1563. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1564. break;
  1565. case HTT_DATA_TX_STATUS_DISCARD:
  1566. case HTT_DATA_TX_STATUS_POSTPONE:
  1567. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1568. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1569. break;
  1570. default:
  1571. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1572. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1573. break;
  1574. }
  1575. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1576. resp->data_tx_completion.num_msdus);
  1577. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1578. msdu_id = resp->data_tx_completion.msdus[i];
  1579. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1580. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  1581. * interrupt and main interrupt (MSI/-X range case) for the same
  1582. * HTC service so it should be safe to use kfifo_put w/o lock.
  1583. *
  1584. * From kfifo_put() documentation:
  1585. * Note that with only one concurrent reader and one concurrent
  1586. * writer, you don't need extra locking to use these macro.
  1587. */
  1588. if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  1589. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  1590. tx_done.msdu_id, tx_done.status);
  1591. ath10k_txrx_tx_unref(htt, &tx_done);
  1592. }
  1593. }
  1594. }
  1595. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1596. {
  1597. struct htt_rx_addba *ev = &resp->rx_addba;
  1598. struct ath10k_peer *peer;
  1599. struct ath10k_vif *arvif;
  1600. u16 info0, tid, peer_id;
  1601. info0 = __le16_to_cpu(ev->info0);
  1602. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1603. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1604. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1605. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1606. tid, peer_id, ev->window_size);
  1607. spin_lock_bh(&ar->data_lock);
  1608. peer = ath10k_peer_find_by_id(ar, peer_id);
  1609. if (!peer) {
  1610. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1611. peer_id);
  1612. spin_unlock_bh(&ar->data_lock);
  1613. return;
  1614. }
  1615. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1616. if (!arvif) {
  1617. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1618. peer->vdev_id);
  1619. spin_unlock_bh(&ar->data_lock);
  1620. return;
  1621. }
  1622. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1623. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1624. peer->addr, tid, ev->window_size);
  1625. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1626. spin_unlock_bh(&ar->data_lock);
  1627. }
  1628. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1629. {
  1630. struct htt_rx_delba *ev = &resp->rx_delba;
  1631. struct ath10k_peer *peer;
  1632. struct ath10k_vif *arvif;
  1633. u16 info0, tid, peer_id;
  1634. info0 = __le16_to_cpu(ev->info0);
  1635. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1636. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1637. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1638. "htt rx delba tid %hu peer_id %hu\n",
  1639. tid, peer_id);
  1640. spin_lock_bh(&ar->data_lock);
  1641. peer = ath10k_peer_find_by_id(ar, peer_id);
  1642. if (!peer) {
  1643. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1644. peer_id);
  1645. spin_unlock_bh(&ar->data_lock);
  1646. return;
  1647. }
  1648. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1649. if (!arvif) {
  1650. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1651. peer->vdev_id);
  1652. spin_unlock_bh(&ar->data_lock);
  1653. return;
  1654. }
  1655. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1656. "htt rx stop rx ba session sta %pM tid %hu\n",
  1657. peer->addr, tid);
  1658. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1659. spin_unlock_bh(&ar->data_lock);
  1660. }
  1661. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1662. struct sk_buff_head *amsdu)
  1663. {
  1664. struct sk_buff *msdu;
  1665. struct htt_rx_desc *rxd;
  1666. if (skb_queue_empty(list))
  1667. return -ENOBUFS;
  1668. if (WARN_ON(!skb_queue_empty(amsdu)))
  1669. return -EINVAL;
  1670. while ((msdu = __skb_dequeue(list))) {
  1671. __skb_queue_tail(amsdu, msdu);
  1672. rxd = (void *)msdu->data - sizeof(*rxd);
  1673. if (rxd->msdu_end.common.info0 &
  1674. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1675. break;
  1676. }
  1677. msdu = skb_peek_tail(amsdu);
  1678. rxd = (void *)msdu->data - sizeof(*rxd);
  1679. if (!(rxd->msdu_end.common.info0 &
  1680. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1681. skb_queue_splice_init(amsdu, list);
  1682. return -EAGAIN;
  1683. }
  1684. return 0;
  1685. }
  1686. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1687. struct sk_buff *skb)
  1688. {
  1689. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1690. if (!ieee80211_has_protected(hdr->frame_control))
  1691. return;
  1692. /* Offloaded frames are already decrypted but firmware insists they are
  1693. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1694. * will drop the frame.
  1695. */
  1696. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1697. status->flag |= RX_FLAG_DECRYPTED |
  1698. RX_FLAG_IV_STRIPPED |
  1699. RX_FLAG_MMIC_STRIPPED;
  1700. }
  1701. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1702. struct sk_buff_head *list)
  1703. {
  1704. struct ath10k_htt *htt = &ar->htt;
  1705. struct ieee80211_rx_status *status = &htt->rx_status;
  1706. struct htt_rx_offload_msdu *rx;
  1707. struct sk_buff *msdu;
  1708. size_t offset;
  1709. while ((msdu = __skb_dequeue(list))) {
  1710. /* Offloaded frames don't have Rx descriptor. Instead they have
  1711. * a short meta information header.
  1712. */
  1713. rx = (void *)msdu->data;
  1714. skb_put(msdu, sizeof(*rx));
  1715. skb_pull(msdu, sizeof(*rx));
  1716. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1717. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1718. dev_kfree_skb_any(msdu);
  1719. continue;
  1720. }
  1721. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1722. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1723. * actual payload is unaligned. Align the frame. Otherwise
  1724. * mac80211 complains. This shouldn't reduce performance much
  1725. * because these offloaded frames are rare.
  1726. */
  1727. offset = 4 - ((unsigned long)msdu->data & 3);
  1728. skb_put(msdu, offset);
  1729. memmove(msdu->data + offset, msdu->data, msdu->len);
  1730. skb_pull(msdu, offset);
  1731. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1732. * if possible later.
  1733. */
  1734. memset(status, 0, sizeof(*status));
  1735. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1736. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1737. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1738. ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
  1739. }
  1740. }
  1741. static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1742. {
  1743. struct ath10k_htt *htt = &ar->htt;
  1744. struct htt_resp *resp = (void *)skb->data;
  1745. struct ieee80211_rx_status *status = &htt->rx_status;
  1746. struct sk_buff_head list;
  1747. struct sk_buff_head amsdu;
  1748. u16 peer_id;
  1749. u16 msdu_count;
  1750. u8 vdev_id;
  1751. u8 tid;
  1752. bool offload;
  1753. bool frag;
  1754. int ret;
  1755. lockdep_assert_held(&htt->rx_ring.lock);
  1756. if (htt->rx_confused)
  1757. return -EIO;
  1758. skb_pull(skb, sizeof(resp->hdr));
  1759. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1760. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1761. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1762. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1763. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1764. offload = !!(resp->rx_in_ord_ind.info &
  1765. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1766. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1767. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1768. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1769. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1770. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) {
  1771. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1772. return -EINVAL;
  1773. }
  1774. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1775. * extracted and processed.
  1776. */
  1777. __skb_queue_head_init(&list);
  1778. if (ar->hw_params.target_64bit)
  1779. ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind,
  1780. &list);
  1781. else
  1782. ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind,
  1783. &list);
  1784. if (ret < 0) {
  1785. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1786. htt->rx_confused = true;
  1787. return -EIO;
  1788. }
  1789. /* Offloaded frames are very different and need to be handled
  1790. * separately.
  1791. */
  1792. if (offload)
  1793. ath10k_htt_rx_h_rx_offload(ar, &list);
  1794. while (!skb_queue_empty(&list)) {
  1795. __skb_queue_head_init(&amsdu);
  1796. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1797. switch (ret) {
  1798. case 0:
  1799. /* Note: The in-order indication may report interleaved
  1800. * frames from different PPDUs meaning reported rx rate
  1801. * to mac80211 isn't accurate/reliable. It's still
  1802. * better to report something than nothing though. This
  1803. * should still give an idea about rx rate to the user.
  1804. */
  1805. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1806. ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL);
  1807. ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL,
  1808. NULL);
  1809. ath10k_htt_rx_h_enqueue(ar, &amsdu, status);
  1810. break;
  1811. case -EAGAIN:
  1812. /* fall through */
  1813. default:
  1814. /* Should not happen. */
  1815. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1816. htt->rx_confused = true;
  1817. __skb_queue_purge(&list);
  1818. return -EIO;
  1819. }
  1820. }
  1821. return ret;
  1822. }
  1823. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  1824. const __le32 *resp_ids,
  1825. int num_resp_ids)
  1826. {
  1827. int i;
  1828. u32 resp_id;
  1829. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  1830. num_resp_ids);
  1831. for (i = 0; i < num_resp_ids; i++) {
  1832. resp_id = le32_to_cpu(resp_ids[i]);
  1833. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  1834. resp_id);
  1835. /* TODO: free resp_id */
  1836. }
  1837. }
  1838. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  1839. {
  1840. struct ieee80211_hw *hw = ar->hw;
  1841. struct ieee80211_txq *txq;
  1842. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1843. struct htt_tx_fetch_record *record;
  1844. size_t len;
  1845. size_t max_num_bytes;
  1846. size_t max_num_msdus;
  1847. size_t num_bytes;
  1848. size_t num_msdus;
  1849. const __le32 *resp_ids;
  1850. u16 num_records;
  1851. u16 num_resp_ids;
  1852. u16 peer_id;
  1853. u8 tid;
  1854. int ret;
  1855. int i;
  1856. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  1857. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  1858. if (unlikely(skb->len < len)) {
  1859. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  1860. return;
  1861. }
  1862. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  1863. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  1864. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  1865. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  1866. if (unlikely(skb->len < len)) {
  1867. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  1868. return;
  1869. }
  1870. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
  1871. num_records, num_resp_ids,
  1872. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  1873. if (!ar->htt.tx_q_state.enabled) {
  1874. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  1875. return;
  1876. }
  1877. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  1878. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  1879. return;
  1880. }
  1881. rcu_read_lock();
  1882. for (i = 0; i < num_records; i++) {
  1883. record = &resp->tx_fetch_ind.records[i];
  1884. peer_id = MS(le16_to_cpu(record->info),
  1885. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  1886. tid = MS(le16_to_cpu(record->info),
  1887. HTT_TX_FETCH_RECORD_INFO_TID);
  1888. max_num_msdus = le16_to_cpu(record->num_msdus);
  1889. max_num_bytes = le32_to_cpu(record->num_bytes);
  1890. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
  1891. i, peer_id, tid, max_num_msdus, max_num_bytes);
  1892. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1893. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1894. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1895. peer_id, tid);
  1896. continue;
  1897. }
  1898. spin_lock_bh(&ar->data_lock);
  1899. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1900. spin_unlock_bh(&ar->data_lock);
  1901. /* It is okay to release the lock and use txq because RCU read
  1902. * lock is held.
  1903. */
  1904. if (unlikely(!txq)) {
  1905. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1906. peer_id, tid);
  1907. continue;
  1908. }
  1909. num_msdus = 0;
  1910. num_bytes = 0;
  1911. while (num_msdus < max_num_msdus &&
  1912. num_bytes < max_num_bytes) {
  1913. ret = ath10k_mac_tx_push_txq(hw, txq);
  1914. if (ret < 0)
  1915. break;
  1916. num_msdus++;
  1917. num_bytes += ret;
  1918. }
  1919. record->num_msdus = cpu_to_le16(num_msdus);
  1920. record->num_bytes = cpu_to_le32(num_bytes);
  1921. ath10k_htt_tx_txq_recalc(hw, txq);
  1922. }
  1923. rcu_read_unlock();
  1924. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  1925. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  1926. ret = ath10k_htt_tx_fetch_resp(ar,
  1927. resp->tx_fetch_ind.token,
  1928. resp->tx_fetch_ind.fetch_seq_num,
  1929. resp->tx_fetch_ind.records,
  1930. num_records);
  1931. if (unlikely(ret)) {
  1932. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  1933. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  1934. /* FIXME: request fw restart */
  1935. }
  1936. ath10k_htt_tx_txq_sync(ar);
  1937. }
  1938. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  1939. struct sk_buff *skb)
  1940. {
  1941. const struct htt_resp *resp = (void *)skb->data;
  1942. size_t len;
  1943. int num_resp_ids;
  1944. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  1945. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  1946. if (unlikely(skb->len < len)) {
  1947. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  1948. return;
  1949. }
  1950. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  1951. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  1952. if (unlikely(skb->len < len)) {
  1953. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  1954. return;
  1955. }
  1956. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  1957. resp->tx_fetch_confirm.resp_ids,
  1958. num_resp_ids);
  1959. }
  1960. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  1961. struct sk_buff *skb)
  1962. {
  1963. const struct htt_resp *resp = (void *)skb->data;
  1964. const struct htt_tx_mode_switch_record *record;
  1965. struct ieee80211_txq *txq;
  1966. struct ath10k_txq *artxq;
  1967. size_t len;
  1968. size_t num_records;
  1969. enum htt_tx_mode_switch_mode mode;
  1970. bool enable;
  1971. u16 info0;
  1972. u16 info1;
  1973. u16 threshold;
  1974. u16 peer_id;
  1975. u8 tid;
  1976. int i;
  1977. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  1978. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  1979. if (unlikely(skb->len < len)) {
  1980. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  1981. return;
  1982. }
  1983. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  1984. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  1985. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  1986. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1987. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  1988. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1989. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1990. "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
  1991. info0, info1, enable, num_records, mode, threshold);
  1992. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  1993. if (unlikely(skb->len < len)) {
  1994. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  1995. return;
  1996. }
  1997. switch (mode) {
  1998. case HTT_TX_MODE_SWITCH_PUSH:
  1999. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  2000. break;
  2001. default:
  2002. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  2003. mode);
  2004. return;
  2005. }
  2006. if (!enable)
  2007. return;
  2008. ar->htt.tx_q_state.enabled = enable;
  2009. ar->htt.tx_q_state.mode = mode;
  2010. ar->htt.tx_q_state.num_push_allowed = threshold;
  2011. rcu_read_lock();
  2012. for (i = 0; i < num_records; i++) {
  2013. record = &resp->tx_mode_switch_ind.records[i];
  2014. info0 = le16_to_cpu(record->info0);
  2015. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  2016. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  2017. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  2018. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  2019. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  2020. peer_id, tid);
  2021. continue;
  2022. }
  2023. spin_lock_bh(&ar->data_lock);
  2024. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  2025. spin_unlock_bh(&ar->data_lock);
  2026. /* It is okay to release the lock and use txq because RCU read
  2027. * lock is held.
  2028. */
  2029. if (unlikely(!txq)) {
  2030. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  2031. peer_id, tid);
  2032. continue;
  2033. }
  2034. spin_lock_bh(&ar->htt.tx_lock);
  2035. artxq = (void *)txq->drv_priv;
  2036. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  2037. spin_unlock_bh(&ar->htt.tx_lock);
  2038. }
  2039. rcu_read_unlock();
  2040. ath10k_mac_tx_push_pending(ar);
  2041. }
  2042. void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  2043. {
  2044. bool release;
  2045. release = ath10k_htt_t2h_msg_handler(ar, skb);
  2046. /* Free the indication buffer */
  2047. if (release)
  2048. dev_kfree_skb_any(skb);
  2049. }
  2050. static inline bool is_valid_legacy_rate(u8 rate)
  2051. {
  2052. static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
  2053. 18, 24, 36, 48, 54};
  2054. int i;
  2055. for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
  2056. if (rate == legacy_rates[i])
  2057. return true;
  2058. }
  2059. return false;
  2060. }
  2061. static void
  2062. ath10k_update_per_peer_tx_stats(struct ath10k *ar,
  2063. struct ieee80211_sta *sta,
  2064. struct ath10k_per_peer_tx_stats *peer_stats)
  2065. {
  2066. struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
  2067. u8 rate = 0, sgi;
  2068. struct rate_info txrate;
  2069. lockdep_assert_held(&ar->data_lock);
  2070. txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
  2071. txrate.bw = ATH10K_HW_BW(peer_stats->flags);
  2072. txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
  2073. txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
  2074. sgi = ATH10K_HW_GI(peer_stats->flags);
  2075. if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) {
  2076. ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs);
  2077. return;
  2078. }
  2079. if (txrate.flags == WMI_RATE_PREAMBLE_HT &&
  2080. (txrate.mcs > 7 || txrate.nss < 1)) {
  2081. ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats",
  2082. txrate.mcs, txrate.nss);
  2083. return;
  2084. }
  2085. memset(&arsta->txrate, 0, sizeof(arsta->txrate));
  2086. if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
  2087. txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
  2088. rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
  2089. if (!is_valid_legacy_rate(rate)) {
  2090. ath10k_warn(ar, "Invalid legacy rate %hhd peer stats",
  2091. rate);
  2092. return;
  2093. }
  2094. /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
  2095. rate *= 10;
  2096. if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
  2097. rate = rate - 5;
  2098. arsta->txrate.legacy = rate;
  2099. } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
  2100. arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
  2101. arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1);
  2102. } else {
  2103. arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
  2104. arsta->txrate.mcs = txrate.mcs;
  2105. }
  2106. if (sgi)
  2107. arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
  2108. arsta->txrate.nss = txrate.nss;
  2109. arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw);
  2110. }
  2111. static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
  2112. struct sk_buff *skb)
  2113. {
  2114. struct htt_resp *resp = (struct htt_resp *)skb->data;
  2115. struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
  2116. struct htt_per_peer_tx_stats_ind *tx_stats;
  2117. struct ieee80211_sta *sta;
  2118. struct ath10k_peer *peer;
  2119. int peer_id, i;
  2120. u8 ppdu_len, num_ppdu;
  2121. num_ppdu = resp->peer_tx_stats.num_ppdu;
  2122. ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
  2123. if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
  2124. ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
  2125. return;
  2126. }
  2127. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  2128. (resp->peer_tx_stats.payload);
  2129. peer_id = __le16_to_cpu(tx_stats->peer_id);
  2130. rcu_read_lock();
  2131. spin_lock_bh(&ar->data_lock);
  2132. peer = ath10k_peer_find_by_id(ar, peer_id);
  2133. if (!peer) {
  2134. ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
  2135. peer_id);
  2136. goto out;
  2137. }
  2138. sta = peer->sta;
  2139. for (i = 0; i < num_ppdu; i++) {
  2140. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  2141. (resp->peer_tx_stats.payload + i * ppdu_len);
  2142. p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
  2143. p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
  2144. p_tx_stats->failed_bytes =
  2145. __le32_to_cpu(tx_stats->failed_bytes);
  2146. p_tx_stats->ratecode = tx_stats->ratecode;
  2147. p_tx_stats->flags = tx_stats->flags;
  2148. p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
  2149. p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
  2150. p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
  2151. ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
  2152. }
  2153. out:
  2154. spin_unlock_bh(&ar->data_lock);
  2155. rcu_read_unlock();
  2156. }
  2157. static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data)
  2158. {
  2159. struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data;
  2160. struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
  2161. struct ath10k_10_2_peer_tx_stats *tx_stats;
  2162. struct ieee80211_sta *sta;
  2163. struct ath10k_peer *peer;
  2164. u16 log_type = __le16_to_cpu(hdr->log_type);
  2165. u32 peer_id = 0, i;
  2166. if (log_type != ATH_PKTLOG_TYPE_TX_STAT)
  2167. return;
  2168. tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) +
  2169. ATH10K_10_2_TX_STATS_OFFSET);
  2170. if (!tx_stats->tx_ppdu_cnt)
  2171. return;
  2172. peer_id = tx_stats->peer_id;
  2173. rcu_read_lock();
  2174. spin_lock_bh(&ar->data_lock);
  2175. peer = ath10k_peer_find_by_id(ar, peer_id);
  2176. if (!peer) {
  2177. ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n",
  2178. peer_id);
  2179. goto out;
  2180. }
  2181. sta = peer->sta;
  2182. for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) {
  2183. p_tx_stats->succ_bytes =
  2184. __le16_to_cpu(tx_stats->success_bytes[i]);
  2185. p_tx_stats->retry_bytes =
  2186. __le16_to_cpu(tx_stats->retry_bytes[i]);
  2187. p_tx_stats->failed_bytes =
  2188. __le16_to_cpu(tx_stats->failed_bytes[i]);
  2189. p_tx_stats->ratecode = tx_stats->ratecode[i];
  2190. p_tx_stats->flags = tx_stats->flags[i];
  2191. p_tx_stats->succ_pkts = tx_stats->success_pkts[i];
  2192. p_tx_stats->retry_pkts = tx_stats->retry_pkts[i];
  2193. p_tx_stats->failed_pkts = tx_stats->failed_pkts[i];
  2194. ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
  2195. }
  2196. spin_unlock_bh(&ar->data_lock);
  2197. rcu_read_unlock();
  2198. return;
  2199. out:
  2200. spin_unlock_bh(&ar->data_lock);
  2201. rcu_read_unlock();
  2202. }
  2203. bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  2204. {
  2205. struct ath10k_htt *htt = &ar->htt;
  2206. struct htt_resp *resp = (struct htt_resp *)skb->data;
  2207. enum htt_t2h_msg_type type;
  2208. /* confirm alignment */
  2209. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  2210. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  2211. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  2212. resp->hdr.msg_type);
  2213. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  2214. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  2215. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  2216. return true;
  2217. }
  2218. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  2219. switch (type) {
  2220. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  2221. htt->target_version_major = resp->ver_resp.major;
  2222. htt->target_version_minor = resp->ver_resp.minor;
  2223. complete(&htt->target_version_received);
  2224. break;
  2225. }
  2226. case HTT_T2H_MSG_TYPE_RX_IND:
  2227. ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind);
  2228. break;
  2229. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  2230. struct htt_peer_map_event ev = {
  2231. .vdev_id = resp->peer_map.vdev_id,
  2232. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  2233. };
  2234. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  2235. ath10k_peer_map_event(htt, &ev);
  2236. break;
  2237. }
  2238. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  2239. struct htt_peer_unmap_event ev = {
  2240. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  2241. };
  2242. ath10k_peer_unmap_event(htt, &ev);
  2243. break;
  2244. }
  2245. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  2246. struct htt_tx_done tx_done = {};
  2247. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  2248. int info = __le32_to_cpu(resp->mgmt_tx_completion.info);
  2249. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  2250. switch (status) {
  2251. case HTT_MGMT_TX_STATUS_OK:
  2252. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  2253. if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
  2254. ar->wmi.svc_map) &&
  2255. (resp->mgmt_tx_completion.flags &
  2256. HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) {
  2257. tx_done.ack_rssi =
  2258. FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK,
  2259. info);
  2260. }
  2261. break;
  2262. case HTT_MGMT_TX_STATUS_RETRY:
  2263. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  2264. break;
  2265. case HTT_MGMT_TX_STATUS_DROP:
  2266. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  2267. break;
  2268. }
  2269. status = ath10k_txrx_tx_unref(htt, &tx_done);
  2270. if (!status) {
  2271. spin_lock_bh(&htt->tx_lock);
  2272. ath10k_htt_tx_mgmt_dec_pending(htt);
  2273. spin_unlock_bh(&htt->tx_lock);
  2274. }
  2275. break;
  2276. }
  2277. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  2278. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  2279. break;
  2280. case HTT_T2H_MSG_TYPE_SEC_IND: {
  2281. struct ath10k *ar = htt->ar;
  2282. struct htt_security_indication *ev = &resp->security_indication;
  2283. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2284. "sec ind peer_id %d unicast %d type %d\n",
  2285. __le16_to_cpu(ev->peer_id),
  2286. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  2287. MS(ev->flags, HTT_SECURITY_TYPE));
  2288. complete(&ar->install_key_done);
  2289. break;
  2290. }
  2291. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  2292. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2293. skb->data, skb->len);
  2294. atomic_inc(&htt->num_mpdus_ready);
  2295. break;
  2296. }
  2297. case HTT_T2H_MSG_TYPE_TEST:
  2298. break;
  2299. case HTT_T2H_MSG_TYPE_STATS_CONF:
  2300. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  2301. break;
  2302. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  2303. /* Firmware can return tx frames if it's unable to fully
  2304. * process them and suspects host may be able to fix it. ath10k
  2305. * sends all tx frames as already inspected so this shouldn't
  2306. * happen unless fw has a bug.
  2307. */
  2308. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  2309. break;
  2310. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  2311. ath10k_htt_rx_addba(ar, resp);
  2312. break;
  2313. case HTT_T2H_MSG_TYPE_RX_DELBA:
  2314. ath10k_htt_rx_delba(ar, resp);
  2315. break;
  2316. case HTT_T2H_MSG_TYPE_PKTLOG: {
  2317. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  2318. skb->len -
  2319. offsetof(struct htt_resp,
  2320. pktlog_msg.payload));
  2321. if (ath10k_peer_stats_enabled(ar))
  2322. ath10k_fetch_10_2_tx_stats(ar,
  2323. resp->pktlog_msg.payload);
  2324. break;
  2325. }
  2326. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  2327. /* Ignore this event because mac80211 takes care of Rx
  2328. * aggregation reordering.
  2329. */
  2330. break;
  2331. }
  2332. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  2333. __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  2334. return false;
  2335. }
  2336. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  2337. break;
  2338. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  2339. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  2340. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  2341. ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
  2342. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2343. "htt chan change freq %u phymode %s\n",
  2344. freq, ath10k_wmi_phymode_str(phymode));
  2345. break;
  2346. }
  2347. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  2348. break;
  2349. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  2350. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  2351. if (!tx_fetch_ind) {
  2352. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  2353. break;
  2354. }
  2355. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  2356. break;
  2357. }
  2358. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  2359. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  2360. break;
  2361. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  2362. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  2363. break;
  2364. case HTT_T2H_MSG_TYPE_PEER_STATS:
  2365. ath10k_htt_fetch_peer_stats(ar, skb);
  2366. break;
  2367. case HTT_T2H_MSG_TYPE_EN_STATS:
  2368. default:
  2369. ath10k_warn(ar, "htt event (%d) not handled\n",
  2370. resp->hdr.msg_type);
  2371. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2372. skb->data, skb->len);
  2373. break;
  2374. }
  2375. return true;
  2376. }
  2377. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  2378. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  2379. struct sk_buff *skb)
  2380. {
  2381. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  2382. dev_kfree_skb_any(skb);
  2383. }
  2384. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  2385. static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget)
  2386. {
  2387. struct sk_buff *skb;
  2388. while (quota < budget) {
  2389. if (skb_queue_empty(&ar->htt.rx_msdus_q))
  2390. break;
  2391. skb = __skb_dequeue(&ar->htt.rx_msdus_q);
  2392. if (!skb)
  2393. break;
  2394. ath10k_process_rx(ar, skb);
  2395. quota++;
  2396. }
  2397. return quota;
  2398. }
  2399. int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
  2400. {
  2401. struct ath10k_htt *htt = &ar->htt;
  2402. struct htt_tx_done tx_done = {};
  2403. struct sk_buff_head tx_ind_q;
  2404. struct sk_buff *skb;
  2405. unsigned long flags;
  2406. int quota = 0, done, ret;
  2407. bool resched_napi = false;
  2408. __skb_queue_head_init(&tx_ind_q);
  2409. /* Process pending frames before dequeuing more data
  2410. * from hardware.
  2411. */
  2412. quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
  2413. if (quota == budget) {
  2414. resched_napi = true;
  2415. goto exit;
  2416. }
  2417. while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) {
  2418. spin_lock_bh(&htt->rx_ring.lock);
  2419. ret = ath10k_htt_rx_in_ord_ind(ar, skb);
  2420. spin_unlock_bh(&htt->rx_ring.lock);
  2421. dev_kfree_skb_any(skb);
  2422. if (ret == -EIO) {
  2423. resched_napi = true;
  2424. goto exit;
  2425. }
  2426. }
  2427. while (atomic_read(&htt->num_mpdus_ready)) {
  2428. ret = ath10k_htt_rx_handle_amsdu(htt);
  2429. if (ret == -EIO) {
  2430. resched_napi = true;
  2431. goto exit;
  2432. }
  2433. atomic_dec(&htt->num_mpdus_ready);
  2434. }
  2435. /* Deliver received data after processing data from hardware */
  2436. quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
  2437. /* From NAPI documentation:
  2438. * The napi poll() function may also process TX completions, in which
  2439. * case if it processes the entire TX ring then it should count that
  2440. * work as the rest of the budget.
  2441. */
  2442. if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
  2443. quota = budget;
  2444. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  2445. * From kfifo_get() documentation:
  2446. * Note that with only one concurrent reader and one concurrent writer,
  2447. * you don't need extra locking to use these macro.
  2448. */
  2449. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  2450. ath10k_txrx_tx_unref(htt, &tx_done);
  2451. ath10k_mac_tx_push_pending(ar);
  2452. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  2453. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  2454. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  2455. while ((skb = __skb_dequeue(&tx_ind_q))) {
  2456. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  2457. dev_kfree_skb_any(skb);
  2458. }
  2459. exit:
  2460. ath10k_htt_rx_msdu_buff_replenish(htt);
  2461. /* In case of rx failure or more data to read, report budget
  2462. * to reschedule NAPI poll
  2463. */
  2464. done = resched_napi ? budget : quota;
  2465. return done;
  2466. }
  2467. EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
  2468. static const struct ath10k_htt_rx_ops htt_rx_ops_32 = {
  2469. .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32,
  2470. .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32,
  2471. .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32,
  2472. .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32,
  2473. .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32,
  2474. };
  2475. static const struct ath10k_htt_rx_ops htt_rx_ops_64 = {
  2476. .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64,
  2477. .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64,
  2478. .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64,
  2479. .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64,
  2480. .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64,
  2481. };
  2482. void ath10k_htt_set_rx_ops(struct ath10k_htt *htt)
  2483. {
  2484. struct ath10k *ar = htt->ar;
  2485. if (ar->hw_params.target_64bit)
  2486. htt->rx_ops = &htt_rx_ops_64;
  2487. else
  2488. htt->rx_ops = &htt_rx_ops_32;
  2489. }