hif.h 6.3 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _HIF_H_
  18. #define _HIF_H_
  19. #include <linux/kernel.h>
  20. #include "core.h"
  21. #include "bmi.h"
  22. #include "debug.h"
  23. struct ath10k_hif_sg_item {
  24. u16 transfer_id;
  25. void *transfer_context; /* NULL = tx completion callback not called */
  26. void *vaddr; /* for debugging mostly */
  27. dma_addr_t paddr;
  28. u16 len;
  29. };
  30. struct ath10k_hif_ops {
  31. /* send a scatter-gather list to the target */
  32. int (*tx_sg)(struct ath10k *ar, u8 pipe_id,
  33. struct ath10k_hif_sg_item *items, int n_items);
  34. /* read firmware memory through the diagnose interface */
  35. int (*diag_read)(struct ath10k *ar, u32 address, void *buf,
  36. size_t buf_len);
  37. int (*diag_write)(struct ath10k *ar, u32 address, const void *data,
  38. int nbytes);
  39. /*
  40. * API to handle HIF-specific BMI message exchanges, this API is
  41. * synchronous and only allowed to be called from a context that
  42. * can block (sleep)
  43. */
  44. int (*exchange_bmi_msg)(struct ath10k *ar,
  45. void *request, u32 request_len,
  46. void *response, u32 *response_len);
  47. /* Post BMI phase, after FW is loaded. Starts regular operation */
  48. int (*start)(struct ath10k *ar);
  49. /* Clean up what start() did. This does not revert to BMI phase. If
  50. * desired so, call power_down() and power_up()
  51. */
  52. void (*stop)(struct ath10k *ar);
  53. int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id,
  54. u8 *ul_pipe, u8 *dl_pipe);
  55. void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe);
  56. /*
  57. * Check if prior sends have completed.
  58. *
  59. * Check whether the pipe in question has any completed
  60. * sends that have not yet been processed.
  61. * This function is only relevant for HIF pipes that are configured
  62. * to be polled rather than interrupt-driven.
  63. */
  64. void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force);
  65. u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id);
  66. u32 (*read32)(struct ath10k *ar, u32 address);
  67. void (*write32)(struct ath10k *ar, u32 address, u32 value);
  68. /* Power up the device and enter BMI transfer mode for FW download */
  69. int (*power_up)(struct ath10k *ar);
  70. /* Power down the device and free up resources. stop() must be called
  71. * before this if start() was called earlier
  72. */
  73. void (*power_down)(struct ath10k *ar);
  74. int (*suspend)(struct ath10k *ar);
  75. int (*resume)(struct ath10k *ar);
  76. /* fetch calibration data from target eeprom */
  77. int (*fetch_cal_eeprom)(struct ath10k *ar, void **data,
  78. size_t *data_len);
  79. int (*get_target_info)(struct ath10k *ar,
  80. struct bmi_target_info *target_info);
  81. };
  82. static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
  83. struct ath10k_hif_sg_item *items,
  84. int n_items)
  85. {
  86. return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items);
  87. }
  88. static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
  89. size_t buf_len)
  90. {
  91. return ar->hif.ops->diag_read(ar, address, buf, buf_len);
  92. }
  93. static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address,
  94. const void *data, int nbytes)
  95. {
  96. if (!ar->hif.ops->diag_write)
  97. return -EOPNOTSUPP;
  98. return ar->hif.ops->diag_write(ar, address, data, nbytes);
  99. }
  100. static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar,
  101. void *request, u32 request_len,
  102. void *response, u32 *response_len)
  103. {
  104. return ar->hif.ops->exchange_bmi_msg(ar, request, request_len,
  105. response, response_len);
  106. }
  107. static inline int ath10k_hif_start(struct ath10k *ar)
  108. {
  109. return ar->hif.ops->start(ar);
  110. }
  111. static inline void ath10k_hif_stop(struct ath10k *ar)
  112. {
  113. return ar->hif.ops->stop(ar);
  114. }
  115. static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar,
  116. u16 service_id,
  117. u8 *ul_pipe, u8 *dl_pipe)
  118. {
  119. return ar->hif.ops->map_service_to_pipe(ar, service_id,
  120. ul_pipe, dl_pipe);
  121. }
  122. static inline void ath10k_hif_get_default_pipe(struct ath10k *ar,
  123. u8 *ul_pipe, u8 *dl_pipe)
  124. {
  125. ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe);
  126. }
  127. static inline void ath10k_hif_send_complete_check(struct ath10k *ar,
  128. u8 pipe_id, int force)
  129. {
  130. ar->hif.ops->send_complete_check(ar, pipe_id, force);
  131. }
  132. static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar,
  133. u8 pipe_id)
  134. {
  135. return ar->hif.ops->get_free_queue_number(ar, pipe_id);
  136. }
  137. static inline int ath10k_hif_power_up(struct ath10k *ar)
  138. {
  139. return ar->hif.ops->power_up(ar);
  140. }
  141. static inline void ath10k_hif_power_down(struct ath10k *ar)
  142. {
  143. ar->hif.ops->power_down(ar);
  144. }
  145. static inline int ath10k_hif_suspend(struct ath10k *ar)
  146. {
  147. if (!ar->hif.ops->suspend)
  148. return -EOPNOTSUPP;
  149. return ar->hif.ops->suspend(ar);
  150. }
  151. static inline int ath10k_hif_resume(struct ath10k *ar)
  152. {
  153. if (!ar->hif.ops->resume)
  154. return -EOPNOTSUPP;
  155. return ar->hif.ops->resume(ar);
  156. }
  157. static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address)
  158. {
  159. if (!ar->hif.ops->read32) {
  160. ath10k_warn(ar, "hif read32 not supported\n");
  161. return 0xdeaddead;
  162. }
  163. return ar->hif.ops->read32(ar, address);
  164. }
  165. static inline void ath10k_hif_write32(struct ath10k *ar,
  166. u32 address, u32 data)
  167. {
  168. if (!ar->hif.ops->write32) {
  169. ath10k_warn(ar, "hif write32 not supported\n");
  170. return;
  171. }
  172. ar->hif.ops->write32(ar, address, data);
  173. }
  174. static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar,
  175. void **data,
  176. size_t *data_len)
  177. {
  178. if (!ar->hif.ops->fetch_cal_eeprom)
  179. return -EOPNOTSUPP;
  180. return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len);
  181. }
  182. static inline int ath10k_hif_get_target_info(struct ath10k *ar,
  183. struct bmi_target_info *tgt_info)
  184. {
  185. if (!ar->hif.ops->get_target_info)
  186. return -EOPNOTSUPP;
  187. return ar->hif.ops->get_target_info(ar, tgt_info);
  188. }
  189. #endif /* _HIF_H_ */